recipes-bsp: u-boot: Update recipes

0) Refactor the u-boot code structure.
1) Add ucm-imx8m-mini 2020.04 u-boot support.

Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>

recipes-bsp/u-boot/compulab/imx8mm.inc

@@ -1,4 +1,4 @@
-SRC_URI_append_mcm-imx8m-mini = " \
+SRC_URI_append = " \
 	file://0000-ucm-imx8m-mini-Add-basic-support.patch \
 	file://0001-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch \
 	file://0002-ucm-imx8m-mini-Fix-KConfig-warning.patch \
@@ -58,5 +58,12 @@ SRC_URI_append_mcm-imx8m-mini = " \
 	file://0056-mcm-imx8m-mini-config-Remove-unused-stuff.patch \
 	file://0057-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch \
 	file://0058-imx8m-soc-Don-t-reduce-the-memory-amount-by-the-opte.patch \
+	file://0059-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch \
+	file://0060-mcm-imx8m-mini-Refactor-spl-code.patch \
+	file://0061-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch \
+	file://0062-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch \
+	file://0063-cpl-imx8m-mini-Refactor-.h-configs.patch \
+	file://0064-cpl-imx8m-mini-Refactor-.dts.patch \
 	file://mcm-imx8m-mini_defconfig \
+	file://ucm-imx8m-mini_defconfig \
 "

recipes-bsp/u-boot/compulab/imx8mm/0059-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch

@@ -0,0 +1,120 @@
+From af6443352f9e37b776b41ec6323f7952b4e5b5f8 Mon Sep 17 00:00:00 2001
+From: Valentin Raevsky <valentin@compulab.co.il>
+Date: Wed, 15 Jul 2020 06:45:58 +0300
+Subject: [PATCH 59/64] mcm-imx8m-mini: Move tcm to plat/imx8mm
+
+Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
+---
+ board/compulab/mcm-imx8m-mini/Makefile         |  3 ++-
+ board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c |  2 +-
+ board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h | 19 -------------------
+ board/compulab/mcm-imx8m-mini/spl.c            |  1 -
+ board/compulab/plat/imx8mm/ddr/ddr.c           |  7 -------
+ board/compulab/plat/imx8mm/ddr/ddr.h           |  9 +++++++++
+ 6 files changed, 12 insertions(+), 29 deletions(-)
+ delete mode 100644 board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h
+
+diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile
+index b926ed9cf9..8ade3b58c5 100644
+--- a/board/compulab/mcm-imx8m-mini/Makefile
++++ b/board/compulab/mcm-imx8m-mini/Makefile
+@@ -6,8 +6,9 @@
+ 
+ obj-y += mcm-imx8m-mini.o
+ 
+-ifdef CONFIG_SPL_BUILD
+ ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/
++
++ifdef CONFIG_SPL_BUILD
+ obj-y += spl.o
+ endif
+ 
+diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
+index 7cfed94479..20f322223c 100644
+--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
+@@ -27,7 +27,7 @@
+ #include <usb.h>
+ #include <asm/mach-imx/boot_mode.h>
+ #include <asm/mach-imx/video.h>
+-#include "mcm-imx8m-mini.h"
++#include "ddr/ddr.h"
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h
+deleted file mode 100644
+index fc59756161..0000000000
+--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h
++++ /dev/null
+@@ -1,19 +0,0 @@
+-/*
+- * Copyright 2017 NXP
+- *
+- * SPDX-License-Identifier:	GPL-2.0+
+- */
+-
+-#ifndef __MCM_IMX8M_MINI__
+-#define __MCM_IMX8M_MINI__
+-
+-#define TCM_DATA_CFG 0x7e0000
+-
+-struct lpddr4_tcm_desc {
+-	unsigned int size;
+-	unsigned int sign;
+-	unsigned int index;
+-	unsigned int count;
+-};
+-
+-#endif
+diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c
+index f59bac4cb9..3f6cb65102 100644
+--- a/board/compulab/mcm-imx8m-mini/spl.c
++++ b/board/compulab/mcm-imx8m-mini/spl.c
+@@ -21,7 +21,6 @@
+ #include <fsl_esdhc_imx.h>
+ #include <mmc.h>
+ #include "ddr/ddr.h"
+-#include "mcm-imx8m-mini.h"
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c
+index b42cfe33df..b52f871dee 100644
+--- a/board/compulab/plat/imx8mm/ddr/ddr.c
++++ b/board/compulab/plat/imx8mm/ddr/ddr.c
+@@ -59,13 +59,6 @@ struct lpddr4_desc {
+ 	char *desc[4];
+ };
+ 
+-struct lpddr4_tcm_desc {
+-	unsigned int size;
+-	unsigned int sign;
+-	unsigned int index;
+-	unsigned int count;
+-};
+-
+ #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A')
+ static const struct lpddr4_desc lpddr4_array[] = {
+ 	{ .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, //Only the first timing entry is in use
+diff --git a/board/compulab/plat/imx8mm/ddr/ddr.h b/board/compulab/plat/imx8mm/ddr/ddr.h
+index a66e8ec3c4..4d2a238439 100644
+--- a/board/compulab/plat/imx8mm/ddr/ddr.h
++++ b/board/compulab/plat/imx8mm/ddr/ddr.h
+@@ -14,4 +14,13 @@ extern struct dram_timing_info ucm_dram_timing_01050008;
+ 
+ void spl_dram_init(void);
+ 
++#define TCM_DATA_CFG 0x7e0000
++
++struct lpddr4_tcm_desc {
++	unsigned int size;
++	unsigned int sign;
++	unsigned int index;
++	unsigned int count;
++};
++
+ #endif
+-- 
+2.11.0
+

recipes-bsp/u-boot/compulab/imx8mm/0060-mcm-imx8m-mini-Refactor-spl-code.patch

@@ -0,0 +1,700 @@
+From f24e3b8cad7ceaec586e33f10e001e9e2f02f52a Mon Sep 17 00:00:00 2001
+From: Valentin Raevsky <valentin@compulab.co.il>
+Date: Wed, 15 Jul 2020 07:58:17 +0300
+Subject: [PATCH 60/64] mcm-imx8m-mini: Refactor spl code
+
+Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
+---
+ board/compulab/mcm-imx8m-mini/Makefile         |   4 +-
+ board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c |  27 ---
+ board/compulab/mcm-imx8m-mini/spl.c            | 265 +----------------------
+ board/compulab/plat/imx8mm/Makefile            |   1 +
+ board/compulab/plat/imx8mm/spl/Makefile        |   7 +
+ board/compulab/plat/imx8mm/spl/common.c        |  33 +++
+ board/compulab/plat/imx8mm/spl/spl.c           | 278 +++++++++++++++++++++++++
+ 7 files changed, 323 insertions(+), 292 deletions(-)
+ create mode 100644 board/compulab/plat/imx8mm/spl/Makefile
+ create mode 100644 board/compulab/plat/imx8mm/spl/common.c
+ create mode 100644 board/compulab/plat/imx8mm/spl/spl.c
+
+diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile
+index 8ade3b58c5..9ce2875d6e 100644
+--- a/board/compulab/mcm-imx8m-mini/Makefile
++++ b/board/compulab/mcm-imx8m-mini/Makefile
+@@ -4,12 +4,12 @@
+ # SPDX-License-Identifier:      GPL-2.0+
+ #
+ 
+-obj-y += mcm-imx8m-mini.o
+-
+ ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/
+ 
+ ifdef CONFIG_SPL_BUILD
+ obj-y += spl.o
++else 
++obj-y += mcm-imx8m-mini.o
+ endif
+ 
+ obj-y += ../plat/imx8mm/
+diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
+index 20f322223c..d01b8f8767 100644
+--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c
+@@ -31,33 +31,6 @@
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+-#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+-#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
+-
+-static iomux_v3_cfg_t const uart_pads[] = {
+-	IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+-	IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+-};
+-
+-static iomux_v3_cfg_t const wdog_pads[] = {
+-	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+-};
+-
+-int board_early_init_f(void)
+-{
+-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+-
+-	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+-
+-	set_wdog_reset(wdog);
+-
+-	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+-
+-	init_uart_clk(2);
+-
+-	return 0;
+-}
+-
+ #ifdef CONFIG_BOARD_POSTCLK_INIT
+ int board_postclk_init(void)
+ {
+diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c
+index 3f6cb65102..d6ece8ef3e 100644
+--- a/board/compulab/mcm-imx8m-mini/spl.c
++++ b/board/compulab/mcm-imx8m-mini/spl.c
+@@ -1,270 +1,9 @@
+-/*
+- * Copyright 2020 CompuLab Ltd.
+- */
+-
+-#include <common.h>
+-#include <cpu_func.h>
+-#include <hang.h>
+-#include <spl.h>
+ #include <asm/io.h>
+ #include <asm/mach-imx/iomux-v3.h>
+-#include <asm/arch/clock.h>
+ #include <asm/arch/imx8mm_pins.h>
++#include <asm/arch/clock.h>
+ #include <asm/arch/sys_proto.h>
+-#include <asm/mach-imx/boot_mode.h>
+-#include <asm/arch/ddr.h>
+-
+-#include <power/pmic.h>
+-#include <power/bd71837.h>
+-#include <asm/mach-imx/gpio.h>
+-#include <asm/mach-imx/mxc_i2c.h>
+-#include <fsl_esdhc_imx.h>
+-#include <mmc.h>
+-#include "ddr/ddr.h"
+-
+-DECLARE_GLOBAL_DATA_PTR;
+-
+-int spl_board_boot_device(enum boot_device boot_dev_spl)
+-{
+-	switch (boot_dev_spl) {
+-	case SD2_BOOT:
+-	case MMC2_BOOT:
+-		return BOOT_DEVICE_MMC1;
+-	case SD3_BOOT:
+-	case MMC3_BOOT:
+-		return BOOT_DEVICE_MMC2;
+-	default:
+-		return BOOT_DEVICE_NONE;
+-	}
+-}
+-
+-#define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
+-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+-struct i2c_pads_info i2c_pad_info1 = {
+-	.scl = {
+-		.i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC,
+-		.gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC,
+-		.gp = IMX_GPIO_NR(5, 16),
+-	},
+-	.sda = {
+-		.i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC,
+-		.gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC,
+-		.gp = IMX_GPIO_NR(5, 17),
+-	},
+-};
+-
+-#define USDHC2_CD_GPIO	IMX_GPIO_NR(2, 18)
+-#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19)
+-
+-#define USDHC_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \
+-			 PAD_CTL_FSEL2)
+-#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1)
+-
+-static iomux_v3_cfg_t const usdhc3_pads[] = {
+-	IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-};
+-
+-static iomux_v3_cfg_t const usdhc2_pads[] = {
+-	IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+-	IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
+-};
+-
+-/*
+- * The evk board uses DAT3 to detect CD card plugin,
+- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd.
+- */
+-static iomux_v3_cfg_t const usdhc2_cd_pad =
+-	IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL);
+-
+-static iomux_v3_cfg_t const usdhc2_dat3_pad =
+-	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 |
+-	MUX_PAD_CTRL(USDHC_PAD_CTRL);
+-
+-
+-static struct fsl_esdhc_cfg usdhc_cfg[2] = {
+-	{USDHC2_BASE_ADDR, 0, 4},
+-	{USDHC3_BASE_ADDR, 0, 8},
+-};
+-
+-int board_mmc_init(bd_t *bis)
+-{
+-	int i, ret;
+-	/*
+-	 * According to the board_mmc_init() the following map is done:
+-	 * (U-Boot device node)    (Physical Port)
+-	 * mmc0                    USDHC1
+-	 * mmc1                    USDHC2
+-	 */
+-	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+-		switch (i) {
+-		case 0:
+-			init_clk_usdhc(1);
+-			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+-			imx_iomux_v3_setup_multiple_pads(
+-				usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+-			gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset");
+-			gpio_direction_output(USDHC2_PWR_GPIO, 0);
+-			udelay(500);
+-			gpio_direction_output(USDHC2_PWR_GPIO, 1);
+-			break;
+-		case 1:
+-			init_clk_usdhc(2);
+-			usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+-			imx_iomux_v3_setup_multiple_pads(
+-				usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+-			break;
+-		default:
+-			printf("Warning: you configured more USDHC controllers"
+-				"(%d) than supported by the board\n", i + 1);
+-			return -EINVAL;
+-		}
+-
+-		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+-		if (ret)
+-			return ret;
+-	}
+-
+-	return 0;
+-}
+-
+-int board_mmc_getcd(struct mmc *mmc)
+-{
+-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+-	int ret = 0;
+-
+-	switch (cfg->esdhc_base) {
+-	case USDHC3_BASE_ADDR:
+-		ret = 1;
+-		break;
+-	case USDHC2_BASE_ADDR:
+-		imx_iomux_v3_setup_pad(usdhc2_cd_pad);
+-		gpio_request(USDHC2_CD_GPIO, "usdhc2 cd");
+-		gpio_direction_input(USDHC2_CD_GPIO);
+-
+-		/*
+-		 * Since it is the DAT3 pin, this pin is pulled to
+-		 * low voltage if no card
+-		 */
+-		ret = gpio_get_value(USDHC2_CD_GPIO);
+-
+-		imx_iomux_v3_setup_pad(usdhc2_dat3_pad);
+-		return ret;
+-	}
+-
+-	return 1;
+-}
+-
+-#ifdef CONFIG_POWER
+-#define I2C_PMIC	1
+-int power_init_board(void)
+-{
+-	struct pmic *p;
+-	int ret;
+-
+-	ret = power_bd71837_init(I2C_PMIC);
+-	if (ret)
+-		printf("power init failed");
+-
+-	p = pmic_get("BD71837");
+-	pmic_probe(p);
+-
+-
+-	/* decrease RESET key long push time from the default 10s to 10ms */
+-	pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0);
+-
+-	/* unlock the PMIC regs */
+-	pmic_reg_write(p, BD71837_REGLOCK, 0x1);
+-
+-	/* decrease VDD_ARM to 0.85V for 1.2GHz operation */
+-	pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f);
+-
+-	/* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/
+-	pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83);
+-
+-	/* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
+-	pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28);
+-
+-	/* lock the PMIC regs */
+-	pmic_reg_write(p, BD71837_REGLOCK, 0x11);
+-
+-	return 0;
+-}
+-#else
+-int power_init_board(void) { return 0; }
+-#endif
+-
+-void spl_board_init(void)
+-{
+-#ifndef CONFIG_SPL_USB_SDP_SUPPORT
+-	/* Serial download mode */
+-	if (is_usb_boot()) {
+-		puts("Back to ROM, SDP\n");
+-		restore_boot_params();
+-	}
+-#endif
+-	puts("Normal Boot\n");
+-}
+-
+-#ifdef CONFIG_SPL_LOAD_FIT
+-int board_fit_config_name_match(const char *name)
+-{
+-	/* Just empty function now - can't decide what to choose */
+-	debug("%s: %s\n", __func__, name);
+-
+-	return 0;
+-}
+-#endif
+-
+-void board_init_f(ulong dummy)
+-{
+-	int ret;
+-	/* Clear the BSS. */
+-	memset(__bss_start, 0, __bss_end - __bss_start);
+-
+-	arch_cpu_init();
+-
+-	board_early_init_f();
+-
+-	timer_init();
+-
+-	preloader_console_init();
+-
+-	ret = spl_init();
+-	if (ret) {
+-		debug("spl_init() failed: %d\n", ret);
+-		hang();
+-	}
+-
+-	enable_tzc380();
+-
+-	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+-
+-	power_init_board();
+-	/* DDR initialization */
+-	spl_dram_init();
+-
+-	board_init_r(NULL, 0);
+-}
+-
+-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+-{
+-	puts ("resetting ...\n");
+-
+-	reset_cpu(WDOG1_BASE_ADDR);
+ 
++int spl_board_private_init(void) {
+ 	return 0;
+ }
+diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile
+index 04b9b2e8f8..2f68e0523e 100644
+--- a/board/compulab/plat/imx8mm/Makefile
++++ b/board/compulab/plat/imx8mm/Makefile
+@@ -1,2 +1,3 @@
+ obj-y += ddr/
+ obj-y += eeprom/
++obj-y += spl/
+diff --git a/board/compulab/plat/imx8mm/spl/Makefile b/board/compulab/plat/imx8mm/spl/Makefile
+new file mode 100644
+index 0000000000..a3a9acaa6e
+--- /dev/null
++++ b/board/compulab/plat/imx8mm/spl/Makefile
+@@ -0,0 +1,7 @@
++ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/
++
++obj-y += common.o
++
++ifdef CONFIG_SPL_BUILD
++obj-y += spl.o
++endif
+diff --git a/board/compulab/plat/imx8mm/spl/common.c b/board/compulab/plat/imx8mm/spl/common.c
+new file mode 100644
+index 0000000000..5f1d1e5b97
+--- /dev/null
++++ b/board/compulab/plat/imx8mm/spl/common.c
+@@ -0,0 +1,33 @@
++#include <asm/io.h>
++#include <asm/mach-imx/iomux-v3.h>
++#include <asm/arch/imx8mm_pins.h>
++#include <asm/arch/clock.h>
++#include <asm/arch/sys_proto.h>
++
++#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
++#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
++
++static iomux_v3_cfg_t const uart_pads[] = {
++	IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
++	IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
++};
++
++static iomux_v3_cfg_t const wdog_pads[] = {
++	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
++};
++
++int board_early_init_f(void)
++{
++	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
++
++	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
++
++	set_wdog_reset(wdog);
++
++	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
++
++	init_uart_clk(2);
++
++	return 0;
++}
++
+diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c
+new file mode 100644
+index 0000000000..3481bba493
+--- /dev/null
++++ b/board/compulab/plat/imx8mm/spl/spl.c
+@@ -0,0 +1,278 @@
++/*
++ * Copyright 2020 CompuLab Ltd.
++ */
++
++#include <common.h>
++#include <cpu_func.h>
++#include <hang.h>
++#include <spl.h>
++#include <asm/io.h>
++#include <asm/mach-imx/iomux-v3.h>
++#include <asm/arch/clock.h>
++#include <asm/arch/imx8mm_pins.h>
++#include <asm/arch/sys_proto.h>
++#include <asm/mach-imx/boot_mode.h>
++#include <asm/arch/ddr.h>
++
++#include <power/pmic.h>
++#include <power/bd71837.h>
++#include <asm/mach-imx/gpio.h>
++#include <asm/mach-imx/mxc_i2c.h>
++#include <fsl_esdhc_imx.h>
++#include <mmc.h>
++#include "ddr/ddr.h"
++
++DECLARE_GLOBAL_DATA_PTR;
++
++int spl_board_boot_device(enum boot_device boot_dev_spl)
++{
++	switch (boot_dev_spl) {
++	case SD2_BOOT:
++	case MMC2_BOOT:
++		return BOOT_DEVICE_MMC1;
++	case SD3_BOOT:
++	case MMC3_BOOT:
++		return BOOT_DEVICE_MMC2;
++	default:
++		return BOOT_DEVICE_NONE;
++	}
++}
++
++#define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
++#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
++struct i2c_pads_info i2c_pad_info1 = {
++	.scl = {
++		.i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC,
++		.gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC,
++		.gp = IMX_GPIO_NR(5, 16),
++	},
++	.sda = {
++		.i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC,
++		.gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC,
++		.gp = IMX_GPIO_NR(5, 17),
++	},
++};
++
++#define USDHC2_CD_GPIO	IMX_GPIO_NR(2, 18)
++#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19)
++
++#define USDHC_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \
++			 PAD_CTL_FSEL2)
++#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1)
++
++static iomux_v3_cfg_t const usdhc3_pads[] = {
++	IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++};
++
++static iomux_v3_cfg_t const usdhc2_pads[] = {
++	IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++	IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
++};
++
++/*
++ * The evk board uses DAT3 to detect CD card plugin,
++ * in u-boot we mux the pin to GPIO when doing board_mmc_getcd.
++ */
++static iomux_v3_cfg_t const usdhc2_cd_pad =
++	IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL);
++
++static iomux_v3_cfg_t const usdhc2_dat3_pad =
++	IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 |
++	MUX_PAD_CTRL(USDHC_PAD_CTRL);
++
++
++static struct fsl_esdhc_cfg usdhc_cfg[2] = {
++	{USDHC2_BASE_ADDR, 0, 4},
++	{USDHC3_BASE_ADDR, 0, 8},
++};
++
++int board_mmc_init(bd_t *bis)
++{
++	int i, ret;
++	/*
++	 * According to the board_mmc_init() the following map is done:
++	 * (U-Boot device node)    (Physical Port)
++	 * mmc0                    USDHC1
++	 * mmc1                    USDHC2
++	 */
++	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
++		switch (i) {
++		case 0:
++			init_clk_usdhc(1);
++			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
++			imx_iomux_v3_setup_multiple_pads(
++				usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
++			gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset");
++			gpio_direction_output(USDHC2_PWR_GPIO, 0);
++			udelay(500);
++			gpio_direction_output(USDHC2_PWR_GPIO, 1);
++			break;
++		case 1:
++			init_clk_usdhc(2);
++			usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
++			imx_iomux_v3_setup_multiple_pads(
++				usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
++			break;
++		default:
++			printf("Warning: you configured more USDHC controllers"
++				"(%d) than supported by the board\n", i + 1);
++			return -EINVAL;
++		}
++
++		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
++		if (ret)
++			return ret;
++	}
++
++	return 0;
++}
++
++int board_mmc_getcd(struct mmc *mmc)
++{
++	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
++	int ret = 0;
++
++	switch (cfg->esdhc_base) {
++	case USDHC3_BASE_ADDR:
++		ret = 1;
++		break;
++	case USDHC2_BASE_ADDR:
++		imx_iomux_v3_setup_pad(usdhc2_cd_pad);
++		gpio_request(USDHC2_CD_GPIO, "usdhc2 cd");
++		gpio_direction_input(USDHC2_CD_GPIO);
++
++		/*
++		 * Since it is the DAT3 pin, this pin is pulled to
++		 * low voltage if no card
++		 */
++		ret = gpio_get_value(USDHC2_CD_GPIO);
++
++		imx_iomux_v3_setup_pad(usdhc2_dat3_pad);
++		return ret;
++	}
++
++	return 1;
++}
++
++#ifdef CONFIG_POWER
++#define I2C_PMIC	1
++int power_init_board(void)
++{
++	struct pmic *p;
++	int ret;
++
++	ret = power_bd71837_init(I2C_PMIC);
++	if (ret)
++		printf("power init failed");
++
++	p = pmic_get("BD71837");
++	pmic_probe(p);
++
++
++	/* decrease RESET key long push time from the default 10s to 10ms */
++	pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0);
++
++	/* unlock the PMIC regs */
++	pmic_reg_write(p, BD71837_REGLOCK, 0x1);
++
++	/* decrease VDD_ARM to 0.85V for 1.2GHz operation */
++	pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f);
++
++	/* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/
++	pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83);
++
++	/* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
++	pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28);
++
++	/* lock the PMIC regs */
++	pmic_reg_write(p, BD71837_REGLOCK, 0x11);
++
++	return 0;
++}
++#else
++int power_init_board(void) { return 0; }
++#endif
++
++__weak int spl_board_private_init(void) {
++	return 0;
++}
++
++void spl_board_init(void)
++{
++#ifndef CONFIG_SPL_USB_SDP_SUPPORT
++	/* Serial download mode */
++	if (is_usb_boot()) {
++		puts("Back to ROM, SDP\n");
++		restore_boot_params();
++	}
++#endif
++	if (spl_board_private_init()) {
++		debug("spl_board_private_init() failed\n");
++		hang();
++	}
++	puts("Normal Boot\n");
++}
++
++#ifdef CONFIG_SPL_LOAD_FIT
++int board_fit_config_name_match(const char *name)
++{
++	/* Just empty function now - can't decide what to choose */
++	debug("%s: %s\n", __func__, name);
++
++	return 0;
++}
++#endif
++
++void board_init_f(ulong dummy)
++{
++	int ret;
++	/* Clear the BSS. */
++	memset(__bss_start, 0, __bss_end - __bss_start);
++
++	arch_cpu_init();
++
++	board_early_init_f();
++
++	timer_init();
++
++	preloader_console_init();
++
++	ret = spl_init();
++	if (ret) {
++		debug("spl_init() failed: %d\n", ret);
++		hang();
++	}
++
++	enable_tzc380();
++
++	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
++
++	power_init_board();
++	/* DDR initialization */
++	spl_dram_init();
++
++	board_init_r(NULL, 0);
++}
++
++int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
++{
++	puts ("resetting ...\n");
++
++	reset_cpu(WDOG1_BASE_ADDR);
++
++	return 0;
++}
+-- 
+2.11.0
+

recipes-bsp/u-boot/compulab/imx8mm/0062-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch

@@ -0,0 +1,52 @@
+From 1c615b12c4edde0bebd7020ed744d17f4257d978 Mon Sep 17 00:00:00 2001
+From: Valentin Raevsky <valentin@compulab.co.il>
+Date: Wed, 15 Jul 2020 08:58:22 +0300
+Subject: [PATCH 62/64] cpl-imx8m-mini: Set LOCALVERSION intead of EXTRAVERSION
+
+Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
+---
+ Makefile                         | 2 +-
+ configs/mcm-imx8m-mini_defconfig | 1 +
+ configs/ucm-imx8m-mini_defconfig | 1 +
+ 3 files changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index dbbb2fe285..312bb794c3 100644
+--- a/Makefile
++++ b/Makefile
+@@ -3,7 +3,7 @@
+ VERSION = 2020
+ PATCHLEVEL = 04
+ SUBLEVEL =
+-EXTRAVERSION = -mcm-imx8m-mini-1.0
++EXTRAVERSION =
+ NAME =
+ 
+ # *DOCUMENTATION*
+diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig
+index 92cdad293d..a4c3c90f83 100644
+--- a/configs/mcm-imx8m-mini_defconfig
++++ b/configs/mcm-imx8m-mini_defconfig
+@@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
+ CONFIG_SPL=y
+ CONFIG_CSF_SIZE=0x2000
+ CONFIG_SPL_TEXT_BASE=0x7E1000
++CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0"
+ CONFIG_FIT=y
+ CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+ CONFIG_SPL_LOAD_FIT=y
+diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig
+index 1bdf48190e..f86cc9e942 100644
+--- a/configs/ucm-imx8m-mini_defconfig
++++ b/configs/ucm-imx8m-mini_defconfig
+@@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
+ CONFIG_SPL=y
+ CONFIG_CSF_SIZE=0x2000
+ CONFIG_SPL_TEXT_BASE=0x7E1000
++CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0"
+ CONFIG_FIT=y
+ CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+ CONFIG_SPL_LOAD_FIT=y
+-- 
+2.11.0
+

recipes-bsp/u-boot/compulab/imx8mm/0063-cpl-imx8m-mini-Refactor-.h-configs.patch

@@ -0,0 +1,849 @@
+From bd5b3a9e6ddec7f7215a56794425a12909adf519 Mon Sep 17 00:00:00 2001
+From: Valentin Raevsky <valentin@compulab.co.il>
+Date: Wed, 15 Jul 2020 09:33:21 +0300
+Subject: [PATCH 63/64] cpl-imx8m-mini: Refactor .h configs
+
+Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
+---
+ include/configs/cpl-imx8m-mini.h | 275 +++++++++++++++++++++++++++++++++++++++
+ include/configs/mcm-imx8m-mini.h | 265 +------------------------------------
+ include/configs/ucm-imx8m-mini.h | 265 +------------------------------------
+ 3 files changed, 277 insertions(+), 528 deletions(-)
+ create mode 100644 include/configs/cpl-imx8m-mini.h
+
+diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h
+new file mode 100644
+index 0000000000..dd8120f4dc
+--- /dev/null
++++ b/include/configs/cpl-imx8m-mini.h
+@@ -0,0 +1,275 @@
++/*
++ * Copyright 2020 CompuLab
++ *
++ * SPDX-License-Identifier:	GPL-2.0+
++ */
++
++#ifndef __CPL_IMX8M_MINI_H
++#define __CPL_IMX8M_MINI_H
++
++#include <linux/sizes.h>
++#include <asm/arch/imx-regs.h>
++#include "imx_env.h"
++
++#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
++#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
++#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
++#define CONFIG_SYS_UBOOT_BASE		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
++
++#ifdef CONFIG_SPL_BUILD
++/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
++#define CONFIG_SPL_WATCHDOG_SUPPORT
++#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
++#define CONFIG_SPL_I2C_SUPPORT
++#define CONFIG_SPL_LIBCOMMON_SUPPORT
++#define CONFIG_SPL_LIBGENERIC_SUPPORT
++
++#define CONFIG_SPL_STACK            0x920000
++#define CONFIG_SPL_BSS_START_ADDR   0x910000
++#define CONFIG_SPL_BSS_MAX_SIZE     SZ_8K
++#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
++#define CONFIG_SYS_SPL_MALLOC_SIZE  SZ_512K
++
++/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
++#define CONFIG_MALLOC_F_ADDR        0x912000
++
++#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
++
++#undef CONFIG_DM_MMC
++#undef CONFIG_DM_PMIC
++#undef CONFIG_DM_PMIC_PFUZE100
++
++#define CONFIG_SYS_I2C
++#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
++#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
++#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
++
++#define CONFIG_POWER
++#define CONFIG_POWER_I2C
++#define CONFIG_POWER_BD71837
++
++#endif /*ifdef CONFIG_SPL_BUILD*/
++
++#define CONFIG_CMD_READ
++#define CONFIG_SERIAL_TAG
++#define CONFIG_FASTBOOT_USB_DEV 0
++
++#define CONFIG_REMAKE_ELF
++
++#define CONFIG_BOARD_POSTCLK_INIT
++
++/* Flat Device Tree Definitions */
++#define CONFIG_OF_BOARD_SETUP
++
++#undef CONFIG_CMD_IMLS
++
++#undef CONFIG_CMD_CRC32
++#undef CONFIG_BOOTM_NETBSD
++
++/* ENET Config */
++/* ENET1 */
++#if defined(CONFIG_CMD_NET)
++#define CONFIG_ETHPRIME                 "FEC"
++
++#define CONFIG_FEC_XCV_TYPE             RGMII
++#define CONFIG_FEC_MXC_PHYADDR          0
++#define FEC_QUIRK_ENET_MAC
++
++#define CONFIG_PHY_GIGE
++#define IMX_FEC_BASE			0x30BE0000
++
++#define CONFIG_PHYLIB
++#define CONFIG_PHY_ATHEROS
++#endif
++
++#define CONFIG_MFG_ENV_SETTINGS \
++	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
++		"rdinit=/linuxrc " \
++		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
++		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
++		"g_mass_storage.iSerialNumber=\"\" "\
++		"clk_ignore_unused "\
++		"\0" \
++	"initrd_addr=0x43800000\0" \
++	"initrd_high=0xffffffff\0" \
++	"emmc_dev=1\0" \
++	"sd_dev=0\0" \
++	"bootcmd_mfg=run mfgtool_args;  if iminfo ${initrd_addr}; then "\
++					   "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\
++					"else echo \"Run fastboot ...\"; fastboot 0; fi\0" \
++/* Initial environment variables */
++#define CONFIG_EXTRA_ENV_SETTINGS		\
++	CONFIG_MFG_ENV_SETTINGS \
++	"autoload=off\0" \
++	"script=boot.scr\0" \
++	"image=Image\0" \
++	"console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
++	"fdt_addr=0x43000000\0"			\
++	"fdt_high=0xffffffffffffffff\0"		\
++	"boot_fdt=yes\0" \
++	"fdt_file="CONFIG_DEFAULT_DTB"\0" \
++	"initrd_addr=0x43800000\0"		\
++	"initrd_high=0xffffffffffffffff\0" \
++	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
++	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
++	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
++	"mmcautodetect=yes\0" \
++	"root_opt=rootwait rw\0" \
++	"emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \
++	"setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \
++	"sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \
++	"setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \
++	"usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \
++	"setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \
++	"ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \
++	"ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \
++	"ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
++		"load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \
++	"bootscript=echo Running bootscript from mmc ...; " \
++		"source\0" \
++	"netargs=setenv bootargs console=${console} " \
++		"root=/dev/nfs " \
++		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
++	"netboot=echo Booting from net ...; " \
++		"run netargs;  " \
++		"if test ${ip_dyn} = yes; then " \
++			"setenv get_cmd dhcp; " \
++		"else " \
++			"setenv get_cmd tftp; " \
++		"fi; " \
++		"${get_cmd} ${loadaddr} ${image}; " \
++		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
++			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
++				"booti ${loadaddr} - ${fdt_addr}; " \
++			"else " \
++				"echo WARN: Cannot load the DT; " \
++			"fi; " \
++		"else " \
++			"booti; " \
++		"fi;\0"
++#define CONFIG_BOOTCOMMAND \
++	"for src in sd_ul usb_ul emmc_ul; do " \
++		"run ${src}; " \
++		"if run ulbootscript; then " \
++			"run bootscript; " \
++		"else " \
++			"if run ulimage; then " \
++				"if run ulfdt; then " \
++					"booti ${loadaddr} - ${fdt_addr}; " \
++				"else " \
++					"if test ${boot_fdt} != yes; then " \
++						"booti ${loadaddr}; " \
++					"fi; " \
++				"fi; " \
++			"fi; " \
++		"fi; " \
++	"done; " \
++	"usb start; ums 0 mmc ${mmcdev};"
++
++/* Link Definitions */
++#define CONFIG_LOADADDR			0x40480000
++
++#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
++
++#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
++#define CONFIG_SYS_INIT_RAM_SIZE        0x80000
++#define CONFIG_SYS_INIT_SP_OFFSET \
++        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
++#define CONFIG_SYS_INIT_SP_ADDR \
++        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
++
++#define CONFIG_ENV_OVERWRITE
++#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
++#define CONFIG_SYS_MMC_ENV_PART		1
++#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
++
++/* Size of malloc() pool */
++#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
++
++#define PHYS_SDRAM              0x40000000
++#define PHYS_SDRAM_2            0x100000000
++#define PHYS_SDRAM_SIZE   0 /* Memory chip autodetection */
++#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */
++#define CONFIG_NR_DRAM_BANKS    4
++#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
++
++#define MEMTEST_DIVIDER   2
++#define MEMTEST_NUMERATOR 1
++
++#define CONFIG_BAUDRATE			115200
++
++#define CONFIG_MXC_UART_BASE		UART3_BASE_ADDR
++
++/* Monitor Command Prompt */
++#undef CONFIG_SYS_PROMPT
++#define CONFIG_SYS_PROMPT		"u-boot=> "
++#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
++#define CONFIG_SYS_CBSIZE              2048
++#define CONFIG_SYS_MAXARGS             64
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
++#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
++					sizeof(CONFIG_SYS_PROMPT) + 16)
++
++#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
++
++#define CONFIG_IMX_BOOTAUX
++
++/* USDHC */
++#define CONFIG_FSL_USDHC
++
++#define CONFIG_SYS_FSL_USDHC_NUM	2
++#define CONFIG_SYS_FSL_ESDHC_ADDR       0
++
++#ifndef CONFIG_DM_I2C
++#define CONFIG_SYS_I2C
++#endif
++#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
++#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
++#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
++#define CONFIG_SYS_I2C_SPEED		100000
++
++/* EEPROM */
++#define CONFIG_ENV_EEPROM_IS_ON_I2C
++#define CONFIG_SYS_I2C_EEPROM_BUS		1
++#define CONFIG_SYS_I2C_SLAVE			0x00
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
++#define CONFIG_SYS_EEPROM_SIZE			256
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
++
++/* USB configs */
++#ifndef CONFIG_SPL_BUILD
++#define CONFIG_CMD_USB
++#define CONFIG_USB_STORAGE
++#define CONFIG_USBD_HS
++
++#define CONFIG_CMD_USB_MASS_STORAGE
++#define CONFIG_USB_GADGET_MASS_STORAGE
++#define CONFIG_USB_FUNCTION_MASS_STORAGE
++
++#endif
++
++#define CONFIG_USB_GADGET_VBUS_DRAW 2
++
++#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
++#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
++
++#ifdef CONFIG_VIDEO
++#define CONFIG_VIDEO_MXS
++#define CONFIG_VIDEO_LOGO
++#define CONFIG_SPLASH_SCREEN
++#define CONFIG_SPLASH_SCREEN_ALIGN
++#define CONFIG_CMD_BMP
++#define CONFIG_BMP_16BPP
++#define CONFIG_VIDEO_BMP_RLE8
++#define CONFIG_VIDEO_BMP_LOGO
++#define CONFIG_IMX_VIDEO_SKIP
++#define CONFIG_RM67191
++#endif
++
++#define CONFIG_BOARD_POSTCLK_INIT
++#define CONFIG_OF_BOARD_SETUP
++
++#endif
+diff --git a/include/configs/mcm-imx8m-mini.h b/include/configs/mcm-imx8m-mini.h
+index dd0448efca..602091a782 100644
+--- a/include/configs/mcm-imx8m-mini.h
++++ b/include/configs/mcm-imx8m-mini.h
+@@ -7,270 +7,7 @@
+ #ifndef __MCM_IMX8M_MINI_H
+ #define __MCM_IMX8M_MINI_H
+ 
+-#include <linux/sizes.h>
+-#include <asm/arch/imx-regs.h>
+-#include "imx_env.h"
+-
+-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
+-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
+-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+-#define CONFIG_SYS_UBOOT_BASE		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+-
+-#ifdef CONFIG_SPL_BUILD
+-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+-#define CONFIG_SPL_WATCHDOG_SUPPORT
+-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+-#define CONFIG_SPL_I2C_SUPPORT
+-#define CONFIG_SPL_LIBCOMMON_SUPPORT
+-#define CONFIG_SPL_LIBGENERIC_SUPPORT
+-
+-#define CONFIG_SPL_STACK            0x920000
+-#define CONFIG_SPL_BSS_START_ADDR   0x910000
+-#define CONFIG_SPL_BSS_MAX_SIZE     SZ_8K
+-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
+-#define CONFIG_SYS_SPL_MALLOC_SIZE  SZ_512K
+-
+-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+-#define CONFIG_MALLOC_F_ADDR        0x912000
+-
+-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
+-
+-#undef CONFIG_DM_MMC
+-#undef CONFIG_DM_PMIC
+-#undef CONFIG_DM_PMIC_PFUZE100
+-
+-#define CONFIG_SYS_I2C
+-#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+-#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+-#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+-
+-#define CONFIG_POWER
+-#define CONFIG_POWER_I2C
+-#define CONFIG_POWER_BD71837
+-
+-#endif /*ifdef CONFIG_SPL_BUILD*/
+-
+-#define CONFIG_CMD_READ
+-#define CONFIG_SERIAL_TAG
+-#define CONFIG_FASTBOOT_USB_DEV 0
+-
+-#define CONFIG_REMAKE_ELF
+-
+-#define CONFIG_BOARD_POSTCLK_INIT
+-
+-/* Flat Device Tree Definitions */
+-#define CONFIG_OF_BOARD_SETUP
+-
+-#undef CONFIG_CMD_IMLS
+-
+-#undef CONFIG_CMD_CRC32
+-#undef CONFIG_BOOTM_NETBSD
+-
+-/* ENET Config */
+-/* ENET1 */
+-#if defined(CONFIG_CMD_NET)
+-#define CONFIG_ETHPRIME                 "FEC"
+-
+-#define CONFIG_FEC_XCV_TYPE             RGMII
+-#define CONFIG_FEC_MXC_PHYADDR          0
+-#define FEC_QUIRK_ENET_MAC
+-
+-#define CONFIG_PHY_GIGE
+-#define IMX_FEC_BASE			0x30BE0000
+-
+-#define CONFIG_PHYLIB
+-#define CONFIG_PHY_ATHEROS
+-#endif
+-
+-#define CONFIG_MFG_ENV_SETTINGS \
+-	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
+-		"rdinit=/linuxrc " \
+-		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
+-		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
+-		"g_mass_storage.iSerialNumber=\"\" "\
+-		"clk_ignore_unused "\
+-		"\0" \
+-	"initrd_addr=0x43800000\0" \
+-	"initrd_high=0xffffffff\0" \
+-	"emmc_dev=1\0" \
+-	"sd_dev=0\0" \
+-	"bootcmd_mfg=run mfgtool_args;  if iminfo ${initrd_addr}; then "\
+-					   "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\
+-					"else echo \"Run fastboot ...\"; fastboot 0; fi\0" \
+-/* Initial environment variables */
+-#define CONFIG_EXTRA_ENV_SETTINGS		\
+-	CONFIG_MFG_ENV_SETTINGS \
+-	"autoload=off\0" \
+-	"script=boot.scr\0" \
+-	"image=Image\0" \
+-	"console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
+-	"fdt_addr=0x43000000\0"			\
+-	"fdt_high=0xffffffffffffffff\0"		\
+-	"boot_fdt=yes\0" \
+-	"fdt_file="CONFIG_DEFAULT_DTB"\0" \
+-	"initrd_addr=0x43800000\0"		\
+-	"initrd_high=0xffffffffffffffff\0" \
+-	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+-	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+-	"mmcautodetect=yes\0" \
+-	"root_opt=rootwait rw\0" \
+-	"emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \
+-	"sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \
+-	"usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \
+-	"ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \
+-	"ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \
+-	"ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+-		"load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \
+-	"bootscript=echo Running bootscript from mmc ...; " \
+-		"source\0" \
+-	"netargs=setenv bootargs console=${console} " \
+-		"root=/dev/nfs " \
+-		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+-	"netboot=echo Booting from net ...; " \
+-		"run netargs;  " \
+-		"if test ${ip_dyn} = yes; then " \
+-			"setenv get_cmd dhcp; " \
+-		"else " \
+-			"setenv get_cmd tftp; " \
+-		"fi; " \
+-		"${get_cmd} ${loadaddr} ${image}; " \
+-		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+-			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+-				"booti ${loadaddr} - ${fdt_addr}; " \
+-			"else " \
+-				"echo WARN: Cannot load the DT; " \
+-			"fi; " \
+-		"else " \
+-			"booti; " \
+-		"fi;\0"
+-#define CONFIG_BOOTCOMMAND \
+-	"for src in sd_ul usb_ul emmc_ul; do " \
+-		"run ${src}; " \
+-		"if run ulbootscript; then " \
+-			"run bootscript; " \
+-		"else " \
+-			"if run ulimage; then " \
+-				"if run ulfdt; then " \
+-					"booti ${loadaddr} - ${fdt_addr}; " \
+-				"else " \
+-					"if test ${boot_fdt} != yes; then " \
+-						"booti ${loadaddr}; " \
+-					"fi; " \
+-				"fi; " \
+-			"fi; " \
+-		"fi; " \
+-	"done; " \
+-	"usb start; ums 0 mmc ${mmcdev};"
+-
+-/* Link Definitions */
+-#define CONFIG_LOADADDR			0x40480000
+-
+-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+-
+-#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
+-#define CONFIG_SYS_INIT_RAM_SIZE        0x80000
+-#define CONFIG_SYS_INIT_SP_OFFSET \
+-        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+-#define CONFIG_SYS_INIT_SP_ADDR \
+-        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+-
+-#define CONFIG_ENV_OVERWRITE
+-#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
+-#define CONFIG_SYS_MMC_ENV_PART		1
+-#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+-
+-/* Size of malloc() pool */
+-#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
+-
+-#define PHYS_SDRAM              0x40000000
+-#define PHYS_SDRAM_2            0x100000000
+-#define PHYS_SDRAM_SIZE   0 /* Memory chip autodetection */
+-#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */
+-#define CONFIG_NR_DRAM_BANKS    4
+-#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
+-
+-#define MEMTEST_DIVIDER   2
+-#define MEMTEST_NUMERATOR 1
+-
+-#define CONFIG_BAUDRATE			115200
+-
+-#define CONFIG_MXC_UART_BASE		UART3_BASE_ADDR
+-
+-/* Monitor Command Prompt */
+-#undef CONFIG_SYS_PROMPT
+-#define CONFIG_SYS_PROMPT		"u-boot=> "
+-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+-#define CONFIG_SYS_CBSIZE              2048
+-#define CONFIG_SYS_MAXARGS             64
+-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+-					sizeof(CONFIG_SYS_PROMPT) + 16)
+-
+-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+-
+-#define CONFIG_IMX_BOOTAUX
+-
+-/* USDHC */
+-#define CONFIG_FSL_USDHC
+-
+-#define CONFIG_SYS_FSL_USDHC_NUM	2
+-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
+-
+-#ifndef CONFIG_DM_I2C
+-#define CONFIG_SYS_I2C
+-#endif
+-#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+-#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+-#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+-#define CONFIG_SYS_I2C_SPEED		100000
+-
+-/* EEPROM */
+-#define CONFIG_ENV_EEPROM_IS_ON_I2C
+-#define CONFIG_SYS_I2C_EEPROM_BUS		1
+-#define CONFIG_SYS_I2C_SLAVE			0x00
+-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+-#define CONFIG_SYS_EEPROM_SIZE			256
+-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+-
+-/* USB configs */
+-#ifndef CONFIG_SPL_BUILD
+-#define CONFIG_CMD_USB
+-#define CONFIG_USB_STORAGE
+-#define CONFIG_USBD_HS
+-
+-#define CONFIG_CMD_USB_MASS_STORAGE
+-#define CONFIG_USB_GADGET_MASS_STORAGE
+-#define CONFIG_USB_FUNCTION_MASS_STORAGE
+-
+-#endif
+-
+-#define CONFIG_USB_GADGET_VBUS_DRAW 2
+-
+-#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
+-#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
+-
+-#ifdef CONFIG_VIDEO
+-#define CONFIG_VIDEO_MXS
+-#define CONFIG_VIDEO_LOGO
+-#define CONFIG_SPLASH_SCREEN
+-#define CONFIG_SPLASH_SCREEN_ALIGN
+-#define CONFIG_CMD_BMP
+-#define CONFIG_BMP_16BPP
+-#define CONFIG_VIDEO_BMP_RLE8
+-#define CONFIG_VIDEO_BMP_LOGO
+-#define CONFIG_IMX_VIDEO_SKIP
+-#define CONFIG_RM67191
+-#endif
+-
+-#define CONFIG_BOARD_POSTCLK_INIT
+-#define CONFIG_OF_BOARD_SETUP
++#include "cpl-imx8m-mini.h"
+ 
+ #if defined(CONFIG_ANDROID_SUPPORT)
+ #include "mcm-imx8m-mini_android.h"
+diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h
+index fac1b9fadb..b3d6082a66 100644
+--- a/include/configs/ucm-imx8m-mini.h
++++ b/include/configs/ucm-imx8m-mini.h
+@@ -7,270 +7,7 @@
+ #ifndef __UCM_IMX8M_MINI_H
+ #define __UCM_IMX8M_MINI_H
+ 
+-#include <linux/sizes.h>
+-#include <asm/arch/imx-regs.h>
+-#include "imx_env.h"
+-
+-#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
+-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
+-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+-#define CONFIG_SYS_UBOOT_BASE		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+-
+-#ifdef CONFIG_SPL_BUILD
+-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+-#define CONFIG_SPL_WATCHDOG_SUPPORT
+-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+-#define CONFIG_SPL_I2C_SUPPORT
+-#define CONFIG_SPL_LIBCOMMON_SUPPORT
+-#define CONFIG_SPL_LIBGENERIC_SUPPORT
+-
+-#define CONFIG_SPL_STACK            0x920000
+-#define CONFIG_SPL_BSS_START_ADDR   0x910000
+-#define CONFIG_SPL_BSS_MAX_SIZE     SZ_8K
+-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
+-#define CONFIG_SYS_SPL_MALLOC_SIZE  SZ_512K
+-
+-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+-#define CONFIG_MALLOC_F_ADDR        0x912000
+-
+-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
+-
+-#undef CONFIG_DM_MMC
+-#undef CONFIG_DM_PMIC
+-#undef CONFIG_DM_PMIC_PFUZE100
+-
+-#define CONFIG_SYS_I2C
+-#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+-#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+-#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+-
+-#define CONFIG_POWER
+-#define CONFIG_POWER_I2C
+-#define CONFIG_POWER_BD71837
+-
+-#endif /*ifdef CONFIG_SPL_BUILD*/
+-
+-#define CONFIG_CMD_READ
+-#define CONFIG_SERIAL_TAG
+-#define CONFIG_FASTBOOT_USB_DEV 0
+-
+-#define CONFIG_REMAKE_ELF
+-
+-#define CONFIG_BOARD_POSTCLK_INIT
+-
+-/* Flat Device Tree Definitions */
+-#define CONFIG_OF_BOARD_SETUP
+-
+-#undef CONFIG_CMD_IMLS
+-
+-#undef CONFIG_CMD_CRC32
+-#undef CONFIG_BOOTM_NETBSD
+-
+-/* ENET Config */
+-/* ENET1 */
+-#if defined(CONFIG_CMD_NET)
+-#define CONFIG_ETHPRIME                 "FEC"
+-
+-#define CONFIG_FEC_XCV_TYPE             RGMII
+-#define CONFIG_FEC_MXC_PHYADDR          0
+-#define FEC_QUIRK_ENET_MAC
+-
+-#define CONFIG_PHY_GIGE
+-#define IMX_FEC_BASE			0x30BE0000
+-
+-#define CONFIG_PHYLIB
+-#define CONFIG_PHY_ATHEROS
+-#endif
+-
+-#define CONFIG_MFG_ENV_SETTINGS \
+-	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
+-		"rdinit=/linuxrc " \
+-		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
+-		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
+-		"g_mass_storage.iSerialNumber=\"\" "\
+-		"clk_ignore_unused "\
+-		"\0" \
+-	"initrd_addr=0x43800000\0" \
+-	"initrd_high=0xffffffff\0" \
+-	"emmc_dev=1\0" \
+-	"sd_dev=0\0" \
+-	"bootcmd_mfg=run mfgtool_args;  if iminfo ${initrd_addr}; then "\
+-					   "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\
+-					"else echo \"Run fastboot ...\"; fastboot 0; fi\0" \
+-/* Initial environment variables */
+-#define CONFIG_EXTRA_ENV_SETTINGS		\
+-	CONFIG_MFG_ENV_SETTINGS \
+-	"autoload=off\0" \
+-	"script=boot.scr\0" \
+-	"image=Image\0" \
+-	"console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
+-	"fdt_addr=0x43000000\0"			\
+-	"fdt_high=0xffffffffffffffff\0"		\
+-	"boot_fdt=yes\0" \
+-	"fdt_file="CONFIG_DEFAULT_DTB"\0" \
+-	"initrd_addr=0x43800000\0"		\
+-	"initrd_high=0xffffffffffffffff\0" \
+-	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+-	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+-	"mmcautodetect=yes\0" \
+-	"root_opt=rootwait rw\0" \
+-	"emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \
+-	"sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \
+-	"usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \
+-	"setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \
+-	"ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \
+-	"ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \
+-	"ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+-		"load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \
+-	"bootscript=echo Running bootscript from mmc ...; " \
+-		"source\0" \
+-	"netargs=setenv bootargs console=${console} " \
+-		"root=/dev/nfs " \
+-		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+-	"netboot=echo Booting from net ...; " \
+-		"run netargs;  " \
+-		"if test ${ip_dyn} = yes; then " \
+-			"setenv get_cmd dhcp; " \
+-		"else " \
+-			"setenv get_cmd tftp; " \
+-		"fi; " \
+-		"${get_cmd} ${loadaddr} ${image}; " \
+-		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+-			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+-				"booti ${loadaddr} - ${fdt_addr}; " \
+-			"else " \
+-				"echo WARN: Cannot load the DT; " \
+-			"fi; " \
+-		"else " \
+-			"booti; " \
+-		"fi;\0"
+-#define CONFIG_BOOTCOMMAND \
+-	"for src in sd_ul usb_ul emmc_ul; do " \
+-		"run ${src}; " \
+-		"if run ulbootscript; then " \
+-			"run bootscript; " \
+-		"else " \
+-			"if run ulimage; then " \
+-				"if run ulfdt; then " \
+-					"booti ${loadaddr} - ${fdt_addr}; " \
+-				"else " \
+-					"if test ${boot_fdt} != yes; then " \
+-						"booti ${loadaddr}; " \
+-					"fi; " \
+-				"fi; " \
+-			"fi; " \
+-		"fi; " \
+-	"done; " \
+-	"usb start; ums 0 mmc ${mmcdev};"
+-
+-/* Link Definitions */
+-#define CONFIG_LOADADDR			0x40480000
+-
+-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+-
+-#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
+-#define CONFIG_SYS_INIT_RAM_SIZE        0x80000
+-#define CONFIG_SYS_INIT_SP_OFFSET \
+-        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+-#define CONFIG_SYS_INIT_SP_ADDR \
+-        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+-
+-#define CONFIG_ENV_OVERWRITE
+-#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
+-#define CONFIG_SYS_MMC_ENV_PART		1
+-#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+-
+-/* Size of malloc() pool */
+-#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024)
+-
+-#define PHYS_SDRAM              0x40000000
+-#define PHYS_SDRAM_2            0x100000000
+-#define PHYS_SDRAM_SIZE   0 /* Memory chip autodetection */
+-#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */
+-#define CONFIG_NR_DRAM_BANKS    4
+-#define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
+-
+-#define MEMTEST_DIVIDER   2
+-#define MEMTEST_NUMERATOR 1
+-
+-#define CONFIG_BAUDRATE			115200
+-
+-#define CONFIG_MXC_UART_BASE		UART3_BASE_ADDR
+-
+-/* Monitor Command Prompt */
+-#undef CONFIG_SYS_PROMPT
+-#define CONFIG_SYS_PROMPT		"u-boot=> "
+-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+-#define CONFIG_SYS_CBSIZE              2048
+-#define CONFIG_SYS_MAXARGS             64
+-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+-					sizeof(CONFIG_SYS_PROMPT) + 16)
+-
+-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+-
+-#define CONFIG_IMX_BOOTAUX
+-
+-/* USDHC */
+-#define CONFIG_FSL_USDHC
+-
+-#define CONFIG_SYS_FSL_USDHC_NUM	2
+-#define CONFIG_SYS_FSL_ESDHC_ADDR       0
+-
+-#ifndef CONFIG_DM_I2C
+-#define CONFIG_SYS_I2C
+-#endif
+-#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+-#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+-#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+-#define CONFIG_SYS_I2C_SPEED		100000
+-
+-/* EEPROM */
+-#define CONFIG_ENV_EEPROM_IS_ON_I2C
+-#define CONFIG_SYS_I2C_EEPROM_BUS		1
+-#define CONFIG_SYS_I2C_SLAVE			0x00
+-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+-#define CONFIG_SYS_EEPROM_SIZE			256
+-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+-
+-/* USB configs */
+-#ifndef CONFIG_SPL_BUILD
+-#define CONFIG_CMD_USB
+-#define CONFIG_USB_STORAGE
+-#define CONFIG_USBD_HS
+-
+-#define CONFIG_CMD_USB_MASS_STORAGE
+-#define CONFIG_USB_GADGET_MASS_STORAGE
+-#define CONFIG_USB_FUNCTION_MASS_STORAGE
+-
+-#endif
+-
+-#define CONFIG_USB_GADGET_VBUS_DRAW 2
+-
+-#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
+-#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
+-
+-#ifdef CONFIG_VIDEO
+-#define CONFIG_VIDEO_MXS
+-#define CONFIG_VIDEO_LOGO
+-#define CONFIG_SPLASH_SCREEN
+-#define CONFIG_SPLASH_SCREEN_ALIGN
+-#define CONFIG_CMD_BMP
+-#define CONFIG_BMP_16BPP
+-#define CONFIG_VIDEO_BMP_RLE8
+-#define CONFIG_VIDEO_BMP_LOGO
+-#define CONFIG_IMX_VIDEO_SKIP
+-#define CONFIG_RM67191
+-#endif
+-
+-#define CONFIG_BOARD_POSTCLK_INIT
+-#define CONFIG_OF_BOARD_SETUP
++#include "cpl-imx8m-mini.h"
+ 
+ #if defined(CONFIG_ANDROID_SUPPORT)
+ #include "ucm-imx8m-mini_android.h"
+-- 
+2.11.0
+

recipes-bsp/u-boot/compulab/imx8mm/mcm-imx8m-mini_defconfig

@@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_CSF_SIZE=0x2000
 CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0"
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y

recipes-bsp/u-boot/compulab/imx8mm/ucm-imx8m-mini_defconfig

@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_SPL_SYS_ICACHE_OFF=y
+CONFIG_SPL_SYS_DCACHE_OFF=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x4400
+CONFIG_DM_GPIO=y
+CONFIG_TARGET_UCM_IMX8M_MINI=y
+CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb"
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_CSF_SIZE=0x2000
+CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0"
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+CONFIG_CONSOLE_MUX=y
+CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot=> "
+# CONFIG_BOOTM_NETBSD is not set
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_EEPROM_LAYOUT=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_ESDHC_IMX=y
+CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_DM_THERMAL=y
+CONFIG_NXP_TMU=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_SDP_LOADADDR=0x40400000
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set

recipes-bsp/u-boot/u-boot-imx_2020.04.bbappend

@@ -2,4 +2,4 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/compulab/imx8mm:"
 
 include compulab/imx8mm.inc
 
-COMPATIBLE_MACHINE = "mcm-imx8m-mini"
+COMPATIBLE_MACHINE = "(mcm-imx8m-mini|ucm-imx8m-mini)"