mirror of
https://github.com/feyisay07/meta-bsp-imx8mm.git
synced 2026-09-24 14:20:07 +01:00
optee: Set TEE_LOAD_ADDR=0x56000000
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
This commit is contained in:
committed by
Uri Mashiach
parent
fb025c9901
commit
1639042b4b
@@ -1,4 +1,4 @@
|
||||
SRC_URI_append = " \
|
||||
file://0001-optee-Set-the-machine-correct-UART.patch \
|
||||
file://0002-optee-Apply-a-new-CFG_TZDRAM_START-calcutation-logic.patch \
|
||||
file://0001-plat-imx-Update-mx8mm_cl_iot_gate-flavor.patch \
|
||||
file://0002-core-drivers-Increase-nb_banks-up-to-48.patch \
|
||||
"
|
||||
|
||||
-26
@@ -1,26 +0,0 @@
|
||||
From 74ae1af7f68300216b53ac832340761bf08f1719 Mon Sep 17 00:00:00 2001
|
||||
From: Valentin Raevsky <valentin@compulab.co.il>
|
||||
Date: Mon, 13 Jul 2020 05:16:52 +0000
|
||||
Subject: [PATCH 1/2] optee: Set the machine correct UART
|
||||
|
||||
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
|
||||
---
|
||||
core/arch/arm/plat-imx/conf.mk | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
|
||||
index 337f6890..5acb46c7 100644
|
||||
--- a/core/arch/arm/plat-imx/conf.mk
|
||||
+++ b/core/arch/arm/plat-imx/conf.mk
|
||||
@@ -330,7 +330,7 @@ endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
|
||||
CFG_DDR_SIZE ?= 0x80000000
|
||||
-CFG_UART_BASE ?= UART2_BASE
|
||||
+CFG_UART_BASE = UART3_BASE
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
|
||||
--
|
||||
2.17.1
|
||||
|
||||
+32
@@ -0,0 +1,32 @@
|
||||
From 20c3cdabe86e4270eceb0832189db19fd37509e9 Mon Sep 17 00:00:00 2001
|
||||
From: Valentin Raevsky <valentin@compulab.co.il>
|
||||
Date: Mon, 20 Dec 2021 12:58:50 +0200
|
||||
Subject: [PATCH 1/2] plat-imx: Update mx8mm_cl_iot_gate flavor
|
||||
|
||||
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
|
||||
---
|
||||
core/arch/arm/plat-imx/conf.mk | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
|
||||
index 7ae0d64c..6391d5bb 100644
|
||||
--- a/core/arch/arm/plat-imx/conf.mk
|
||||
+++ b/core/arch/arm/plat-imx/conf.mk
|
||||
@@ -368,10 +368,11 @@ CFG_UART_BASE ?= UART2_BASE
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate))
|
||||
-CFG_DDR_SIZE ?= 0x40000000
|
||||
+CFG_DDR_SIZE ?= UL(0x100000000)
|
||||
CFG_UART_BASE ?= UART3_BASE
|
||||
-CFG_NSEC_DDR_1_BASE ?= 0x80000000UL
|
||||
-CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL
|
||||
+CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) + 0x16000000)
|
||||
+$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
|
||||
+$(call force,CFG_CORE_ARM64_PA_BITS,36)
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
|
||||
--
|
||||
2.17.1
|
||||
|
||||
+26
@@ -0,0 +1,26 @@
|
||||
From 556d259c9337e081193171a8822accd8d92f6dc9 Mon Sep 17 00:00:00 2001
|
||||
From: Valentin Raevsky <valentin@compulab.co.il>
|
||||
Date: Mon, 20 Dec 2021 13:00:25 +0200
|
||||
Subject: [PATCH 2/2] core: drivers: Increase nb_banks up to 48
|
||||
|
||||
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
|
||||
---
|
||||
core/drivers/imx_ocotp.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/core/drivers/imx_ocotp.c b/core/drivers/imx_ocotp.c
|
||||
index 9758a972..616e8729 100644
|
||||
--- a/core/drivers/imx_ocotp.c
|
||||
+++ b/core/drivers/imx_ocotp.c
|
||||
@@ -216,7 +216,7 @@ static const struct ocotp_instance ocotp_imx7ulp = {
|
||||
};
|
||||
|
||||
static const struct ocotp_instance ocotp_imx8m = {
|
||||
- .nb_banks = 32,
|
||||
+ .nb_banks = 48,
|
||||
.nb_words = 8,
|
||||
.get_die_id = ocotp_get_die_id_mx,
|
||||
};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
-55
@@ -1,55 +0,0 @@
|
||||
From 928e166d8356dd43cdd68fdc080064450801a495 Mon Sep 17 00:00:00 2001
|
||||
From: Kirill Kapranov <kirill.kapranov@compulab.co.il>
|
||||
Date: Mon, 19 Apr 2021 17:30:22 +0300
|
||||
Subject: [PATCH 2/2] optee: Apply a new CFG_TZDRAM_START calcutation logics
|
||||
|
||||
1) Allocate at the uppere edge of the 1G
|
||||
2) Set the maximum available DRAM_SIZE=4G
|
||||
|
||||
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
|
||||
Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il>
|
||||
---
|
||||
core/arch/arm/plat-imx/conf.mk | 8 +++++++-
|
||||
core/arch/arm/plat-imx/platform_config.h | 6 +++---
|
||||
2 files changed, 10 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
|
||||
index aa801f11..75aa862c 100644
|
||||
--- a/core/arch/arm/plat-imx/conf.mk
|
||||
+++ b/core/arch/arm/plat-imx/conf.mk
|
||||
@@ -338,8 +338,14 @@ CFG_UART_BASE ?= UART1_BASE
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
|
||||
-CFG_DDR_SIZE ?= 0x80000000
|
||||
CFG_UART_BASE = UART3_BASE
|
||||
+CFG_DDR_SIZE = 0x100000000
|
||||
+CFG_DDR_0SEC_SIZE = 0x40000000
|
||||
+CFG_TZDRAM_START = ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_0SEC_SIZE))
|
||||
+
|
||||
+CFG_DRAM0_NSEC_SIZE = ($(CFG_DDR_0SEC_SIZE) - 0x02000000 )
|
||||
+CFG_DRAM1_NSEC_BASE = 0x80000000
|
||||
+CFG_DRAM1_NSEC_SIZE = ($(CFG_DDR_SIZE) - $(CFG_DDR_0SEC_SIZE))
|
||||
endif
|
||||
|
||||
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
|
||||
diff --git a/core/arch/arm/plat-imx/platform_config.h b/core/arch/arm/plat-imx/platform_config.h
|
||||
index 72bebcb2..8db15fa6 100644
|
||||
--- a/core/arch/arm/plat-imx/platform_config.h
|
||||
+++ b/core/arch/arm/plat-imx/platform_config.h
|
||||
@@ -75,9 +75,9 @@
|
||||
#if defined(CFG_MX8MQ) || defined(CFG_MX8MM) || defined(CFG_MX8MN) || \
|
||||
defined(CFG_MX8MP)
|
||||
#define DRAM0_NSEC_BASE CFG_DRAM_BASE
|
||||
-#define DRAM0_NSEC_SIZE (CFG_TZDRAM_START - CFG_DRAM_BASE)
|
||||
-#define DRAM1_NSEC_BASE (CFG_TZDRAM_START + 0x2000000)
|
||||
-#define DRAM1_NSEC_SIZE (CFG_DDR_SIZE - DRAM1_NSEC_BASE + CFG_DRAM_BASE)
|
||||
+#define DRAM0_NSEC_SIZE CFG_DRAM0_NSEC_SIZE
|
||||
+#define DRAM1_NSEC_BASE CFG_DRAM1_NSEC_BASE
|
||||
+#define DRAM1_NSEC_SIZE CFG_DRAM1_NSEC_SIZE
|
||||
#endif
|
||||
|
||||
#if defined(CFG_IMX_DEK_HAB) && !defined(DRAM0_NSEC_SIZE)
|
||||
--
|
||||
2.17.1
|
||||
|
||||
Reference in New Issue
Block a user