Commit Graph
355493 Commits
Author SHA1 Message Date
Tom Lokovic 7cfdff7b4a [clang-tidy] Add abseil-string-find-str-contains checker.
Summary: This adds a checker which suggests replacing string.find(...) == npos with absl::StrContains.

Reviewers: alexfh, hokein, aaron.ballman, njames93, ymandel

Reviewed By: ymandel

Subscribers: ymandel, Eugene.Zelenko, xazax.hun, mgorny, Charusso, phosek, cfe-commits

Tags: #clang, #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D80023
2020-05-28 12:35:57 -04:00
Adrian Prantl 8cec5c3581 Make VE.def a textual header 2020-05-28 09:35:19 -07:00
Louis Dionne 77b9abfc8e [libc++] Complete overhaul of constexpr support in std::array
This commit adds missing support for constexpr in std::array under all
standard modes up to and including C++20. It also transforms the <array>
tests to check for constexpr-friendliness under the right standard modes.

Fixes https://llvm.org/PR40124
Fixes rdar://57522096
Supersedes https://reviews.llvm.org/D60666

Differential Revision: https://reviews.llvm.org/D80452
2020-05-28 12:31:06 -04:00
alex-t b726d071b4 [AMDGPU] Reject moving PHI to VALU if the only VGPR input originated from move immediate
Summary:
PHIs result register class is set to VGPR or SGPR depending on the cross block value divergence.
         In some cases uniform PHI need to be converted to return VGPR to prevent the oddnumber of moves values from VGPR to SGPR and back.
         PHI should certainly return VGPR if it has at least one VGPR input. This change adds the exception.
         We don't want to convert uniform PHI to VGPRs in case the only VGPR input is a VGPR to SGPR COPY and definition od the
         source VGPR in this COPY is move immediate.

  bb.0:

     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %2:sreg_32 = .....

  bb.1:
     %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
     S_BRANCH %bb.3

  bb.3:
     %1:sreg_32 = COPY %0
     S_BRANCH %bb.2

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80434
2020-05-28 19:25:51 +03:00
Jacques Pienaar 2321ab9c69 [mlir] Fix mismatched-tags warning 2020-05-28 09:06:47 -07:00
Jacques Pienaar fefe4366c3 [mlir] Use ValueRange instead of ArrayRef<Value>
This allows constructing operand adaptor from existing op (useful for commonalizing verification as I want to do in a follow up).

I also add ability to use member initializers for the generated adaptor constructors for convenience.

Differential Revision: https://reviews.llvm.org/D80667
2020-05-28 09:05:24 -07:00
Dmitri Gribenko 35492270ed Remove WrapperMatcherInterface
Summary:
WrapperMatcherInterface is an abstraction over a member variable -- in
other words, not much of an abstraction at all. I think it makes code
harder to read more than in helps with deduplication. Not to even
mention the questionable usage of the ~Interface suffix for a type with
state.

Reviewers: ymandel

Reviewed By: ymandel

Subscribers: arichardson, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80704
2020-05-28 17:58:29 +02:00
Valeriy Savchenko 73c120a989 [analyzer] Introduce reasoning about symbolic remainder operator
Summary:
New logic tries to narrow possible result values of the remainder operation
based on its operands and their ranges.  It also tries to be conservative
with negative operands because according to the standard the sign of
the result is implementation-defined.

rdar://problem/44978988

Differential Revision: https://reviews.llvm.org/D80117
2020-05-28 18:56:38 +03:00
Valeriy Savchenko 2a09daff0f [analyzer] Generalize bitwise AND rules for ranges
Summary:
Previously the current solver started reasoning about bitwise AND
expressions only when one of the operands is a constant.  However,
very similar logic could be applied to ranges.  This commit addresses
this shortcoming.  Additionally, it refines how we deal with negative
operands.

rdar://problem/54359410

Differential Revision: https://reviews.llvm.org/D79434
2020-05-28 18:55:49 +03:00
Valeriy Savchenko 47c4b8bd68 [analyzer] Generalize bitwise OR rules for ranges
Summary:
Previously the current solver started reasoning about bitwise OR
expressions only when one of the operands is a constant.  However,
very similar logic could be applied to ranges.  This commit addresses
this shortcoming.  Additionally, it refines how we deal with negative
operands.

Differential Revision: https://reviews.llvm.org/D79336
2020-05-28 18:55:22 +03:00
Valeriy Savchenko 1f57d76a8d [analyzer] Refactor range inference for symbolic expressions
Summary:
This change introduces a new component to unite all of the reasoning
we have about operations on ranges in the analyzer's solver.
In many cases, we might conclude that the range for a symbolic operation
is much more narrow than the type implies.  While reasoning about
runtime conditions (especially in loops), we need to support more and
more of those little pieces of logic.  The new component mostly plays
a role of an organizer for those, and allows us to focus on the actual
reasoning about ranges and not dispatching manually on the types of the
nested symbolic expressions.

Differential Revision: https://reviews.llvm.org/D79232
2020-05-28 18:54:52 +03:00
Valeriy Savchenko bb2ae74717 [analyzer] Merge implementations of SymInt, IntSym, and SymSym exprs
Summary:
SymIntExpr, IntSymExpr, and SymSymExpr share a big portion of logic
that used to be duplicated across all three classes.  New
implementation also adds an easy way of introducing another type of
operands into the mix.

Differential Revision: https://reviews.llvm.org/D79156
2020-05-28 18:54:27 +03:00
Jean-Michel Gorius f5192d7fb7 [x86] Propagate memory operands during call frame optimization
Summary:
Propagate memory operands when folding load instructions into instructions that directly operate on memory.

The original revision has been split. See D80140 for the other part of the changes.

Reviewers: craig.topper, rnk, lebedev.ri, efriedma

Reviewed By: craig.topper

Subscribers: lebedev.ri, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80062
2020-05-28 17:45:53 +02:00
Yitzhak Mandelbaum ce5780b88c [libTooling] Fix Transformer to work with ambient traversal kinds.
Summary:
`RewriteRule`'s `applyFirst` was brittle with respect to the default setting of the
`TraversalKind`. This patch builds awareness of traversal kinds directly into
rewrite rules so that they are insensitive to any changes in defaults.

Reviewers: steveire, gribozavr

Subscribers: hokein, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80606
2020-05-28 11:42:07 -04:00
Jean-Michel Gorius db52a49010 [mlir] Make translation libraries available through MLIRConfig.cmake 2020-05-28 17:39:07 +02:00
Yitzhak Mandelbaum 04a96aa3e4 [ASTMatchers] Add traversal-kind support to DynTypedMatcher
Summary:
This patch exposes `TraversalKind` support in the `DynTypedMatcher` API. While
previously, the `match` method supported traversal logic, it was not possible to
set or get the traversal kind.

Reviewers: gribozavr, steveire

Subscribers: hokein, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80685
2020-05-28 11:18:37 -04:00
Sam McCall 8e325cfc14 [clangd] Work around PS4 -fno-exceptions, easier than disabling tests? 2020-05-28 17:14:23 +02:00
Matt Arsenault 06019e3125 AMDGPU: Add missing test for s_denorm_mode scheduling
Forgot to add this file to 1a9e0d7092
2020-05-28 11:07:22 -04:00
Matt Arsenault cf4d4e366a libclc: Compile with -nostdlib
This fixes a build error when compiling for amdgcn-amd-amdhsa, which
defaults to trying to link bitcode libraries.
2020-05-28 10:41:31 -04:00
Matt Arsenault 1a9e0d7092 AMDGPU: Make S_DENORM_MODE not be a scheduling boundary
Now that the mode register uses/defs should be properly modeled, we
don't need to treat the FP mode switch as an arbitrary side effect.
2020-05-28 10:39:33 -04:00
Simon Pilgrim 0ea52537fe SymbolicFile.h - removed unused FileSystem.h include. NFC.
Exposes a number of implicit dependencies that needs fixing in source files and XCOFFObjectFile.h.
2020-05-28 15:26:31 +01:00
Sam McCall 6c2b7ee2f7 Prevent test from failing in my home directory 2020-05-28 16:14:49 +02:00
Frederik Gossen f1ab7550bc [MLIR] Fix operand type in from_extent_tensor in the shape dialect
The operand of `from_extent_tensor` is now of the same index type as the result
type of the inverse operation `to_extent_tensor`.

Differential Revision: https://reviews.llvm.org/D80283
2020-05-28 14:12:47 +00:00
Wen-Heng (Jack) Chung 061fb8eb2d [mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic.
Make ConvertKernelFuncToCubin pass to be generic:

- Rename to ConvertKernelFuncToBlob.
- Allow specifying triple, target chip, target features.
- Initializing LLVM backend is supplied by a callback function.
- Lowering process from MLIR module to LLVM module is via another callback.
- Change mlir-cuda-runner to adopt the revised pass.
- Add new tests for lowering to ROCm HSA code object (HSACO).
- Tests for CUDA and ROCm are kept in separate directories.

Differential Revision: https://reviews.llvm.org/D80142
2020-05-28 09:08:28 -05:00
Frederik Gossen fdaa391e3d [MLIR] Add num_elements to the shape dialect
The operation `num_elements` determines the number of elements for a given
shape.
That is the product of its dimensions.

Differential Revision: https://reviews.llvm.org/D80281
2020-05-28 14:05:58 +00:00
Matt Arsenault d6671ee90c InferAddressSpaces: Handle ptrmask intrinsic
This one is slightly odd since it counts as an address expression,
which previously could never fail. Allow the existing TTI hook to
return the value to use, and re-use it for handling how to handle
ptrmask.

Handles the no-op addrspacecasts for AMDGPU. We could probably do
something better based on analysis of the mask value based on the
address space, but leave that for now.
2020-05-28 10:04:02 -04:00
Matt Arsenault 0da4353938 AMDGPU: Add baseline test for ptrmask infer address space 2020-05-28 10:04:02 -04:00
Frederik Gossen 6594d54571 [MLIR] Add index_to_size and size_to_index to the shape dialect
Add the two conversion operations `index_to_size` and `size_to_index` to the
shape dialect.
This facilitates the conversion of index types between the shape and the
standard dialect.

Differential Revision: https://reviews.llvm.org/D80280
2020-05-28 13:57:20 +00:00
Alexander Belyaev c3098e4f40 [MLIR] Add TensorFromElementsOp to Standard ops.
Differential Revision: https://reviews.llvm.org/D80705
2020-05-28 15:48:10 +02:00
Frederik Gossen dd484baffd [MLIR] Tidy up documentation for Shape_JoinOp, Shape_ReduceOp, and
`Shape_ConstSizeOp`

Fix places that refer to `shape.type` instead of `shape.shape`.

Differential Revision: https://reviews.llvm.org/D80278
2020-05-28 13:42:19 +00:00
Simon Pilgrim f6417f5db8 FileOutputBuffer.h - remove unused includes. NFC.
Move dependent includes down to source files where necessary.
2020-05-28 14:38:12 +01:00
Simon Pilgrim 1a945757ac WithColor.h - reduce unnecessary includes to forward declarations. NFC. 2020-05-28 14:38:11 +01:00
Frederik Gossen e73bb4fba7 [MLIR] Move ConcatOp to its lexicographic position
Purely cosmetic change.
The operation implementations in `Shape.cpp` are now lexicographic order.

Differential Revision: https://reviews.llvm.org/D80277
2020-05-28 13:37:22 +00:00
Simon Pilgrim 1ddac9563d [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits
Allows SimplifyDemandedBitsForTargetNode to peek through multi-use ops where MOVMSK only demands the signbit of each vector element.
2020-05-28 13:42:24 +01:00
Alok Kumar Sharma 7716681cfd Fixed bot failure after d20bf5a725
There was a failure on windows bit due to format mismatch on
different(Hex and Decimal) platforms even if meaning of output is same.

For example on X86 linux =>
DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
on X86 Windows-gnu =>
DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

: error: CHECK-SAME: expected string not found in input
; CHECK-SAME: DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
<stdin>:28:17: note: scanning from here
 DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)
                ^
<stdin>:28:18: note: possible intended match here
 DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

Now the test is limited to x86 using REQUIRED and -mtriple.

http://45.33.8.238/win/16214/step_11.txt
2020-05-28 18:01:38 +05:30
Dmitry Preobrazhensky f47e27e260 [AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants.
This change disables use of special SGPR registers like scc, vccz, execz, etc as operands of v_accvgpr_write.

See bug 45414: https://bugs.llvm.org/show_bug.cgi?id=45414

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80530
2020-05-28 15:10:55 +03:00
Simon Pilgrim 73ae678363 Fix MSVC signed/unsigned comparison warnings. NFC. 2020-05-28 13:07:06 +01:00
Simon Pilgrim ab5abce23c DWARFDebugMacro.h - remove unnecessary WithColor.h include. NFC. 2020-05-28 13:03:18 +01:00
Simon Pilgrim 84be4278e7 llvm-dwarfdump.h - remove unnecessary WithColor.h include. NFC. 2020-05-28 13:03:18 +01:00
Nemanja Ivanovic f9e94eb868 [Clang] Enable _Complex __float128
When I added __float128 a while ago, I neglected to add support for the complex
variant of the type. This patch just adds that.

Differential revision: https://reviews.llvm.org/D80533
2020-05-28 06:55:49 -05:00
Dmitry Preobrazhensky 45251ef534 [AMDGPU][MC] Corrected v_writelane_b32 to fix a decoding bug
Corrected vdst_in to match vdst operand type.
See bug 45193: https://bugs.llvm.org/show_bug.cgi?id=45193

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80636
2020-05-28 14:43:49 +03:00
Sam McCall a56141b8f9 [clangd] Highlight related control flow.
Summary:
This means e.g. highlighting "return" will show other returns/throws
from the same function, highlighting a case will show all the
return/breaks etc.

This is a bit of an abuse of textDocument/highlight, but seems useful.

Reviewers: adamcz

Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78454
2020-05-28 13:25:11 +02:00
Dmitry Preobrazhensky bab5dadfcd [AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once
Summary: disabled disassembly of successfully decoded fragments of code.

See detailed bug description: https://bugs.llvm.org/show_bug.cgi?id=46101

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80637
2020-05-28 14:20:18 +03:00
Valeriy Savchenko bd06c417e6 [analyzer] Allow bindings of the CompoundLiteralRegion
Summary:
CompoundLiteralRegions have been properly modeled before, but
'getBindingForElement` was not changed to accommodate this change
properly.

rdar://problem/46144644

Differential Revision: https://reviews.llvm.org/D78990
2020-05-28 14:11:57 +03:00
Georgii Rymar ad07d5f394 [yaml2obj] - Implement the "SectionHeaderTable" tag.
With the "SectionHeaderTable" it is now possible to reorder
entries in the section header table.

It also allows to stop emitting the table.

Differential revision: https://reviews.llvm.org/D80002
2020-05-28 13:42:43 +03:00
Sam McCall d283fc4f9d [DebugInfo] Use SplitTemplateClosers (foo<bar<baz> >) in DWARF too
Summary:
D76801 caused some regressions in debuginfo compatibility by changing how
certain functions were named.

For CodeView we try to mirror MSVC exactly: this was fixed in a549c0d004
For DWARF the situation is murkier. Per David Blaikie:
> In general DWARF doesn't specify this at all.
> [...]
> This isn't the only naming divergence between GCC and Clang

Nevertheless, including the space seems to provide better compatibility with
GCC and GDB. E.g. cpexprs.cc in the GDB testsuite requires this formatting.
And there was no particular desire to change the printing of names in debug
info in the first place (just in diagnostics and other more user-facing text).

Fixes PR46052

Reviewers: dblaikie, labath

Subscribers: aprantl, cfe-commits, dyung

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80554
2020-05-28 12:30:38 +02:00
Florian Hahn ab95ac0132 [AArch64] Precommit new fp extraction/insertion test. 2020-05-28 11:13:47 +01:00
Alok Kumar Sharma a0d847c6cd Fixed bot failure after d20bf5a725
There were some bot failures due unused funtion `rotateSign`
left in code.

http://lab.llvm.org:8011/builders/clang-ppc64le-rhel/builds/3731

error: unused function 'rotateSign' [-Werror,-Wunused-function]
static uint64_t rotateSign(int64_t I)
2020-05-28 15:42:04 +05:30
Cullen Rhodes 8a397b66b2 [AArch64][SVE] Add support for spilling/filling ZPR2/3/4
Summary:
This patch enables the register allocator to spill/fill lists of 2, 3
and 4 SVE vectors registers to/from the stack. This is implemented with
pseudo instructions that get expanded to individual LDR_ZXI/STR_ZXI
instructions in AArch64ExpandPseudoInsts.

Patch by Sander de Smalen.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75988
2020-05-28 10:02:57 +00:00
Victor Campos c010d4d195 [ARM] Improve codegen of volatile load/store of i64
Summary:
Instead of generating two i32 instructions for each load or store of a volatile
i64 value (two LDRs or STRs), now emit LDRD/STRD.

These improvements cover architectures implementing ARMv5TE or Thumb-2.

The code generation explicitly deviates from using the register-offset
variant of LDRD/STRD. In this variant, the register allocated to the
register-offset cannot be reused in any of the remaining operands. Such
restriction seems to be non-trivial to implement in LLVM, thus it is
left as a to-do.

Differential Revision: https://reviews.llvm.org/D70072
2020-05-28 10:52:43 +01:00