Commit Graph
354497 Commits
Author SHA1 Message Date
Christudasan Devadasan 7c4e711ef8 [AMDGPU] Enable base pointer.
When the callee requires a dynamic stack realignment,
it is not possible to correcty access the incoming
stack arguments using the stack pointer. We reserve a
base pointer in such cases to access the function arguments
inside the callee. The base pointer will hold the incoming
stack pointer value before any kind of delta added to it.

Reviewed By: arsenm, scott.linder

Differential Revision: https://reviews.llvm.org/D78811
2020-05-17 16:13:55 +05:30
Joachim Protze d23131a3c0 [OpenMP] Fix race condition in the completion/freeing of detached tasks
Spurious assertion failures are symptoms of a race condition for the handling
of detached tasks:
Assertion failure at kmp_tasking.cpp(3744): taskdata->td_flags.complete == 1.
Assertion failure at kmp_tasking.cpp(710): taskdata->td_flags.executing == 0.

in the case of detach=true, all accesses to taskdata in __kmp_task_finish need
to happen before (~line 873):

taskdata->td_flags.proxy = TASK_PROXY;

This assignment signals to __kmp_fulfill_event, that the task will need to be
freed there. So, conceptionally the ownership of taskdata is moved.

Reviewed By: AndreyChurbanov

Differential Revision: https://reviews.llvm.org/D79702
2020-05-17 12:28:38 +02:00
Fedor Sergeev f93a6aaebc [Inliner][NFC] silence gcc 'overloaded-virtual' warning on hiding of Pass::doInitialization
When compiling with -Werror=overloaded-virtual, gcc emits this:
====
llvm/include/llvm/Pass.h:102:16: error: ‘virtual bool llvm::Pass::doInitialization(llvm::Module&)’ was hidden [-Werror=overloaded-virtual]
   virtual bool doInitialization(Module &)  { return false; }
                ^~~~~~~~~~~~~~~~
In file included from llvm/lib/Transforms/IPO/Inliner.cpp:20:0:
llvm/include/llvm/Transforms/IPO/Inliner.h:38:8: error:   by ‘virtual bool llvm::LegacyInlinerBase::doInitialization(llvm::CallGraph&)’ [-Werror=overloaded-virtual]
   bool doInitialization(CallGraph &CG) override;
        ^~~~~~~~~~~~~~~~
====

This is an old issue which has just started biting our downstream after
a slight rearrangement of includes around Inliner.
Fixing it similar to how doFinalization was done years ago.
2020-05-17 16:31:33 +07:00
Dylan McKay 1335737ee1 [LLVM][AVR] Support for R_AVR_6 fixup
Summary: Handle the emission of `R_AVR_6` ELF relocation type.

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: hiraditya, Jim, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78721

Patch by @LemonBoy https://reviews.llvm.org/p/LemonBoy/
2020-05-17 19:46:09 +12:00
Dylan McKay 1420f4efbe [AVR] Fix I/O instructions on XMEGA
Summary:
On XMEGA, I/O address space is same as data address space - there is no 0x20 offset,
because CPU General Purpose Registers are not mapped in data address space.

From https://en.wikipedia.org/wiki/AVR_microcontrollers
> In the XMEGA variant, the working register file is not mapped into the data address space; as such, it is not possible to treat any of the XMEGA's working registers as though they were SRAM. Instead, the I/O registers are mapped into the data address space starting at the very beginning of the address space.

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: hiraditya, Jim, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77207

Patch by Vlastimil Labsky.
2020-05-17 19:46:09 +12:00
Fangrui Song 3841ed4104 [Driver] Render -T for Gnu.cpp
clang -T a.lds a.c currently does not render -T.
2020-05-16 23:54:31 -07:00
Stephen Neuendorffer efa70843aa [MLIR][cmake] use LINK_LIBS PUBLIC for MLIRStandardOpsTransforms
Without this LLVM_LINK_LLVM_DYLIB is broken

Differential Revision: https://reviews.llvm.org/D80074
2020-05-16 22:45:14 -07:00
Fangrui Song 3dbbbcc80e [llvm-xray] consumeError when trying big-endian
Follow-up of rL341226.

Fixes "Expected<T> must be checked before access or destruction"
2020-05-16 22:44:48 -07:00
Arthur Eubanks 8092c8fec0 [NFC] Run clang-format on ISDOpcodes.h
Subscribers: jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80050
2020-05-16 22:33:00 -07:00
Yi Kong 2fe66bdb2e [Compiler-rt] Emit error if builtins library cannot be found
Since setting COMPILER_RT_USE_BUILTINS_LIBRARY would remove -z,defs
flag, missing builtins library would continue to build unnoticed.
Explicitly emit an error in such case.

Differential Revision: https://reviews.llvm.org/D79470
2020-05-17 10:54:53 +08:00
Nico Weber 3735505e4f Fix a few doc typos to cycle bots. 2020-05-16 20:38:28 -04:00
Nico Weber bc98dc12d8 Try to heal bots after https://reviews.llvm.org/D79655 2020-05-16 20:32:58 -04:00
Craig Topper 796ae8cf82 [LegalizeDAG] Use MachinePointerInfo::getUnknownStack in place of MachinePointerInfo() in a couple places. NFC
We know the pointer somewhere on the stack, we just don't know
exactly where since the index may be variable.

Differential Revision: https://reviews.llvm.org/D80060
2020-05-16 15:48:16 -07:00
Eli Friedman 4f04db4b54 AllocaInst should store Align instead of MaybeAlign.
Along the lines of D77454 and D79968.  Unlike loads and stores, the
default alignment is getPrefTypeAlign, to match the existing handling in
various places, including SelectionDAG and InstCombine.

Differential Revision: https://reviews.llvm.org/D80044
2020-05-16 14:53:16 -07:00
Craig Topper 135b877874 [X86] Replace selectScalarSSELoad ComplexPattern with PatFrags to handle the 3 types of loads we currently match.
This ensures we create mem operands for these instructions fixing PR45949.

Unfortunately, it increases the size of X86GenDAGISel.inc, but some dag
combine canonicalization could reduce the types of load we need to match.
2020-05-16 14:30:45 -07:00
Eli Friedman 0ec5f50196 Harden IR and bitcode parsers against infinite size types.
If isSized is passed a SmallPtrSet, it uses that set to catch infinitely
recursive types (for example, a struct that has itself as a member).
Otherwise, it just crashes on such types.
2020-05-16 14:24:51 -07:00
faisal vali accd9af838 Revert "[nfc] test commit"
This reverts commit 0ee46e857d.
2020-05-16 15:12:04 -05:00
faisal vali 0ee46e857d [nfc] test commit 2020-05-16 15:08:30 -05:00
John McCall 32870a84d9 Expose IRGen API to add the default IR attributes to a function definition.
I've also made a stab at imposing some more order on where and how we add
attributes; this part should be NFC.  I wasn't sure whether the CUDA use
case for libdevice should propagate CPU/features attributes, so there's a
bit of unnecessary duplication.
2020-05-16 14:44:54 -04:00
mydeveloperday 49c9a68d7f The release notes for ObjCBreakBeforeNestedBlockParam was placed between the release note for IndentCaseBlocks and its example code
Remove other whitespace and line limit issues and double blank line issues
2020-05-16 18:52:13 +01:00
Sanjay Patel 81e9ede3a2 [VectorCombine] forward walk through instructions to improve chaining of transforms
This is split off from D79799 - where I was proposing to fully iterate
over a function until there are no more transforms. I suspect we are
still going to want to do something like that eventually.

But we can achieve the same gains much more efficiently on the current
set of regression tests just by reversing the order that we visit the
instructions.

This may also reduce the motivation for D79078, but we are still not
getting the optimal pattern for a reduction.
2020-05-16 13:08:01 -04:00
Sanjay Patel 43017ceb78 [PhaseOrdering] add vector reduction tests; NFC
These are based on tests originally included in:
D79078
2020-05-16 12:51:10 -04:00
Nikita Popov 604f44977b [InstCombine] Clean up alignment handling (NFC)
Now that load/store alignment is required, we can simplify code
in some places.
2020-05-16 18:47:29 +02:00
David Green 2123bb843e [ARM] Patterns for VQSHRN
Given a VQMOVN(VSHR), we can fold that into a VQSHRN simply enough using
a few tablegen patterns.

Differential Revision: https://reviews.llvm.org/D77720
2020-05-16 17:46:43 +01:00
Sanjay Patel 6211830fba [VectorCombine] add reduction-like patterns; NFC
These are based on tests originally included in:
D79078
2020-05-16 12:45:01 -04:00
Jay Foad 9a05547954 [AArch64] Precommit tests for D77316 2020-05-16 16:00:02 +01:00
Sanjay Patel 5be37cb124 [x86][CGP] try to hoist funnel shift above select-of-splats
This is basically the same patch as D63233, but converted to
funnel shifts rather than regular shifts. I did not see a
way to effectively share code for these 2 cases though.

This follows D79718 and D79827 to re-fix PR37426 because
that gets canonicalized to funnel shift intrinsics in IR.

I did draft an alternative patch as an enhancement to
"shouldSinkOperands()", but that was awkward because
we have to key the transform from the select, but then
look at both its users and its operands.
2020-05-16 10:44:47 -04:00
David Green 72f1fb2edf [ARM] Combines for VMOVN
This adds two combines for VMOVN, one to fold
VMOVN[tb](c, VQMOVNb(a, b)) => VQMOVN[tb](c, b)
The other to perform demand bits analysis on the lanes of a VMOVN. We
know that only the bottom lanes of the second operand and the top or
bottom lanes of the Qd operand are needed in the result, depending on if
the VMOVN is bottom or top.

Differential Revision: https://reviews.llvm.org/D77718
2020-05-16 15:13:16 +01:00
David Green 2e1fbf85b6 [ARM] MVE saturating truncates
This adds some custom lowering for VQMOVN, an instruction that can be
used to perform saturating truncates from a pair of min(max(X, -0x8000),
0x7fff), providing those constants are correct. This leaves a VQMOVNBs
which saturates the value and inserts that into the bottom lanes of an
existing vector. We then need to do something with the other lanes,
extending the value using a vmovlb.

Ideally, as will often be the case, only the bottom lane of what remains
will be demanded, allowing the vmovlb to be removed. Which should mean
the instruction is either equal or a win most of the time, and allows
some extra follow-up folding to happen.

Differential Revision: https://reviews.llvm.org/D77590
2020-05-16 15:10:20 +01:00
Simon Pilgrim 228913780b DIEHash.cpp - remove headers explicitly included in DIEHash.h. NFC.
Don't duplicate module header includes.
2020-05-16 15:00:57 +01:00
Simon Pilgrim 25656332f1 AggressiveAntiDepBreaker.cpp - remove headers explicitly included in AggressiveAntiDepBreaker.h. NFC.
Don't duplicate module header includes.
2020-05-16 15:00:56 +01:00
Simon Pilgrim 43bf2be4d9 LLParser.cpp - remove headers explicitly included in LLParser.h. NFC.
Don't duplicate module header includes.
2020-05-16 15:00:56 +01:00
Simon Pilgrim be6847b17d Fix -Wdocumentation warning. NFC.
Remove non-existant DataLayoutCallback param comment.
2020-05-16 15:00:56 +01:00
David Green 42a9ca0245 [ARM] Extra VQMOVN/VQSHRN tests. NFC 2020-05-16 14:23:26 +01:00
Denis Khalikov 0dc91bfd11 [mlir][spirv] Handle debuginfo for control flow ops.
Summary:
Handle debuginfo for control flow operations: spv.Selection,
spv.Loop, spv.BranchOp, spv.BranchConditional.

Differential Revision: https://reviews.llvm.org/D79931
2020-05-16 15:36:14 +03:00
Nikita Popov d86fff6ae7 [ValueTracking] Fix computeKnownBits() with bitwidth-changing ptrtoint
computeKnownBitsFromAssume() currently asserts if m_V matches a
ptrtoint that changes the bitwidth. Because InstCombine
canonicalizes ptrtoint instructions to use explicit zext/trunc,
we never ran into the issue in practice. I'm adding unit tests,
as I don't know if this can be triggered via IR anywhere.

Fix this by calling anyextOrTrunc(BitWidth) on the computed
KnownBits. Note that we are going from the KnownBits of the
ptrtoint result to the KnownBits of the ptrtoint operand,
so we need to truncate if the ptrtoint zexted and anyext if
the ptrtoint truncated.

Differential Revision: https://reviews.llvm.org/D79234
2020-05-16 14:17:11 +02:00
David Zarzycki 3f66bb2017 [libcxx testing] Remove ALLOW_RETRIES from last futures test
Like other uses of ALLOW_RETRIES, this test tried to verify that an API
returned "quickly" but quick is not safe to define given slow and/or
busy machines.

Instead, we now verify that these "wait" APIs actually wait, which the
old test did not.
2020-05-16 07:11:49 -04:00
Craig Topper 13d44b2a0c [LegalizeDAG] Use getMemBasePlusOffset to simplify some code. Use other signature of getMemBasePlusOffset in another location. NFCI
The code was calculating an offset from a stack pointer SDValue.
This is exactly what getMemBasePlusOffset does. I also replaced
sizeof(int) with a hardcoded 4. We know the type we're operating
on is 4 bytes. But the size of int that the source code is being
compiled with isn't guaranteed to be 4 bytes.

While here replace another use of getMemBasePlusOffset that was
proceeded with a call to getConstant with the other signature
that call getConstant internally.
2020-05-16 01:02:08 -07:00
Craig Topper 45c7b3fd91 [LegalizeVectorTypes] Remove non-constnat INSERT_SUBVECTOR handling. NFC
Now that D79814 has landed, we can assume that subvector ops use constant, in-range indices.
2020-05-15 23:56:13 -07:00
Ten Tzen e32f8e5d4a [Windows EH] Fix the order of Nested try-catches in $tryMap$ table
This bug is exposed by Test7 of ehthrow.cxx in MSVC EH suite where
a rethrow occurs in a try-catch inside a catch (i.e., a nested Catch
handlers). See the test code in
https://github.com/microsoft/compiler-tests/blob/master/eh/ehthrow.cxx#L346

When an object is rethrown in a Catch handler, the copy-ctor of this
object must be executed after the destructions of live objects, but
BEFORE the dtors of live objects in parent handlers.

Today Windows 64-bit runtime (__CxxFrameHandler3 & 4) expects nested Catch
handers
are stored in pre-order (outer first, inner next) in $tryMap$ table, so
that given a State, its Catch's beginning State can be properly
retrieved. The Catch beginning state (which is also the ending State) is
the State where rethrown object's copy-ctor must take place.

LLVM currently stores nested catch handlers in post-ordering because
it's the natural way to compute the highest State in Catch.
The fix is to simply store TryCatch handler in pre-order, but update
Catch's highest State after child Catches are all processed.

Differential Revision: https://reviews.llvm.org/D79474?id=263919
2020-05-15 22:03:43 -07:00
Heejin Ahn 945ad141ce Revert "[WebAssembly] Handle exception specifications"
This reverts commit bca347508c.

This broke clang/test/Misc/warning-flags.c, because the newly added
warning option in this commit didn't have a matching flag.
2020-05-15 21:33:44 -07:00
Heejin Ahn bca347508c [WebAssembly] Handle exception specifications
Summary:
Wasm currently does not fully handle exception specifications. Rather
than crashing, this treats `throw()` in the same way as `noexcept`, and
ignores and prints a warning for `throw(type, ..)`, for a temporary
measure.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79655
2020-05-15 21:03:38 -07:00
Carl Ritson a065a01bf7 [AMDGPU] Allow use of StackPtrOffsetReg when building spills
Summary:
When spilling in the entry function we should be able to borrow
StackPtrOffsetReg as a last resort.  This restores behaviour
removed in D75138, and fixes failures when shaders use all
SGPRs, VGPRs and spill in the entry function.

Reviewers: scott.linder, arsenm, tpr

Reviewed By: scott.linder, arsenm

Subscribers: qcolombet, foad, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79776
2020-05-16 11:54:43 +09:00
Pete Steinfeld 38095549c6 [flang] Constraint checks C751 to C760
Summary:
Many of these were already implemented, and I just annotated the tests and/or
the code.

C752 was a simple check to verify that CONTIGUOUS components are arrays with

C754 proved to be virtually identical to C750 that I implemented previously.
This caused me to remove the distinction between specification expressions for
type parameters and bounds expressions that I'd previously created.
the POINTER attribute.

I also changed the error messages to specify that errors in specification
expressions could arise from either bad derived type components or type
parameters.

In cases where we detect a type param that was not declared, I created a symbol
marked as erroneous.  That avoids subsequent semantic process for expressions
containing the symbol.  This change caused me to adjust tests resolve33.f90 and
resolve34.f90.  Also, I avoided putting out error messages for erroneous type
param symbols in `OkToAddComponent()` in resolve-names.cpp and in
`EvaluateParameters()`, type.cpp.

C756 checks that procedure components have the POINTER attribute.

Reviewers: tskeith, klausler, DavidTruby

Subscribers: llvm-commits

Tags: #llvm, #flang

Differential Revision: https://reviews.llvm.org/D79798
2020-05-15 18:50:14 -07:00
Nathan James 7af0c8559b [clang-tidy] Transformer checks now store IncludeStyle option 2020-05-16 01:14:55 +01:00
Eric Christopher 80af39ead8 Fix go bindings after FixedVectorType -> VectorType change. 2020-05-15 16:37:57 -07:00
Diogo Sampaio 6c68f75ee4 Prevent register coalescing in functions whith setjmp
Summary:
In the the given example, a stack slot pointer is merged
between a setjmp and longjmp. This pointer is spilled,
so it does not get correctly restored, addinga undefined
behaviour where it shouldn't.

Change-Id: I60ec010844f2a24ce01ceccf12eb5eba5ab94abb

Reviewers: eli.friedman, thanm, efriedma

Reviewed By: efriedma

Subscribers: MatzeB, qcolombet, tpr, rnk, efriedma, hiraditya, llvm-commits, chill

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77767
2020-05-16 00:36:34 +01:00
Thomas Preud'homme 0c2c6fce07 [test] Improve FileCheck's numeric-expression.txt
Summary:
Various improvement for FileCheck's numeric-expression.txt test:
- remove unused values in USE DEF FMT IMPL MATCH section
- replace 14 literal for 0xe and 0xE to have example of hex literals
- rename variable to be more self-descriptive
- move CHECK as comment of the values being matched to help readability
- add conversion tests
- simplify test for use of several numeric variables by using existing
  variable
- adjust position of error message check to match the alignment of the
  error message wrt. the output matched by the previous check

Reviewed By: jhenderson, jdenny

Differential Revision: https://reviews.llvm.org/D79820
2020-05-16 00:09:24 +01:00
Eric Christopher b1ae13b4e9 Fix flang build after mlir SideEffects.h -> SideEffectInterfaces.h change. 2020-05-15 15:51:32 -07:00
Casey Carter 634a0acb30 Cleanup some test issues:
* improve coverage in `span`'s "conversion from `std::array`" test, while eliminating MSVC diagnostics about `testConstructorArray<T>() && testConstructorArray<const T, T>()` being redundant when `T` is already `const`.

* Remove use of `is_assignable` that triggers UB due to an insufficiently-complete type argument in `std::function`'s assignment operator test.

* Don't test that `shared_ptr` initialization from an rvalue triggers the lvalue aliasing constructor on non-libc++; this is not the case for Standard Libraries that implement LWG-2996. (Ditto, I'd simply remove this but it's your library ;).)

Differential Revision: https://reviews.llvm.org/D80030
2020-05-15 15:15:47 -07:00