diff --git a/recipes-bsp/u-boot/compulab/imx8mm.inc b/recipes-bsp/u-boot/compulab/imx8mm.inc index 1a624d3..37348c6 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm.inc +++ b/recipes-bsp/u-boot/compulab/imx8mm.inc @@ -1,5 +1,4 @@ - -SRC_URI:append = " \ +SRC_URI:append = " \ file://0001-ucm-imx8m-mini-Add-basic-support.patch \ file://0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch \ file://0003-ucm-imx8m-mini-Fix-KConfig-warning.patch \ @@ -125,7 +124,9 @@ SRC_URI:append = " \ file://0124-Enable-SoC-info-export-via-fdt.patch \ file://0125-imx8mm-net-enable-phy-Realtek-RTL8211E.patch \ file://0126-iot-gate-imx8-release-2020.04-iot-gate-imx8-3.0.patch \ -" - -# For U-Boot build outside of Yocto -# file://0101-compulab-imx8mm-Add-binman-support.patch + file://cl_setenv \ +" \ + \ +# For U-Boot build outside of Yocto \ +# file://0101-compulab-imx8mm-Add-binman-support.patch \ + \ diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0052-imx8m-soc-Don-t-reduce-the-memory-amount-by-the-opte.patch b/recipes-bsp/u-boot/compulab/imx8mm/0052-imx8m-soc-Don-t-reduce-the-memory-amount-by-the-opte.patch deleted file mode 100644 index 368e9f0..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0052-imx8m-soc-Don-t-reduce-the-memory-amount-by-the-opte.patch +++ /dev/null @@ -1,27 +0,0 @@ -From bb4e18e386ae95287daf0766feec32771bcec8da Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 13 Jul 2020 10:56:49 +0300 -Subject: [PATCH 52/91] imx8m: soc: Don't reduce the memory amount by the optee - size - -Signed-off-by: Valentin Raevsky ---- - arch/arm/mach-imx/imx8m/soc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c -index d1c76eb102..ab8bd2e1ec 100644 ---- a/arch/arm/mach-imx/imx8m/soc.c -+++ b/arch/arm/mach-imx/imx8m/soc.c -@@ -259,7 +259,7 @@ __weak int dram_init_banksize(void) - return ret; - - gd->bd->bi_dram[bank].start = PHYS_SDRAM; -- if (rom_pointer[1]) { -+ if (0 /*rom_pointer[1]*/) { - phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; - phys_size_t optee_size = (size_t)rom_pointer[1]; - --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch b/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch deleted file mode 100644 index b1d3fe5..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch +++ /dev/null @@ -1,101 +0,0 @@ -From c8f19f6373073a1fda6bfaf0e9aa357dde40bb05 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 01:06:57 +0300 -Subject: [PATCH 53/91] mcm-imx8m-mini: Move tcm to plat/imx8mm - -Signed-off-by: Kirill Kapranov ---- - board/compulab/mcm-imx8m-mini/Makefile | 3 ++- - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 2 +- - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.h | 19 ------------------- - board/compulab/mcm-imx8m-mini/spl.c | 1 - - board/compulab/plat/imx8mm/ddr/ddr.h | 9 +++++++++ - 5 files changed, 12 insertions(+), 22 deletions(-) - delete mode 100644 board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h - -diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile -index b926ed9cf9..8ade3b58c5 100644 ---- a/board/compulab/mcm-imx8m-mini/Makefile -+++ b/board/compulab/mcm-imx8m-mini/Makefile -@@ -6,8 +6,9 @@ - - obj-y += mcm-imx8m-mini.o - --ifdef CONFIG_SPL_BUILD - ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ -+ifdef CONFIG_SPL_BUILD - obj-y += spl.o - endif - -diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -index 7cfed94479..20f322223c 100644 ---- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -+++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -@@ -27,7 +27,7 @@ - #include - #include - #include --#include "mcm-imx8m-mini.h" -+#include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; - -diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h -deleted file mode 100644 -index fc59756161..0000000000 ---- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h -+++ /dev/null -@@ -1,19 +0,0 @@ --/* -- * Copyright 2017 NXP -- * -- * SPDX-License-Identifier: GPL-2.0+ -- */ -- --#ifndef __MCM_IMX8M_MINI__ --#define __MCM_IMX8M_MINI__ -- --#define TCM_DATA_CFG 0x7e0000 -- --struct lpddr4_tcm_desc { -- unsigned int size; -- unsigned int sign; -- unsigned int index; -- unsigned int count; --}; -- --#endif -diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c -index f59bac4cb9..3f6cb65102 100644 ---- a/board/compulab/mcm-imx8m-mini/spl.c -+++ b/board/compulab/mcm-imx8m-mini/spl.c -@@ -21,7 +21,6 @@ - #include - #include - #include "ddr/ddr.h" --#include "mcm-imx8m-mini.h" - - DECLARE_GLOBAL_DATA_PTR; - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.h b/board/compulab/plat/imx8mm/ddr/ddr.h -index a66e8ec3c4..4d2a238439 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.h -+++ b/board/compulab/plat/imx8mm/ddr/ddr.h -@@ -14,4 +14,13 @@ extern struct dram_timing_info ucm_dram_timing_01050008; - - void spl_dram_init(void); - -+#define TCM_DATA_CFG 0x7e0000 -+ -+struct lpddr4_tcm_desc { -+ unsigned int size; -+ unsigned int sign; -+ unsigned int index; -+ unsigned int count; -+}; -+ - #endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0054-mcm-imx8m-mini-Refactor-spl-code.patch b/recipes-bsp/u-boot/compulab/imx8mm/0054-mcm-imx8m-mini-Refactor-spl-code.patch deleted file mode 100644 index a2bdebd..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0054-mcm-imx8m-mini-Refactor-spl-code.patch +++ /dev/null @@ -1,700 +0,0 @@ -From 1b8a9e3734b1c50c262fcb174ff8cdff2f26ef5f Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 15 Jul 2020 07:58:17 +0300 -Subject: [PATCH 54/91] mcm-imx8m-mini: Refactor spl code - -Signed-off-by: Valentin Raevsky ---- - board/compulab/mcm-imx8m-mini/Makefile | 4 +- - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 27 -- - board/compulab/mcm-imx8m-mini/spl.c | 265 +---------------- - board/compulab/plat/imx8mm/Makefile | 1 + - board/compulab/plat/imx8mm/spl/Makefile | 7 + - board/compulab/plat/imx8mm/spl/common.c | 33 +++ - board/compulab/plat/imx8mm/spl/spl.c | 278 ++++++++++++++++++ - 7 files changed, 323 insertions(+), 292 deletions(-) - create mode 100644 board/compulab/plat/imx8mm/spl/Makefile - create mode 100644 board/compulab/plat/imx8mm/spl/common.c - create mode 100644 board/compulab/plat/imx8mm/spl/spl.c - -diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile -index 8ade3b58c5..9ce2875d6e 100644 ---- a/board/compulab/mcm-imx8m-mini/Makefile -+++ b/board/compulab/mcm-imx8m-mini/Makefile -@@ -4,12 +4,12 @@ - # SPDX-License-Identifier: GPL-2.0+ - # - --obj-y += mcm-imx8m-mini.o -- - ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o -+else -+obj-y += mcm-imx8m-mini.o - endif - - obj-y += ../plat/imx8mm/ -diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -index 20f322223c..d01b8f8767 100644 ---- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -+++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -@@ -31,33 +31,6 @@ - - DECLARE_GLOBAL_DATA_PTR; - --#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) --#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -- --static iomux_v3_cfg_t const uart_pads[] = { -- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), --}; -- --static iomux_v3_cfg_t const wdog_pads[] = { -- IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), --}; -- --int board_early_init_f(void) --{ -- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; -- -- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); -- -- set_wdog_reset(wdog); -- -- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -- -- init_uart_clk(2); -- -- return 0; --} -- - #ifdef CONFIG_BOARD_POSTCLK_INIT - int board_postclk_init(void) - { -diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c -index 3f6cb65102..d6ece8ef3e 100644 ---- a/board/compulab/mcm-imx8m-mini/spl.c -+++ b/board/compulab/mcm-imx8m-mini/spl.c -@@ -1,270 +1,9 @@ --/* -- * Copyright 2020 CompuLab Ltd. -- */ -- --#include --#include --#include --#include - #include - #include --#include - #include -+#include - #include --#include --#include -- --#include --#include --#include --#include --#include --#include --#include "ddr/ddr.h" -- --DECLARE_GLOBAL_DATA_PTR; -- --int spl_board_boot_device(enum boot_device boot_dev_spl) --{ -- switch (boot_dev_spl) { -- case SD2_BOOT: -- case MMC2_BOOT: -- return BOOT_DEVICE_MMC1; -- case SD3_BOOT: -- case MMC3_BOOT: -- return BOOT_DEVICE_MMC2; -- default: -- return BOOT_DEVICE_NONE; -- } --} -- --#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) --#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) --struct i2c_pads_info i2c_pad_info1 = { -- .scl = { -- .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, -- .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, -- .gp = IMX_GPIO_NR(5, 16), -- }, -- .sda = { -- .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, -- .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, -- .gp = IMX_GPIO_NR(5, 17), -- }, --}; -- --#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) --#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) -- --#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ -- PAD_CTL_FSEL2) --#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) -- --static iomux_v3_cfg_t const usdhc3_pads[] = { -- IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), --}; -- --static iomux_v3_cfg_t const usdhc2_pads[] = { -- IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), --}; -- --/* -- * The evk board uses DAT3 to detect CD card plugin, -- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. -- */ --static iomux_v3_cfg_t const usdhc2_cd_pad = -- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); -- --static iomux_v3_cfg_t const usdhc2_dat3_pad = -- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | -- MUX_PAD_CTRL(USDHC_PAD_CTRL); -- -- --static struct fsl_esdhc_cfg usdhc_cfg[2] = { -- {USDHC2_BASE_ADDR, 0, 4}, -- {USDHC3_BASE_ADDR, 0, 8}, --}; -- --int board_mmc_init(bd_t *bis) --{ -- int i, ret; -- /* -- * According to the board_mmc_init() the following map is done: -- * (U-Boot device node) (Physical Port) -- * mmc0 USDHC1 -- * mmc1 USDHC2 -- */ -- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { -- switch (i) { -- case 0: -- init_clk_usdhc(1); -- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); -- imx_iomux_v3_setup_multiple_pads( -- usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -- gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); -- gpio_direction_output(USDHC2_PWR_GPIO, 0); -- udelay(500); -- gpio_direction_output(USDHC2_PWR_GPIO, 1); -- break; -- case 1: -- init_clk_usdhc(2); -- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); -- imx_iomux_v3_setup_multiple_pads( -- usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); -- break; -- default: -- printf("Warning: you configured more USDHC controllers" -- "(%d) than supported by the board\n", i + 1); -- return -EINVAL; -- } -- -- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); -- if (ret) -- return ret; -- } -- -- return 0; --} -- --int board_mmc_getcd(struct mmc *mmc) --{ -- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; -- int ret = 0; -- -- switch (cfg->esdhc_base) { -- case USDHC3_BASE_ADDR: -- ret = 1; -- break; -- case USDHC2_BASE_ADDR: -- imx_iomux_v3_setup_pad(usdhc2_cd_pad); -- gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); -- gpio_direction_input(USDHC2_CD_GPIO); -- -- /* -- * Since it is the DAT3 pin, this pin is pulled to -- * low voltage if no card -- */ -- ret = gpio_get_value(USDHC2_CD_GPIO); -- -- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); -- return ret; -- } -- -- return 1; --} -- --#ifdef CONFIG_POWER --#define I2C_PMIC 1 --int power_init_board(void) --{ -- struct pmic *p; -- int ret; -- -- ret = power_bd71837_init(I2C_PMIC); -- if (ret) -- printf("power init failed"); -- -- p = pmic_get("BD71837"); -- pmic_probe(p); -- -- -- /* decrease RESET key long push time from the default 10s to 10ms */ -- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); -- -- /* unlock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x1); -- -- /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ -- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); -- -- /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ -- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); -- -- /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ -- pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); -- -- /* lock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x11); -- -- return 0; --} --#else --int power_init_board(void) { return 0; } --#endif -- --void spl_board_init(void) --{ --#ifndef CONFIG_SPL_USB_SDP_SUPPORT -- /* Serial download mode */ -- if (is_usb_boot()) { -- puts("Back to ROM, SDP\n"); -- restore_boot_params(); -- } --#endif -- puts("Normal Boot\n"); --} -- --#ifdef CONFIG_SPL_LOAD_FIT --int board_fit_config_name_match(const char *name) --{ -- /* Just empty function now - can't decide what to choose */ -- debug("%s: %s\n", __func__, name); -- -- return 0; --} --#endif -- --void board_init_f(ulong dummy) --{ -- int ret; -- /* Clear the BSS. */ -- memset(__bss_start, 0, __bss_end - __bss_start); -- -- arch_cpu_init(); -- -- board_early_init_f(); -- -- timer_init(); -- -- preloader_console_init(); -- -- ret = spl_init(); -- if (ret) { -- debug("spl_init() failed: %d\n", ret); -- hang(); -- } -- -- enable_tzc380(); -- -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -- -- power_init_board(); -- /* DDR initialization */ -- spl_dram_init(); -- -- board_init_r(NULL, 0); --} -- --int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) --{ -- puts ("resetting ...\n"); -- -- reset_cpu(WDOG1_BASE_ADDR); - -+int spl_board_private_init(void) { - return 0; - } -diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile -index 04b9b2e8f8..2f68e0523e 100644 ---- a/board/compulab/plat/imx8mm/Makefile -+++ b/board/compulab/plat/imx8mm/Makefile -@@ -1,2 +1,3 @@ - obj-y += ddr/ - obj-y += eeprom/ -+obj-y += spl/ -diff --git a/board/compulab/plat/imx8mm/spl/Makefile b/board/compulab/plat/imx8mm/spl/Makefile -new file mode 100644 -index 0000000000..a3a9acaa6e ---- /dev/null -+++ b/board/compulab/plat/imx8mm/spl/Makefile -@@ -0,0 +1,7 @@ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ -+obj-y += common.o -+ -+ifdef CONFIG_SPL_BUILD -+obj-y += spl.o -+endif -diff --git a/board/compulab/plat/imx8mm/spl/common.c b/board/compulab/plat/imx8mm/spl/common.c -new file mode 100644 -index 0000000000..5f1d1e5b97 ---- /dev/null -+++ b/board/compulab/plat/imx8mm/spl/common.c -@@ -0,0 +1,33 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) -+#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -+ -+static iomux_v3_cfg_t const uart_pads[] = { -+ IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -+ IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -+}; -+ -+static iomux_v3_cfg_t const wdog_pads[] = { -+ IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -+}; -+ -+int board_early_init_f(void) -+{ -+ struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; -+ -+ imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); -+ -+ set_wdog_reset(wdog); -+ -+ imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -+ -+ init_uart_clk(2); -+ -+ return 0; -+} -+ -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -new file mode 100644 -index 0000000000..3481bba493 ---- /dev/null -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -0,0 +1,278 @@ -+/* -+ * Copyright 2020 CompuLab Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ddr/ddr.h" -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+int spl_board_boot_device(enum boot_device boot_dev_spl) -+{ -+ switch (boot_dev_spl) { -+ case SD2_BOOT: -+ case MMC2_BOOT: -+ return BOOT_DEVICE_MMC1; -+ case SD3_BOOT: -+ case MMC3_BOOT: -+ return BOOT_DEVICE_MMC2; -+ default: -+ return BOOT_DEVICE_NONE; -+ } -+} -+ -+#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) -+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -+struct i2c_pads_info i2c_pad_info1 = { -+ .scl = { -+ .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, -+ .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, -+ .gp = IMX_GPIO_NR(5, 16), -+ }, -+ .sda = { -+ .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, -+ .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, -+ .gp = IMX_GPIO_NR(5, 17), -+ }, -+}; -+ -+#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) -+#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) -+ -+#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ -+ PAD_CTL_FSEL2) -+#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) -+ -+static iomux_v3_cfg_t const usdhc3_pads[] = { -+ IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+}; -+ -+static iomux_v3_cfg_t const usdhc2_pads[] = { -+ IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -+ IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), -+}; -+ -+/* -+ * The evk board uses DAT3 to detect CD card plugin, -+ * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. -+ */ -+static iomux_v3_cfg_t const usdhc2_cd_pad = -+ IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); -+ -+static iomux_v3_cfg_t const usdhc2_dat3_pad = -+ IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | -+ MUX_PAD_CTRL(USDHC_PAD_CTRL); -+ -+ -+static struct fsl_esdhc_cfg usdhc_cfg[2] = { -+ {USDHC2_BASE_ADDR, 0, 4}, -+ {USDHC3_BASE_ADDR, 0, 8}, -+}; -+ -+int board_mmc_init(bd_t *bis) -+{ -+ int i, ret; -+ /* -+ * According to the board_mmc_init() the following map is done: -+ * (U-Boot device node) (Physical Port) -+ * mmc0 USDHC1 -+ * mmc1 USDHC2 -+ */ -+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { -+ switch (i) { -+ case 0: -+ init_clk_usdhc(1); -+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); -+ imx_iomux_v3_setup_multiple_pads( -+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -+ gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); -+ gpio_direction_output(USDHC2_PWR_GPIO, 0); -+ udelay(500); -+ gpio_direction_output(USDHC2_PWR_GPIO, 1); -+ break; -+ case 1: -+ init_clk_usdhc(2); -+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); -+ imx_iomux_v3_setup_multiple_pads( -+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); -+ break; -+ default: -+ printf("Warning: you configured more USDHC controllers" -+ "(%d) than supported by the board\n", i + 1); -+ return -EINVAL; -+ } -+ -+ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+int board_mmc_getcd(struct mmc *mmc) -+{ -+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; -+ int ret = 0; -+ -+ switch (cfg->esdhc_base) { -+ case USDHC3_BASE_ADDR: -+ ret = 1; -+ break; -+ case USDHC2_BASE_ADDR: -+ imx_iomux_v3_setup_pad(usdhc2_cd_pad); -+ gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); -+ gpio_direction_input(USDHC2_CD_GPIO); -+ -+ /* -+ * Since it is the DAT3 pin, this pin is pulled to -+ * low voltage if no card -+ */ -+ ret = gpio_get_value(USDHC2_CD_GPIO); -+ -+ imx_iomux_v3_setup_pad(usdhc2_dat3_pad); -+ return ret; -+ } -+ -+ return 1; -+} -+ -+#ifdef CONFIG_POWER -+#define I2C_PMIC 1 -+int power_init_board(void) -+{ -+ struct pmic *p; -+ int ret; -+ -+ ret = power_bd71837_init(I2C_PMIC); -+ if (ret) -+ printf("power init failed"); -+ -+ p = pmic_get("BD71837"); -+ pmic_probe(p); -+ -+ -+ /* decrease RESET key long push time from the default 10s to 10ms */ -+ pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); -+ -+ /* unlock the PMIC regs */ -+ pmic_reg_write(p, BD71837_REGLOCK, 0x1); -+ -+ /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ -+ pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); -+ -+ /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ -+ pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); -+ -+ /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ -+ pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); -+ -+ /* lock the PMIC regs */ -+ pmic_reg_write(p, BD71837_REGLOCK, 0x11); -+ -+ return 0; -+} -+#else -+int power_init_board(void) { return 0; } -+#endif -+ -+__weak int spl_board_private_init(void) { -+ return 0; -+} -+ -+void spl_board_init(void) -+{ -+#ifndef CONFIG_SPL_USB_SDP_SUPPORT -+ /* Serial download mode */ -+ if (is_usb_boot()) { -+ puts("Back to ROM, SDP\n"); -+ restore_boot_params(); -+ } -+#endif -+ if (spl_board_private_init()) { -+ debug("spl_board_private_init() failed\n"); -+ hang(); -+ } -+ puts("Normal Boot\n"); -+} -+ -+#ifdef CONFIG_SPL_LOAD_FIT -+int board_fit_config_name_match(const char *name) -+{ -+ /* Just empty function now - can't decide what to choose */ -+ debug("%s: %s\n", __func__, name); -+ -+ return 0; -+} -+#endif -+ -+void board_init_f(ulong dummy) -+{ -+ int ret; -+ /* Clear the BSS. */ -+ memset(__bss_start, 0, __bss_end - __bss_start); -+ -+ arch_cpu_init(); -+ -+ board_early_init_f(); -+ -+ timer_init(); -+ -+ preloader_console_init(); -+ -+ ret = spl_init(); -+ if (ret) { -+ debug("spl_init() failed: %d\n", ret); -+ hang(); -+ } -+ -+ enable_tzc380(); -+ -+ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -+ -+ power_init_board(); -+ /* DDR initialization */ -+ spl_dram_init(); -+ -+ board_init_r(NULL, 0); -+} -+ -+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -+{ -+ puts ("resetting ...\n"); -+ -+ reset_cpu(WDOG1_BASE_ADDR); -+ -+ return 0; -+} --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0055-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch b/recipes-bsp/u-boot/compulab/imx8mm/0055-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch deleted file mode 100644 index a105e3b..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0055-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch +++ /dev/null @@ -1,1539 +0,0 @@ -From 35fad7ed9ddc6485f999fde180a39d81135c18e4 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 01:13:04 +0300 -Subject: [PATCH 55/91] ucm-imx8m-mini: Refactor the code for 2020.04 - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/ucm-imx8m-mini.dts | 30 +- - board/compulab/ucm-imx8m-mini/Kconfig | 25 +- - board/compulab/ucm-imx8m-mini/Makefile | 5 +- - board/compulab/ucm-imx8m-mini/spl.c | 246 +------ - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 692 +----------------- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 18 - - configs/ucm-imx8m-mini_defconfig | 88 ++- - include/configs/ucm-imx8m-mini.h | 76 +- - 8 files changed, 126 insertions(+), 1054 deletions(-) - delete mode 100644 board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h - -diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts -index b191e87755..f2794e74e9 100644 ---- a/arch/arm/dts/ucm-imx8m-mini.dts -+++ b/arch/arm/dts/ucm-imx8m-mini.dts -@@ -14,8 +14,8 @@ - - /dts-v1/; - --#include "fsl-imx8mm.dtsi" -- -+#include -+#include "imx8mm.dtsi" - - / { - model = "CompuLab UCM-iMX8M-Mini board"; -@@ -26,12 +26,6 @@ - stdout-patch = &uart3; - }; - -- aliases { -- mmc0 = &usdhc2; -- mmc1 = &usdhc3; -- /delete-property/ mmc2; -- }; -- - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - regulator-name = "VSD_3V3"; -@@ -43,17 +37,6 @@ - off-on-delay-us = <12000>; - }; - -- uart4: serial@30a60000 { -- compatible = "fsl,imx8mq-uart", -- "fsl,imx6q-uart", "fsl,imx21-uart"; -- reg = <0x0 0x30a60000 0x0 0x10000>; -- interrupts = ; -- interrupt-parent = <&gpc>; -- clocks = <&clk IMX8MM_CLK_UART4_ROOT>, -- <&clk IMX8MM_CLK_UART4_ROOT>; -- clock-names = "ipg", "per"; -- status = "disabled"; -- }; - }; - - &iomuxc { -@@ -443,12 +426,6 @@ - status = "okay"; - }; - --&uart4 { /* console */ -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -- status = "okay"; --}; -- - &usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -@@ -488,7 +465,8 @@ - }; - - &usbotg2 { -- status = "disabled"; -+ dr_mode = "host"; -+ status = "okay"; - }; - - &cpu_alert0 { -diff --git a/board/compulab/ucm-imx8m-mini/Kconfig b/board/compulab/ucm-imx8m-mini/Kconfig -index d687db7686..ed4f21608a 100644 ---- a/board/compulab/ucm-imx8m-mini/Kconfig -+++ b/board/compulab/ucm-imx8m-mini/Kconfig -@@ -9,26 +9,9 @@ config SYS_VENDOR - config SYS_CONFIG_NAME - default "ucm-imx8m-mini" - --choice -- prompt "RAM Volume select" -- default RAM_2G -- help -- This option configures 2G RAM only -+config DEFAULT_DTB -+ string "U-Boot Default Device Tree File" -+ depends on TARGET_UCM_IMX8M_MINI -+ default "sbc-ucm-imx8m-mini.dtb" - --config RAM_1G -- bool "RAM_1G" -- help -- This option configures 1G RAM only -- --config RAM_2G -- bool "RAM_2G" -- help -- This option configures 2G RAM only -- --config RAM_4G -- bool "RAM_4G" -- help -- This option configures 4G RAM only -- --endchoice - endif -diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile -index f30d5e645a..dbde2116cd 100644 ---- a/board/compulab/ucm-imx8m-mini/Makefile -+++ b/board/compulab/ucm-imx8m-mini/Makefile -@@ -4,11 +4,12 @@ - # SPDX-License-Identifier: GPL-2.0+ - # - --obj-y += ucm-imx8m-mini.o -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ - - ifdef CONFIG_SPL_BUILD --ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ - obj-y += spl.o -+else -+obj-y += ucm-imx8m-mini.o - endif - - obj-y += ../plat/imx8mm/ -diff --git a/board/compulab/ucm-imx8m-mini/spl.c b/board/compulab/ucm-imx8m-mini/spl.c -index 316e8100fc..d6ece8ef3e 100644 ---- a/board/compulab/ucm-imx8m-mini/spl.c -+++ b/board/compulab/ucm-imx8m-mini/spl.c -@@ -1,251 +1,9 @@ --/* -- * Copyright 2018 NXP -- * -- * SPDX-License-Identifier: GPL-2.0+ -- */ -- --#include --#include --#include --#include - #include - #include - #include --#include --#include --#include - #include --#include --#include --#include --#include --#include --#include "ddr/ddr.h" --#include "ucm-imx8m-mini.h" -- --DECLARE_GLOBAL_DATA_PTR; -- --#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) --#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) --struct i2c_pads_info i2c_pad_info1 = { -- .scl = { -- .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, -- .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, -- .gp = IMX_GPIO_NR(5, 16), -- }, -- .sda = { -- .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, -- .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, -- .gp = IMX_GPIO_NR(5, 17), -- }, --}; -- --#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) --#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) -- --#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ -- PAD_CTL_FSEL2) --#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) -- --static iomux_v3_cfg_t const usdhc3_pads[] = { -- IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), --}; -- --static iomux_v3_cfg_t const usdhc2_pads[] = { -- IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -- IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), --}; -- --/* -- * The evk board uses DAT3 to detect CD card plugin, -- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. -- */ --static iomux_v3_cfg_t const usdhc2_cd_pad = -- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); -- --static iomux_v3_cfg_t const usdhc2_dat3_pad = -- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | -- MUX_PAD_CTRL(USDHC_PAD_CTRL); -- -- --static struct fsl_esdhc_cfg usdhc_cfg[2] = { -- {USDHC2_BASE_ADDR, 0, 4}, -- {USDHC3_BASE_ADDR, 0, 8}, --}; -- --int board_mmc_init(bd_t *bis) --{ -- int i, ret; -- /* -- * According to the board_mmc_init() the following map is done: -- * (U-Boot device node) (Physical Port) -- * mmc0 USDHC1 -- * mmc1 USDHC2 -- */ -- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { -- switch (i) { -- case 0: -- init_clk_usdhc(1); -- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); -- imx_iomux_v3_setup_multiple_pads( -- usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -- gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); -- gpio_direction_output(USDHC2_PWR_GPIO, 0); -- udelay(500); -- gpio_direction_output(USDHC2_PWR_GPIO, 1); -- break; -- case 1: -- init_clk_usdhc(2); -- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); -- imx_iomux_v3_setup_multiple_pads( -- usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); -- break; -- default: -- printf("Warning: you configured more USDHC controllers" -- "(%d) than supported by the board\n", i + 1); -- return -EINVAL; -- } -- -- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); -- if (ret) -- return ret; -- } -- -- return 0; --} -- --int board_mmc_getcd(struct mmc *mmc) --{ -- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; -- int ret = 0; -- -- switch (cfg->esdhc_base) { -- case USDHC3_BASE_ADDR: -- ret = 1; -- break; -- case USDHC2_BASE_ADDR: -- imx_iomux_v3_setup_pad(usdhc2_cd_pad); -- gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); -- gpio_direction_input(USDHC2_CD_GPIO); -- -- /* -- * Since it is the DAT3 pin, this pin is pulled to -- * low voltage if no card -- */ -- ret = gpio_get_value(USDHC2_CD_GPIO); -- -- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); -- return ret; -- } -- -- return 1; --} -- --#ifdef CONFIG_POWER --#define I2C_PMIC 1 --int power_init_board(void) --{ -- struct pmic *p; -- int ret; -- -- ret = power_bd71837_init(I2C_PMIC); -- if (ret) -- printf("power init failed"); -- -- p = pmic_get("BD71837"); -- pmic_probe(p); -- -- -- /* decrease RESET key long push time from the default 10s to 10ms */ -- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); -- -- /* unlock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x1); -- -- /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ -- /*pmic_reg_write(p, BD71837_BUCK2_VOLT_RUN, 0x0f);*/ -- -- /* increase VDD_SOC to 0.85V for 3Ghz DDR */ -- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); -- -- /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ -- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); -- -- /* lock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x11); -- -- return 0; --} --#else --int power_init_board(void) { return 0; } --#endif -- --void spl_board_init(void) --{ --#ifndef CONFIG_SPL_USB_SDP_SUPPORT -- /* Serial download mode */ -- if (is_usb_boot()) { -- puts("Back to ROM, SDP\n"); -- restore_boot_params(); -- } --#endif -- puts("Normal Boot\n"); --} -- --#ifdef CONFIG_SPL_LOAD_FIT --int board_fit_config_name_match(const char *name) --{ -- /* Just empty function now - can't decide what to choose */ -- debug("%s: %s\n", __func__, name); -+#include - -+int spl_board_private_init(void) { - return 0; - } --#endif -- --void board_init_f(ulong dummy) --{ -- int ret; -- /* Clear the BSS. */ -- memset(__bss_start, 0, __bss_end - __bss_start); -- -- /* Clear global data -- memset((void *)gd, 0, sizeof(gd_t)); -- */ -- arch_cpu_init(); -- -- board_early_init_f(); -- -- timer_init(); -- -- preloader_console_init(); -- -- ret = spl_init(); -- if (ret) { -- debug("spl_init() failed: %d\n", ret); -- hang(); -- } -- -- enable_tzc380(); -- -- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -- -- power_init_board(); -- /* DDR initialization */ -- spl_dram_init(); -- -- board_init_r(NULL, 0); --} -diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -index 0ffbbf3615..dea292e75c 100644 ---- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -+++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -@@ -1,5 +1,5 @@ - /* -- * Copyright 2018 NXP -+ * Copyright 2020 CompuLab - * - * SPDX-License-Identifier: GPL-2.0+ - */ -@@ -23,127 +23,14 @@ - #include - #include - #include --#include "../common/tcpc.h" - #include "../common/eeprom.h" - #include --#include --#include --#include -+#include - #include --#include "ucm-imx8m-mini.h" -+#include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; - --#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) --#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -- --static iomux_v3_cfg_t const uart_pads[] = { -- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), --}; -- --static iomux_v3_cfg_t const wdog_pads[] = { -- IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), --}; -- --#ifdef CONFIG_FSL_FSPI --#define QSPI_PAD_CTRL (PAD_CTL_DSE2 | PAD_CTL_HYS) --static iomux_v3_cfg_t const qspi_pads[] = { -- IMX8MM_PAD_NAND_ALE_QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL | PAD_CTL_PE | PAD_CTL_PUE), -- IMX8MM_PAD_NAND_CE0_B_QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL), -- -- IMX8MM_PAD_NAND_DATA00_QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA01_QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA02_QSPI_A_DATA2 | MUX_PAD_CTRL(QSPI_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA03_QSPI_A_DATA3 | MUX_PAD_CTRL(QSPI_PAD_CTRL), --}; -- --int board_qspi_init(void) --{ -- imx_iomux_v3_setup_multiple_pads(qspi_pads, ARRAY_SIZE(qspi_pads)); -- -- set_clk_qspi(); -- -- return 0; --} --#endif -- --#ifdef CONFIG_MXC_SPI --#define SPI_PAD_CTRL (PAD_CTL_DSE2 | PAD_CTL_HYS) --static iomux_v3_cfg_t const ecspi1_pads[] = { -- IMX8MM_PAD_ECSPI1_SCLK_ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI1_MOSI_ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI1_MISO_ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI1_SS0_GPIO5_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL), --}; -- --static iomux_v3_cfg_t const ecspi2_pads[] = { -- IMX8MM_PAD_ECSPI2_SCLK_ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI2_MOSI_ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI2_MISO_ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), -- IMX8MM_PAD_ECSPI2_SS0_GPIO5_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), --}; -- --static void setup_spi(void) --{ -- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); -- imx_iomux_v3_setup_multiple_pads(ecspi2_pads, ARRAY_SIZE(ecspi2_pads)); -- gpio_request(IMX_GPIO_NR(5, 9), "ECSPI1 CS"); -- gpio_request(IMX_GPIO_NR(5, 13), "ECSPI2 CS"); --} -- --int board_spi_cs_gpio(unsigned bus, unsigned cs) --{ -- if (bus == 0) -- return IMX_GPIO_NR(5, 9); -- else -- return IMX_GPIO_NR(5, 13); --} --#endif -- --#ifdef CONFIG_NAND_MXS --#define NAND_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL2 | PAD_CTL_HYS) --#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL2 | PAD_CTL_PUE) --static iomux_v3_cfg_t const gpmi_pads[] = { -- IMX8MM_PAD_NAND_ALE_RAWNAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_CE0_B_RAWNAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_CLE_RAWNAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA00_RAWNAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA01_RAWNAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA02_RAWNAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA03_RAWNAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA04_RAWNAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA05_RAWNAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA06_RAWNAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_DATA07_RAWNAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_RE_B_RAWNAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_READY_B_RAWNAND_READY_B | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL), -- IMX8MM_PAD_NAND_WE_B_RAWNAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), -- IMX8MM_PAD_NAND_WP_B_RAWNAND_WP_B | MUX_PAD_CTRL(NAND_PAD_CTRL), --}; -- --static void setup_gpmi_nand(void) --{ -- imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); -- mxs_dma_init(); --} --#endif -- --int board_early_init_f(void) --{ -- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; -- -- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); -- -- set_wdog_reset(wdog); -- -- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -- -- init_uart_clk(2); -- -- return 0; --} -- - #ifdef CONFIG_BOARD_POSTCLK_INIT - int board_postclk_init(void) - { -@@ -194,81 +81,6 @@ int dram_init(void) - return 0; - } - --int dram_init_banksize(void) --{ -- int bank = 0; -- int ret; -- phys_size_t total_size, bank_1_size, bank_2_size; -- -- ret = board_phys_sdram_size(&total_size); -- if (ret) -- return ret; -- -- switch (total_size) { -- case 4 * (1L << 30): -- bank_1_size = 3 * (1L << 30); -- bank_2_size = 1 * (1L << 30); -- break; -- default: -- bank_1_size = total_size; -- bank_2_size = 0; -- break; -- } -- -- gd->bd->bi_dram[bank].start = PHYS_SDRAM; -- gd->bd->bi_dram[bank].size = bank_1_size; -- -- if (rom_pointer[1]) { -- phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; -- phys_size_t optee_size = (size_t)rom_pointer[1]; -- -- if ((optee_start + optee_size) < (PHYS_SDRAM + bank_1_size)) { -- -- gd->bd->bi_dram[bank].size = optee_start - -- gd->bd->bi_dram[bank].start; -- -- if ( ++bank >= CONFIG_NR_DRAM_BANKS) { -- puts("CONFIG_NR_DRAM_BANKS is not enough\n"); -- return -1; -- } -- -- gd->bd->bi_dram[bank].start = optee_start; -- gd->bd->bi_dram[bank].size = PHYS_SDRAM + -- bank_1_size - gd->bd->bi_dram[bank].start; -- } -- else { -- printf("%s: There is no room to allocate TEE 0x%16.16llx @ 0x%16.16llx\n", -- __func__, optee_size, optee_start); -- } -- } else { -- gd->bd->bi_dram[bank].size = bank_1_size; -- } -- -- if(bank_2_size) { -- if ( ++bank >= CONFIG_NR_DRAM_BANKS) { -- puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n"); -- return -1; -- } -- gd->bd->bi_dram[bank].start = PHYS_SDRAM_2; -- gd->bd->bi_dram[bank].size = bank_2_size; -- } -- return 0; --} -- --phys_size_t get_effective_memsize(void) --{ -- /* return the first bank as effective memory */ -- if (rom_pointer[1]) -- return ((phys_addr_t)rom_pointer[0] - PHYS_SDRAM); -- -- switch(gd->ram_size) { -- case 4 * (1L<<30): -- return 3 * (1L<<30); -- default: -- return gd->ram_size; -- } --} -- - #ifdef CONFIG_OF_BOARD_SETUP - int ft_board_setup(void *blob, bd_t *bd) - { -@@ -316,7 +128,7 @@ static int setup_mac_address(void) - return -1; - - ret = eth_env_set_enetaddr("ethaddr", enetaddr); -- if (!ret) -+ if (ret) - return -1; - - return 0; -@@ -352,522 +164,88 @@ int board_phy_config(struct phy_device *phydev) - } - #endif - --#ifdef CONFIG_USB_TCPC --struct tcpc_port port1; --struct tcpc_port port2; -- --static int setup_pd_switch(uint8_t i2c_bus, uint8_t addr) --{ -- struct udevice *bus; -- struct udevice *i2c_dev = NULL; -- int ret; -- uint8_t valb; -- -- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); -- if (ret) { -- printf("%s: Can't find bus\n", __func__); -- return -EINVAL; -- } -- -- ret = dm_i2c_probe(bus, addr, 0, &i2c_dev); -- if (ret) { -- printf("%s: Can't find device id=0x%x\n", -- __func__, addr); -- return -ENODEV; -- } -- -- ret = dm_i2c_read(i2c_dev, 0xB, &valb, 1); -- if (ret) { -- printf("%s dm_i2c_read failed, err %d\n", __func__, ret); -- return -EIO; -- } -- valb |= 0x4; /* Set DB_EXIT to exit dead battery mode */ -- ret = dm_i2c_write(i2c_dev, 0xB, (const uint8_t *)&valb, 1); -- if (ret) { -- printf("%s dm_i2c_write failed, err %d\n", __func__, ret); -- return -EIO; -- } -- -- /* Set OVP threshold to 23V */ -- valb = 0x6; -- ret = dm_i2c_write(i2c_dev, 0x8, (const uint8_t *)&valb, 1); -- if (ret) { -- printf("%s dm_i2c_write failed, err %d\n", __func__, ret); -- return -EIO; -- } -- -- return 0; --} -- --int pd_switch_snk_enable(struct tcpc_port *port) --{ -- if (port == &port1) { -- debug("Setup pd switch on port 1\n"); -- return setup_pd_switch(1, 0x72); -- } else if (port == &port2) { -- debug("Setup pd switch on port 2\n"); -- return setup_pd_switch(1, 0x73); -- } else -- return -EINVAL; --} -- --struct tcpc_port_config port1_config = { -- .i2c_bus = 1, /*i2c2*/ -- .addr = 0x50, -- .port_type = TYPEC_PORT_UFP, -- .max_snk_mv = 5000, -- .max_snk_ma = 3000, -- .max_snk_mw = 40000, -- .op_snk_mv = 9000, -- .switch_setup_func = &pd_switch_snk_enable, --}; -- --struct tcpc_port_config port2_config = { -- .i2c_bus = 1, /*i2c2*/ -- .addr = 0x52, -- .port_type = TYPEC_PORT_UFP, -- .max_snk_mv = 5000, -- .max_snk_ma = 3000, -- .max_snk_mw = 40000, -- .op_snk_mv = 9000, -- .switch_setup_func = &pd_switch_snk_enable, --}; -- --static int setup_typec(void) --{ -- int ret; -- -- debug("tcpc_init port 2\n"); -- ret = tcpc_init(&port2, port2_config, NULL); -- if (ret) { -- printf("%s: tcpc port2 init failed, err=%d\n", -- __func__, ret); -- } else if (tcpc_pd_sink_check_charging(&port2)) { -- /* Disable PD for USB1, since USB2 has priority */ -- port1_config.disable_pd = true; -- printf("Power supply on USB2\n"); -- } -- -- debug("tcpc_init port 1\n"); -- ret = tcpc_init(&port1, port1_config, NULL); -- if (ret) { -- printf("%s: tcpc port1 init failed, err=%d\n", -- __func__, ret); -- } else { -- if (!port1_config.disable_pd) -- printf("Power supply on USB1\n"); -- return ret; -- } -- -- return ret; --} -- - int board_usb_init(int index, enum usb_init_type init) - { -- int ret = 0; -- struct tcpc_port *port_ptr; -- - debug("board_usb_init %d, type %d\n", index, init); - -- if (index == 0) -- port_ptr = &port1; -- else -- port_ptr = &port2; -- - imx8m_usb_power(index, true); - -- if (init == USB_INIT_HOST) -- tcpc_setup_dfp_mode(port_ptr); -- else -- tcpc_setup_ufp_mode(port_ptr); -- -- return ret; -+ return 0; - } - - int board_usb_cleanup(int index, enum usb_init_type init) - { -- int ret = 0; -- - debug("board_usb_cleanup %d, type %d\n", index, init); - -- if (init == USB_INIT_HOST) { -- if (index == 0) -- ret = tcpc_disable_src_vbus(&port1); -- else -- ret = tcpc_disable_src_vbus(&port2); -- } -- - imx8m_usb_power(index, false); -- return ret; --} - --int board_ehci_usb_phy_mode(struct udevice *dev) --{ -- int ret = 0; -- enum typec_cc_polarity pol; -- enum typec_cc_state state; -- struct tcpc_port *port_ptr; -- -- if (dev->seq == 0) -- port_ptr = &port1; -- else -- port_ptr = &port2; -- -- tcpc_setup_ufp_mode(port_ptr); -- -- ret = tcpc_get_cc_status(port_ptr, &pol, &state); -- if (!ret) { -- if (state == TYPEC_STATE_SRC_RD_RA || state == TYPEC_STATE_SRC_RD) -- return USB_INIT_HOST; -- } -- -- return USB_INIT_DEVICE; -+ return 0; - } -- --#endif -- - int board_init(void) - { - --#ifdef CONFIG_USB_TCPC -- setup_typec(); --#endif -- --#ifdef CONFIG_MXC_SPI -- setup_spi(); --#endif -- - #ifdef CONFIG_FEC_MXC - setup_fec(); - #endif -- --#ifdef CONFIG_FSL_FSPI -- board_qspi_init(); --#endif -- --#ifdef CONFIG_NAND_MXS -- setup_gpmi_nand(); /* SPL will call the board_early_init_f */ --#endif - return 0; - } - - int board_mmc_get_env_dev(int devno) - { -- const ulong user_env_devno = env_get_hex("env_mmcdev", ULONG_MAX); -+ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); - if (user_env_devno != ULONG_MAX) { -- printf("User Environment DevNo is set: Save environmet on MMC(%lu)\n", user_env_devno); -+ printf("User Environment dev# is (%lu)\n", user_env_devno); - return (int)user_env_devno; - } -- else { -- return devno - 1; -- } -+ return devno; - } - --int mmc_map_to_kernel_blk(int devno) -+static int _mmc_get_env_part(void) - { -- return devno + 1; --} -- --#ifdef CONFIG_VIDEO_MXS -- --#define ADV7535_MAIN 0x3d --#define ADV7535_DSI_CEC 0x3c -- --static const struct sec_mipi_dsim_plat_data imx8mm_mipi_dsim_plat_data = { -- .version = 0x1060200, -- .max_data_lanes = 4, -- .max_data_rate = 1500000000ULL, -- .reg_base = MIPI_DSI_BASE_ADDR, -- .gpr_base = CSI_BASE_ADDR + 0x8000, --}; -- --static int adv7535_i2c_reg_write(struct udevice *dev, uint addr, uint mask, uint data) --{ -- uint8_t valb; -- int err; -- -- if (mask != 0xff) { -- err = dm_i2c_read(dev, addr, &valb, 1); -- if (err) -- return err; -- -- valb &= ~mask; -- valb |= data; -- } else { -- valb = data; -+ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -+ if (user_env_part != ULONG_MAX) { -+ printf("User Environment part# is (%lu)\n", user_env_part); -+ return (int)user_env_part; - } -- -- err = dm_i2c_write(dev, addr, &valb, 1); -- return err; -+ return CONFIG_SYS_MMC_ENV_PART; - } - --static int adv7535_i2c_reg_read(struct udevice *dev, uint8_t addr, uint8_t *data) -+uint mmc_get_env_part(struct mmc *mmc) - { -- uint8_t valb; -- int err; -+ if (mmc->part_support) -+ return _mmc_get_env_part(); - -- err = dm_i2c_read(dev, addr, &valb, 1); -- if (err) -- return err; -- -- *data = (int)valb; - return 0; - } - --static void adv7535_init(void) --{ -- struct udevice *bus, *main_dev, *cec_dev; -- int i2c_bus = 1; -- int ret; -- uint8_t val; -- -- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); -- if (ret) { -- printf("%s: No bus %d\n", __func__, i2c_bus); -- return; -- } -- -- ret = dm_i2c_probe(bus, ADV7535_MAIN, 0, &main_dev); -- if (ret) { -- printf("%s: Can't find device id=0x%x, on bus %d\n", -- __func__, ADV7535_MAIN, i2c_bus); -- return; -- } -- -- ret = dm_i2c_probe(bus, ADV7535_DSI_CEC, 0, &cec_dev); -- if (ret) { -- printf("%s: Can't find device id=0x%x, on bus %d\n", -- __func__, ADV7535_MAIN, i2c_bus); -- return; -- } -- -- adv7535_i2c_reg_read(main_dev, 0x00, &val); -- debug("Chip revision: 0x%x (expected: 0x14)\n", val); -- adv7535_i2c_reg_read(cec_dev, 0x00, &val); -- debug("Chip ID MSB: 0x%x (expected: 0x75)\n", val); -- adv7535_i2c_reg_read(cec_dev, 0x01, &val); -- debug("Chip ID LSB: 0x%x (expected: 0x33)\n", val); -- -- /* Power */ -- adv7535_i2c_reg_write(main_dev, 0x41, 0xff, 0x10); -- /* Initialisation (Fixed) Registers */ -- adv7535_i2c_reg_write(main_dev, 0x16, 0xff, 0x20); -- adv7535_i2c_reg_write(main_dev, 0x9A, 0xff, 0xE0); -- adv7535_i2c_reg_write(main_dev, 0xBA, 0xff, 0x70); -- adv7535_i2c_reg_write(main_dev, 0xDE, 0xff, 0x82); -- adv7535_i2c_reg_write(main_dev, 0xE4, 0xff, 0x40); -- adv7535_i2c_reg_write(main_dev, 0xE5, 0xff, 0x80); -- adv7535_i2c_reg_write(cec_dev, 0x15, 0xff, 0xD0); -- adv7535_i2c_reg_write(cec_dev, 0x17, 0xff, 0xD0); -- adv7535_i2c_reg_write(cec_dev, 0x24, 0xff, 0x20); -- adv7535_i2c_reg_write(cec_dev, 0x57, 0xff, 0x11); -- /* 4 x DSI Lanes */ -- adv7535_i2c_reg_write(cec_dev, 0x1C, 0xff, 0x40); -- -- /* DSI Pixel Clock Divider */ -- adv7535_i2c_reg_write(cec_dev, 0x16, 0xff, 0x18); -- -- /* Enable Internal Timing Generator */ -- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); -- /* 1920 x 1080p 60Hz */ -- adv7535_i2c_reg_write(cec_dev, 0x28, 0xff, 0x89); /* total width */ -- adv7535_i2c_reg_write(cec_dev, 0x29, 0xff, 0x80); /* total width */ -- adv7535_i2c_reg_write(cec_dev, 0x2A, 0xff, 0x02); /* hsync */ -- adv7535_i2c_reg_write(cec_dev, 0x2B, 0xff, 0xC0); /* hsync */ -- adv7535_i2c_reg_write(cec_dev, 0x2C, 0xff, 0x05); /* hfp */ -- adv7535_i2c_reg_write(cec_dev, 0x2D, 0xff, 0x80); /* hfp */ -- adv7535_i2c_reg_write(cec_dev, 0x2E, 0xff, 0x09); /* hbp */ -- adv7535_i2c_reg_write(cec_dev, 0x2F, 0xff, 0x40); /* hbp */ -- -- adv7535_i2c_reg_write(cec_dev, 0x30, 0xff, 0x46); /* total height */ -- adv7535_i2c_reg_write(cec_dev, 0x31, 0xff, 0x50); /* total height */ -- adv7535_i2c_reg_write(cec_dev, 0x32, 0xff, 0x00); /* vsync */ -- adv7535_i2c_reg_write(cec_dev, 0x33, 0xff, 0x50); /* vsync */ -- adv7535_i2c_reg_write(cec_dev, 0x34, 0xff, 0x00); /* vfp */ -- adv7535_i2c_reg_write(cec_dev, 0x35, 0xff, 0x40); /* vfp */ -- adv7535_i2c_reg_write(cec_dev, 0x36, 0xff, 0x02); /* vbp */ -- adv7535_i2c_reg_write(cec_dev, 0x37, 0xff, 0x40); /* vbp */ -- -- /* Reset Internal Timing Generator */ -- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); -- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0x8B); -- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); -- -- /* HDMI Output */ -- adv7535_i2c_reg_write(main_dev, 0xAF, 0xff, 0x16); -- /* AVI Infoframe - RGB - 16-9 Aspect Ratio */ -- adv7535_i2c_reg_write(main_dev, 0x55, 0xff, 0x02); -- adv7535_i2c_reg_write(main_dev, 0x56, 0xff, 0x0); -- -- /* GC Packet Enable */ -- adv7535_i2c_reg_write(main_dev, 0x40, 0xff, 0x0); -- /* GC Colour Depth - 24 Bit */ -- adv7535_i2c_reg_write(main_dev, 0x4C, 0xff, 0x0); -- /* Down Dither Output Colour Depth - 8 Bit (default) */ -- adv7535_i2c_reg_write(main_dev, 0x49, 0xff, 0x00); -- -- /* set low refresh 1080p30 */ -- adv7535_i2c_reg_write(main_dev, 0x4A, 0xff, 0x80); /*should be 0x80 for 1080p60 and 0x8c for 1080p30*/ -- -- /* HDMI Output Enable */ -- adv7535_i2c_reg_write(cec_dev, 0xbe, 0xff, 0x3c); -- adv7535_i2c_reg_write(cec_dev, 0x03, 0xff, 0x89); -+int mmc_map_to_kernel_blk(int devno){ -+ return devno; - } - --#define DISPLAY_MIX_SFT_RSTN_CSR 0x00 --#define DISPLAY_MIX_CLK_EN_CSR 0x04 -- -- /* 'DISP_MIX_SFT_RSTN_CSR' bit fields */ --#define BUS_RSTN_BLK_SYNC_SFT_EN BIT(6) -- -- /* 'DISP_MIX_CLK_EN_CSR' bit fields */ --#define LCDIF_PIXEL_CLK_SFT_EN BIT(7) --#define LCDIF_APB_CLK_SFT_EN BIT(6) -- --void disp_mix_bus_rstn_reset(ulong gpr_base, bool reset) --{ -- if (!reset) -- /* release reset */ -- setbits_le32(gpr_base + DISPLAY_MIX_SFT_RSTN_CSR, BUS_RSTN_BLK_SYNC_SFT_EN); -- else -- /* hold reset */ -- clrbits_le32(gpr_base + DISPLAY_MIX_SFT_RSTN_CSR, BUS_RSTN_BLK_SYNC_SFT_EN); --} -- --void disp_mix_lcdif_clks_enable(ulong gpr_base, bool enable) -+static void board_bootdev_init(void) - { -- if (enable) -- /* enable lcdif clks */ -- setbits_le32(gpr_base + DISPLAY_MIX_CLK_EN_CSR, LCDIF_PIXEL_CLK_SFT_EN | LCDIF_APB_CLK_SFT_EN); -- else -- /* disable lcdif clks */ -- clrbits_le32(gpr_base + DISPLAY_MIX_CLK_EN_CSR, LCDIF_PIXEL_CLK_SFT_EN | LCDIF_APB_CLK_SFT_EN); --} -- --struct mipi_dsi_client_dev adv7535_dev = { -- .channel = 0, -- .lanes = 4, -- .format = MIPI_DSI_FMT_RGB888, -- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | -- MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE, -- .name = "ADV7535", --}; -- --struct mipi_dsi_client_dev rm67191_dev = { -- .channel = 0, -- .lanes = 4, -- .format = MIPI_DSI_FMT_RGB888, -- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | -- MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE, --}; -- --#define FSL_SIP_GPC 0xC2000000 --#define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x3 --#define DISPMIX 9 --#define MIPI 10 -- --void do_enable_mipi2hdmi(struct display_info_t const *dev) --{ -- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); -- gpio_direction_output(IMX_GPIO_NR(1, 8), 1); -- -- /* ADV7353 initialization */ -- adv7535_init(); -- -- /* enable the dispmix & mipi phy power domain */ -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); -- -- /* Put lcdif out of reset */ -- disp_mix_bus_rstn_reset(imx8mm_mipi_dsim_plat_data.gpr_base, false); -- disp_mix_lcdif_clks_enable(imx8mm_mipi_dsim_plat_data.gpr_base, true); -- -- /* Setup mipi dsim */ -- sec_mipi_dsim_setup(&imx8mm_mipi_dsim_plat_data); -- imx_mipi_dsi_bridge_attach(&adv7535_dev); /* attach adv7535 device */ --} -- --void do_enable_mipi_led(struct display_info_t const *dev) --{ -- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); -- gpio_direction_output(IMX_GPIO_NR(1, 8), 0); -- mdelay(100); -- gpio_direction_output(IMX_GPIO_NR(1, 8), 1); -- -- /* enable the dispmix & mipi phy power domain */ -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); -- -- /* Put lcdif out of reset */ -- disp_mix_bus_rstn_reset(imx8mm_mipi_dsim_plat_data.gpr_base, false); -- disp_mix_lcdif_clks_enable(imx8mm_mipi_dsim_plat_data.gpr_base, true); -- -- /* Setup mipi dsim */ -- sec_mipi_dsim_setup(&imx8mm_mipi_dsim_plat_data); -- -- rm67191_init(); -- rm67191_dev.name = displays[1].mode.name; -- imx_mipi_dsi_bridge_attach(&rm67191_dev); /* attach rm67191 device */ --} -- --void board_quiesce_devices(void) --{ -- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); -- gpio_direction_output(IMX_GPIO_NR(1, 8), 0); -+ u32 bootdev = get_boot_device(); -+ switch (bootdev) { -+ case MMC3_BOOT: -+ bootdev = 2; -+ break; -+ case SD2_BOOT: -+ bootdev = 1; -+ break; -+ default: -+ env_set("bootdev", NULL); -+ return; -+ } -+ env_set_ulong("bootdev", bootdev); - } - --struct display_info_t const displays[] = {{ -- .bus = LCDIF_BASE_ADDR, -- .addr = 0, -- .pixfmt = 24, -- .detect = NULL, -- .enable = do_enable_mipi2hdmi, -- .mode = { -- .name = "MIPI2HDMI", -- .refresh = 60, -- .xres = 1920, -- .yres = 1080, -- .pixclock = 6734, /* 148500000 */ -- .left_margin = 148, -- .right_margin = 88, -- .upper_margin = 36, -- .lower_margin = 4, -- .hsync_len = 44, -- .vsync_len = 5, -- .sync = FB_SYNC_EXT, -- .vmode = FB_VMODE_NONINTERLACED -- --} }, { -- .bus = LCDIF_BASE_ADDR, -- .addr = 0, -- .pixfmt = 24, -- .detect = NULL, -- .enable = do_enable_mipi_led, -- .mode = { -- .name = "RM67191_OLED", -- .refresh = 60, -- .xres = 1080, -- .yres = 1920, -- .pixclock = 7575, /* 132000000 */ -- .left_margin = 34, -- .right_margin = 20, -- .upper_margin = 4, -- .lower_margin = 10, -- .hsync_len = 2, -- .vsync_len = 2, -- .sync = FB_SYNC_EXT, -- .vmode = FB_VMODE_NONINTERLACED -- --} } }; --size_t display_count = ARRAY_SIZE(displays); --#endif -- - int board_late_init(void) - { - int ret; - - #ifdef CONFIG_ENV_IS_IN_MMC - board_late_mmc_env_init(); -+ board_bootdev_init(); - #endif - - ret = setup_mac_address(); -diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h -deleted file mode 100644 -index c3380cb5ef..0000000000 ---- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h -+++ /dev/null -@@ -1,18 +0,0 @@ --/* -- * Copyright 2017 NXP -- * -- * SPDX-License-Identifier: GPL-2.0+ -- */ -- --#ifndef __UCM_IMX8M_MINI__ --#define __UCM_IMX8M_MINI__ -- --#define TCM_DATA_CFG 0x7e0000 --struct lpddr4_tcm_desc { -- unsigned int size; -- unsigned int sign; -- unsigned int index; -- unsigned int count; --}; -- --#endif -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index f42597b5c7..1bdf48190e 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -1,75 +1,101 @@ --CONFIG_LOCALVERSION="-rel.1.3.2-rc0" - CONFIG_ARM=y -+CONFIG_SPL_SYS_ICACHE_OFF=y -+CONFIG_SPL_SYS_DCACHE_OFF=y - CONFIG_ARCH_IMX8M=y - CONFIG_SYS_TEXT_BASE=0x40200000 --CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_SPL_GPIO_SUPPORT=y -+CONFIG_ENV_SIZE=0x1000 -+CONFIG_ENV_OFFSET=0x4400 -+CONFIG_DM_GPIO=y - CONFIG_TARGET_UCM_IMX8M_MINI=y -+CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" - CONFIG_SPL_MMC_SUPPORT=y --# CONFIG_IMX_OPTEE is not set --CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" -+CONFIG_SPL_SERIAL_SUPPORT=y -+CONFIG_SPL=y -+CONFIG_CSF_SIZE=0x2000 -+CONFIG_SPL_TEXT_BASE=0x7E1000 - CONFIG_FIT=y -+CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y - CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" --CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,SPL_TEXT_BASE=0x7E1000" -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" -+CONFIG_CONSOLE_MUX=y - CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" -+CONFIG_BOARD_LATE_INIT=y - CONFIG_ARCH_MISC_INIT=y --CONFIG_SPL=y --CONFIG_SPL_SERIAL_SUPPORT=y -+CONFIG_BOARD_EARLY_INIT_F=y - CONFIG_SPL_BOARD_INIT=y -+CONFIG_SPL_SEPARATE_BSS=y -+CONFIG_SPL_POWER_SUPPORT=y - CONFIG_HUSH_PARSER=y --CONFIG_FASTBOOT=y --CONFIG_FSL_FASTBOOT=y --CONFIG_FASTBOOT_BUF_ADDR=0x42800000 --CONFIG_FASTBOOT_BUF_SIZE=0x40000000 --CONFIG_FASTBOOT_FLASH=y --CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -+CONFIG_SYS_PROMPT="u-boot=> " -+# CONFIG_BOOTM_NETBSD is not set - CONFIG_CMD_EEPROM=y - CONFIG_CMD_EEPROM_LAYOUT=y - CONFIG_CMD_MEMINFO=y - CONFIG_CMD_MEMTEST=y -+CONFIG_CMD_CLK=y -+CONFIG_CMD_FUSE=y - CONFIG_CMD_GPIO=y - CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_DHCP=y -+CONFIG_CMD_MII=y -+CONFIG_CMD_PING=y - CONFIG_CMD_CACHE=y --# CONFIG_CMD_LED is not set - CONFIG_CMD_REGULATOR=y - CONFIG_CMD_EXT2=y - CONFIG_CMD_EXT4=y - CONFIG_CMD_FAT=y - CONFIG_CMD_FS_GENERIC=y - CONFIG_EFI_PARTITION=y --CONFIG_PARTITION_TYPE_GUID=y - CONFIG_OF_CONTROL=y -+CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" - CONFIG_ENV_IS_IN_MMC=y --CONFIG_IMX8M_LPDDR4=y --CONFIG_DM_GPIO=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_CLK_COMPOSITE_CCF=y -+CONFIG_CLK_IMX8MM=y -+CONFIG_MXC_GPIO=y -+CONFIG_DM_I2C=y - CONFIG_SYS_I2C_MXC=y --CONFIG_LED=y --CONFIG_LED_STATUS=y --CONFIG_LED_STATUS_GPIO=y --CONFIG_LED_STATUS0=y --CONFIG_LED_STATUS_BIT=12 - CONFIG_DM_MMC=y --CONFIG_DM_SPI_FLASH=y --CONFIG_SPI_FLASH=y --CONFIG_SPI_FLASH_STMICRO=y -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_MMC_IO_VOLTAGE=y -+CONFIG_MMC_UHS_SUPPORT=y -+CONFIG_MMC_HS400_ES_SUPPORT=y -+CONFIG_MMC_HS400_SUPPORT=y -+CONFIG_FSL_ESDHC_IMX=y - CONFIG_DM_ETH=y --CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_FEC_MXC=y -+CONFIG_MII=y - CONFIG_PINCTRL=y - CONFIG_PINCTRL_IMX8M=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_REGULATOR_GPIO=y --CONFIG_DM_SPI=y -+CONFIG_DM_RESET=y -+CONFIG_MXC_UART=y -+CONFIG_SYSRESET=y -+CONFIG_SYSRESET_PSCI=y - CONFIG_DM_THERMAL=y -+CONFIG_NXP_TMU=y - CONFIG_USB=y - CONFIG_DM_USB=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_GADGET_MANUFACTURER="FSL" - CONFIG_USB_GADGET_VENDOR_NUM=0x0525 - CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 -+CONFIG_CI_UDC=y - CONFIG_SDP_LOADADDR=0x40400000 --CONFIG_NR_DRAM_BANKS=4 --CONFIG_SPL_GPIO_SUPPORT=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_EXT4_WRITE=y -+CONFIG_FAT_WRITE=y -+CONFIG_OF_LIBFDT_OVERLAY=y -+# CONFIG_EFI_LOADER is not set -diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h -index ad4e7997b1..75c6102f10 100644 ---- a/include/configs/ucm-imx8m-mini.h -+++ b/include/configs/ucm-imx8m-mini.h -@@ -1,5 +1,5 @@ - /* -- * Copyright 2018 CompuLab -+ * Copyright 2020 CompuLab - * - * SPDX-License-Identifier: GPL-2.0+ - */ -@@ -9,13 +9,8 @@ - - #include - #include -- - #include "imx_env.h" - --#ifdef CONFIG_SECURE_BOOT --#define CONFIG_CSF_SIZE 0x2000 /* 8K region */ --#endif -- - #define CONFIG_SPL_MAX_SIZE (148 * 1024) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -@@ -26,20 +21,19 @@ - #ifdef CONFIG_SPL_BUILD - /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ - #define CONFIG_SPL_WATCHDOG_SUPPORT --#define CONFIG_SPL_POWER_SUPPORT - #define CONFIG_SPL_DRIVERS_MISC_SUPPORT - #define CONFIG_SPL_I2C_SUPPORT --#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" --#define CONFIG_SPL_STACK 0x91fff0 - #define CONFIG_SPL_LIBCOMMON_SUPPORT - #define CONFIG_SPL_LIBGENERIC_SUPPORT --#define CONFIG_SPL_BSS_START_ADDR 0x00910000 --#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ --#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 --#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ --#define CONFIG_SYS_ICACHE_OFF --#define CONFIG_SYS_DCACHE_OFF --#define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -+ -+#define CONFIG_SPL_STACK 0x920000 -+#define CONFIG_SPL_BSS_START_ADDR 0x910000 -+#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K -+#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -+#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K -+ -+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -+#define CONFIG_MALLOC_F_ADDR 0x912000 - - #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ - -@@ -56,10 +50,6 @@ - #define CONFIG_POWER_I2C - #define CONFIG_POWER_BD71837 - --#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG --#else /*ifdef CONFIG_SPL_BUILD*/ --#define CONFIG_DM_I2C_COMPAT --#define CONFIG_DM_I2C - #endif /*ifdef CONFIG_SPL_BUILD*/ - - #define CONFIG_CMD_READ -@@ -68,9 +58,7 @@ - - #define CONFIG_REMAKE_ELF - --#define CONFIG_BOARD_EARLY_INIT_F - #define CONFIG_BOARD_POSTCLK_INIT --#define CONFIG_BOARD_LATE_INIT - - /* Flat Device Tree Definitions */ - #define CONFIG_OF_BOARD_SETUP -@@ -83,13 +71,8 @@ - /* ENET Config */ - /* ENET1 */ - #if defined(CONFIG_CMD_NET) --#define CONFIG_CMD_PING --#define CONFIG_CMD_DHCP --#define CONFIG_CMD_MII --#define CONFIG_MII - #define CONFIG_ETHPRIME "FEC" - --#define CONFIG_FEC_MXC - #define CONFIG_FEC_XCV_TYPE RGMII - #define CONFIG_FEC_MXC_PHYADDR 0 - #define FEC_QUIRK_ENET_MAC -@@ -126,19 +109,20 @@ - "fdt_addr=0x43000000\0" \ - "fdt_high=0xffffffffffffffff\0" \ - "boot_fdt=yes\0" \ -- "fdt_file="CONFIG_DEFAULT_DEVICE_TREE".dtb\0" \ -+ "fdt_file="CONFIG_DEFAULT_DTB"\0" \ - "initrd_addr=0x43800000\0" \ - "initrd_high=0xffffffffffffffff\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ -- "emmc_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk2p2 rw rootwait;\0" \ -- "sd_ul=setenv iface mmc; setenv dev 0; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk1p2 rw rootwait;\0" \ -+ "root_opt=rootwait rw\0" \ -+ "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ -+ "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ -+ "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ -+ "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ - "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/sda2 rw rootwait;\0" \ -+ "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ - "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ - "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ - "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -@@ -197,9 +181,8 @@ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - - #define CONFIG_ENV_OVERWRITE --#define CONFIG_ENV_OFFSET (34 * 512) /* Max possible GPT size */ --#define CONFIG_ENV_SIZE 0x1000 --#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ -+#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ -+#define CONFIG_SYS_MMC_ENV_PART 1 - #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ - - /* Size of malloc() pool */ -@@ -220,7 +203,6 @@ - - #define CONFIG_BAUDRATE 115200 - --#define CONFIG_MXC_UART - #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR - - /* Monitor Command Prompt */ -@@ -233,30 +215,16 @@ - #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - --#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - --#define CONFIG_MXC_OCOTP --#define CONFIG_CMD_FUSE -- - #define CONFIG_IMX_BOOTAUX - - /* USDHC */ --#define CONFIG_CMD_MMC --#define CONFIG_FSL_ESDHC - #define CONFIG_FSL_USDHC - - #define CONFIG_SYS_FSL_USDHC_NUM 2 - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 - --#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ --#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -- --#define CONFIG_MXC_GPIO -- --#define CONFIG_MXC_OCOTP --#define CONFIG_CMD_FUSE -- - #ifndef CONFIG_DM_I2C - #define CONFIG_SYS_I2C - #endif -@@ -286,11 +254,8 @@ - - #endif - --#define CONFIG_USB_GADGET_DUALSPEED - #define CONFIG_USB_GADGET_VBUS_DRAW 2 - --#define CONFIG_CI_UDC -- - #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) - #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 - -@@ -307,7 +272,8 @@ - #define CONFIG_RM67191 - #endif - --#define CONFIG_OF_SYSTEM_SETUP -+#define CONFIG_BOARD_POSTCLK_INIT -+#define CONFIG_OF_BOARD_SETUP - - #if defined(CONFIG_ANDROID_SUPPORT) - #include "ucm-imx8m-mini_android.h" --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch b/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch deleted file mode 100644 index df63f60..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 06adb2dbfb2c31f2a3d820f076a6a424f8bb7b39 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 15:06:14 +0300 -Subject: [PATCH 56/91] cpl-imx8m-mini: Set LOCALVERSION intead of EXTRAVERSION - -Signed-off-by: Kirill Kapranov ---- - Makefile | 2 +- - configs/mcm-imx8m-mini_defconfig | 1 + - configs/ucm-imx8m-mini_defconfig | 1 + - 3 files changed, 3 insertions(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 22d2230a6f..0451f445f6 100644 ---- a/Makefile -+++ b/Makefile -@@ -3,7 +3,7 @@ - VERSION = 2021 - PATCHLEVEL = 04 - SUBLEVEL = --EXTRAVERSION = -mcm-imx8m-mini-1.0 -+EXTRAVERSION = - NAME = - - # *DOCUMENTATION* -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig -index 92cdad293d..a4c3c90f83 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/mcm-imx8m-mini_defconfig -@@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y - CONFIG_SPL=y - CONFIG_CSF_SIZE=0x2000 - CONFIG_SPL_TEXT_BASE=0x7E1000 -+CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0" - CONFIG_FIT=y - CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 1bdf48190e..f86cc9e942 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y - CONFIG_SPL=y - CONFIG_CSF_SIZE=0x2000 - CONFIG_SPL_TEXT_BASE=0x7E1000 -+CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0" - CONFIG_FIT=y - CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.h-configs.patch b/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.h-configs.patch deleted file mode 100644 index a9a7245..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.h-configs.patch +++ /dev/null @@ -1,852 +0,0 @@ -From 109633d2c0078c3ef243ec45fd616a83b8d310c7 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 15:46:11 +0300 -Subject: [PATCH 57/91] cpl-imx8m-mini: Refactor .h configs - -Signed-off-by: Kirill Kapranov ---- - include/configs/cpl-imx8m-mini.h | 275 +++++++++++++++++++++++++++++++ - include/configs/mcm-imx8m-mini.h | 265 +---------------------------- - include/configs/ucm-imx8m-mini.h | 268 +----------------------------- - 3 files changed, 277 insertions(+), 531 deletions(-) - create mode 100644 include/configs/cpl-imx8m-mini.h - -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -new file mode 100644 -index 0000000000..dd8120f4dc ---- /dev/null -+++ b/include/configs/cpl-imx8m-mini.h -@@ -0,0 +1,275 @@ -+/* -+ * Copyright 2020 CompuLab -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __CPL_IMX8M_MINI_H -+#define __CPL_IMX8M_MINI_H -+ -+#include -+#include -+#include "imx_env.h" -+ -+#define CONFIG_SPL_MAX_SIZE (148 * 1024) -+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) -+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -+#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -+ -+#ifdef CONFIG_SPL_BUILD -+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -+#define CONFIG_SPL_WATCHDOG_SUPPORT -+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT -+#define CONFIG_SPL_I2C_SUPPORT -+#define CONFIG_SPL_LIBCOMMON_SUPPORT -+#define CONFIG_SPL_LIBGENERIC_SUPPORT -+ -+#define CONFIG_SPL_STACK 0x920000 -+#define CONFIG_SPL_BSS_START_ADDR 0x910000 -+#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K -+#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -+#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K -+ -+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -+#define CONFIG_MALLOC_F_ADDR 0x912000 -+ -+#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ -+ -+#undef CONFIG_DM_MMC -+#undef CONFIG_DM_PMIC -+#undef CONFIG_DM_PMIC_PFUZE100 -+ -+#define CONFIG_SYS_I2C -+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -+#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -+ -+#define CONFIG_POWER -+#define CONFIG_POWER_I2C -+#define CONFIG_POWER_BD71837 -+ -+#endif /*ifdef CONFIG_SPL_BUILD*/ -+ -+#define CONFIG_CMD_READ -+#define CONFIG_SERIAL_TAG -+#define CONFIG_FASTBOOT_USB_DEV 0 -+ -+#define CONFIG_REMAKE_ELF -+ -+#define CONFIG_BOARD_POSTCLK_INIT -+ -+/* Flat Device Tree Definitions */ -+#define CONFIG_OF_BOARD_SETUP -+ -+#undef CONFIG_CMD_IMLS -+ -+#undef CONFIG_CMD_CRC32 -+#undef CONFIG_BOOTM_NETBSD -+ -+/* ENET Config */ -+/* ENET1 */ -+#if defined(CONFIG_CMD_NET) -+#define CONFIG_ETHPRIME "FEC" -+ -+#define CONFIG_FEC_XCV_TYPE RGMII -+#define CONFIG_FEC_MXC_PHYADDR 0 -+#define FEC_QUIRK_ENET_MAC -+ -+#define CONFIG_PHY_GIGE -+#define IMX_FEC_BASE 0x30BE0000 -+ -+#define CONFIG_PHYLIB -+#define CONFIG_PHY_ATHEROS -+#endif -+ -+#define CONFIG_MFG_ENV_SETTINGS \ -+ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ -+ "rdinit=/linuxrc " \ -+ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ -+ "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ -+ "g_mass_storage.iSerialNumber=\"\" "\ -+ "clk_ignore_unused "\ -+ "\0" \ -+ "initrd_addr=0x43800000\0" \ -+ "initrd_high=0xffffffff\0" \ -+ "emmc_dev=1\0" \ -+ "sd_dev=0\0" \ -+ "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ -+ "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ -+ "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ -+/* Initial environment variables */ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ CONFIG_MFG_ENV_SETTINGS \ -+ "autoload=off\0" \ -+ "script=boot.scr\0" \ -+ "image=Image\0" \ -+ "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ -+ "fdt_addr=0x43000000\0" \ -+ "fdt_high=0xffffffffffffffff\0" \ -+ "boot_fdt=yes\0" \ -+ "fdt_file="CONFIG_DEFAULT_DTB"\0" \ -+ "initrd_addr=0x43800000\0" \ -+ "initrd_high=0xffffffffffffffff\0" \ -+ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ -+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ -+ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ -+ "mmcautodetect=yes\0" \ -+ "root_opt=rootwait rw\0" \ -+ "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ -+ "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ -+ "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ -+ "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ -+ "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ -+ "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ -+ "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ -+ "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ -+ "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -+ "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ -+ "bootscript=echo Running bootscript from mmc ...; " \ -+ "source\0" \ -+ "netargs=setenv bootargs console=${console} " \ -+ "root=/dev/nfs " \ -+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ -+ "netboot=echo Booting from net ...; " \ -+ "run netargs; " \ -+ "if test ${ip_dyn} = yes; then " \ -+ "setenv get_cmd dhcp; " \ -+ "else " \ -+ "setenv get_cmd tftp; " \ -+ "fi; " \ -+ "${get_cmd} ${loadaddr} ${image}; " \ -+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ -+ "booti ${loadaddr} - ${fdt_addr}; " \ -+ "else " \ -+ "echo WARN: Cannot load the DT; " \ -+ "fi; " \ -+ "else " \ -+ "booti; " \ -+ "fi;\0" -+#define CONFIG_BOOTCOMMAND \ -+ "for src in sd_ul usb_ul emmc_ul; do " \ -+ "run ${src}; " \ -+ "if run ulbootscript; then " \ -+ "run bootscript; " \ -+ "else " \ -+ "if run ulimage; then " \ -+ "if run ulfdt; then " \ -+ "booti ${loadaddr} - ${fdt_addr}; " \ -+ "else " \ -+ "if test ${boot_fdt} != yes; then " \ -+ "booti ${loadaddr}; " \ -+ "fi; " \ -+ "fi; " \ -+ "fi; " \ -+ "fi; " \ -+ "done; " \ -+ "usb start; ums 0 mmc ${mmcdev};" -+ -+/* Link Definitions */ -+#define CONFIG_LOADADDR 0x40480000 -+ -+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -+ -+#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -+#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -+#define CONFIG_SYS_INIT_SP_OFFSET \ -+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -+#define CONFIG_SYS_INIT_SP_ADDR \ -+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -+ -+#define CONFIG_ENV_OVERWRITE -+#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ -+#define CONFIG_SYS_MMC_ENV_PART 1 -+#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -+ -+/* Size of malloc() pool */ -+#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) -+ -+#define PHYS_SDRAM 0x40000000 -+#define PHYS_SDRAM_2 0x100000000 -+#define PHYS_SDRAM_SIZE 0 /* Memory chip autodetection */ -+#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */ -+#define CONFIG_NR_DRAM_BANKS 4 -+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -+ -+#define MEMTEST_DIVIDER 2 -+#define MEMTEST_NUMERATOR 1 -+ -+#define CONFIG_BAUDRATE 115200 -+ -+#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -+ -+/* Monitor Command Prompt */ -+#undef CONFIG_SYS_PROMPT -+#define CONFIG_SYS_PROMPT "u-boot=> " -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -+#define CONFIG_SYS_CBSIZE 2048 -+#define CONFIG_SYS_MAXARGS 64 -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -+ sizeof(CONFIG_SYS_PROMPT) + 16) -+ -+#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -+ -+#define CONFIG_IMX_BOOTAUX -+ -+/* USDHC */ -+#define CONFIG_FSL_USDHC -+ -+#define CONFIG_SYS_FSL_USDHC_NUM 2 -+#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -+ -+#ifndef CONFIG_DM_I2C -+#define CONFIG_SYS_I2C -+#endif -+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -+#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -+#define CONFIG_SYS_I2C_SPEED 100000 -+ -+/* EEPROM */ -+#define CONFIG_ENV_EEPROM_IS_ON_I2C -+#define CONFIG_SYS_I2C_EEPROM_BUS 1 -+#define CONFIG_SYS_I2C_SLAVE 0x00 -+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -+#define CONFIG_SYS_EEPROM_SIZE 256 -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -+ -+/* USB configs */ -+#ifndef CONFIG_SPL_BUILD -+#define CONFIG_CMD_USB -+#define CONFIG_USB_STORAGE -+#define CONFIG_USBD_HS -+ -+#define CONFIG_CMD_USB_MASS_STORAGE -+#define CONFIG_USB_GADGET_MASS_STORAGE -+#define CONFIG_USB_FUNCTION_MASS_STORAGE -+ -+#endif -+ -+#define CONFIG_USB_GADGET_VBUS_DRAW 2 -+ -+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -+ -+#ifdef CONFIG_VIDEO -+#define CONFIG_VIDEO_MXS -+#define CONFIG_VIDEO_LOGO -+#define CONFIG_SPLASH_SCREEN -+#define CONFIG_SPLASH_SCREEN_ALIGN -+#define CONFIG_CMD_BMP -+#define CONFIG_BMP_16BPP -+#define CONFIG_VIDEO_BMP_RLE8 -+#define CONFIG_VIDEO_BMP_LOGO -+#define CONFIG_IMX_VIDEO_SKIP -+#define CONFIG_RM67191 -+#endif -+ -+#define CONFIG_BOARD_POSTCLK_INIT -+#define CONFIG_OF_BOARD_SETUP -+ -+#endif -diff --git a/include/configs/mcm-imx8m-mini.h b/include/configs/mcm-imx8m-mini.h -index dd0448efca..602091a782 100644 ---- a/include/configs/mcm-imx8m-mini.h -+++ b/include/configs/mcm-imx8m-mini.h -@@ -7,270 +7,7 @@ - #ifndef __MCM_IMX8M_MINI_H - #define __MCM_IMX8M_MINI_H - --#include --#include --#include "imx_env.h" -- --#define CONFIG_SPL_MAX_SIZE (148 * 1024) --#define CONFIG_SYS_MONITOR_LEN (512 * 1024) --#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR --#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 --#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 --#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -- --#ifdef CONFIG_SPL_BUILD --/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ --#define CONFIG_SPL_WATCHDOG_SUPPORT --#define CONFIG_SPL_DRIVERS_MISC_SUPPORT --#define CONFIG_SPL_I2C_SUPPORT --#define CONFIG_SPL_LIBCOMMON_SUPPORT --#define CONFIG_SPL_LIBGENERIC_SUPPORT -- --#define CONFIG_SPL_STACK 0x920000 --#define CONFIG_SPL_BSS_START_ADDR 0x910000 --#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K --#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 --#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K -- --/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ --#define CONFIG_MALLOC_F_ADDR 0x912000 -- --#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ -- --#undef CONFIG_DM_MMC --#undef CONFIG_DM_PMIC --#undef CONFIG_DM_PMIC_PFUZE100 -- --#define CONFIG_SYS_I2C --#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ --#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ --#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -- --#define CONFIG_POWER --#define CONFIG_POWER_I2C --#define CONFIG_POWER_BD71837 -- --#endif /*ifdef CONFIG_SPL_BUILD*/ -- --#define CONFIG_CMD_READ --#define CONFIG_SERIAL_TAG --#define CONFIG_FASTBOOT_USB_DEV 0 -- --#define CONFIG_REMAKE_ELF -- --#define CONFIG_BOARD_POSTCLK_INIT -- --/* Flat Device Tree Definitions */ --#define CONFIG_OF_BOARD_SETUP -- --#undef CONFIG_CMD_IMLS -- --#undef CONFIG_CMD_CRC32 --#undef CONFIG_BOOTM_NETBSD -- --/* ENET Config */ --/* ENET1 */ --#if defined(CONFIG_CMD_NET) --#define CONFIG_ETHPRIME "FEC" -- --#define CONFIG_FEC_XCV_TYPE RGMII --#define CONFIG_FEC_MXC_PHYADDR 0 --#define FEC_QUIRK_ENET_MAC -- --#define CONFIG_PHY_GIGE --#define IMX_FEC_BASE 0x30BE0000 -- --#define CONFIG_PHYLIB --#define CONFIG_PHY_ATHEROS --#endif -- --#define CONFIG_MFG_ENV_SETTINGS \ -- "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ -- "rdinit=/linuxrc " \ -- "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ -- "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ -- "g_mass_storage.iSerialNumber=\"\" "\ -- "clk_ignore_unused "\ -- "\0" \ -- "initrd_addr=0x43800000\0" \ -- "initrd_high=0xffffffff\0" \ -- "emmc_dev=1\0" \ -- "sd_dev=0\0" \ -- "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ -- "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ -- "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ --/* Initial environment variables */ --#define CONFIG_EXTRA_ENV_SETTINGS \ -- CONFIG_MFG_ENV_SETTINGS \ -- "autoload=off\0" \ -- "script=boot.scr\0" \ -- "image=Image\0" \ -- "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ -- "fdt_addr=0x43000000\0" \ -- "fdt_high=0xffffffffffffffff\0" \ -- "boot_fdt=yes\0" \ -- "fdt_file="CONFIG_DEFAULT_DTB"\0" \ -- "initrd_addr=0x43800000\0" \ -- "initrd_high=0xffffffffffffffff\0" \ -- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ -- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ -- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ -- "mmcautodetect=yes\0" \ -- "root_opt=rootwait rw\0" \ -- "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ -- "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ -- "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ -- "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ -- "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ -- "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ -- "bootscript=echo Running bootscript from mmc ...; " \ -- "source\0" \ -- "netargs=setenv bootargs console=${console} " \ -- "root=/dev/nfs " \ -- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ -- "netboot=echo Booting from net ...; " \ -- "run netargs; " \ -- "if test ${ip_dyn} = yes; then " \ -- "setenv get_cmd dhcp; " \ -- "else " \ -- "setenv get_cmd tftp; " \ -- "fi; " \ -- "${get_cmd} ${loadaddr} ${image}; " \ -- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "echo WARN: Cannot load the DT; " \ -- "fi; " \ -- "else " \ -- "booti; " \ -- "fi;\0" --#define CONFIG_BOOTCOMMAND \ -- "for src in sd_ul usb_ul emmc_ul; do " \ -- "run ${src}; " \ -- "if run ulbootscript; then " \ -- "run bootscript; " \ -- "else " \ -- "if run ulimage; then " \ -- "if run ulfdt; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "if test ${boot_fdt} != yes; then " \ -- "booti ${loadaddr}; " \ -- "fi; " \ -- "fi; " \ -- "fi; " \ -- "fi; " \ -- "done; " \ -- "usb start; ums 0 mmc ${mmcdev};" -- --/* Link Definitions */ --#define CONFIG_LOADADDR 0x40480000 -- --#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- --#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 --#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 --#define CONFIG_SYS_INIT_SP_OFFSET \ -- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) --#define CONFIG_SYS_INIT_SP_ADDR \ -- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -- --#define CONFIG_ENV_OVERWRITE --#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ --#define CONFIG_SYS_MMC_ENV_PART 1 --#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -- --/* Size of malloc() pool */ --#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) -- --#define PHYS_SDRAM 0x40000000 --#define PHYS_SDRAM_2 0x100000000 --#define PHYS_SDRAM_SIZE 0 /* Memory chip autodetection */ --#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */ --#define CONFIG_NR_DRAM_BANKS 4 --#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -- --#define MEMTEST_DIVIDER 2 --#define MEMTEST_NUMERATOR 1 -- --#define CONFIG_BAUDRATE 115200 -- --#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -- --/* Monitor Command Prompt */ --#undef CONFIG_SYS_PROMPT --#define CONFIG_SYS_PROMPT "u-boot=> " --#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " --#define CONFIG_SYS_CBSIZE 2048 --#define CONFIG_SYS_MAXARGS 64 --#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE --#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -- sizeof(CONFIG_SYS_PROMPT) + 16) -- --#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -- --#define CONFIG_IMX_BOOTAUX -- --/* USDHC */ --#define CONFIG_FSL_USDHC -- --#define CONFIG_SYS_FSL_USDHC_NUM 2 --#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -- --#ifndef CONFIG_DM_I2C --#define CONFIG_SYS_I2C --#endif --#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ --#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ --#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ --#define CONFIG_SYS_I2C_SPEED 100000 -- --/* EEPROM */ --#define CONFIG_ENV_EEPROM_IS_ON_I2C --#define CONFIG_SYS_I2C_EEPROM_BUS 1 --#define CONFIG_SYS_I2C_SLAVE 0x00 --#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 --#define CONFIG_SYS_EEPROM_SIZE 256 --#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 --#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -- --/* USB configs */ --#ifndef CONFIG_SPL_BUILD --#define CONFIG_CMD_USB --#define CONFIG_USB_STORAGE --#define CONFIG_USBD_HS -- --#define CONFIG_CMD_USB_MASS_STORAGE --#define CONFIG_USB_GADGET_MASS_STORAGE --#define CONFIG_USB_FUNCTION_MASS_STORAGE -- --#endif -- --#define CONFIG_USB_GADGET_VBUS_DRAW 2 -- --#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) --#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -- --#ifdef CONFIG_VIDEO --#define CONFIG_VIDEO_MXS --#define CONFIG_VIDEO_LOGO --#define CONFIG_SPLASH_SCREEN --#define CONFIG_SPLASH_SCREEN_ALIGN --#define CONFIG_CMD_BMP --#define CONFIG_BMP_16BPP --#define CONFIG_VIDEO_BMP_RLE8 --#define CONFIG_VIDEO_BMP_LOGO --#define CONFIG_IMX_VIDEO_SKIP --#define CONFIG_RM67191 --#endif -- --#define CONFIG_BOARD_POSTCLK_INIT --#define CONFIG_OF_BOARD_SETUP -+#include "cpl-imx8m-mini.h" - - #if defined(CONFIG_ANDROID_SUPPORT) - #include "mcm-imx8m-mini_android.h" -diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h -index 75c6102f10..b3d6082a66 100644 ---- a/include/configs/ucm-imx8m-mini.h -+++ b/include/configs/ucm-imx8m-mini.h -@@ -7,273 +7,7 @@ - #ifndef __UCM_IMX8M_MINI_H - #define __UCM_IMX8M_MINI_H - --#include --#include --#include "imx_env.h" -- --#define CONFIG_SPL_MAX_SIZE (148 * 1024) --#define CONFIG_SYS_MONITOR_LEN (512 * 1024) --#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR --#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 --#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 --#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -- --#ifdef CONFIG_SPL_BUILD --/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ --#define CONFIG_SPL_WATCHDOG_SUPPORT --#define CONFIG_SPL_DRIVERS_MISC_SUPPORT --#define CONFIG_SPL_I2C_SUPPORT --#define CONFIG_SPL_LIBCOMMON_SUPPORT --#define CONFIG_SPL_LIBGENERIC_SUPPORT -- --#define CONFIG_SPL_STACK 0x920000 --#define CONFIG_SPL_BSS_START_ADDR 0x910000 --#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K --#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 --#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K -- --/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ --#define CONFIG_MALLOC_F_ADDR 0x912000 -- --#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ -- --#undef CONFIG_DM_MMC --#undef CONFIG_DM_PMIC --#undef CONFIG_DM_PMIC_PFUZE100 -- --#define CONFIG_SYS_I2C --#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ --#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ --#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -- --#define CONFIG_POWER --#define CONFIG_POWER_I2C --#define CONFIG_POWER_BD71837 -- --#endif /*ifdef CONFIG_SPL_BUILD*/ -- --#define CONFIG_CMD_READ --#define CONFIG_SERIAL_TAG --#define CONFIG_FASTBOOT_USB_DEV 0 -- --#define CONFIG_REMAKE_ELF -- --#define CONFIG_BOARD_POSTCLK_INIT -- --/* Flat Device Tree Definitions */ --#define CONFIG_OF_BOARD_SETUP -- --#undef CONFIG_CMD_IMLS -- --#undef CONFIG_CMD_CRC32 --#undef CONFIG_BOOTM_NETBSD -- --/* ENET Config */ --/* ENET1 */ --#if defined(CONFIG_CMD_NET) --#define CONFIG_ETHPRIME "FEC" -- --#define CONFIG_FEC_XCV_TYPE RGMII --#define CONFIG_FEC_MXC_PHYADDR 0 --#define FEC_QUIRK_ENET_MAC -- --#define CONFIG_PHY_GIGE --#define IMX_FEC_BASE 0x30BE0000 -- --#define CONFIG_PHYLIB --#define CONFIG_PHY_ATHEROS --#endif -- --#define CONFIG_MFG_ENV_SETTINGS \ -- "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ -- "rdinit=/linuxrc " \ -- "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ -- "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ -- "g_mass_storage.iSerialNumber=\"\" "\ -- "clk_ignore_unused "\ -- "\0" \ -- "initrd_addr=0x43800000\0" \ -- "initrd_high=0xffffffff\0" \ -- "emmc_dev=1\0" \ -- "sd_dev=0\0" \ -- "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ -- "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ -- "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ --/* Initial environment variables */ --#define CONFIG_EXTRA_ENV_SETTINGS \ -- CONFIG_MFG_ENV_SETTINGS \ -- "autoload=off\0" \ -- "script=boot.scr\0" \ -- "image=Image\0" \ -- "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ -- "fdt_addr=0x43000000\0" \ -- "fdt_high=0xffffffffffffffff\0" \ -- "boot_fdt=yes\0" \ -- "fdt_file="CONFIG_DEFAULT_DTB"\0" \ -- "initrd_addr=0x43800000\0" \ -- "initrd_high=0xffffffffffffffff\0" \ -- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ -- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ -- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ -- "mmcautodetect=yes\0" \ -- "root_opt=rootwait rw\0" \ -- "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ -- "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ -- "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ -- "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ -- "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ -- "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ -- "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ -- "bootscript=echo Running bootscript from mmc ...; " \ -- "source\0" \ -- "netargs=setenv bootargs console=${console} " \ -- "root=/dev/nfs " \ -- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ -- "netboot=echo Booting from net ...; " \ -- "run netargs; " \ -- "if test ${ip_dyn} = yes; then " \ -- "setenv get_cmd dhcp; " \ -- "else " \ -- "setenv get_cmd tftp; " \ -- "fi; " \ -- "${get_cmd} ${loadaddr} ${image}; " \ -- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "echo WARN: Cannot load the DT; " \ -- "fi; " \ -- "else " \ -- "booti; " \ -- "fi;\0" --#define CONFIG_BOOTCOMMAND \ -- "for src in sd_ul usb_ul emmc_ul; do " \ -- "run ${src}; " \ -- "if run ulbootscript; then " \ -- "run bootscript; " \ -- "else " \ -- "if run ulimage; then " \ -- "if run ulfdt; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "if test ${boot_fdt} != yes; then " \ -- "booti ${loadaddr}; " \ -- "fi; " \ -- "fi; " \ -- "fi; " \ -- "fi; " \ -- "done; " \ -- "usb start; ums 0 mmc ${mmcdev};" -- --/* Link Definitions */ --#define CONFIG_LOADADDR 0x40480000 -- --#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- --#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 --#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 --#define CONFIG_SYS_INIT_SP_OFFSET \ -- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) --#define CONFIG_SYS_INIT_SP_ADDR \ -- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -- --#define CONFIG_ENV_OVERWRITE --#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ --#define CONFIG_SYS_MMC_ENV_PART 1 --#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -- --/* Size of malloc() pool */ --#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) -- --#define PHYS_SDRAM 0x40000000 --#define PHYS_SDRAM_2 0x100000000 --#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB default size*/ --#undef PHYS_SDRAM_2_SIZE /* Memory chip autodetection */ --#define CONFIG_NR_DRAM_BANKS 4 -- --#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM --#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ --#define PHYS_SDRAM_2_SIZE 0x40000000 -- --#define MEMTEST_DIVIDER 2 --#define MEMTEST_NUMERATOR 1 -- --#define CONFIG_BAUDRATE 115200 -- --#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -- --/* Monitor Command Prompt */ --#undef CONFIG_SYS_PROMPT --#define CONFIG_SYS_PROMPT "u-boot=> " --#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " --#define CONFIG_SYS_CBSIZE 2048 --#define CONFIG_SYS_MAXARGS 64 --#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE --#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -- sizeof(CONFIG_SYS_PROMPT) + 16) -- --#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -- --#define CONFIG_IMX_BOOTAUX -- --/* USDHC */ --#define CONFIG_FSL_USDHC -- --#define CONFIG_SYS_FSL_USDHC_NUM 2 --#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -- --#ifndef CONFIG_DM_I2C --#define CONFIG_SYS_I2C --#endif --#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ --#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ --#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ --#define CONFIG_SYS_I2C_SPEED 100000 -- --/* EEPROM */ --#define CONFIG_ENV_EEPROM_IS_ON_I2C --#define CONFIG_SYS_I2C_EEPROM_BUS 1 --#define CONFIG_SYS_I2C_SLAVE 0x00 --#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 --#define CONFIG_SYS_EEPROM_SIZE 256 --#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 --#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -- --/* USB configs */ --#ifndef CONFIG_SPL_BUILD --#define CONFIG_CMD_USB --#define CONFIG_USB_STORAGE --#define CONFIG_USBD_HS -- --#define CONFIG_CMD_USB_MASS_STORAGE --#define CONFIG_USB_GADGET_MASS_STORAGE --#define CONFIG_USB_FUNCTION_MASS_STORAGE -- --#endif -- --#define CONFIG_USB_GADGET_VBUS_DRAW 2 -- --#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) --#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -- --#ifdef CONFIG_VIDEO --#define CONFIG_VIDEO_MXS --#define CONFIG_VIDEO_LOGO --#define CONFIG_SPLASH_SCREEN --#define CONFIG_SPLASH_SCREEN_ALIGN --#define CONFIG_CMD_BMP --#define CONFIG_BMP_16BPP --#define CONFIG_VIDEO_BMP_RLE8 --#define CONFIG_VIDEO_BMP_LOGO --#define CONFIG_IMX_VIDEO_SKIP --#define CONFIG_RM67191 --#endif -- --#define CONFIG_BOARD_POSTCLK_INIT --#define CONFIG_OF_BOARD_SETUP -+#include "cpl-imx8m-mini.h" - - #if defined(CONFIG_ANDROID_SUPPORT) - #include "ucm-imx8m-mini_android.h" --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0058-cpl-imx8m-mini-Refactor-.dts.patch b/recipes-bsp/u-boot/compulab/imx8mm/0058-cpl-imx8m-mini-Refactor-.dts.patch deleted file mode 100644 index 3c80996..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0058-cpl-imx8m-mini-Refactor-.dts.patch +++ /dev/null @@ -1,1434 +0,0 @@ -From a9b3a9c95226e778b34815bea7543ee90a4c2caf Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 15:48:15 +0300 -Subject: [PATCH 58/91] cpl-imx8m-mini: Refactor .dts - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/cpl-imx8m-mini.dtsi | 472 +++++++++++++++++++++++++++++++ - arch/arm/dts/mcm-imx8m-mini.dts | 457 +----------------------------- - arch/arm/dts/ucm-imx8m-mini.dts | 457 +----------------------------- - 3 files changed, 474 insertions(+), 912 deletions(-) - create mode 100644 arch/arm/dts/cpl-imx8m-mini.dtsi - -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -new file mode 100644 -index 0000000000..3fe1e7ac5f ---- /dev/null -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -0,0 +1,472 @@ -+/* -+ * Copyright 2018 CompuLab -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include "imx8mm.dtsi" -+ -+/ { -+ chosen { -+ bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; -+ stdout-patch = &uart3; -+ }; -+ -+ reg_usdhc2_vmmc: regulator-usdhc2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VSD_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ startup-delay-us = <100>; -+ off-on-delay-us = <12000>; -+ }; -+ -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog_1>; -+ -+ cpl-imx8m-mini { -+ pinctrl_hog_1: hoggrp-1 { -+ fsl,pins = < -+ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 -+ MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 -+ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 -+ >; -+ }; -+ -+ pinctrl_fec1: fec1grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 -+ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 -+ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f -+ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f -+ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f -+ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f -+ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 -+ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 -+ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 -+ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 -+ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f -+ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 -+ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 -+ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f -+ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 -+ >; -+ }; -+ -+ pinctrl_flexspi0: flexspi0grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 -+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 -+ -+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 -+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 -+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 -+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 -+ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 -+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 -+ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 -+ >; -+ }; -+ -+ pinctrl_pmic: pmicirq { -+ fsl,pins = < -+ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 -+ >; -+ }; -+ -+ pinctrl_uart3: uart1grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 -+ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 -+ >; -+ }; -+ -+ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 -+ MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 -+ MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 -+ MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 -+ >; -+ }; -+ -+ pinctrl_usdhc2_gpio: usdhc2grpgpio { -+ fsl,pins = < -+ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 -+ MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 -+ >; -+ }; -+ -+ pinctrl_usdhc2: usdhc2grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 -+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 -+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 -+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 -+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 -+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 -+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -+ >; -+ }; -+ -+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz { -+ fsl,pins = < -+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 -+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 -+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 -+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 -+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 -+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 -+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -+ >; -+ }; -+ -+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz { -+ fsl,pins = < -+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 -+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 -+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 -+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 -+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 -+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 -+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 -+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 -+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 -+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 -+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 -+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 -+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 -+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 -+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 -+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 -+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 -+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 -+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 -+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 -+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 -+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 -+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 -+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 -+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 -+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 -+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 -+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 -+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 -+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 -+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 -+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 -+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 -+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 -+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 -+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 -+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 -+ >; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ clock-frequency = <400000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "disabled"; -+ -+}; -+ -+&i2c2 { -+ clock-frequency = <400000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pmic: bd71837@4b { -+ reg = <0x4b>; -+ compatible = "rohm,bd71837"; -+ /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ -+ pinctrl-0 = <&pinctrl_pmic>; -+ gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; -+ -+ gpo { -+ rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ -+ }; -+ -+ regulators { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ bd71837,pmic-buck2-uses-i2c-dvs; -+ bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ -+ -+ buck1_reg: regulator@0 { -+ reg = <0>; -+ regulator-compatible = "buck1"; -+ regulator-min-microvolt = <700000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <1250>; -+ }; -+ -+ buck2_reg: regulator@1 { -+ reg = <1>; -+ regulator-compatible = "buck2"; -+ regulator-min-microvolt = <700000>; -+ regulator-max-microvolt = <1300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <1250>; -+ }; -+ -+ buck3_reg: regulator@2 { -+ reg = <2>; -+ regulator-compatible = "buck3"; -+ regulator-min-microvolt = <700000>; -+ regulator-max-microvolt = <1300000>; -+ }; -+ -+ buck4_reg: regulator@3 { -+ reg = <3>; -+ regulator-compatible = "buck4"; -+ regulator-min-microvolt = <700000>; -+ regulator-max-microvolt = <1300000>; -+ }; -+ -+ buck5_reg: regulator@4 { -+ reg = <4>; -+ regulator-compatible = "buck5"; -+ regulator-min-microvolt = <700000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ buck6_reg: regulator@5 { -+ reg = <5>; -+ regulator-compatible = "buck6"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ buck7_reg: regulator@6 { -+ reg = <6>; -+ regulator-compatible = "buck7"; -+ regulator-min-microvolt = <1605000>; -+ regulator-max-microvolt = <1995000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ buck8_reg: regulator@7 { -+ reg = <7>; -+ regulator-compatible = "buck8"; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo1_reg: regulator@8 { -+ reg = <8>; -+ regulator-compatible = "ldo1"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo2_reg: regulator@9 { -+ reg = <9>; -+ regulator-compatible = "ldo2"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo3_reg: regulator@10 { -+ reg = <10>; -+ regulator-compatible = "ldo3"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo4_reg: regulator@11 { -+ reg = <11>; -+ regulator-compatible = "ldo4"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo5_reg: regulator@12 { -+ reg = <12>; -+ regulator-compatible = "ldo5"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ ldo6_reg: regulator@13 { -+ reg = <13>; -+ regulator-compatible = "ldo6"; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo7_reg: regulator@14 { -+ reg = <14>; -+ regulator-compatible = "ldo7"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ }; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "disabled"; -+}; -+ -+&fec1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_fec1>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <ðphy0>; -+ fsl,magic-packet; -+ status = "okay"; -+ -+ mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ethphy0: ethernet-phy@0 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ at803x,led-act-blind-workaround; -+ at803x,eee-okay; -+ at803x,vddio-1p8v; -+ }; -+ }; -+}; -+ -+&uart3 { /* console */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&usdhc2 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; -+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; -+ bus-width = <4>; -+ fsl,wp-controller; -+ non-removable; -+ vmmc-supply = <®_usdhc2_vmmc>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ bus-width = <8>; -+ non-removable; -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+ status = "okay"; -+}; -+ -+&A53_0 { -+ arm-supply = <&buck2_reg>; -+}; -+ -+&usbotg1 { -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbotg2 { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&cpu_alert0 { -+ temperature = <105000>; -+}; -+&cpu_crit0 { -+ temperature = <115000>; -+}; -diff --git a/arch/arm/dts/mcm-imx8m-mini.dts b/arch/arm/dts/mcm-imx8m-mini.dts -index 85f4c46dd7..060e51793c 100644 ---- a/arch/arm/dts/mcm-imx8m-mini.dts -+++ b/arch/arm/dts/mcm-imx8m-mini.dts -@@ -14,464 +14,9 @@ - - /dts-v1/; - --#include --#include "imx8mm.dtsi" -+#include "cpl-imx8m-mini.dtsi" - - / { - model = "CompuLab MCM-iMX8M-Mini board"; - compatible = "cpl,mcm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; -- -- chosen { -- bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; -- stdout-patch = &uart3; -- }; -- -- reg_usdhc2_vmmc: regulator-usdhc2 { -- compatible = "regulator-fixed"; -- regulator-name = "VSD_3V3"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; -- enable-active-high; -- startup-delay-us = <100>; -- off-on-delay-us = <12000>; -- }; -- --}; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog_1>; -- -- mcm-imx8m-mini { -- pinctrl_hog_1: hoggrp-1 { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 -- MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 -- MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 -- >; -- }; -- -- pinctrl_fec1: fec1grp { -- fsl,pins = < -- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 -- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 -- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f -- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f -- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f -- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f -- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 -- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 -- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 -- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 -- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f -- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 -- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 -- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f -- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 -- >; -- }; -- -- pinctrl_flexspi0: flexspi0grp { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 -- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 -- -- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 -- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 -- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 -- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 -- >; -- }; -- -- pinctrl_i2c1: i2c1grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_i2c2: i2c2grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_i2c3: i2c3grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_pmic: pmicirq { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 -- >; -- }; -- -- pinctrl_uart3: uart1grp { -- fsl,pins = < -- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 -- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 -- >; -- }; -- -- -- pinctrl_uart4: uart4grp { -- fsl,pins = < -- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 -- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 -- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 -- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 -- >; -- }; -- -- pinctrl_usdhc2_gpio: usdhc2grpgpio { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 -- MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 -- >; -- }; -- -- pinctrl_usdhc2: usdhc2grp { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc3: usdhc3grp { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 -- >; -- }; -- -- pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 -- >; -- }; -- -- pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 -- >; -- }; -- -- pinctrl_wdog: wdoggrp { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 -- >; -- }; -- }; --}; -- --&i2c1 { -- clock-frequency = <400000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c1>; -- status = "disabled"; -- --}; -- --&i2c2 { -- clock-frequency = <400000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c2>; -- status = "okay"; -- -- pmic: bd71837@4b { -- reg = <0x4b>; -- compatible = "rohm,bd71837"; -- /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ -- pinctrl-0 = <&pinctrl_pmic>; -- gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; -- -- gpo { -- rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ -- }; -- -- regulators { -- #address-cells = <1>; -- #size-cells = <0>; -- -- bd71837,pmic-buck2-uses-i2c-dvs; -- bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ -- -- buck1_reg: regulator@0 { -- reg = <0>; -- regulator-compatible = "buck1"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-ramp-delay = <1250>; -- }; -- -- buck2_reg: regulator@1 { -- reg = <1>; -- regulator-compatible = "buck2"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-ramp-delay = <1250>; -- }; -- -- buck3_reg: regulator@2 { -- reg = <2>; -- regulator-compatible = "buck3"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- }; -- -- buck4_reg: regulator@3 { -- reg = <3>; -- regulator-compatible = "buck4"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- }; -- -- buck5_reg: regulator@4 { -- reg = <4>; -- regulator-compatible = "buck5"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1350000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck6_reg: regulator@5 { -- reg = <5>; -- regulator-compatible = "buck6"; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck7_reg: regulator@6 { -- reg = <6>; -- regulator-compatible = "buck7"; -- regulator-min-microvolt = <1605000>; -- regulator-max-microvolt = <1995000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck8_reg: regulator@7 { -- reg = <7>; -- regulator-compatible = "buck8"; -- regulator-min-microvolt = <800000>; -- regulator-max-microvolt = <1400000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo1_reg: regulator@8 { -- reg = <8>; -- regulator-compatible = "ldo1"; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo2_reg: regulator@9 { -- reg = <9>; -- regulator-compatible = "ldo2"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <900000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo3_reg: regulator@10 { -- reg = <10>; -- regulator-compatible = "ldo3"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo4_reg: regulator@11 { -- reg = <11>; -- regulator-compatible = "ldo4"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <1800000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo5_reg: regulator@12 { -- reg = <12>; -- regulator-compatible = "ldo5"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- }; -- -- ldo6_reg: regulator@13 { -- reg = <13>; -- regulator-compatible = "ldo6"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <1800000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo7_reg: regulator@14 { -- reg = <14>; -- regulator-compatible = "ldo7"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- }; -- }; -- }; --}; -- --&i2c3 { -- clock-frequency = <100000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c3>; -- status = "disabled"; --}; -- --&fec1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_fec1>; -- phy-mode = "rgmii-id"; -- phy-handle = <ðphy0>; -- fsl,magic-packet; -- status = "okay"; -- -- mdio { -- #address-cells = <1>; -- #size-cells = <0>; -- -- ethphy0: ethernet-phy@0 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <0>; -- at803x,led-act-blind-workaround; -- at803x,eee-okay; -- at803x,vddio-1p8v; -- }; -- }; --}; -- --&uart3 { /* console */ -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart3>; -- status = "okay"; --}; -- --&usdhc2 { -- pinctrl-names = "default", "state_100mhz", "state_200mhz"; -- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; -- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; -- bus-width = <4>; -- fsl,wp-controller; -- non-removable; -- vmmc-supply = <®_usdhc2_vmmc>; -- status = "okay"; --}; -- --&usdhc3 { -- pinctrl-names = "default", "state_100mhz", "state_200mhz"; -- pinctrl-0 = <&pinctrl_usdhc3>; -- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -- bus-width = <8>; -- non-removable; -- status = "okay"; --}; -- --&wdog1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_wdog>; -- fsl,ext-reset-output; -- status = "okay"; --}; -- --&A53_0 { -- arm-supply = <&buck2_reg>; --}; -- --&usbotg1 { -- dr_mode = "otg"; -- status = "okay"; --}; -- --&usbotg2 { -- dr_mode = "host"; -- status = "okay"; --}; -- --&cpu_alert0 { -- temperature = <105000>; --}; --&cpu_crit0 { -- temperature = <115000>; - }; -diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts -index f2794e74e9..7b81e8a75b 100644 ---- a/arch/arm/dts/ucm-imx8m-mini.dts -+++ b/arch/arm/dts/ucm-imx8m-mini.dts -@@ -14,464 +14,9 @@ - - /dts-v1/; - --#include --#include "imx8mm.dtsi" -+#include "cpl-imx8m-mini.dtsi" - - / { - model = "CompuLab UCM-iMX8M-Mini board"; - compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; -- -- chosen { -- bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; -- stdout-patch = &uart3; -- }; -- -- reg_usdhc2_vmmc: regulator-usdhc2 { -- compatible = "regulator-fixed"; -- regulator-name = "VSD_3V3"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; -- enable-active-high; -- startup-delay-us = <100>; -- off-on-delay-us = <12000>; -- }; -- --}; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog_1>; -- -- ucm-imx8m-mini { -- pinctrl_hog_1: hoggrp-1 { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 -- MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 -- MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 -- >; -- }; -- -- pinctrl_fec1: fec1grp { -- fsl,pins = < -- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 -- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 -- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f -- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f -- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f -- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f -- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 -- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 -- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 -- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 -- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f -- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 -- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 -- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f -- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 -- >; -- }; -- -- pinctrl_flexspi0: flexspi0grp { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 -- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 -- -- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 -- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 -- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 -- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 -- >; -- }; -- -- pinctrl_i2c1: i2c1grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_i2c2: i2c2grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_i2c3: i2c3grp { -- fsl,pins = < -- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 -- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 -- >; -- }; -- -- pinctrl_pmic: pmicirq { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 -- >; -- }; -- -- pinctrl_uart3: uart1grp { -- fsl,pins = < -- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 -- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 -- >; -- }; -- -- -- pinctrl_uart4: uart4grp { -- fsl,pins = < -- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 -- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 -- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 -- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 -- >; -- }; -- -- pinctrl_usdhc2_gpio: usdhc2grpgpio { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 -- MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 -- >; -- }; -- -- pinctrl_usdhc2: usdhc2grp { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { -- fsl,pins = < -- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 -- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 -- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 -- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 -- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 -- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 -- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 -- >; -- }; -- -- pinctrl_usdhc3: usdhc3grp { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 -- >; -- }; -- -- pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 -- >; -- }; -- -- pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -- fsl,pins = < -- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 -- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 -- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 -- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 -- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 -- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 -- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 -- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 -- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 -- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 -- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 -- >; -- }; -- -- pinctrl_wdog: wdoggrp { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 -- >; -- }; -- }; --}; -- --&i2c1 { -- clock-frequency = <400000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c1>; -- status = "disabled"; -- --}; -- --&i2c2 { -- clock-frequency = <400000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c2>; -- status = "okay"; -- -- pmic: bd71837@4b { -- reg = <0x4b>; -- compatible = "rohm,bd71837"; -- /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ -- pinctrl-0 = <&pinctrl_pmic>; -- gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; -- -- gpo { -- rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ -- }; -- -- regulators { -- #address-cells = <1>; -- #size-cells = <0>; -- -- bd71837,pmic-buck2-uses-i2c-dvs; -- bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ -- -- buck1_reg: regulator@0 { -- reg = <0>; -- regulator-compatible = "buck1"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-ramp-delay = <1250>; -- }; -- -- buck2_reg: regulator@1 { -- reg = <1>; -- regulator-compatible = "buck2"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-ramp-delay = <1250>; -- }; -- -- buck3_reg: regulator@2 { -- reg = <2>; -- regulator-compatible = "buck3"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- }; -- -- buck4_reg: regulator@3 { -- reg = <3>; -- regulator-compatible = "buck4"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1300000>; -- }; -- -- buck5_reg: regulator@4 { -- reg = <4>; -- regulator-compatible = "buck5"; -- regulator-min-microvolt = <700000>; -- regulator-max-microvolt = <1350000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck6_reg: regulator@5 { -- reg = <5>; -- regulator-compatible = "buck6"; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck7_reg: regulator@6 { -- reg = <6>; -- regulator-compatible = "buck7"; -- regulator-min-microvolt = <1605000>; -- regulator-max-microvolt = <1995000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- buck8_reg: regulator@7 { -- reg = <7>; -- regulator-compatible = "buck8"; -- regulator-min-microvolt = <800000>; -- regulator-max-microvolt = <1400000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo1_reg: regulator@8 { -- reg = <8>; -- regulator-compatible = "ldo1"; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo2_reg: regulator@9 { -- reg = <9>; -- regulator-compatible = "ldo2"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <900000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo3_reg: regulator@10 { -- reg = <10>; -- regulator-compatible = "ldo3"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo4_reg: regulator@11 { -- reg = <11>; -- regulator-compatible = "ldo4"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <1800000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo5_reg: regulator@12 { -- reg = <12>; -- regulator-compatible = "ldo5"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- }; -- -- ldo6_reg: regulator@13 { -- reg = <13>; -- regulator-compatible = "ldo6"; -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <1800000>; -- regulator-boot-on; -- regulator-always-on; -- }; -- -- ldo7_reg: regulator@14 { -- reg = <14>; -- regulator-compatible = "ldo7"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- }; -- }; -- }; --}; -- --&i2c3 { -- clock-frequency = <100000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_i2c3>; -- status = "disabled"; --}; -- --&fec1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_fec1>; -- phy-mode = "rgmii-id"; -- phy-handle = <ðphy0>; -- fsl,magic-packet; -- status = "okay"; -- -- mdio { -- #address-cells = <1>; -- #size-cells = <0>; -- -- ethphy0: ethernet-phy@0 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <0>; -- at803x,led-act-blind-workaround; -- at803x,eee-okay; -- at803x,vddio-1p8v; -- }; -- }; --}; -- --&uart3 { /* console */ -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart3>; -- status = "okay"; --}; -- --&usdhc2 { -- pinctrl-names = "default", "state_100mhz", "state_200mhz"; -- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; -- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; -- bus-width = <4>; -- fsl,wp-controller; -- non-removable; -- vmmc-supply = <®_usdhc2_vmmc>; -- status = "okay"; --}; -- --&usdhc3 { -- pinctrl-names = "default", "state_100mhz", "state_200mhz"; -- pinctrl-0 = <&pinctrl_usdhc3>; -- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -- bus-width = <8>; -- non-removable; -- status = "okay"; --}; -- --&wdog1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_wdog>; -- fsl,ext-reset-output; -- status = "okay"; --}; -- --&A53_0 { -- arm-supply = <&buck2_reg>; --}; -- --&usbotg1 { -- dr_mode = "otg"; -- status = "okay"; --}; -- --&usbotg2 { -- dr_mode = "host"; -- status = "okay"; --}; -- --&cpu_alert0 { -- temperature = <105000>; --}; --&cpu_crit0 { -- temperature = <115000>; - }; --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0059-iot-gate-imx8-Add-basic-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0059-iot-gate-imx8-Add-basic-support.patch deleted file mode 100644 index 36636af..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0059-iot-gate-imx8-Add-basic-support.patch +++ /dev/null @@ -1,578 +0,0 @@ -From 05a8db30c2c72c80f1d56bef9086ab5ece690c59 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 15:52:47 +0300 -Subject: [PATCH 59/91] iot-gate-imx8: Add basic support - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/iot-gate-imx8.dts | 49 ++++ - arch/arm/mach-imx/imx8m/Kconfig | 7 + - board/compulab/iot-gate-imx8/Kconfig | 17 ++ - board/compulab/iot-gate-imx8/Makefile | 15 ++ - board/compulab/iot-gate-imx8/iot-gate-imx8.c | 265 +++++++++++++++++++ - board/compulab/iot-gate-imx8/spl.c | 9 + - configs/iot-gate-imx8_defconfig | 102 +++++++ - include/configs/iot-gate-imx8.h | 15 ++ - 9 files changed, 480 insertions(+) - create mode 100644 arch/arm/dts/iot-gate-imx8.dts - create mode 100644 board/compulab/iot-gate-imx8/Kconfig - create mode 100644 board/compulab/iot-gate-imx8/Makefile - create mode 100644 board/compulab/iot-gate-imx8/iot-gate-imx8.c - create mode 100644 board/compulab/iot-gate-imx8/spl.c - create mode 100644 configs/iot-gate-imx8_defconfig - create mode 100644 include/configs/iot-gate-imx8.h - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 5dacac3b5a..42e79cd78c 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -882,6 +882,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ - - dtb-$(CONFIG_TARGET_UCM_IMX8M_MINI) += ucm-imx8m-mini.dtb - dtb-$(CONFIG_TARGET_MCM_IMX8M_MINI) += mcm-imx8m-mini.dtb -+dtb-$(CONFIG_TARGET_IOT_GATE_IMX8) += iot-gate-imx8.dtb - - dtb-$(CONFIG_RCAR_GEN2) += \ - r8a7790-lager-u-boot.dtb \ -diff --git a/arch/arm/dts/iot-gate-imx8.dts b/arch/arm/dts/iot-gate-imx8.dts -new file mode 100644 -index 0000000000..6b6b2d69c7 ---- /dev/null -+++ b/arch/arm/dts/iot-gate-imx8.dts -@@ -0,0 +1,49 @@ -+/* -+ * Copyright 2020 CompuLab -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+/dts-v1/; -+ -+#include "cpl-imx8m-mini.dtsi" -+ -+/ { -+ model = "CompuLab IOT-GATE-iMX8"; -+ compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; -+ -+ reg_vusb_5v: regulator-usdhc2 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VUSB_5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; -+ regulator-boot-on; -+ enable-active-high; -+ }; -+}; -+ -+&usbotg1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctl_usb_gpio>; -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ sb-iotgimx8 { -+ pinctl_usb_gpio: usb_gpio_grp { -+ fsl,pins = < -+ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00 -+ >; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig -index 13e93cf0f1..1664a9c1d0 100644 ---- a/arch/arm/mach-imx/imx8m/Kconfig -+++ b/arch/arm/mach-imx/imx8m/Kconfig -@@ -214,6 +214,12 @@ config TARGET_MCM_IMX8M_MINI - select SUPPORT_SPL - select IMX8M_LPDDR4 - -+config TARGET_IOT_GATE_IMX8 -+ bool "CompuLab iot-gate-imx8" -+ select IMX8MM -+ select SUPPORT_SPL -+ select IMX8M_LPDDR4 -+ - endchoice - - source "board/freescale/imx8mq_evk/Kconfig" -@@ -232,5 +238,6 @@ source "board/phytec/phycore_imx8mm/Kconfig" - source "board/phytec/phycore_imx8mp/Kconfig" - source "board/compulab/ucm-imx8m-mini/Kconfig" - source "board/compulab/mcm-imx8m-mini/Kconfig" -+source "board/compulab/iot-gate-imx8/Kconfig" - - endif -diff --git a/board/compulab/iot-gate-imx8/Kconfig b/board/compulab/iot-gate-imx8/Kconfig -new file mode 100644 -index 0000000000..84f53ca6b9 ---- /dev/null -+++ b/board/compulab/iot-gate-imx8/Kconfig -@@ -0,0 +1,17 @@ -+if TARGET_IOT_GATE_IMX8 -+ -+config SYS_BOARD -+ default "iot-gate-imx8" -+ -+config SYS_VENDOR -+ default "compulab" -+ -+config SYS_CONFIG_NAME -+ default "iot-gate-imx8" -+ -+config DEFAULT_DTB -+ string "U-Boot Default Device Tree File" -+ depends on TARGET_IOT_GATE_IMX8 -+ default "sb-iotgimx8-can.dtb" -+ -+endif -diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile -new file mode 100644 -index 0000000000..af743b977b ---- /dev/null -+++ b/board/compulab/iot-gate-imx8/Makefile -@@ -0,0 +1,15 @@ -+# -+# Copyright 2018 CompuLab -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ -+ifdef CONFIG_SPL_BUILD -+obj-y += spl.o -+else -+obj-y += iot-gate-imx8.o -+endif -+ -+obj-y += ../plat/imx8mm/ -diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c -new file mode 100644 -index 0000000000..d01b8f8767 ---- /dev/null -+++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c -@@ -0,0 +1,265 @@ -+/* -+ * Copyright 2020 CompuLab -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../common/eeprom.h" -+#include -+#include -+#include -+#include "ddr/ddr.h" -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#ifdef CONFIG_BOARD_POSTCLK_INIT -+int board_postclk_init(void) -+{ -+ /* TODO */ -+ return 0; -+} -+#endif -+int board_phys_sdram_size(phys_size_t *size) -+{ -+ struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; -+ -+ switch (lpddr4_tcm_desc->size) { -+ case 4096: -+ case 2048: -+ case 1024: -+ *size = (1L << 20) * lpddr4_tcm_desc->size; -+ break; -+ default: -+ printf("%s: DRAM size %uM is not supported \n", __func__, -+ lpddr4_tcm_desc->size); -+ while ( 1 ) {}; -+ break; -+ }; -+ return 0; -+} -+ /* Get the top of usable RAM */ -+ulong board_get_usable_ram_top(ulong total_size) -+{ -+ -+ if(gd->ram_top > 0x100000000) -+ gd->ram_top = 0x100000000; -+ -+ return gd->ram_top; -+} -+ -+int dram_init(void) -+{ -+ phys_size_t sdram_size; -+ int ret; -+ ret = board_phys_sdram_size(&sdram_size); -+ printf("%s: size %llu\n", __func__, sdram_size); -+ if (ret) -+ return ret; -+ -+ /* rom_pointer[1] contains the size of TEE occupies */ -+ gd->ram_size = sdram_size - rom_pointer[1]; -+ -+ return 0; -+} -+ -+#ifdef CONFIG_OF_BOARD_SETUP -+int ft_board_setup(void *blob, bd_t *bd) -+{ -+ return 0; -+} -+#endif -+ -+#ifdef CONFIG_FEC_MXC -+#define FEC_RST_PAD IMX_GPIO_NR(1, 10) -+static iomux_v3_cfg_t const fec1_rst_pads[] = { -+ IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), -+}; -+ -+static void setup_iomux_fec(void) -+{ -+ imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, -+ ARRAY_SIZE(fec1_rst_pads)); -+ -+ gpio_request(FEC_RST_PAD, "fec1_rst"); -+ gpio_direction_output(FEC_RST_PAD, 0); -+ udelay(500); -+ gpio_direction_output(FEC_RST_PAD, 1); -+} -+ -+/* -+ * setup_mac_address() - set Ethernet MAC address environment. -+ * -+ * @return: 0 on success, -1 on failure -+ */ -+static int setup_mac_address(void) -+{ -+ int ret; -+ unsigned char enetaddr[6]; -+ -+ ret = eth_env_get_enetaddr("ethaddr", enetaddr); -+ if (ret) -+ return 0; -+ -+ ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); -+ if (ret) -+ return ret; -+ -+ ret = is_valid_ethaddr(enetaddr); -+ if (!ret) -+ return -1; -+ -+ ret = eth_env_set_enetaddr("ethaddr", enetaddr); -+ if (ret) -+ return -1; -+ -+ return 0; -+} -+ -+static int setup_fec(void) -+{ -+ struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs -+ = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; -+ -+ setup_iomux_fec(); -+ -+ /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -+ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); -+ return set_clk_enet(ENET_125MHZ); -+} -+ -+int board_phy_config(struct phy_device *phydev) -+{ -+ /* enable rgmii rxc skew and phy mode select to RGMII copper */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -+ -+ if (phydev->drv->config) -+ phydev->drv->config(phydev); -+ return 0; -+} -+#endif -+ -+int board_usb_init(int index, enum usb_init_type init) -+{ -+ debug("board_usb_init %d, type %d\n", index, init); -+ -+ imx8m_usb_power(index, true); -+ -+ return 0; -+} -+ -+int board_usb_cleanup(int index, enum usb_init_type init) -+{ -+ debug("board_usb_cleanup %d, type %d\n", index, init); -+ -+ imx8m_usb_power(index, false); -+ -+ return 0; -+} -+int board_init(void) -+{ -+ -+#ifdef CONFIG_FEC_MXC -+ setup_fec(); -+#endif -+ return 0; -+} -+ -+int board_mmc_get_env_dev(int devno) -+{ -+ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); -+ if (user_env_devno != ULONG_MAX) { -+ printf("User Environment dev# is (%lu)\n", user_env_devno); -+ return (int)user_env_devno; -+ } -+ return devno; -+} -+ -+static int _mmc_get_env_part(void) -+{ -+ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -+ if (user_env_part != ULONG_MAX) { -+ printf("User Environment part# is (%lu)\n", user_env_part); -+ return (int)user_env_part; -+ } -+ return CONFIG_SYS_MMC_ENV_PART; -+} -+ -+uint mmc_get_env_part(struct mmc *mmc) -+{ -+ if (mmc->part_support) -+ return _mmc_get_env_part(); -+ -+ return 0; -+} -+ -+int mmc_map_to_kernel_blk(int devno){ -+ return devno; -+} -+ -+static void board_bootdev_init(void) -+{ -+ u32 bootdev = get_boot_device(); -+ switch (bootdev) { -+ case MMC3_BOOT: -+ bootdev = 2; -+ break; -+ case SD2_BOOT: -+ bootdev = 1; -+ break; -+ default: -+ env_set("bootdev", NULL); -+ return; -+ } -+ env_set_ulong("bootdev", bootdev); -+} -+ -+int board_late_init(void) -+{ -+ int ret; -+ -+#ifdef CONFIG_ENV_IS_IN_MMC -+ board_late_mmc_env_init(); -+ board_bootdev_init(); -+#endif -+ -+ ret = setup_mac_address(); -+ if (ret < 0) -+ printf("%s: Can't set MAC address\n", __func__); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_FSL_FASTBOOT -+#ifdef CONFIG_ANDROID_RECOVERY -+int is_recovery_key_pressing(void) -+{ -+ return 0; /*TODO*/ -+} -+#endif /*CONFIG_ANDROID_RECOVERY*/ -+#endif /*CONFIG_FSL_FASTBOOT*/ -diff --git a/board/compulab/iot-gate-imx8/spl.c b/board/compulab/iot-gate-imx8/spl.c -new file mode 100644 -index 0000000000..d6ece8ef3e ---- /dev/null -+++ b/board/compulab/iot-gate-imx8/spl.c -@@ -0,0 +1,9 @@ -+#include -+#include -+#include -+#include -+#include -+ -+int spl_board_private_init(void) { -+ return 0; -+} -diff --git a/configs/iot-gate-imx8_defconfig b/configs/iot-gate-imx8_defconfig -new file mode 100644 -index 0000000000..39c448eca0 ---- /dev/null -+++ b/configs/iot-gate-imx8_defconfig -@@ -0,0 +1,102 @@ -+CONFIG_ARM=y -+CONFIG_SPL_SYS_ICACHE_OFF=y -+CONFIG_SPL_SYS_DCACHE_OFF=y -+CONFIG_ARCH_IMX8M=y -+CONFIG_SYS_TEXT_BASE=0x40200000 -+CONFIG_SPL_GPIO_SUPPORT=y -+CONFIG_ENV_SIZE=0x1000 -+CONFIG_ENV_OFFSET=0x4400 -+CONFIG_DM_GPIO=y -+CONFIG_TARGET_IOT_GATE_IMX8=y -+CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" -+CONFIG_SPL_MMC_SUPPORT=y -+CONFIG_SPL_SERIAL_SUPPORT=y -+CONFIG_SPL=y -+CONFIG_CSF_SIZE=0x2000 -+CONFIG_SPL_TEXT_BASE=0x7E1000 -+CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" -+CONFIG_FIT=y -+CONFIG_FIT_EXTERNAL_OFFSET=0x3000 -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" -+CONFIG_OF_SYSTEM_SETUP=y -+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" -+CONFIG_CONSOLE_MUX=y -+CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" -+CONFIG_BOARD_LATE_INIT=y -+CONFIG_ARCH_MISC_INIT=y -+CONFIG_BOARD_EARLY_INIT_F=y -+CONFIG_SPL_BOARD_INIT=y -+CONFIG_SPL_SEPARATE_BSS=y -+CONFIG_SPL_POWER_SUPPORT=y -+CONFIG_HUSH_PARSER=y -+CONFIG_SYS_PROMPT="u-boot=> " -+# CONFIG_BOOTM_NETBSD is not set -+CONFIG_CMD_EEPROM=y -+CONFIG_CMD_EEPROM_LAYOUT=y -+CONFIG_CMD_MEMINFO=y -+CONFIG_CMD_MEMTEST=y -+CONFIG_CMD_CLK=y -+CONFIG_CMD_FUSE=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_DHCP=y -+CONFIG_CMD_MII=y -+CONFIG_CMD_PING=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_REGULATOR=y -+CONFIG_CMD_EXT2=y -+CONFIG_CMD_EXT4=y -+CONFIG_CMD_FAT=y -+CONFIG_CMD_FS_GENERIC=y -+CONFIG_EFI_PARTITION=y -+CONFIG_OF_CONTROL=y -+CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_CLK_COMPOSITE_CCF=y -+CONFIG_CLK_IMX8MM=y -+CONFIG_MXC_GPIO=y -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MXC=y -+CONFIG_DM_MMC=y -+CONFIG_SUPPORT_EMMC_BOOT=y -+CONFIG_MMC_IO_VOLTAGE=y -+CONFIG_MMC_UHS_SUPPORT=y -+CONFIG_MMC_HS400_ES_SUPPORT=y -+CONFIG_MMC_HS400_SUPPORT=y -+CONFIG_FSL_ESDHC_IMX=y -+CONFIG_DM_ETH=y -+CONFIG_FEC_MXC=y -+CONFIG_MII=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_IMX8M=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_RESET=y -+CONFIG_MXC_UART=y -+CONFIG_SYSRESET=y -+CONFIG_SYSRESET_PSCI=y -+CONFIG_DM_THERMAL=y -+CONFIG_NXP_TMU=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_MANUFACTURER="FSL" -+CONFIG_USB_GADGET_VENDOR_NUM=0x0525 -+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 -+CONFIG_CI_UDC=y -+CONFIG_SDP_LOADADDR=0x40400000 -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_EXT4_WRITE=y -+CONFIG_FAT_WRITE=y -+CONFIG_OF_LIBFDT_OVERLAY=y -+# CONFIG_EFI_LOADER is not set -diff --git a/include/configs/iot-gate-imx8.h b/include/configs/iot-gate-imx8.h -new file mode 100644 -index 0000000000..b3d6082a66 ---- /dev/null -+++ b/include/configs/iot-gate-imx8.h -@@ -0,0 +1,15 @@ -+/* -+ * Copyright 2020 CompuLab -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __UCM_IMX8M_MINI_H -+#define __UCM_IMX8M_MINI_H -+ -+#include "cpl-imx8m-mini.h" -+ -+#if defined(CONFIG_ANDROID_SUPPORT) -+#include "ucm-imx8m-mini_android.h" -+#endif -+#endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0060-mcm-imx8m-mini-config-Update-env-size-offest.patch b/recipes-bsp/u-boot/compulab/imx8mm/0060-mcm-imx8m-mini-config-Update-env-size-offest.patch deleted file mode 100644 index 34310b1..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0060-mcm-imx8m-mini-config-Update-env-size-offest.patch +++ /dev/null @@ -1,28 +0,0 @@ -From fc4ea37223e0d3d4b03ccbba61f769d691e1f94d Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 15 Jul 2020 15:25:04 +0300 -Subject: [PATCH 60/91] mcm-imx8m-mini: config: Update env size/offest - -Signed-off-by: Valentin Raevsky ---- - configs/mcm-imx8m-mini_defconfig | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig -index a4c3c90f83..971e1ec982 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/mcm-imx8m-mini_defconfig -@@ -4,8 +4,8 @@ CONFIG_SPL_SYS_DCACHE_OFF=y - CONFIG_ARCH_IMX8M=y - CONFIG_SYS_TEXT_BASE=0x40200000 - CONFIG_SPL_GPIO_SUPPORT=y --CONFIG_ENV_SIZE=0x4000 --CONFIG_ENV_OFFSET=0x1000 -+CONFIG_ENV_SIZE=0x1000 -+CONFIG_ENV_OFFSET=0x4400 - CONFIG_DM_GPIO=y - CONFIG_TARGET_MCM_IMX8M_MINI=y - CONFIG_SPL_MMC_SUPPORT=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8m-mini-env-config-Update-size-offset-value.patch b/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8m-mini-env-config-Update-size-offset-value.patch deleted file mode 100644 index fef5246..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8m-mini-env-config-Update-size-offset-value.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 7921eb86170143cbdb33a013276325a90defe59d Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 15 Jul 2020 15:27:37 +0300 -Subject: [PATCH 61/91] imx8m-mini: env: config: Update size/offset value - -Update size/offset value for CompuLab imx8m-mini boards - -Signed-off-by: Valentin Raevsky ---- - tools/env/fw_env.config | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/tools/env/fw_env.config b/tools/env/fw_env.config -index 3222fd715c..988ef9f728 100644 ---- a/tools/env/fw_env.config -+++ b/tools/env/fw_env.config -@@ -6,6 +6,6 @@ - # be the same as the Environment size, which is valid for NOR and SPI-dataflash - # Device offset must be prefixed with 0x to be parsed as a hexadecimal value. - --# Block device for mcm-imx8m-mini --/dev/mmcblk2boot0 0x1000 0x4000 --#/dev/mmcblk1 0x1000 0x4000 -+# Block devices for CompuLab imx8m-mini -+/dev/mmcblk2boot0 0x4400 0x1000 -+#/dev/mmcblk1 0x4400 0x1000 --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch b/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch deleted file mode 100644 index bd02b44..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 132104a16c3551acf9638770d6c0be946b8b61d1 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Fri, 17 Jul 2020 18:59:22 +0300 -Subject: [PATCH 62/91] imx8: eeprom: Move to the imx8 platform independent - folder - -Move the eeprom code the imx8 platform independent folder. -The same code gets used by all CompuLab imx8 boards. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/iot-gate-imx8/Makefile | 2 ++ - board/compulab/mcm-imx8m-mini/Makefile | 2 ++ - board/compulab/plat/imx8/Makefile | 1 + - board/compulab/plat/{imx8mm => imx8}/eeprom/Makefile | 0 - board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.c | 0 - board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.h | 0 - board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom_spl.c | 0 - board/compulab/plat/imx8mm/Makefile | 1 - - board/compulab/ucm-imx8m-mini/Makefile | 2 ++ - 9 files changed, 7 insertions(+), 1 deletion(-) - create mode 100644 board/compulab/plat/imx8/Makefile - rename board/compulab/plat/{imx8mm => imx8}/eeprom/Makefile (100%) - rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.c (100%) - rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.h (100%) - rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom_spl.c (100%) - -diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile -index af743b977b..e5239d1dbb 100644 ---- a/board/compulab/iot-gate-imx8/Makefile -+++ b/board/compulab/iot-gate-imx8/Makefile -@@ -5,6 +5,7 @@ - # - - ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o -@@ -13,3 +14,4 @@ obj-y += iot-gate-imx8.o - endif - - obj-y += ../plat/imx8mm/ -+obj-y += ../plat/imx8/ -diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile -index 9ce2875d6e..2cadd46fb8 100644 ---- a/board/compulab/mcm-imx8m-mini/Makefile -+++ b/board/compulab/mcm-imx8m-mini/Makefile -@@ -5,6 +5,7 @@ - # - - ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o -@@ -13,3 +14,4 @@ obj-y += mcm-imx8m-mini.o - endif - - obj-y += ../plat/imx8mm/ -+obj-y += ../plat/imx8/ -diff --git a/board/compulab/plat/imx8/Makefile b/board/compulab/plat/imx8/Makefile -new file mode 100644 -index 0000000000..9d3044cb9e ---- /dev/null -+++ b/board/compulab/plat/imx8/Makefile -@@ -0,0 +1 @@ -+obj-y += eeprom/ -diff --git a/board/compulab/plat/imx8mm/eeprom/Makefile b/board/compulab/plat/imx8/eeprom/Makefile -similarity index 100% -rename from board/compulab/plat/imx8mm/eeprom/Makefile -rename to board/compulab/plat/imx8/eeprom/Makefile -diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom.c b/board/compulab/plat/imx8/eeprom/eeprom.c -similarity index 100% -rename from board/compulab/plat/imx8mm/eeprom/eeprom.c -rename to board/compulab/plat/imx8/eeprom/eeprom.c -diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom.h b/board/compulab/plat/imx8/eeprom/eeprom.h -similarity index 100% -rename from board/compulab/plat/imx8mm/eeprom/eeprom.h -rename to board/compulab/plat/imx8/eeprom/eeprom.h -diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -similarity index 100% -rename from board/compulab/plat/imx8mm/eeprom/eeprom_spl.c -rename to board/compulab/plat/imx8/eeprom/eeprom_spl.c -diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile -index 2f68e0523e..33b3fedef9 100644 ---- a/board/compulab/plat/imx8mm/Makefile -+++ b/board/compulab/plat/imx8mm/Makefile -@@ -1,3 +1,2 @@ - obj-y += ddr/ --obj-y += eeprom/ - obj-y += spl/ -diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile -index dbde2116cd..870792441c 100644 ---- a/board/compulab/ucm-imx8m-mini/Makefile -+++ b/board/compulab/ucm-imx8m-mini/Makefile -@@ -5,6 +5,7 @@ - # - - ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o -@@ -13,3 +14,4 @@ obj-y += ucm-imx8m-mini.o - endif - - obj-y += ../plat/imx8mm/ -+obj-y += ../plat/imx8/ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8-eeprom-Remove-duplicated-code.patch b/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8-eeprom-Remove-duplicated-code.patch deleted file mode 100644 index 2b0ff16..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8-eeprom-Remove-duplicated-code.patch +++ /dev/null @@ -1,286 +0,0 @@ -From dd93d6c0df21169f7a14dc1ebde7d7db24502428 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Sat, 18 Jul 2020 13:02:39 +0300 -Subject: [PATCH 63/91] imx8: eeprom: Remove duplicated code - -Remove duplicated code. -Leave the i2c spl helper only for use in the ddr discovery. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8/eeprom/Makefile | 5 - - board/compulab/plat/imx8/eeprom/eeprom.c | 192 ------------------- - board/compulab/plat/imx8/eeprom/eeprom.h | 30 --- - board/compulab/plat/imx8/eeprom/eeprom_spl.c | 5 +- - 4 files changed, 4 insertions(+), 228 deletions(-) - delete mode 100644 board/compulab/plat/imx8/eeprom/eeprom.c - delete mode 100644 board/compulab/plat/imx8/eeprom/eeprom.h - -diff --git a/board/compulab/plat/imx8/eeprom/Makefile b/board/compulab/plat/imx8/eeprom/Makefile -index 6e61b4a414..62ee6de6fa 100644 ---- a/board/compulab/plat/imx8/eeprom/Makefile -+++ b/board/compulab/plat/imx8/eeprom/Makefile -@@ -1,6 +1 @@ --ifdef CONFIG_SPL_BUILD - obj-y += eeprom_spl.o --else --obj-y += eeprom.o --endif -- -diff --git a/board/compulab/plat/imx8/eeprom/eeprom.c b/board/compulab/plat/imx8/eeprom/eeprom.c -deleted file mode 100644 -index fd1fa49e21..0000000000 ---- a/board/compulab/plat/imx8/eeprom/eeprom.c -+++ /dev/null -@@ -1,192 +0,0 @@ --/* -- * (C) Copyright 2011 CompuLab, Ltd. -- * -- * SPDX-License-Identifier: GPL-2.0+ -- */ -- --#include --#include --#include --#include --#include --#include --#include -- --#ifndef CONFIG_SYS_I2C_EEPROM_ADDR --#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 --#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 --#endif -- --#ifndef CONFIG_SYS_I2C_EEPROM_BUS --#define CONFIG_SYS_I2C_EEPROM_BUS 1 --#endif -- --#define EEPROM_LAYOUT_VER_OFFSET 44 --#define BOARD_SERIAL_OFFSET 20 --#define BOARD_SERIAL_OFFSET_LEGACY 8 --#define BOARD_REV_OFFSET 0 --#define BOARD_REV_OFFSET_LEGACY 6 --#define BOARD_REV_SIZE 2 --#define PRODUCT_NAME_OFFSET 128 --#define PRODUCT_NAME_SIZE 16 --#define MAC_ADDR_OFFSET 4 --#define MAC_ADDR_OFFSET_LEGACY 0 -- --#define LAYOUT_INVALID 0 --#define LAYOUT_LEGACY 0xff -- --static int cpl_eeprom_bus; --static int cpl_eeprom_layout; -- --static struct udevice *g_dev = NULL; -- --static int cpl_eeprom_init(void) { -- -- int i2c_bus = CONFIG_SYS_I2C_EEPROM_BUS; -- uint8_t chip = CONFIG_SYS_I2C_EEPROM_ADDR; -- -- struct udevice *bus, *dev; -- int ret; -- -- if (!g_dev) { -- -- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); -- if (ret) { -- printf("%s: No bus %d\n", __func__, i2c_bus); -- return ret; -- } -- -- ret = dm_i2c_probe(bus, chip, 0, &dev); -- if (ret) { -- printf("%s: Can't find device id=0x%x, on bus %d\n", -- __func__, chip, i2c_bus); -- return ret; -- } -- -- /* Init */ -- g_dev = dev; -- } -- -- return 0; --} -- --static int cpl_eeprom_read(uint offset, uchar *buf, int len) --{ -- int res; -- -- res = cpl_eeprom_init(); -- if (res < 0) -- return res; -- -- res = dm_i2c_read(g_dev, offset, buf, len); -- -- return res; --} -- -- --static int cpl_eeprom_setup(uint eeprom_bus) --{ -- int res; -- -- /* -- * We know the setup was already done when the layout is set to a valid -- * value and we're using the same bus as before. -- */ -- if (cpl_eeprom_layout != LAYOUT_INVALID && eeprom_bus == cpl_eeprom_bus) -- return 0; -- -- cpl_eeprom_bus = eeprom_bus; -- res = cpl_eeprom_read(EEPROM_LAYOUT_VER_OFFSET, -- (uchar *)&cpl_eeprom_layout, 1); -- -- if (res) { -- cpl_eeprom_layout = LAYOUT_INVALID; -- return res; -- } -- -- if (cpl_eeprom_layout == 0 || cpl_eeprom_layout >= 0x20) -- cpl_eeprom_layout = LAYOUT_LEGACY; -- -- return 0; --} -- --/* -- * Routine: cpl_eeprom_read_mac_addr -- * Description: read mac address and store it in buf. -- */ --int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) --{ -- uint offset; -- int err; -- -- err = cpl_eeprom_setup(eeprom_bus); -- if (err) -- return err; -- -- offset = (cpl_eeprom_layout != LAYOUT_LEGACY) ? -- MAC_ADDR_OFFSET : MAC_ADDR_OFFSET_LEGACY; -- -- return cpl_eeprom_read(offset, buf, 6); --} -- --static u32 board_rev; -- --/* -- * Routine: cpl_eeprom_get_board_rev -- * Description: read system revision from eeprom -- */ --u32 cpl_eeprom_get_board_rev(uint eeprom_bus) --{ -- char str[5]; /* Legacy representation can contain at most 4 digits */ -- uint offset = BOARD_REV_OFFSET_LEGACY; -- -- if (board_rev) -- return board_rev; -- -- if (cpl_eeprom_setup(eeprom_bus)) -- return 0; -- -- if (cpl_eeprom_layout != LAYOUT_LEGACY) -- offset = BOARD_REV_OFFSET; -- -- if (cpl_eeprom_read(offset, (uchar *)&board_rev, BOARD_REV_SIZE)) -- return 0; -- -- /* -- * Convert legacy syntactic representation to semantic -- * representation. i.e. for rev 1.00: 0x100 --> 0x64 -- */ -- if (cpl_eeprom_layout == LAYOUT_LEGACY) { -- sprintf(str, "%x", board_rev); -- board_rev = simple_strtoul(str, NULL, 10); -- } -- -- return board_rev; --}; -- --/* -- * Routine: cpl_eeprom_get_board_rev -- * Description: read system revision from eeprom -- * -- * @buf: buffer to store the product name -- * @eeprom_bus: i2c bus num of the eeprom -- * -- * @return: 0 on success, < 0 on failure -- */ --int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) --{ -- int err; -- -- if (buf == NULL) -- return -EINVAL; -- -- err = cpl_eeprom_setup(eeprom_bus); -- if (err) -- return err; -- -- err = cpl_eeprom_read(PRODUCT_NAME_OFFSET, buf, PRODUCT_NAME_SIZE); -- if (!err) /* Protect ourselves from invalid data (unterminated str) */ -- buf[PRODUCT_NAME_SIZE - 1] = '\0'; -- -- return err; --} -diff --git a/board/compulab/plat/imx8/eeprom/eeprom.h b/board/compulab/plat/imx8/eeprom/eeprom.h -deleted file mode 100644 -index 9de4aadd43..0000000000 ---- a/board/compulab/plat/imx8/eeprom/eeprom.h -+++ /dev/null -@@ -1,30 +0,0 @@ --/* -- * (C) Copyright 2011 CompuLab, Ltd. -- * -- * SPDX-License-Identifier: GPL-2.0+ -- */ -- --#ifndef _EEPROM_ --#define _EEPROM_ --#include -- --#ifdef CONFIG_DM_I2C --int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); --u32 cpl_eeprom_get_board_rev(uint eeprom_bus); --int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); --#else --static inline int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) --{ -- return 1; --} --static inline u32 cpl_eeprom_get_board_rev(uint eeprom_bus) --{ -- return 0; --} --static inline int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) --{ -- return -ENOSYS; --} --#endif -- --#endif -diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -index 09a04fda92..5f49a17ed8 100644 ---- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c -+++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -@@ -11,7 +11,8 @@ - #include - #include - #include --#include "eeprom.h" -+ -+#ifdef CONFIG_SPL_BUILD - - #define CONFIG_SYS_I2C_EEPROM_ADDR_P1 0x51 - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -@@ -145,3 +146,5 @@ u32 cl_eeprom_set_osize(u32 osize) - - return board_osize; - }; -+ -+#endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch b/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch deleted file mode 100644 index 277da80..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch +++ /dev/null @@ -1,1091 +0,0 @@ -From 09784b0196130e7d3d54e60cff76f9cbcc09a797 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 16:27:49 +0300 -Subject: [PATCH 64/91] imx8mm: plat: Add the common board file for imx8mm SoC - -Signed-off-by: Kirill Kapranov ---- - board/compulab/iot-gate-imx8/Makefile | 2 +- - board/compulab/iot-gate-imx8/iot-gate-imx8.c | 235 ---------------- - board/compulab/mcm-imx8m-mini/Makefile | 2 +- - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 235 ---------------- - board/compulab/plat/imx8mm/Makefile | 1 + - board/compulab/plat/imx8mm/board/Makefile | 4 + - board/compulab/plat/imx8mm/board/board.c | 261 ++++++++++++++++++ - board/compulab/ucm-imx8m-mini/Makefile | 2 +- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 235 ---------------- - 9 files changed, 269 insertions(+), 708 deletions(-) - create mode 100644 board/compulab/plat/imx8mm/board/Makefile - create mode 100644 board/compulab/plat/imx8mm/board/board.c - -diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile -index e5239d1dbb..fa228294ef 100644 ---- a/board/compulab/iot-gate-imx8/Makefile -+++ b/board/compulab/iot-gate-imx8/Makefile -@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o --else -+else - obj-y += iot-gate-imx8.o - endif - -diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c -index d01b8f8767..6cafc259e9 100644 ---- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c -+++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c -@@ -23,243 +23,8 @@ - #include - #include - #include --#include "../common/eeprom.h" - #include - #include - #include --#include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; -- --#ifdef CONFIG_BOARD_POSTCLK_INIT --int board_postclk_init(void) --{ -- /* TODO */ -- return 0; --} --#endif --int board_phys_sdram_size(phys_size_t *size) --{ -- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; -- -- switch (lpddr4_tcm_desc->size) { -- case 4096: -- case 2048: -- case 1024: -- *size = (1L << 20) * lpddr4_tcm_desc->size; -- break; -- default: -- printf("%s: DRAM size %uM is not supported \n", __func__, -- lpddr4_tcm_desc->size); -- while ( 1 ) {}; -- break; -- }; -- return 0; --} -- /* Get the top of usable RAM */ --ulong board_get_usable_ram_top(ulong total_size) --{ -- -- if(gd->ram_top > 0x100000000) -- gd->ram_top = 0x100000000; -- -- return gd->ram_top; --} -- --int dram_init(void) --{ -- phys_size_t sdram_size; -- int ret; -- ret = board_phys_sdram_size(&sdram_size); -- printf("%s: size %llu\n", __func__, sdram_size); -- if (ret) -- return ret; -- -- /* rom_pointer[1] contains the size of TEE occupies */ -- gd->ram_size = sdram_size - rom_pointer[1]; -- -- return 0; --} -- --#ifdef CONFIG_OF_BOARD_SETUP --int ft_board_setup(void *blob, bd_t *bd) --{ -- return 0; --} --#endif -- --#ifdef CONFIG_FEC_MXC --#define FEC_RST_PAD IMX_GPIO_NR(1, 10) --static iomux_v3_cfg_t const fec1_rst_pads[] = { -- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), --}; -- --static void setup_iomux_fec(void) --{ -- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, -- ARRAY_SIZE(fec1_rst_pads)); -- -- gpio_request(FEC_RST_PAD, "fec1_rst"); -- gpio_direction_output(FEC_RST_PAD, 0); -- udelay(500); -- gpio_direction_output(FEC_RST_PAD, 1); --} -- --/* -- * setup_mac_address() - set Ethernet MAC address environment. -- * -- * @return: 0 on success, -1 on failure -- */ --static int setup_mac_address(void) --{ -- int ret; -- unsigned char enetaddr[6]; -- -- ret = eth_env_get_enetaddr("ethaddr", enetaddr); -- if (ret) -- return 0; -- -- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); -- if (ret) -- return ret; -- -- ret = is_valid_ethaddr(enetaddr); -- if (!ret) -- return -1; -- -- ret = eth_env_set_enetaddr("ethaddr", enetaddr); -- if (ret) -- return -1; -- -- return 0; --} -- --static int setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs -- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_fec(); -- -- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); -- return set_clk_enet(ENET_125MHZ); --} -- --int board_phy_config(struct phy_device *phydev) --{ -- /* enable rgmii rxc skew and phy mode select to RGMII copper */ -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -- -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -- -- if (phydev->drv->config) -- phydev->drv->config(phydev); -- return 0; --} --#endif -- --int board_usb_init(int index, enum usb_init_type init) --{ -- debug("board_usb_init %d, type %d\n", index, init); -- -- imx8m_usb_power(index, true); -- -- return 0; --} -- --int board_usb_cleanup(int index, enum usb_init_type init) --{ -- debug("board_usb_cleanup %d, type %d\n", index, init); -- -- imx8m_usb_power(index, false); -- -- return 0; --} --int board_init(void) --{ -- --#ifdef CONFIG_FEC_MXC -- setup_fec(); --#endif -- return 0; --} -- --int board_mmc_get_env_dev(int devno) --{ -- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); -- if (user_env_devno != ULONG_MAX) { -- printf("User Environment dev# is (%lu)\n", user_env_devno); -- return (int)user_env_devno; -- } -- return devno; --} -- --static int _mmc_get_env_part(void) --{ -- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -- if (user_env_part != ULONG_MAX) { -- printf("User Environment part# is (%lu)\n", user_env_part); -- return (int)user_env_part; -- } -- return CONFIG_SYS_MMC_ENV_PART; --} -- --uint mmc_get_env_part(struct mmc *mmc) --{ -- if (mmc->part_support) -- return _mmc_get_env_part(); -- -- return 0; --} -- --int mmc_map_to_kernel_blk(int devno){ -- return devno; --} -- --static void board_bootdev_init(void) --{ -- u32 bootdev = get_boot_device(); -- switch (bootdev) { -- case MMC3_BOOT: -- bootdev = 2; -- break; -- case SD2_BOOT: -- bootdev = 1; -- break; -- default: -- env_set("bootdev", NULL); -- return; -- } -- env_set_ulong("bootdev", bootdev); --} -- --int board_late_init(void) --{ -- int ret; -- --#ifdef CONFIG_ENV_IS_IN_MMC -- board_late_mmc_env_init(); -- board_bootdev_init(); --#endif -- -- ret = setup_mac_address(); -- if (ret < 0) -- printf("%s: Can't set MAC address\n", __func__); -- -- return 0; --} -- --#ifdef CONFIG_FSL_FASTBOOT --#ifdef CONFIG_ANDROID_RECOVERY --int is_recovery_key_pressing(void) --{ -- return 0; /*TODO*/ --} --#endif /*CONFIG_ANDROID_RECOVERY*/ --#endif /*CONFIG_FSL_FASTBOOT*/ -diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile -index 2cadd46fb8..906eff02bd 100644 ---- a/board/compulab/mcm-imx8m-mini/Makefile -+++ b/board/compulab/mcm-imx8m-mini/Makefile -@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o --else -+else - obj-y += mcm-imx8m-mini.o - endif - -diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -index d01b8f8767..6cafc259e9 100644 ---- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -+++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -@@ -23,243 +23,8 @@ - #include - #include - #include --#include "../common/eeprom.h" - #include - #include - #include --#include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; -- --#ifdef CONFIG_BOARD_POSTCLK_INIT --int board_postclk_init(void) --{ -- /* TODO */ -- return 0; --} --#endif --int board_phys_sdram_size(phys_size_t *size) --{ -- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; -- -- switch (lpddr4_tcm_desc->size) { -- case 4096: -- case 2048: -- case 1024: -- *size = (1L << 20) * lpddr4_tcm_desc->size; -- break; -- default: -- printf("%s: DRAM size %uM is not supported \n", __func__, -- lpddr4_tcm_desc->size); -- while ( 1 ) {}; -- break; -- }; -- return 0; --} -- /* Get the top of usable RAM */ --ulong board_get_usable_ram_top(ulong total_size) --{ -- -- if(gd->ram_top > 0x100000000) -- gd->ram_top = 0x100000000; -- -- return gd->ram_top; --} -- --int dram_init(void) --{ -- phys_size_t sdram_size; -- int ret; -- ret = board_phys_sdram_size(&sdram_size); -- printf("%s: size %llu\n", __func__, sdram_size); -- if (ret) -- return ret; -- -- /* rom_pointer[1] contains the size of TEE occupies */ -- gd->ram_size = sdram_size - rom_pointer[1]; -- -- return 0; --} -- --#ifdef CONFIG_OF_BOARD_SETUP --int ft_board_setup(void *blob, bd_t *bd) --{ -- return 0; --} --#endif -- --#ifdef CONFIG_FEC_MXC --#define FEC_RST_PAD IMX_GPIO_NR(1, 10) --static iomux_v3_cfg_t const fec1_rst_pads[] = { -- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), --}; -- --static void setup_iomux_fec(void) --{ -- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, -- ARRAY_SIZE(fec1_rst_pads)); -- -- gpio_request(FEC_RST_PAD, "fec1_rst"); -- gpio_direction_output(FEC_RST_PAD, 0); -- udelay(500); -- gpio_direction_output(FEC_RST_PAD, 1); --} -- --/* -- * setup_mac_address() - set Ethernet MAC address environment. -- * -- * @return: 0 on success, -1 on failure -- */ --static int setup_mac_address(void) --{ -- int ret; -- unsigned char enetaddr[6]; -- -- ret = eth_env_get_enetaddr("ethaddr", enetaddr); -- if (ret) -- return 0; -- -- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); -- if (ret) -- return ret; -- -- ret = is_valid_ethaddr(enetaddr); -- if (!ret) -- return -1; -- -- ret = eth_env_set_enetaddr("ethaddr", enetaddr); -- if (ret) -- return -1; -- -- return 0; --} -- --static int setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs -- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_fec(); -- -- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); -- return set_clk_enet(ENET_125MHZ); --} -- --int board_phy_config(struct phy_device *phydev) --{ -- /* enable rgmii rxc skew and phy mode select to RGMII copper */ -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -- -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -- -- if (phydev->drv->config) -- phydev->drv->config(phydev); -- return 0; --} --#endif -- --int board_usb_init(int index, enum usb_init_type init) --{ -- debug("board_usb_init %d, type %d\n", index, init); -- -- imx8m_usb_power(index, true); -- -- return 0; --} -- --int board_usb_cleanup(int index, enum usb_init_type init) --{ -- debug("board_usb_cleanup %d, type %d\n", index, init); -- -- imx8m_usb_power(index, false); -- -- return 0; --} --int board_init(void) --{ -- --#ifdef CONFIG_FEC_MXC -- setup_fec(); --#endif -- return 0; --} -- --int board_mmc_get_env_dev(int devno) --{ -- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); -- if (user_env_devno != ULONG_MAX) { -- printf("User Environment dev# is (%lu)\n", user_env_devno); -- return (int)user_env_devno; -- } -- return devno; --} -- --static int _mmc_get_env_part(void) --{ -- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -- if (user_env_part != ULONG_MAX) { -- printf("User Environment part# is (%lu)\n", user_env_part); -- return (int)user_env_part; -- } -- return CONFIG_SYS_MMC_ENV_PART; --} -- --uint mmc_get_env_part(struct mmc *mmc) --{ -- if (mmc->part_support) -- return _mmc_get_env_part(); -- -- return 0; --} -- --int mmc_map_to_kernel_blk(int devno){ -- return devno; --} -- --static void board_bootdev_init(void) --{ -- u32 bootdev = get_boot_device(); -- switch (bootdev) { -- case MMC3_BOOT: -- bootdev = 2; -- break; -- case SD2_BOOT: -- bootdev = 1; -- break; -- default: -- env_set("bootdev", NULL); -- return; -- } -- env_set_ulong("bootdev", bootdev); --} -- --int board_late_init(void) --{ -- int ret; -- --#ifdef CONFIG_ENV_IS_IN_MMC -- board_late_mmc_env_init(); -- board_bootdev_init(); --#endif -- -- ret = setup_mac_address(); -- if (ret < 0) -- printf("%s: Can't set MAC address\n", __func__); -- -- return 0; --} -- --#ifdef CONFIG_FSL_FASTBOOT --#ifdef CONFIG_ANDROID_RECOVERY --int is_recovery_key_pressing(void) --{ -- return 0; /*TODO*/ --} --#endif /*CONFIG_ANDROID_RECOVERY*/ --#endif /*CONFIG_FSL_FASTBOOT*/ -diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile -index 33b3fedef9..15ce667357 100644 ---- a/board/compulab/plat/imx8mm/Makefile -+++ b/board/compulab/plat/imx8mm/Makefile -@@ -1,2 +1,3 @@ - obj-y += ddr/ - obj-y += spl/ -+obj-y += board/ -diff --git a/board/compulab/plat/imx8mm/board/Makefile b/board/compulab/plat/imx8mm/board/Makefile -new file mode 100644 -index 0000000000..8c50727052 ---- /dev/null -+++ b/board/compulab/plat/imx8mm/board/Makefile -@@ -0,0 +1,4 @@ -+ccflags-y += -I$(srctree)/board/compulab/ -+ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ -+ -+obj-y += board.o -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -new file mode 100644 -index 0000000000..cf0b8eb0ff ---- /dev/null -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -0,0 +1,261 @@ -+/* -+ * Copyright 2020 CompuLab -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ddr/ddr.h" -+#include "common/eeprom.h" -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#ifdef CONFIG_BOARD_POSTCLK_INIT -+int board_postclk_init(void) -+{ -+ /* TODO */ -+ return 0; -+} -+#endif -+int board_phys_sdram_size(phys_size_t *size) -+{ -+ struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; -+ -+ switch (lpddr4_tcm_desc->size) { -+ case 4096: -+ case 2048: -+ case 1024: -+ *size = (1L << 20) * lpddr4_tcm_desc->size; -+ break; -+ default: -+ printf("%s: DRAM size %uM is not supported \n", __func__, -+ lpddr4_tcm_desc->size); -+ while ( 1 ) {}; -+ break; -+ }; -+ return 0; -+} -+ /* Get the top of usable RAM */ -+ulong board_get_usable_ram_top(ulong total_size) -+{ -+ -+ if(gd->ram_top > 0x100000000) -+ gd->ram_top = 0x100000000; -+ -+ return gd->ram_top; -+} -+ -+int dram_init(void) -+{ -+ phys_size_t sdram_size; -+ int ret; -+ ret = board_phys_sdram_size(&sdram_size); -+ printf("%s: size %llu\n", __func__, sdram_size); -+ if (ret) -+ return ret; -+ -+ /* rom_pointer[1] contains the size of TEE occupies */ -+ gd->ram_size = sdram_size - rom_pointer[1]; -+ -+ return 0; -+} -+ -+#ifdef CONFIG_OF_BOARD_SETUP -+int ft_board_setup(void *blob, bd_t *bd) -+{ -+ return 0; -+} -+#endif -+ -+#ifdef CONFIG_FEC_MXC -+#define FEC_RST_PAD IMX_GPIO_NR(1, 10) -+static iomux_v3_cfg_t const fec1_rst_pads[] = { -+ IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), -+}; -+ -+static void setup_iomux_fec(void) -+{ -+ imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, -+ ARRAY_SIZE(fec1_rst_pads)); -+ -+ gpio_request(FEC_RST_PAD, "fec1_rst"); -+ gpio_direction_output(FEC_RST_PAD, 0); -+ udelay(500); -+ gpio_direction_output(FEC_RST_PAD, 1); -+} -+ -+/* -+ * setup_mac_address() - set Ethernet MAC address environment. -+ * -+ * @return: 0 on success, -1 on failure -+ */ -+static int setup_mac_address(void) -+{ -+ int ret; -+ unsigned char enetaddr[6]; -+ -+ ret = eth_env_get_enetaddr("ethaddr", enetaddr); -+ if (ret) -+ return 0; -+ -+ ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); -+ if (ret) -+ return ret; -+ -+ ret = is_valid_ethaddr(enetaddr); -+ if (!ret) -+ return -1; -+ -+ ret = eth_env_set_enetaddr("ethaddr", enetaddr); -+ if (ret) -+ return -1; -+ -+ return 0; -+} -+ -+static int setup_fec(void) -+{ -+ struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs -+ = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; -+ -+ setup_iomux_fec(); -+ -+ /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -+ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], -+ IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); -+ return set_clk_enet(ENET_125MHZ); -+} -+ -+int board_phy_config(struct phy_device *phydev) -+{ -+ /* enable rgmii rxc skew and phy mode select to RGMII copper */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -+ -+ if (phydev->drv->config) -+ phydev->drv->config(phydev); -+ return 0; -+} -+#endif -+ -+int board_usb_init(int index, enum usb_init_type init) -+{ -+ debug("board_usb_init %d, type %d\n", index, init); -+ -+ imx8m_usb_power(index, true); -+ -+ return 0; -+} -+ -+int board_usb_cleanup(int index, enum usb_init_type init) -+{ -+ debug("board_usb_cleanup %d, type %d\n", index, init); -+ -+ imx8m_usb_power(index, false); -+ -+ return 0; -+} -+int board_init(void) -+{ -+ -+#ifdef CONFIG_FEC_MXC -+ setup_fec(); -+#endif -+ return 0; -+} -+ -+int board_mmc_get_env_dev(int devno) -+{ -+ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); -+ if (user_env_devno != ULONG_MAX) { -+ printf("User Environment dev# is (%lu)\n", user_env_devno); -+ return (int)user_env_devno; -+ } -+ return devno; -+} -+ -+static int _mmc_get_env_part(void) -+{ -+ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -+ if (user_env_part != ULONG_MAX) { -+ printf("User Environment part# is (%lu)\n", user_env_part); -+ return (int)user_env_part; -+ } -+ return CONFIG_SYS_MMC_ENV_PART; -+} -+ -+uint mmc_get_env_part(struct mmc *mmc) -+{ -+ if (mmc->part_support) -+ return _mmc_get_env_part(); -+ -+ return 0; -+} -+ -+static void board_bootdev_init(void) -+{ -+ u32 bootdev = get_boot_device(); -+ switch (bootdev) { -+ case MMC3_BOOT: -+ bootdev = 2; -+ break; -+ case SD2_BOOT: -+ bootdev = 1; -+ break; -+ default: -+ env_set("bootdev", NULL); -+ return; -+ } -+ env_set_ulong("bootdev", bootdev); -+} -+ -+int board_late_init(void) -+{ -+ int ret; -+ -+#ifdef CONFIG_ENV_IS_IN_MMC -+ board_late_mmc_env_init(); -+ board_bootdev_init(); -+#endif -+ -+ ret = setup_mac_address(); -+ if (ret < 0) -+ printf("%s: Can't set MAC address\n", __func__); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_FSL_FASTBOOT -+#ifdef CONFIG_ANDROID_RECOVERY -+int is_recovery_key_pressing(void) -+{ -+ return 0; /*TODO*/ -+} -+#endif /*CONFIG_ANDROID_RECOVERY*/ -+#endif /*CONFIG_FSL_FASTBOOT*/ -diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile -index 870792441c..50618b9b6d 100644 ---- a/board/compulab/ucm-imx8m-mini/Makefile -+++ b/board/compulab/ucm-imx8m-mini/Makefile -@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ - - ifdef CONFIG_SPL_BUILD - obj-y += spl.o --else -+else - obj-y += ucm-imx8m-mini.o - endif - -diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -index dea292e75c..6cafc259e9 100644 ---- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -+++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -@@ -23,243 +23,8 @@ - #include - #include - #include --#include "../common/eeprom.h" - #include - #include - #include --#include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; -- --#ifdef CONFIG_BOARD_POSTCLK_INIT --int board_postclk_init(void) --{ -- /* TODO */ -- return 0; --} --#endif --int board_phys_sdram_size(phys_size_t *size) --{ -- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; -- -- switch (lpddr4_tcm_desc->size) { -- case 4096: -- case 2048: -- case 1024: -- *size = (1L << 20) * lpddr4_tcm_desc->size; -- break; -- default: -- printf("%s: DRAM size %uM is not supported \n", __func__, -- lpddr4_tcm_desc->size); -- while ( 1 ) {}; -- break; -- }; -- return 0; --} -- /* Get the top of usable RAM */ --ulong board_get_usable_ram_top(ulong total_size) --{ -- -- if(gd->ram_top > 0x100000000) -- gd->ram_top = 0x100000000; -- -- return gd->ram_top; --} -- --int dram_init(void) --{ -- phys_size_t sdram_size; -- int ret; -- ret = board_phys_sdram_size(&sdram_size); -- printf("%s: size %llu\n", __func__, sdram_size); -- if (ret) -- return ret; -- -- /* rom_pointer[1] contains the size of TEE occupies */ -- gd->ram_size = sdram_size - rom_pointer[1]; -- -- return 0; --} -- --#ifdef CONFIG_OF_BOARD_SETUP --int ft_board_setup(void *blob, bd_t *bd) --{ -- return 0; --} --#endif -- --#ifdef CONFIG_FEC_MXC --#define FEC_RST_PAD IMX_GPIO_NR(1, 10) --static iomux_v3_cfg_t const fec1_rst_pads[] = { -- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), --}; -- --static void setup_iomux_fec(void) --{ -- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, -- ARRAY_SIZE(fec1_rst_pads)); -- -- gpio_request(FEC_RST_PAD, "fec1_rst"); -- gpio_direction_output(FEC_RST_PAD, 0); -- udelay(500); -- gpio_direction_output(FEC_RST_PAD, 1); --} -- --/* -- * setup_mac_address() - set Ethernet MAC address environment. -- * -- * @return: 0 on success, -1 on failure -- */ --static int setup_mac_address(void) --{ -- int ret; -- unsigned char enetaddr[6]; -- -- ret = eth_env_get_enetaddr("ethaddr", enetaddr); -- if (ret) -- return 0; -- -- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); -- if (ret) -- return ret; -- -- ret = is_valid_ethaddr(enetaddr); -- if (!ret) -- return -1; -- -- ret = eth_env_set_enetaddr("ethaddr", enetaddr); -- if (ret) -- return -1; -- -- return 0; --} -- --static int setup_fec(void) --{ -- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs -- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; -- -- setup_iomux_fec(); -- -- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ -- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], -- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); -- return set_clk_enet(ENET_125MHZ); --} -- --int board_phy_config(struct phy_device *phydev) --{ -- /* enable rgmii rxc skew and phy mode select to RGMII copper */ -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -- -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -- -- if (phydev->drv->config) -- phydev->drv->config(phydev); -- return 0; --} --#endif -- --int board_usb_init(int index, enum usb_init_type init) --{ -- debug("board_usb_init %d, type %d\n", index, init); -- -- imx8m_usb_power(index, true); -- -- return 0; --} -- --int board_usb_cleanup(int index, enum usb_init_type init) --{ -- debug("board_usb_cleanup %d, type %d\n", index, init); -- -- imx8m_usb_power(index, false); -- -- return 0; --} --int board_init(void) --{ -- --#ifdef CONFIG_FEC_MXC -- setup_fec(); --#endif -- return 0; --} -- --int board_mmc_get_env_dev(int devno) --{ -- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); -- if (user_env_devno != ULONG_MAX) { -- printf("User Environment dev# is (%lu)\n", user_env_devno); -- return (int)user_env_devno; -- } -- return devno; --} -- --static int _mmc_get_env_part(void) --{ -- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); -- if (user_env_part != ULONG_MAX) { -- printf("User Environment part# is (%lu)\n", user_env_part); -- return (int)user_env_part; -- } -- return CONFIG_SYS_MMC_ENV_PART; --} -- --uint mmc_get_env_part(struct mmc *mmc) --{ -- if (mmc->part_support) -- return _mmc_get_env_part(); -- -- return 0; --} -- --int mmc_map_to_kernel_blk(int devno){ -- return devno; --} -- --static void board_bootdev_init(void) --{ -- u32 bootdev = get_boot_device(); -- switch (bootdev) { -- case MMC3_BOOT: -- bootdev = 2; -- break; -- case SD2_BOOT: -- bootdev = 1; -- break; -- default: -- env_set("bootdev", NULL); -- return; -- } -- env_set_ulong("bootdev", bootdev); --} -- --int board_late_init(void) --{ -- int ret; -- --#ifdef CONFIG_ENV_IS_IN_MMC -- board_late_mmc_env_init(); -- board_bootdev_init(); --#endif -- -- ret = setup_mac_address(); -- if (ret < 0) -- printf("%s: Can't set MAC address\n", __func__); -- -- return 0; --} -- --#ifdef CONFIG_FSL_FASTBOOT --#ifdef CONFIG_ANDROID_RECOVERY --int is_recovery_key_pressing(void) --{ -- return 0; /*TODO*/ --} --#endif /*CONFIG_ANDROID_RECOVERY*/ --#endif /*CONFIG_FSL_FASTBOOT*/ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0065-imx8m-mini-Refactor-the-usdhc2.patch b/recipes-bsp/u-boot/compulab/imx8mm/0065-imx8m-mini-Refactor-the-usdhc2.patch deleted file mode 100644 index a5da7df..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0065-imx8m-mini-Refactor-the-usdhc2.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 39db01631c8c1682a85311125ff1f811d84672a1 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 20 Jul 2020 06:08:58 +0300 -Subject: [PATCH 65/91] imx8m-mini: Refactor the usdhc2 - -1) Make it removable. -2) Disable 1V8. -3) Fix the card detect in spl and u-boot. - -Signed-off-by: Valentin Raevsky ---- - arch/arm/dts/cpl-imx8m-mini.dtsi | 5 +++-- - board/compulab/plat/imx8mm/spl/spl.c | 26 ++++---------------------- - 2 files changed, 7 insertions(+), 24 deletions(-) - -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -index 3fe1e7ac5f..4f9c5fbfb9 100644 ---- a/arch/arm/dts/cpl-imx8m-mini.dtsi -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -125,7 +125,7 @@ - - pinctrl_usdhc2_gpio: usdhc2grpgpio { - fsl,pins = < -- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 -+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 - MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 - >; - }; -@@ -426,10 +426,11 @@ - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; -+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - fsl,wp-controller; -- non-removable; - vmmc-supply = <®_usdhc2_vmmc>; -+ no-1-8-v; - status = "okay"; - }; - -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -index 3481bba493..f8894ca631 100644 ---- a/board/compulab/plat/imx8mm/spl/spl.c -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -53,7 +53,7 @@ struct i2c_pads_info i2c_pad_info1 = { - }, - }; - --#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) -+#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 12) - #define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) - - #define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ -@@ -81,20 +81,9 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { - IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), -+ IMX8MM_PAD_SD2_CD_B_GPIO2_IO12 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), - }; - --/* -- * The evk board uses DAT3 to detect CD card plugin, -- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. -- */ --static iomux_v3_cfg_t const usdhc2_cd_pad = -- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); -- --static iomux_v3_cfg_t const usdhc2_dat3_pad = -- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | -- MUX_PAD_CTRL(USDHC_PAD_CTRL); -- -- - static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC2_BASE_ADDR, 0, 4}, - {USDHC3_BASE_ADDR, 0, 8}, -@@ -151,18 +140,11 @@ int board_mmc_getcd(struct mmc *mmc) - ret = 1; - break; - case USDHC2_BASE_ADDR: -- imx_iomux_v3_setup_pad(usdhc2_cd_pad); - gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); - gpio_direction_input(USDHC2_CD_GPIO); -- -- /* -- * Since it is the DAT3 pin, this pin is pulled to -- * low voltage if no card -- */ - ret = gpio_get_value(USDHC2_CD_GPIO); -- -- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); -- return ret; -+ /* CD is active low */ -+ return !ret; - } - - return 1; --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0066-mcm-imx8m-mini-reset-Refactor-the-reset.patch b/recipes-bsp/u-boot/compulab/imx8mm/0066-mcm-imx8m-mini-reset-Refactor-the-reset.patch deleted file mode 100644 index 345f525..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0066-mcm-imx8m-mini-reset-Refactor-the-reset.patch +++ /dev/null @@ -1,46 +0,0 @@ -From afb874167db3333da9572754893db17cc3c223c0 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 20 Jul 2020 06:29:03 +0300 -Subject: [PATCH 66/91] mcm-imx8m-mini: reset: Refactor the reset - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8mm/spl/spl.c | 9 --------- - configs/mcm-imx8m-mini_defconfig | 3 --- - 2 files changed, 12 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -index f8894ca631..0de5a7fe0a 100644 ---- a/board/compulab/plat/imx8mm/spl/spl.c -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -249,12 +249,3 @@ void board_init_f(ulong dummy) - - board_init_r(NULL, 0); - } -- --int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) --{ -- puts ("resetting ...\n"); -- -- reset_cpu(WDOG1_BASE_ADDR); -- -- return 0; --} -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig -index 971e1ec982..e0e4f86329 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/mcm-imx8m-mini_defconfig -@@ -77,10 +77,7 @@ CONFIG_PINCTRL_IMX8M=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_REGULATOR_GPIO=y --CONFIG_DM_RESET=y - CONFIG_MXC_UART=y --CONFIG_SYSRESET=y --CONFIG_SYSRESET_PSCI=y - CONFIG_DM_THERMAL=y - CONFIG_NXP_TMU=y - CONFIG_USB=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-ddr-Change-the-memory-presets-order.patch b/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-ddr-Change-the-memory-presets-order.patch deleted file mode 100644 index 210eb07..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-ddr-Change-the-memory-presets-order.patch +++ /dev/null @@ -1,36 +0,0 @@ -From d1ec5c76b093eef38a5a4aab8a39657e140f7c98 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 20 Jul 2020 13:01:28 +0300 -Subject: [PATCH 67/91] imx8m-mini: ddr: Change the memory presets order - -Make the simplest one 1-st. -Nanya 1G has the best ddr-phy settings for reading the mr4-mr8 registers. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8mm/ddr/ddr.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 137a0b9f32..b689a54df1 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -62,11 +62,11 @@ struct lpddr4_desc { - - #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') - static const struct lpddr4_desc lpddr4_array[] = { -- { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, //Only the first timing entry is in use -- { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, -- { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, //Only the first timing entry is in use - { .name = "Nanya", .id = 0x05000010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -- { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, -+ { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, -+ { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, - }; - - static unsigned int lpddr4_get_mr(void) --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0068-imx8m-mini-env-Fix-getopt_long-parameters-string.patch b/recipes-bsp/u-boot/compulab/imx8mm/0068-imx8m-mini-env-Fix-getopt_long-parameters-string.patch deleted file mode 100644 index 44e22c8..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0068-imx8m-mini-env-Fix-getopt_long-parameters-string.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 92b81b74fb123779bb70980fc43794f43fd292db Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 20 Jul 2020 14:00:31 +0300 -Subject: [PATCH 68/91] imx8m-mini: env: Fix getopt_long() parameters' string - -Signed-off-by: Valentin Raevsky ---- - tools/env/fw_env_main.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c -index ebd18b40ba..ca9ad78014 100644 ---- a/tools/env/fw_env_main.c -+++ b/tools/env/fw_env_main.c -@@ -122,7 +122,7 @@ static void parse_common_args(int argc, char *argv[]) - env_opts.config_file = CONFIG_FILE; - #endif - -- while ((c = getopt_long(argc, argv, ":a:c:l:h:v:e", long_options, NULL)) != -+ while ((c = getopt_long(argc, argv, ":a:c:l:h:ve", long_options, NULL)) != - EOF) { - switch (c) { - #ifdef CONFIG_FILE --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0069-ucm-imx8m-mini-Fix-reset.patch b/recipes-bsp/u-boot/compulab/imx8mm/0069-ucm-imx8m-mini-Fix-reset.patch deleted file mode 100644 index a29bd67..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0069-ucm-imx8m-mini-Fix-reset.patch +++ /dev/null @@ -1,28 +0,0 @@ -From f7df4f4268aa42a0c3bdce39a9e57db5c912696c Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 22 Jul 2020 22:26:54 +0300 -Subject: [PATCH 69/91] ucm-imx8m-mini: Fix reset - -Signed-off-by: Kirill Kapranov ---- - configs/ucm-imx8m-mini_defconfig | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index f86cc9e942..2a9b39fc29 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -78,10 +78,7 @@ CONFIG_PINCTRL_IMX8M=y - CONFIG_DM_REGULATOR=y - CONFIG_DM_REGULATOR_FIXED=y - CONFIG_DM_REGULATOR_GPIO=y --CONFIG_DM_RESET=y - CONFIG_MXC_UART=y --CONFIG_SYSRESET=y --CONFIG_SYSRESET_PSCI=y - CONFIG_DM_THERMAL=y - CONFIG_NXP_TMU=y - CONFIG_USB=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0070-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch b/recipes-bsp/u-boot/compulab/imx8mm/0070-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch deleted file mode 100644 index 0944105..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0070-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 326d0482abf56be801469f682a4ee0a03b592831 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 5 Aug 2020 00:20:44 +0300 -Subject: [PATCH 70/91] imx8m-mini: spl: Add __weak - board_fit_config_name_match() - -Add __weak board_fit_config_name_match(). -Each board can redefind this function in its spl.c file. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8mm/spl/spl.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -index 0de5a7fe0a..325d6b6a5f 100644 ---- a/board/compulab/plat/imx8mm/spl/spl.c -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -210,7 +210,7 @@ void spl_board_init(void) - } - - #ifdef CONFIG_SPL_LOAD_FIT --int board_fit_config_name_match(const char *name) -+__weak int board_fit_config_name_match(const char *name) - { - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0071-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch b/recipes-bsp/u-boot/compulab/imx8mm/0071-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch deleted file mode 100644 index 96f62d9..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0071-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 2596e2d1efdbf7f42c02c31ab922ac2857c0c2ed Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 5 Aug 2020 00:22:29 +0300 -Subject: [PATCH 71/91] mcm-imx8m-mini: spl: Add board_fit_config_name_match() - -Signed-off-by: Valentin Raevsky ---- - board/compulab/mcm-imx8m-mini/spl.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c -index d6ece8ef3e..1a208e09a4 100644 ---- a/board/compulab/mcm-imx8m-mini/spl.c -+++ b/board/compulab/mcm-imx8m-mini/spl.c -@@ -7,3 +7,13 @@ - int spl_board_private_init(void) { - return 0; - } -+ -+#ifdef CONFIG_SPL_LOAD_FIT -+int board_fit_config_name_match(const char *name) -+{ -+ /* Just empty function now - can't decide what to choose */ -+ debug("%s: %s\n", __func__, name); -+ -+ return 0; -+} -+#endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0072-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch b/recipes-bsp/u-boot/compulab/imx8mm/0072-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch deleted file mode 100644 index 10381c3..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0072-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch +++ /dev/null @@ -1,51 +0,0 @@ -From a8859f3f71ce2469faf6b9179dd7e362bf527c16 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 5 Aug 2020 00:25:22 +0300 -Subject: [PATCH 72/91] imx8m-mini: u-boot: Add __weak - uboot_board_private_init() - -Add a __weak uboot_board_private_init(). -Each board can redefind this function in its board.c file. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8mm/board/board.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index cf0b8eb0ff..a753042d91 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -181,12 +182,21 @@ int board_usb_cleanup(int index, enum usb_init_type init) - - return 0; - } -+ -+__weak int uboot_board_private_init(void) { -+ return 0; -+} -+ - int board_init(void) - { - - #ifdef CONFIG_FEC_MXC - setup_fec(); - #endif -+ if (uboot_board_private_init()) { -+ printf("uboot_board_private_init() failed\n"); -+ hang(); -+ } - return 0; - } - --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0073-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch b/recipes-bsp/u-boot/compulab/imx8mm/0073-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch deleted file mode 100644 index 6639e4b..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0073-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch +++ /dev/null @@ -1,25 +0,0 @@ -From a94b324b1fa58e0d3cb2e6906c39ea0646ff96e9 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 5 Aug 2020 00:26:12 +0300 -Subject: [PATCH 73/91] mcm-imx8m-mini: u-boot: Add uboot_board_private_init() - -Signed-off-by: Valentin Raevsky ---- - board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -index 6cafc259e9..bd863f154f 100644 ---- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -+++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c -@@ -28,3 +28,7 @@ - #include - - DECLARE_GLOBAL_DATA_PTR; -+ -+int uboot_board_private_init(void) { -+ return 0; -+} --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0074-Add-ddr_init-return-handling.patch b/recipes-bsp/u-boot/compulab/imx8mm/0074-Add-ddr_init-return-handling.patch deleted file mode 100644 index b0851e4..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0074-Add-ddr_init-return-handling.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 5de15446e8cc33508bd34fec4fe672f6367245b4 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 19 Aug 2020 18:45:55 +0300 -Subject: [PATCH 74/91] Add ddr_init return handling - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/ddr/ddr.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index b689a54df1..1bfab80336 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -151,7 +151,10 @@ void spl_dram_init(void) - printf("DDRINFO(%s): %s %dG @ %d MHz\n", (ddr_found ? "D" : "?" ), lpddr4_array[i].name, - lpddr4_array[i].size, lpddr4_array[i].timing->fsp_table[0]); - -- ddr_init(lpddr4_array[i].timing); -+ if (ddr_init(lpddr4_array[i].timing)) { -+ SPL_TCM_INIT; -+ do_reset(NULL,0,0,NULL); -+ } - - ddr_info_mrr = lpddr4_get_mr(); - if (ddr_info_mrr == 0xFFFFFFFF ) { --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0075-spl-Enable-Kingston-DRAM-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0075-spl-Enable-Kingston-DRAM-support.patch deleted file mode 100644 index ef7a300..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0075-spl-Enable-Kingston-DRAM-support.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 32108619903675926a4b9f5269d1ff9c5f64a5db Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 18 Aug 2020 19:10:19 +0300 -Subject: [PATCH 75/91] spl: Enable Kingston DRAM support - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8/eeprom/eeprom_spl.c | 21 +++++++++++++++ - board/compulab/plat/imx8mm/ddr/ddr.c | 27 +++++++++++++++----- - 2 files changed, 41 insertions(+), 7 deletions(-) - -diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -index 5f49a17ed8..ece6b38101 100644 ---- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c -+++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -@@ -78,6 +78,10 @@ static int cl_eeprom_write(uint offset, uchar *buf, int len) - #define BOARD_DDRINFO_SIZE 4 - static u32 board_ddrinfo = 0xdeadbeef; - -+#define BOARD_DDRSUBIND_OFFSET 0x44 -+#define BOARD_DDRSUBIND_SIZE 1 -+static u8 board_ddrsubind = 0xff; -+ - #define BOARD_DRATE_OFFSET 0x50 - #define BOARD_DRATE_SIZE 4 - static u32 board_drate = 0xdeadbeef; -@@ -128,6 +132,23 @@ u32 cl_eeprom_set_drate(u32 drate, unsigned int r, unsigned int c) - return board_drate; - }; - -+u8 cl_eeprom_get_subind(void) -+{ -+ if (cl_eeprom_read(BOARD_DDRSUBIND_OFFSET, (uchar *)&board_ddrsubind, BOARD_DDRSUBIND_SIZE)) -+ return 0xff; -+ -+ return board_ddrsubind; -+}; -+ -+u8 cl_eeprom_set_subind(u8 ddrsubind) -+{ -+ if (cl_eeprom_write(BOARD_DDRSUBIND_OFFSET, (uchar *)&ddrsubind, BOARD_DDRSUBIND_SIZE)) -+ return 0xff; -+ board_ddrsubind = ddrsubind; -+ -+ return board_ddrsubind; -+}; -+ - /* override-size ifaces */ - u32 cl_eeprom_get_osize(void) - { -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 1bfab80336..cf47c758b4 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -18,6 +18,8 @@ - /* Forward declarations */ - u32 cl_eeprom_get_ddrinfo(void); - u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); -+u32 cl_eeprom_get_subind(void); -+u32 cl_eeprom_set_subind(u32 subind); - - u32 cl_eeprom_get_osize(void); - -@@ -56,17 +58,24 @@ struct lpddr4_desc { - * use it if default is not the - * 1-st array entry */ - unsigned int _default; -+ /* An optional field to distiguish DRAM chips that -+ * have different geometry, though return the same MRR. -+ * Default value 0xff -+ */ -+ u8 subind; - struct dram_timing_info *timing; - char *desc[4]; - }; - - #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') - static const struct lpddr4_desc lpddr4_array[] = { -- { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, //Only the first timing entry is in use -- { .name = "Nanya", .id = 0x05000010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -- { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -- { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, -- { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, -+ { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, -+ { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, -+ { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, -+ { .name = "Micron", .id = 0xff000110, .subind = 0xff, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, - }; - - static unsigned int lpddr4_get_mr(void) -@@ -121,7 +130,8 @@ void spl_dram_init(void) - /* get ddr type from the eeprom if not in tcm scan mode */ - ddr_info = cl_eeprom_get_ddrinfo(); - for ( i = 0; i < ARRAY_SIZE(lpddr4_array); i++ ) { -- if (lpddr4_array[i].id == ddr_info) { -+ if (lpddr4_array[i].id == ddr_info && -+ lpddr4_array[i].subind == cl_eeprom_get_subind()) { - ddr_found = 1; - break; - } -@@ -176,10 +186,13 @@ void spl_dram_init(void) - if (ddr_found == 0) { - /* Update eeprom */ - cl_eeprom_set_ddrinfo(ddr_info_mrr); -+ mdelay(10); - ddr_info = cl_eeprom_get_ddrinfo(); -+ mdelay(10); -+ cl_eeprom_set_subind(lpddr4_array[i].subind); - /* make sure that the ddr_info has reached the eeprom */ - printf("DDRINFO(E): mr5-8 [ 0x%x ], read back\n", ddr_info); -- if (ddr_info_mrr != ddr_info) { -+ if (ddr_info_mrr != ddr_info || cl_eeprom_get_subind() != lpddr4_array[i].subind) { - printf("DDRINFO(EEPROM): make sure that the eeprom is accessible\n"); - printf("DDRINFO(EEPROM): i2c dev 1; i2c md 0x51 0x40 0x50\n"); - } --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0076-Add-show_suite-function.patch b/recipes-bsp/u-boot/compulab/imx8mm/0076-Add-show_suite-function.patch deleted file mode 100644 index 79320d0..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0076-Add-show_suite-function.patch +++ /dev/null @@ -1,276 +0,0 @@ -From 3b02cb5cedc1ecaf1447f77faca970847e1f3388 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sat, 29 Aug 2020 22:14:48 +0300 -Subject: [PATCH 76/91] Add show_suite function - -The function shows product names of UCM and SB on boot. - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/cpl-imx8m-mini.dtsi | 2 +- - board/compulab/common/eeprom.c | 88 ++++++++++++++++++------ - board/compulab/common/eeprom.h | 1 + - board/compulab/plat/imx8mm/board/board.c | 17 +++++ - 4 files changed, 87 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -index 4f9c5fbfb9..a587c3dda0 100644 ---- a/arch/arm/dts/cpl-imx8m-mini.dtsi -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -226,7 +226,7 @@ - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; -- status = "disabled"; -+ status = "okay"; - - }; - -diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c -index defd9b6446..46363c0707 100644 ---- a/board/compulab/common/eeprom.c -+++ b/board/compulab/common/eeprom.c -@@ -7,6 +7,7 @@ - * SPDX-License-Identifier: GPL-2.0+ - */ - -+#include - #include - #include - #include -@@ -22,8 +23,16 @@ - # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - #endif - -+#ifndef CONFIG_SYS_I2C_EEPROM_ADDR_SB -+# define CONFIG_SYS_I2C_EEPROM_ADDR_SB 0x54 -+#endif -+ - #ifndef CONFIG_SYS_I2C_EEPROM_BUS --#define CONFIG_SYS_I2C_EEPROM_BUS 0 -+# define CONFIG_SYS_I2C_EEPROM_BUS 1 -+#endif -+ -+#ifndef CONFIG_SYS_I2C_EEPROM_BUS_SB -+# define CONFIG_SYS_I2C_EEPROM_BUS_SB 0 - #endif - - #define EEPROM_LAYOUT_VER_OFFSET 44 -@@ -40,31 +49,43 @@ - #define LAYOUT_INVALID 0 - #define LAYOUT_LEGACY 0xff - --static int cl_eeprom_bus; - static int cl_eeprom_layout; /* Implicitly LAYOUT_INVALID */ - --static struct udevice *g_dev = NULL; -+struct eeprom_path { -+ int bus; -+ uint8_t chip; -+}; - --static int cpl_eeprom_init(void) { -+static const struct eeprom_path eeprom_som = { -+ CONFIG_SYS_I2C_EEPROM_BUS, -+ CONFIG_SYS_I2C_EEPROM_ADDR -+}; -+static const struct eeprom_path eeprom_sb = { -+ CONFIG_SYS_I2C_EEPROM_BUS_SB, -+ CONFIG_SYS_I2C_EEPROM_ADDR_SB -+}; -+ -+static const struct eeprom_path *working_eeprom; - -- int i2c_bus = CONFIG_SYS_I2C_EEPROM_BUS; -- uint8_t chip = CONFIG_SYS_I2C_EEPROM_ADDR; -+static struct udevice *g_dev = NULL; -+ -+static int cpl_eeprom_init(void) { - - struct udevice *bus, *dev; - int ret; - - if (!g_dev) { - -- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); -+ ret = uclass_get_device_by_seq(UCLASS_I2C, working_eeprom->bus, &bus); - if (ret) { -- printf("%s: No bus %d\n", __func__, i2c_bus); -+ printf("%s: No bus %d\n", __func__, working_eeprom->bus); - return ret; - } - -- ret = dm_i2c_probe(bus, chip, 0, &dev); -+ ret = dm_i2c_probe(bus, working_eeprom->chip, 0, &dev); - if (ret) { - printf("%s: Can't find device id=0x%x, on bus %d\n", -- __func__, chip, i2c_bus); -+ __func__, working_eeprom->chip, working_eeprom->bus); - return ret; - } - -@@ -88,7 +109,7 @@ static int cl_eeprom_read(uint offset, uchar *buf, int len) - return res; - } - --static int cl_eeprom_setup(uint eeprom_bus) -+static int cl_eeprom_setup(const struct eeprom_path *eeprom) - { - int res; - -@@ -96,10 +117,11 @@ static int cl_eeprom_setup(uint eeprom_bus) - * We know the setup was already done when the layout is set to a valid - * value and we're using the same bus as before. - */ -- if (cl_eeprom_layout != LAYOUT_INVALID && eeprom_bus == cl_eeprom_bus) -+ if (cl_eeprom_layout != LAYOUT_INVALID && eeprom == working_eeprom) - return 0; - -- cl_eeprom_bus = eeprom_bus; -+ working_eeprom = eeprom; -+ g_dev = NULL; - res = cl_eeprom_read(EEPROM_LAYOUT_VER_OFFSET, - (uchar *)&cl_eeprom_layout, 1); - if (res) { -@@ -120,7 +142,7 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) - - memset(serialnr, 0, sizeof(*serialnr)); - -- if (cl_eeprom_setup(CONFIG_SYS_I2C_EEPROM_BUS)) -+ if (cl_eeprom_setup(&eeprom_som)) - return; - - offset = (cl_eeprom_layout != LAYOUT_LEGACY) ? -@@ -139,12 +161,12 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) - * Routine: cl_eeprom_read_mac_addr - * Description: read mac address and store it in buf. - */ --int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) -+int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus __attribute__((unused))) - { - uint offset; - int err; - -- err = cl_eeprom_setup(eeprom_bus); -+ err = cl_eeprom_setup(&eeprom_som); - if (err) - return err; - -@@ -160,7 +182,7 @@ static u32 board_rev; - * Routine: cl_eeprom_get_board_rev - * Description: read system revision from eeprom - */ --u32 cl_eeprom_get_board_rev(uint eeprom_bus) -+u32 cl_eeprom_get_board_rev(uint eeprom_bus __attribute__((unused))) - { - char str[5]; /* Legacy representation can contain at most 4 digits */ - uint offset = BOARD_REV_OFFSET_LEGACY; -@@ -168,7 +190,7 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus) - if (board_rev) - return board_rev; - -- if (cl_eeprom_setup(eeprom_bus)) -+ if (cl_eeprom_setup(&eeprom_som)) - return 0; - - if (cl_eeprom_layout != LAYOUT_LEGACY) -@@ -198,14 +220,14 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus) - * - * @return: 0 on success, < 0 on failure - */ --int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) -+int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus __attribute__((unused))) - { - int err; - - if (buf == NULL) - return -EINVAL; - -- err = cl_eeprom_setup(eeprom_bus); -+ err = cl_eeprom_setup(&eeprom_som); - if (err) - return err; - -@@ -216,6 +238,32 @@ int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) - return err; - } - -+static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) -+{ -+ int len; -+ int err; -+ uchar tmp[PRODUCT_NAME_SIZE]; -+ -+ err = cl_eeprom_setup(eeprom); -+ if (err) -+ printf("%s: Error accesing i2c %x@%x\n", __func__, eeprom->bus, eeprom->chip); -+ else -+ err = cl_eeprom_read(PRODUCT_NAME_OFFSET, tmp, PRODUCT_NAME_SIZE); -+ -+ if (!err && tmp[0] != 0xff) // Check if the flash isn't written -+ len = snprintf(buf, PRODUCT_NAME_SIZE, (char*)tmp); -+ else -+ len = snprintf(buf, PRODUCT_NAME_SIZE, "unknown"); -+ -+ return len; -+} -+void cl_eeprom_get_suite(char *buf) -+{ -+ buf += cl_eeprom_read_product_name(buf, &eeprom_som); -+ buf += sprintf(buf, " @ "); -+ buf += cl_eeprom_read_product_name(buf, &eeprom_sb); -+} -+ - #ifdef CONFIG_CMD_EEPROM_LAYOUT - /** - * eeprom_field_print_bin_ver() - print a "version field" which contains binary -diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h -index 09804ee146..d366f59288 100644 ---- a/board/compulab/common/eeprom.h -+++ b/board/compulab/common/eeprom.h -@@ -15,6 +15,7 @@ - int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); - u32 cl_eeprom_get_board_rev(uint eeprom_bus); - int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); -+void cl_eeprom_get_suite(char* buf); - #else - static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) - { -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index a753042d91..580322d7a7 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -187,6 +187,22 @@ __weak int uboot_board_private_init(void) { - return 0; - } - -+static void show_suite_info(void) -+{ -+ char *buf = malloc(200); //More than necessary -+ -+ if(!buf) { -+ printf("%s: Not enough memory\n", __func__); -+ return; -+ } -+ -+ cl_eeprom_get_suite(buf); -+ printf("Suite:\t%s\n", buf); -+ -+ free(buf); -+ return; -+} -+ - int board_init(void) - { - -@@ -197,6 +213,7 @@ int board_init(void) - printf("uboot_board_private_init() failed\n"); - hang(); - } -+ show_suite_info(); - return 0; - } - --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0077-Clean-debug-printout.patch b/recipes-bsp/u-boot/compulab/imx8mm/0077-Clean-debug-printout.patch deleted file mode 100644 index fb6bbfa..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0077-Clean-debug-printout.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 9307ea40a6c483479f735111703333c301863265 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sat, 29 Aug 2020 22:37:39 +0300 -Subject: [PATCH 77/91] Clean debug printout - -Signed-off-by: Kirill Kapranov ---- - board/compulab/common/eeprom.c | 2 +- - board/compulab/plat/imx8mm/board/board.c | 1 - - 2 files changed, 1 insertion(+), 2 deletions(-) - -diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c -index 46363c0707..ebcafac04b 100644 ---- a/board/compulab/common/eeprom.c -+++ b/board/compulab/common/eeprom.c -@@ -260,7 +260,7 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr - void cl_eeprom_get_suite(char *buf) - { - buf += cl_eeprom_read_product_name(buf, &eeprom_som); -- buf += sprintf(buf, " @ "); -+ buf += sprintf(buf, " on "); - buf += cl_eeprom_read_product_name(buf, &eeprom_sb); - } - -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 580322d7a7..3cf689e2d6 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -72,7 +72,6 @@ int dram_init(void) - phys_size_t sdram_size; - int ret; - ret = board_phys_sdram_size(&sdram_size); -- printf("%s: size %llu\n", __func__, sdram_size); - if (ret) - return ret; - --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0078-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0078-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch deleted file mode 100644 index f4a398c..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0078-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch +++ /dev/null @@ -1,1914 +0,0 @@ -From 768da5b092f0b1b990b0d10c2f135fe0fde45454 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Sun, 30 Aug 2020 10:44:03 +0300 -Subject: [PATCH 78/91] imx8m: ddr: Add Nanya 2G 2400 MTS support - -Add Nanya 2G 2400 MTS support. -Addresses the dram issue discovered on this dram configuration. - -Signed-off-by: Valentin Raevsky ---- - board/compulab/plat/imx8mm/ddr/Makefile | 3 + - board/compulab/plat/imx8mm/ddr/ddr.c | 4 + - board/compulab/plat/imx8mm/ddr/ddr.h | 1 + - .../plat/imx8mm/ddr/lpddr4_timing_05000010.c | 1849 +++++++++++++++++ - 4 files changed, 1857 insertions(+) - create mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c - -diff --git a/board/compulab/plat/imx8mm/ddr/Makefile b/board/compulab/plat/imx8mm/ddr/Makefile -index bf8a968277..be4a6abd7a 100644 ---- a/board/compulab/plat/imx8mm/ddr/Makefile -+++ b/board/compulab/plat/imx8mm/ddr/Makefile -@@ -3,3 +3,6 @@ obj-y += lpddr4_timing_ff020008.o - obj-y += lpddr4_timing_ff000110.o - obj-y += lpddr4_timing_01061010.o - obj-y += lpddr4_timing_01050008.o -+ifndef CONFIG_TARGET_MCM_IMX8M_MINI -+obj-y += lpddr4_timing_05000010.o -+endif -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index cf47c758b4..bea5f7c3dc 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -69,7 +69,11 @@ struct lpddr4_desc { - - #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') - static const struct lpddr4_desc lpddr4_array[] = { -+#ifdef CONFIG_TARGET_MCM_IMX8M_MINI - { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+#else -+ { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_05000010}, -+#endif - { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.h b/board/compulab/plat/imx8mm/ddr/ddr.h -index 4d2a238439..4901e826a8 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.h -+++ b/board/compulab/plat/imx8mm/ddr/ddr.h -@@ -11,6 +11,7 @@ extern struct dram_timing_info ucm_dram_timing_ff020008; - extern struct dram_timing_info ucm_dram_timing_ff000110; - extern struct dram_timing_info ucm_dram_timing_01061010; - extern struct dram_timing_info ucm_dram_timing_01050008; -+extern struct dram_timing_info ucm_dram_timing_05000010; - - void spl_dram_init(void); - -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c -new file mode 100644 -index 0000000000..5b091de47b ---- /dev/null -+++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c -@@ -0,0 +1,1849 @@ -+/* -+ * Copyright 2018 NXP -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ * -+ * Generated code from MX8M_DDR_tool -+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga -+ */ -+ -+#include -+#include -+ -+static struct dram_cfg_param ddr_ddrc_cfg[] = { -+ /** Initialize DDRC registers **/ -+ {0x3d400304,0x1}, -+ {0x3d400030,0x1}, -+ {0x3d400000,0xa1080020}, -+ {0x3d400020,0x223}, -+ {0x3d400024,0x2ee00}, -+ {0x3d400064,0x4900a8}, -+ {0x3d4000d0,0xc0030495}, -+ {0x3d4000d4,0x770000}, -+ {0x3d4000dc,0xc40024}, -+ {0x3d4000e0,0x310000}, -+ {0x3d4000e8,0x66004d}, -+ {0x3d4000ec,0x16004d}, -+ {0x3d400100,0x1618141a}, -+ {0x3d400104,0x504a6}, -+ {0x3d40010c,0x909000}, -+ {0x3d400110,0xb04060b}, -+ {0x3d400114,0x2030909}, -+ {0x3d400118,0x1010006}, -+ {0x3d40011c,0x301}, -+ {0x3d400130,0x20500}, -+ {0x3d400134,0xb100002}, -+ {0x3d400138,0xad}, -+ {0x3d400144,0x78003c}, -+ {0x3d400180,0x2580012}, -+ {0x3d400184,0x1e0493e}, -+ {0x3d400188,0x0}, -+ {0x3d400190,0x4938208}, -+ {0x3d400194,0x80303}, -+ {0x3d4001b4,0x1308}, -+ {0x3d4001a0,0xe0400018}, -+ {0x3d4001a4,0xdf00e4}, -+ {0x3d4001a8,0x80000000}, -+ {0x3d4001b0,0x11}, -+ {0x3d4001c0,0x1}, -+ {0x3d4001c4,0x0}, -+ {0x3d4000f4,0xc99}, -+ {0x3d400108,0x60c1514}, -+ {0x3d400200,0x1f}, -+ {0x3d40020c,0x0}, -+ {0x3d400210,0x1f1f}, -+ {0x3d400204,0x80808}, -+ {0x3d400214,0x7070707}, -+ {0x3d400218,0x7070707}, -+ {0x3d400250,0x29001701}, -+ {0x3d400254,0x2c}, -+ {0x3d40025c,0x4000030}, -+ {0x3d400264,0x900093e7}, -+ {0x3d40026c,0x2005574}, -+ {0x3d400400,0x111}, -+ {0x3d400408,0x72ff}, -+ {0x3d400494,0x2100e07}, -+ {0x3d400498,0x620096}, -+ {0x3d40049c,0x1100e07}, -+ {0x3d4004a0,0xc8012c}, -+ {0x3d402020,0x21}, -+ {0x3d402024,0x7d00}, -+ {0x3d402050,0x20d040}, -+ {0x3d402064,0xc001c}, -+ {0x3d4020dc,0x840000}, -+ {0x3d4020e0,0x310000}, -+ {0x3d4020e8,0x66004d}, -+ {0x3d4020ec,0x16004d}, -+ {0x3d402100,0xa040305}, -+ {0x3d402104,0x30407}, -+ {0x3d402108,0x203060b}, -+ {0x3d40210c,0x505000}, -+ {0x3d402110,0x2040202}, -+ {0x3d402114,0x2030202}, -+ {0x3d402118,0x1010004}, -+ {0x3d40211c,0x301}, -+ {0x3d402130,0x20300}, -+ {0x3d402134,0xa100002}, -+ {0x3d402138,0x1d}, -+ {0x3d402144,0x14000a}, -+ {0x3d402180,0x640004}, -+ {0x3d402190,0x3818200}, -+ {0x3d402194,0x80303}, -+ {0x3d4021b4,0x100}, -+ {0x3d403020,0x21}, -+ {0x3d403024,0x1f40}, -+ {0x3d403050,0x20d040}, -+ {0x3d403064,0x30007}, -+ {0x3d4030dc,0x840000}, -+ {0x3d4030e0,0x310000}, -+ {0x3d4030e8,0x66004d}, -+ {0x3d4030ec,0x16004d}, -+ {0x3d403100,0xa010102}, -+ {0x3d403104,0x30404}, -+ {0x3d403108,0x203060b}, -+ {0x3d40310c,0x505000}, -+ {0x3d403110,0x2040202}, -+ {0x3d403114,0x2030202}, -+ {0x3d403118,0x1010004}, -+ {0x3d40311c,0x301}, -+ {0x3d403130,0x20300}, -+ {0x3d403134,0xa100002}, -+ {0x3d403138,0x8}, -+ {0x3d403144,0x50003}, -+ {0x3d403180,0x190004}, -+ {0x3d403190,0x3818200}, -+ {0x3d403194,0x80303}, -+ {0x3d4031b4,0x100}, -+ {0x3d400028,0x0}, -+}; -+ -+/* PHY Initialize Configuration */ -+static struct dram_cfg_param ddr_ddrphy_cfg[] = { -+ {0x100a0,0x0}, -+ {0x100a1,0x1}, -+ {0x100a2,0x2}, -+ {0x100a3,0x3}, -+ {0x100a4,0x4}, -+ {0x100a5,0x5}, -+ {0x100a6,0x6}, -+ {0x100a7,0x7}, -+ {0x110a0,0x0}, -+ {0x110a1,0x1}, -+ {0x110a2,0x3}, -+ {0x110a3,0x4}, -+ {0x110a4,0x5}, -+ {0x110a5,0x2}, -+ {0x110a6,0x7}, -+ {0x110a7,0x6}, -+ {0x120a0,0x0}, -+ {0x120a1,0x1}, -+ {0x120a2,0x3}, -+ {0x120a3,0x2}, -+ {0x120a4,0x5}, -+ {0x120a5,0x4}, -+ {0x120a6,0x7}, -+ {0x120a7,0x6}, -+ {0x130a0,0x0}, -+ {0x130a1,0x1}, -+ {0x130a2,0x2}, -+ {0x130a3,0x3}, -+ {0x130a4,0x4}, -+ {0x130a5,0x5}, -+ {0x130a6,0x6}, -+ {0x130a7,0x7}, -+ {0x1005f,0x1ff}, -+ {0x1015f,0x1ff}, -+ {0x1105f,0x1ff}, -+ {0x1115f,0x1ff}, -+ {0x1205f,0x1ff}, -+ {0x1215f,0x1ff}, -+ {0x1305f,0x1ff}, -+ {0x1315f,0x1ff}, -+ {0x11005f,0x1ff}, -+ {0x11015f,0x1ff}, -+ {0x11105f,0x1ff}, -+ {0x11115f,0x1ff}, -+ {0x11205f,0x1ff}, -+ {0x11215f,0x1ff}, -+ {0x11305f,0x1ff}, -+ {0x11315f,0x1ff}, -+ {0x21005f,0x1ff}, -+ {0x21015f,0x1ff}, -+ {0x21105f,0x1ff}, -+ {0x21115f,0x1ff}, -+ {0x21205f,0x1ff}, -+ {0x21215f,0x1ff}, -+ {0x21305f,0x1ff}, -+ {0x21315f,0x1ff}, -+ {0x55,0x1ff}, -+ {0x1055,0x1ff}, -+ {0x2055,0x1ff}, -+ {0x3055,0x1ff}, -+ {0x4055,0x1ff}, -+ {0x5055,0x1ff}, -+ {0x6055,0x1ff}, -+ {0x7055,0x1ff}, -+ {0x8055,0x1ff}, -+ {0x9055,0x1ff}, -+ {0x200c5,0xa}, -+ {0x1200c5,0x7}, -+ {0x2200c5,0x7}, -+ {0x2002e,0x2}, -+ {0x12002e,0x2}, -+ {0x22002e,0x2}, -+ {0x90204,0x0}, -+ {0x190204,0x0}, -+ {0x290204,0x0}, -+ {0x20024,0x1ab}, -+ {0x2003a,0x0}, -+ {0x120024,0x1ab}, -+ {0x2003a,0x0}, -+ {0x220024,0x1ab}, -+ {0x2003a,0x0}, -+ {0x20056,0x2}, -+ {0x120056,0xa}, -+ {0x220056,0xa}, -+ {0x1004d,0xe00}, -+ {0x1014d,0xe00}, -+ {0x1104d,0xe00}, -+ {0x1114d,0xe00}, -+ {0x1204d,0xe00}, -+ {0x1214d,0xe00}, -+ {0x1304d,0xe00}, -+ {0x1314d,0xe00}, -+ {0x11004d,0xe00}, -+ {0x11014d,0xe00}, -+ {0x11104d,0xe00}, -+ {0x11114d,0xe00}, -+ {0x11204d,0xe00}, -+ {0x11214d,0xe00}, -+ {0x11304d,0xe00}, -+ {0x11314d,0xe00}, -+ {0x21004d,0xe00}, -+ {0x21014d,0xe00}, -+ {0x21104d,0xe00}, -+ {0x21114d,0xe00}, -+ {0x21204d,0xe00}, -+ {0x21214d,0xe00}, -+ {0x21304d,0xe00}, -+ {0x21314d,0xe00}, -+ {0x10049,0xeba}, -+ {0x10149,0xeba}, -+ {0x11049,0xeba}, -+ {0x11149,0xeba}, -+ {0x12049,0xeba}, -+ {0x12149,0xeba}, -+ {0x13049,0xeba}, -+ {0x13149,0xeba}, -+ {0x110049,0xeba}, -+ {0x110149,0xeba}, -+ {0x111049,0xeba}, -+ {0x111149,0xeba}, -+ {0x112049,0xeba}, -+ {0x112149,0xeba}, -+ {0x113049,0xeba}, -+ {0x113149,0xeba}, -+ {0x210049,0xeba}, -+ {0x210149,0xeba}, -+ {0x211049,0xeba}, -+ {0x211149,0xeba}, -+ {0x212049,0xeba}, -+ {0x212149,0xeba}, -+ {0x213049,0xeba}, -+ {0x213149,0xeba}, -+ {0x43,0x63}, -+ {0x1043,0x63}, -+ {0x2043,0x63}, -+ {0x3043,0x63}, -+ {0x4043,0x63}, -+ {0x5043,0x63}, -+ {0x6043,0x63}, -+ {0x7043,0x63}, -+ {0x8043,0x63}, -+ {0x9043,0x63}, -+ {0x20018,0x3}, -+ {0x20075,0x4}, -+ {0x20050,0x0}, -+ {0x20008,0x258}, -+ {0x120008,0x64}, -+ {0x220008,0x19}, -+ {0x20088,0x9}, -+ {0x200b2,0xdc}, -+ {0x10043,0x5a1}, -+ {0x10143,0x5a1}, -+ {0x11043,0x5a1}, -+ {0x11143,0x5a1}, -+ {0x12043,0x5a1}, -+ {0x12143,0x5a1}, -+ {0x13043,0x5a1}, -+ {0x13143,0x5a1}, -+ {0x1200b2,0xdc}, -+ {0x110043,0x5a1}, -+ {0x110143,0x5a1}, -+ {0x111043,0x5a1}, -+ {0x111143,0x5a1}, -+ {0x112043,0x5a1}, -+ {0x112143,0x5a1}, -+ {0x113043,0x5a1}, -+ {0x113143,0x5a1}, -+ {0x2200b2,0xdc}, -+ {0x210043,0x5a1}, -+ {0x210143,0x5a1}, -+ {0x211043,0x5a1}, -+ {0x211143,0x5a1}, -+ {0x212043,0x5a1}, -+ {0x212143,0x5a1}, -+ {0x213043,0x5a1}, -+ {0x213143,0x5a1}, -+ {0x200fa,0x1}, -+ {0x1200fa,0x1}, -+ {0x2200fa,0x1}, -+ {0x20019,0x1}, -+ {0x120019,0x1}, -+ {0x220019,0x1}, -+ {0x200f0,0x660}, -+ {0x200f1,0x0}, -+ {0x200f2,0x4444}, -+ {0x200f3,0x8888}, -+ {0x200f4,0x5665}, -+ {0x200f5,0x0}, -+ {0x200f6,0x0}, -+ {0x200f7,0xf000}, -+ {0x20025,0x0}, -+ {0x2002d,0x0}, -+ {0x12002d,0x0}, -+ {0x22002d,0x0}, -+ {0x200c7,0x21}, -+ {0x1200c7,0x21}, -+ {0x2200c7,0x21}, -+ {0x200ca,0x24}, -+ {0x1200ca,0x24}, -+ {0x2200ca,0x24}, -+}; -+ -+/* ddr phy trained csr */ -+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, -+ { 0x1200b2, 0x0 }, -+ { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, -+ { 0x110043, 0x0 }, -+ { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, -+ { 0x110143, 0x0 }, -+ { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, -+ { 0x111043, 0x0 }, -+ { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, -+ { 0x111143, 0x0 }, -+ { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, -+ { 0x112043, 0x0 }, -+ { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, -+ { 0x112143, 0x0 }, -+ { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, -+ { 0x113043, 0x0 }, -+ { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, -+ { 0x113143, 0x0 }, -+ { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, -+ { 0x100080, 0x0 }, -+ { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, -+ { 0x101080, 0x0 }, -+ { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, -+ { 0x102080, 0x0 }, -+ { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, -+ { 0x103080, 0x0 }, -+ { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, -+ { 0x104080, 0x0 }, -+ { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, -+ { 0x105080, 0x0 }, -+ { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, -+ { 0x106080, 0x0 }, -+ { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, -+ { 0x107080, 0x0 }, -+ { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, -+ { 0x108080, 0x0 }, -+ { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, -+ { 0x109080, 0x0 }, -+ { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, -+ { 0x110080, 0x0 }, -+ { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, -+ { 0x110180, 0x0 }, -+ { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, -+ { 0x111080, 0x0 }, -+ { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, -+ { 0x111180, 0x0 }, -+ { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, -+ { 0x112080, 0x0 }, -+ { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, -+ { 0x112180, 0x0 }, -+ { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, -+ { 0x113080, 0x0 }, -+ { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, -+ { 0x113180, 0x0 }, -+ { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, -+ { 0x110081, 0x0 }, -+ { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, -+ { 0x110181, 0x0 }, -+ { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, -+ { 0x111081, 0x0 }, -+ { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, -+ { 0x111181, 0x0 }, -+ { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, -+ { 0x112081, 0x0 }, -+ { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, -+ { 0x112181, 0x0 }, -+ { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, -+ { 0x113081, 0x0 }, -+ { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, -+ { 0x113181, 0x0 }, -+ { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, -+ { 0x1100d0, 0x0 }, -+ { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, -+ { 0x1101d0, 0x0 }, -+ { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, -+ { 0x1110d0, 0x0 }, -+ { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, -+ { 0x1111d0, 0x0 }, -+ { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, -+ { 0x1120d0, 0x0 }, -+ { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, -+ { 0x1121d0, 0x0 }, -+ { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, -+ { 0x1130d0, 0x0 }, -+ { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, -+ { 0x1131d0, 0x0 }, -+ { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, -+ { 0x1100d1, 0x0 }, -+ { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, -+ { 0x1101d1, 0x0 }, -+ { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, -+ { 0x1110d1, 0x0 }, -+ { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, -+ { 0x1111d1, 0x0 }, -+ { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, -+ { 0x1120d1, 0x0 }, -+ { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, -+ { 0x1121d1, 0x0 }, -+ { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, -+ { 0x1130d1, 0x0 }, -+ { 0x2130d1, 0x0 }, -+ { 0x131d1, 0x0 }, -+ { 0x1131d1, 0x0 }, -+ { 0x2131d1, 0x0 }, -+ { 0x10068, 0x0 }, -+ { 0x10168, 0x0 }, -+ { 0x10268, 0x0 }, -+ { 0x10368, 0x0 }, -+ { 0x10468, 0x0 }, -+ { 0x10568, 0x0 }, -+ { 0x10668, 0x0 }, -+ { 0x10768, 0x0 }, -+ { 0x10868, 0x0 }, -+ { 0x11068, 0x0 }, -+ { 0x11168, 0x0 }, -+ { 0x11268, 0x0 }, -+ { 0x11368, 0x0 }, -+ { 0x11468, 0x0 }, -+ { 0x11568, 0x0 }, -+ { 0x11668, 0x0 }, -+ { 0x11768, 0x0 }, -+ { 0x11868, 0x0 }, -+ { 0x12068, 0x0 }, -+ { 0x12168, 0x0 }, -+ { 0x12268, 0x0 }, -+ { 0x12368, 0x0 }, -+ { 0x12468, 0x0 }, -+ { 0x12568, 0x0 }, -+ { 0x12668, 0x0 }, -+ { 0x12768, 0x0 }, -+ { 0x12868, 0x0 }, -+ { 0x13068, 0x0 }, -+ { 0x13168, 0x0 }, -+ { 0x13268, 0x0 }, -+ { 0x13368, 0x0 }, -+ { 0x13468, 0x0 }, -+ { 0x13568, 0x0 }, -+ { 0x13668, 0x0 }, -+ { 0x13768, 0x0 }, -+ { 0x13868, 0x0 }, -+ { 0x10069, 0x0 }, -+ { 0x10169, 0x0 }, -+ { 0x10269, 0x0 }, -+ { 0x10369, 0x0 }, -+ { 0x10469, 0x0 }, -+ { 0x10569, 0x0 }, -+ { 0x10669, 0x0 }, -+ { 0x10769, 0x0 }, -+ { 0x10869, 0x0 }, -+ { 0x11069, 0x0 }, -+ { 0x11169, 0x0 }, -+ { 0x11269, 0x0 }, -+ { 0x11369, 0x0 }, -+ { 0x11469, 0x0 }, -+ { 0x11569, 0x0 }, -+ { 0x11669, 0x0 }, -+ { 0x11769, 0x0 }, -+ { 0x11869, 0x0 }, -+ { 0x12069, 0x0 }, -+ { 0x12169, 0x0 }, -+ { 0x12269, 0x0 }, -+ { 0x12369, 0x0 }, -+ { 0x12469, 0x0 }, -+ { 0x12569, 0x0 }, -+ { 0x12669, 0x0 }, -+ { 0x12769, 0x0 }, -+ { 0x12869, 0x0 }, -+ { 0x13069, 0x0 }, -+ { 0x13169, 0x0 }, -+ { 0x13269, 0x0 }, -+ { 0x13369, 0x0 }, -+ { 0x13469, 0x0 }, -+ { 0x13569, 0x0 }, -+ { 0x13669, 0x0 }, -+ { 0x13769, 0x0 }, -+ { 0x13869, 0x0 }, -+ { 0x1008c, 0x0 }, -+ { 0x11008c, 0x0 }, -+ { 0x21008c, 0x0 }, -+ { 0x1018c, 0x0 }, -+ { 0x11018c, 0x0 }, -+ { 0x21018c, 0x0 }, -+ { 0x1108c, 0x0 }, -+ { 0x11108c, 0x0 }, -+ { 0x21108c, 0x0 }, -+ { 0x1118c, 0x0 }, -+ { 0x11118c, 0x0 }, -+ { 0x21118c, 0x0 }, -+ { 0x1208c, 0x0 }, -+ { 0x11208c, 0x0 }, -+ { 0x21208c, 0x0 }, -+ { 0x1218c, 0x0 }, -+ { 0x11218c, 0x0 }, -+ { 0x21218c, 0x0 }, -+ { 0x1308c, 0x0 }, -+ { 0x11308c, 0x0 }, -+ { 0x21308c, 0x0 }, -+ { 0x1318c, 0x0 }, -+ { 0x11318c, 0x0 }, -+ { 0x21318c, 0x0 }, -+ { 0x1008d, 0x0 }, -+ { 0x11008d, 0x0 }, -+ { 0x21008d, 0x0 }, -+ { 0x1018d, 0x0 }, -+ { 0x11018d, 0x0 }, -+ { 0x21018d, 0x0 }, -+ { 0x1108d, 0x0 }, -+ { 0x11108d, 0x0 }, -+ { 0x21108d, 0x0 }, -+ { 0x1118d, 0x0 }, -+ { 0x11118d, 0x0 }, -+ { 0x21118d, 0x0 }, -+ { 0x1208d, 0x0 }, -+ { 0x11208d, 0x0 }, -+ { 0x21208d, 0x0 }, -+ { 0x1218d, 0x0 }, -+ { 0x11218d, 0x0 }, -+ { 0x21218d, 0x0 }, -+ { 0x1308d, 0x0 }, -+ { 0x11308d, 0x0 }, -+ { 0x21308d, 0x0 }, -+ { 0x1318d, 0x0 }, -+ { 0x11318d, 0x0 }, -+ { 0x21318d, 0x0 }, -+ { 0x100c0, 0x0 }, -+ { 0x1100c0, 0x0 }, -+ { 0x2100c0, 0x0 }, -+ { 0x101c0, 0x0 }, -+ { 0x1101c0, 0x0 }, -+ { 0x2101c0, 0x0 }, -+ { 0x102c0, 0x0 }, -+ { 0x1102c0, 0x0 }, -+ { 0x2102c0, 0x0 }, -+ { 0x103c0, 0x0 }, -+ { 0x1103c0, 0x0 }, -+ { 0x2103c0, 0x0 }, -+ { 0x104c0, 0x0 }, -+ { 0x1104c0, 0x0 }, -+ { 0x2104c0, 0x0 }, -+ { 0x105c0, 0x0 }, -+ { 0x1105c0, 0x0 }, -+ { 0x2105c0, 0x0 }, -+ { 0x106c0, 0x0 }, -+ { 0x1106c0, 0x0 }, -+ { 0x2106c0, 0x0 }, -+ { 0x107c0, 0x0 }, -+ { 0x1107c0, 0x0 }, -+ { 0x2107c0, 0x0 }, -+ { 0x108c0, 0x0 }, -+ { 0x1108c0, 0x0 }, -+ { 0x2108c0, 0x0 }, -+ { 0x110c0, 0x0 }, -+ { 0x1110c0, 0x0 }, -+ { 0x2110c0, 0x0 }, -+ { 0x111c0, 0x0 }, -+ { 0x1111c0, 0x0 }, -+ { 0x2111c0, 0x0 }, -+ { 0x112c0, 0x0 }, -+ { 0x1112c0, 0x0 }, -+ { 0x2112c0, 0x0 }, -+ { 0x113c0, 0x0 }, -+ { 0x1113c0, 0x0 }, -+ { 0x2113c0, 0x0 }, -+ { 0x114c0, 0x0 }, -+ { 0x1114c0, 0x0 }, -+ { 0x2114c0, 0x0 }, -+ { 0x115c0, 0x0 }, -+ { 0x1115c0, 0x0 }, -+ { 0x2115c0, 0x0 }, -+ { 0x116c0, 0x0 }, -+ { 0x1116c0, 0x0 }, -+ { 0x2116c0, 0x0 }, -+ { 0x117c0, 0x0 }, -+ { 0x1117c0, 0x0 }, -+ { 0x2117c0, 0x0 }, -+ { 0x118c0, 0x0 }, -+ { 0x1118c0, 0x0 }, -+ { 0x2118c0, 0x0 }, -+ { 0x120c0, 0x0 }, -+ { 0x1120c0, 0x0 }, -+ { 0x2120c0, 0x0 }, -+ { 0x121c0, 0x0 }, -+ { 0x1121c0, 0x0 }, -+ { 0x2121c0, 0x0 }, -+ { 0x122c0, 0x0 }, -+ { 0x1122c0, 0x0 }, -+ { 0x2122c0, 0x0 }, -+ { 0x123c0, 0x0 }, -+ { 0x1123c0, 0x0 }, -+ { 0x2123c0, 0x0 }, -+ { 0x124c0, 0x0 }, -+ { 0x1124c0, 0x0 }, -+ { 0x2124c0, 0x0 }, -+ { 0x125c0, 0x0 }, -+ { 0x1125c0, 0x0 }, -+ { 0x2125c0, 0x0 }, -+ { 0x126c0, 0x0 }, -+ { 0x1126c0, 0x0 }, -+ { 0x2126c0, 0x0 }, -+ { 0x127c0, 0x0 }, -+ { 0x1127c0, 0x0 }, -+ { 0x2127c0, 0x0 }, -+ { 0x128c0, 0x0 }, -+ { 0x1128c0, 0x0 }, -+ { 0x2128c0, 0x0 }, -+ { 0x130c0, 0x0 }, -+ { 0x1130c0, 0x0 }, -+ { 0x2130c0, 0x0 }, -+ { 0x131c0, 0x0 }, -+ { 0x1131c0, 0x0 }, -+ { 0x2131c0, 0x0 }, -+ { 0x132c0, 0x0 }, -+ { 0x1132c0, 0x0 }, -+ { 0x2132c0, 0x0 }, -+ { 0x133c0, 0x0 }, -+ { 0x1133c0, 0x0 }, -+ { 0x2133c0, 0x0 }, -+ { 0x134c0, 0x0 }, -+ { 0x1134c0, 0x0 }, -+ { 0x2134c0, 0x0 }, -+ { 0x135c0, 0x0 }, -+ { 0x1135c0, 0x0 }, -+ { 0x2135c0, 0x0 }, -+ { 0x136c0, 0x0 }, -+ { 0x1136c0, 0x0 }, -+ { 0x2136c0, 0x0 }, -+ { 0x137c0, 0x0 }, -+ { 0x1137c0, 0x0 }, -+ { 0x2137c0, 0x0 }, -+ { 0x138c0, 0x0 }, -+ { 0x1138c0, 0x0 }, -+ { 0x2138c0, 0x0 }, -+ { 0x100c1, 0x0 }, -+ { 0x1100c1, 0x0 }, -+ { 0x2100c1, 0x0 }, -+ { 0x101c1, 0x0 }, -+ { 0x1101c1, 0x0 }, -+ { 0x2101c1, 0x0 }, -+ { 0x102c1, 0x0 }, -+ { 0x1102c1, 0x0 }, -+ { 0x2102c1, 0x0 }, -+ { 0x103c1, 0x0 }, -+ { 0x1103c1, 0x0 }, -+ { 0x2103c1, 0x0 }, -+ { 0x104c1, 0x0 }, -+ { 0x1104c1, 0x0 }, -+ { 0x2104c1, 0x0 }, -+ { 0x105c1, 0x0 }, -+ { 0x1105c1, 0x0 }, -+ { 0x2105c1, 0x0 }, -+ { 0x106c1, 0x0 }, -+ { 0x1106c1, 0x0 }, -+ { 0x2106c1, 0x0 }, -+ { 0x107c1, 0x0 }, -+ { 0x1107c1, 0x0 }, -+ { 0x2107c1, 0x0 }, -+ { 0x108c1, 0x0 }, -+ { 0x1108c1, 0x0 }, -+ { 0x2108c1, 0x0 }, -+ { 0x110c1, 0x0 }, -+ { 0x1110c1, 0x0 }, -+ { 0x2110c1, 0x0 }, -+ { 0x111c1, 0x0 }, -+ { 0x1111c1, 0x0 }, -+ { 0x2111c1, 0x0 }, -+ { 0x112c1, 0x0 }, -+ { 0x1112c1, 0x0 }, -+ { 0x2112c1, 0x0 }, -+ { 0x113c1, 0x0 }, -+ { 0x1113c1, 0x0 }, -+ { 0x2113c1, 0x0 }, -+ { 0x114c1, 0x0 }, -+ { 0x1114c1, 0x0 }, -+ { 0x2114c1, 0x0 }, -+ { 0x115c1, 0x0 }, -+ { 0x1115c1, 0x0 }, -+ { 0x2115c1, 0x0 }, -+ { 0x116c1, 0x0 }, -+ { 0x1116c1, 0x0 }, -+ { 0x2116c1, 0x0 }, -+ { 0x117c1, 0x0 }, -+ { 0x1117c1, 0x0 }, -+ { 0x2117c1, 0x0 }, -+ { 0x118c1, 0x0 }, -+ { 0x1118c1, 0x0 }, -+ { 0x2118c1, 0x0 }, -+ { 0x120c1, 0x0 }, -+ { 0x1120c1, 0x0 }, -+ { 0x2120c1, 0x0 }, -+ { 0x121c1, 0x0 }, -+ { 0x1121c1, 0x0 }, -+ { 0x2121c1, 0x0 }, -+ { 0x122c1, 0x0 }, -+ { 0x1122c1, 0x0 }, -+ { 0x2122c1, 0x0 }, -+ { 0x123c1, 0x0 }, -+ { 0x1123c1, 0x0 }, -+ { 0x2123c1, 0x0 }, -+ { 0x124c1, 0x0 }, -+ { 0x1124c1, 0x0 }, -+ { 0x2124c1, 0x0 }, -+ { 0x125c1, 0x0 }, -+ { 0x1125c1, 0x0 }, -+ { 0x2125c1, 0x0 }, -+ { 0x126c1, 0x0 }, -+ { 0x1126c1, 0x0 }, -+ { 0x2126c1, 0x0 }, -+ { 0x127c1, 0x0 }, -+ { 0x1127c1, 0x0 }, -+ { 0x2127c1, 0x0 }, -+ { 0x128c1, 0x0 }, -+ { 0x1128c1, 0x0 }, -+ { 0x2128c1, 0x0 }, -+ { 0x130c1, 0x0 }, -+ { 0x1130c1, 0x0 }, -+ { 0x2130c1, 0x0 }, -+ { 0x131c1, 0x0 }, -+ { 0x1131c1, 0x0 }, -+ { 0x2131c1, 0x0 }, -+ { 0x132c1, 0x0 }, -+ { 0x1132c1, 0x0 }, -+ { 0x2132c1, 0x0 }, -+ { 0x133c1, 0x0 }, -+ { 0x1133c1, 0x0 }, -+ { 0x2133c1, 0x0 }, -+ { 0x134c1, 0x0 }, -+ { 0x1134c1, 0x0 }, -+ { 0x2134c1, 0x0 }, -+ { 0x135c1, 0x0 }, -+ { 0x1135c1, 0x0 }, -+ { 0x2135c1, 0x0 }, -+ { 0x136c1, 0x0 }, -+ { 0x1136c1, 0x0 }, -+ { 0x2136c1, 0x0 }, -+ { 0x137c1, 0x0 }, -+ { 0x1137c1, 0x0 }, -+ { 0x2137c1, 0x0 }, -+ { 0x138c1, 0x0 }, -+ { 0x1138c1, 0x0 }, -+ { 0x2138c1, 0x0 }, -+ { 0x10020, 0x0 }, -+ { 0x110020, 0x0 }, -+ { 0x210020, 0x0 }, -+ { 0x11020, 0x0 }, -+ { 0x111020, 0x0 }, -+ { 0x211020, 0x0 }, -+ { 0x12020, 0x0 }, -+ { 0x112020, 0x0 }, -+ { 0x212020, 0x0 }, -+ { 0x13020, 0x0 }, -+ { 0x113020, 0x0 }, -+ { 0x213020, 0x0 }, -+ { 0x20072, 0x0 }, -+ { 0x20073, 0x0 }, -+ { 0x20074, 0x0 }, -+ { 0x100aa, 0x0 }, -+ { 0x110aa, 0x0 }, -+ { 0x120aa, 0x0 }, -+ { 0x130aa, 0x0 }, -+ { 0x20010, 0x0 }, -+ { 0x120010, 0x0 }, -+ { 0x220010, 0x0 }, -+ { 0x20011, 0x0 }, -+ { 0x120011, 0x0 }, -+ { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, -+ { 0x1100ae, 0x0 }, -+ { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, -+ { 0x1100af, 0x0 }, -+ { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, -+ { 0x1110ae, 0x0 }, -+ { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, -+ { 0x1110af, 0x0 }, -+ { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, -+ { 0x1120ae, 0x0 }, -+ { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, -+ { 0x1120af, 0x0 }, -+ { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, -+ { 0x1130ae, 0x0 }, -+ { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, -+ { 0x1130af, 0x0 }, -+ { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, -+ { 0x120020, 0x0 }, -+ { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, -+ { 0x100a1, 0x0 }, -+ { 0x100a2, 0x0 }, -+ { 0x100a3, 0x0 }, -+ { 0x100a4, 0x0 }, -+ { 0x100a5, 0x0 }, -+ { 0x100a6, 0x0 }, -+ { 0x100a7, 0x0 }, -+ { 0x110a0, 0x0 }, -+ { 0x110a1, 0x0 }, -+ { 0x110a2, 0x0 }, -+ { 0x110a3, 0x0 }, -+ { 0x110a4, 0x0 }, -+ { 0x110a5, 0x0 }, -+ { 0x110a6, 0x0 }, -+ { 0x110a7, 0x0 }, -+ { 0x120a0, 0x0 }, -+ { 0x120a1, 0x0 }, -+ { 0x120a2, 0x0 }, -+ { 0x120a3, 0x0 }, -+ { 0x120a4, 0x0 }, -+ { 0x120a5, 0x0 }, -+ { 0x120a6, 0x0 }, -+ { 0x120a7, 0x0 }, -+ { 0x130a0, 0x0 }, -+ { 0x130a1, 0x0 }, -+ { 0x130a2, 0x0 }, -+ { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, -+ { 0x12007c, 0x0 }, -+ { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, -+ { 0x12007d, 0x0 }, -+ { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, -+ { 0x190201, 0x0 }, -+ { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, -+ { 0x190202, 0x0 }, -+ { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, -+ { 0x190203, 0x0 }, -+ { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, -+ { 0x190204, 0x0 }, -+ { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, -+ { 0x190205, 0x0 }, -+ { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, -+ { 0x190206, 0x0 }, -+ { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, -+ { 0x190207, 0x0 }, -+ { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, -+ { 0x190208, 0x0 }, -+ { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, -+ { 0x11662, 0x0 }, -+ { 0x11762, 0x0 }, -+ { 0x11862, 0x0 }, -+ { 0x12062, 0x0 }, -+ { 0x12162, 0x0 }, -+ { 0x12262, 0x0 }, -+ { 0x12362, 0x0 }, -+ { 0x12462, 0x0 }, -+ { 0x12562, 0x0 }, -+ { 0x12662, 0x0 }, -+ { 0x12762, 0x0 }, -+ { 0x12862, 0x0 }, -+ { 0x13062, 0x0 }, -+ { 0x13162, 0x0 }, -+ { 0x13262, 0x0 }, -+ { 0x13362, 0x0 }, -+ { 0x13462, 0x0 }, -+ { 0x13562, 0x0 }, -+ { 0x13662, 0x0 }, -+ { 0x13762, 0x0 }, -+ { 0x13862, 0x0 }, -+ { 0x20077, 0x0 }, -+ { 0x10001, 0x0 }, -+ { 0x11001, 0x0 }, -+ { 0x12001, 0x0 }, -+ { 0x13001, 0x0 }, -+ { 0x10040, 0x0 }, -+ { 0x10140, 0x0 }, -+ { 0x10240, 0x0 }, -+ { 0x10340, 0x0 }, -+ { 0x10440, 0x0 }, -+ { 0x10540, 0x0 }, -+ { 0x10640, 0x0 }, -+ { 0x10740, 0x0 }, -+ { 0x10840, 0x0 }, -+ { 0x10030, 0x0 }, -+ { 0x10130, 0x0 }, -+ { 0x10230, 0x0 }, -+ { 0x10330, 0x0 }, -+ { 0x10430, 0x0 }, -+ { 0x10530, 0x0 }, -+ { 0x10630, 0x0 }, -+ { 0x10730, 0x0 }, -+ { 0x10830, 0x0 }, -+ { 0x11040, 0x0 }, -+ { 0x11140, 0x0 }, -+ { 0x11240, 0x0 }, -+ { 0x11340, 0x0 }, -+ { 0x11440, 0x0 }, -+ { 0x11540, 0x0 }, -+ { 0x11640, 0x0 }, -+ { 0x11740, 0x0 }, -+ { 0x11840, 0x0 }, -+ { 0x11030, 0x0 }, -+ { 0x11130, 0x0 }, -+ { 0x11230, 0x0 }, -+ { 0x11330, 0x0 }, -+ { 0x11430, 0x0 }, -+ { 0x11530, 0x0 }, -+ { 0x11630, 0x0 }, -+ { 0x11730, 0x0 }, -+ { 0x11830, 0x0 }, -+ { 0x12040, 0x0 }, -+ { 0x12140, 0x0 }, -+ { 0x12240, 0x0 }, -+ { 0x12340, 0x0 }, -+ { 0x12440, 0x0 }, -+ { 0x12540, 0x0 }, -+ { 0x12640, 0x0 }, -+ { 0x12740, 0x0 }, -+ { 0x12840, 0x0 }, -+ { 0x12030, 0x0 }, -+ { 0x12130, 0x0 }, -+ { 0x12230, 0x0 }, -+ { 0x12330, 0x0 }, -+ { 0x12430, 0x0 }, -+ { 0x12530, 0x0 }, -+ { 0x12630, 0x0 }, -+ { 0x12730, 0x0 }, -+ { 0x12830, 0x0 }, -+ { 0x13040, 0x0 }, -+ { 0x13140, 0x0 }, -+ { 0x13240, 0x0 }, -+ { 0x13340, 0x0 }, -+ { 0x13440, 0x0 }, -+ { 0x13540, 0x0 }, -+ { 0x13640, 0x0 }, -+ { 0x13740, 0x0 }, -+ { 0x13840, 0x0 }, -+ { 0x13030, 0x0 }, -+ { 0x13130, 0x0 }, -+ { 0x13230, 0x0 }, -+ { 0x13330, 0x0 }, -+ { 0x13430, 0x0 }, -+ { 0x13530, 0x0 }, -+ { 0x13630, 0x0 }, -+ { 0x13730, 0x0 }, -+ { 0x13830, 0x0 }, -+}; -+/* P0 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp0_cfg[] = { -+ {0xd0000, 0x0}, -+ {0x54003,0x960}, -+ {0x54004,0x2}, -+ {0x54005,0x2228}, -+ {0x54006,0x11}, -+ {0x54008,0x131f}, -+ {0x54009,0xc8}, -+ {0x5400b,0x2}, -+ {0x5400d,0x100}, -+ {0x54012,0x110}, -+ {0x54019,0x24c4}, -+ {0x5401a,0x31}, -+ {0x5401b,0x4d66}, -+ {0x5401c,0x4d00}, -+ {0x5401e,0x16}, -+ {0x5401f,0x24c4}, -+ {0x54020,0x31}, -+ {0x54021,0x4d66}, -+ {0x54022,0x4d00}, -+ {0x54024,0x16}, -+ {0x5402b,0x1000}, -+ {0x5402c,0x1}, -+ {0x54032,0xc400}, -+ {0x54033,0x3124}, -+ {0x54034,0x6600}, -+ {0x54035,0x4d}, -+ {0x54036,0x4d}, -+ {0x54037,0x1600}, -+ {0x54038,0xc400}, -+ {0x54039,0x3124}, -+ {0x5403a,0x6600}, -+ {0x5403b,0x4d}, -+ {0x5403c,0x4d}, -+ {0x5403d,0x1600}, -+ {0xd0000, 0x1}, -+}; -+ -+ -+/* P1 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp1_cfg[] = { -+ {0xd0000, 0x0}, -+ {0x54002,0x101}, -+ {0x54003,0x190}, -+ {0x54004,0x2}, -+ {0x54005,0x2228}, -+ {0x54006,0x11}, -+ {0x54008,0x121f}, -+ {0x54009,0xc8}, -+ {0x5400b,0x2}, -+ {0x5400d,0x100}, -+ {0x54012,0x110}, -+ {0x54019,0x84}, -+ {0x5401a,0x31}, -+ {0x5401b,0x4d66}, -+ {0x5401c,0x4d00}, -+ {0x5401e,0x16}, -+ {0x5401f,0x84}, -+ {0x54020,0x31}, -+ {0x54021,0x4d66}, -+ {0x54022,0x4d00}, -+ {0x54024,0x16}, -+ {0x5402b,0x1000}, -+ {0x5402c,0x1}, -+ {0x54032,0x8400}, -+ {0x54033,0x3100}, -+ {0x54034,0x6600}, -+ {0x54035,0x4d}, -+ {0x54036,0x4d}, -+ {0x54037,0x1600}, -+ {0x54038,0x8400}, -+ {0x54039,0x3100}, -+ {0x5403a,0x6600}, -+ {0x5403b,0x4d}, -+ {0x5403c,0x4d}, -+ {0x5403d,0x1600}, -+ {0xd0000, 0x1}, -+}; -+ -+ -+/* P2 message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp2_cfg[] = { -+ {0xd0000, 0x0}, -+ {0x54002,0x102}, -+ {0x54003,0x64}, -+ {0x54004,0x2}, -+ {0x54005,0x2228}, -+ {0x54006,0x11}, -+ {0x54008,0x121f}, -+ {0x54009,0xc8}, -+ {0x5400b,0x2}, -+ {0x5400d,0x100}, -+ {0x54012,0x110}, -+ {0x54019,0x84}, -+ {0x5401a,0x31}, -+ {0x5401b,0x4d66}, -+ {0x5401c,0x4d00}, -+ {0x5401e,0x16}, -+ {0x5401f,0x84}, -+ {0x54020,0x31}, -+ {0x54021,0x4d66}, -+ {0x54022,0x4d00}, -+ {0x54024,0x16}, -+ {0x5402b,0x1000}, -+ {0x5402c,0x1}, -+ {0x54032,0x8400}, -+ {0x54033,0x3100}, -+ {0x54034,0x6600}, -+ {0x54035,0x4d}, -+ {0x54036,0x4d}, -+ {0x54037,0x1600}, -+ {0x54038,0x8400}, -+ {0x54039,0x3100}, -+ {0x5403a,0x6600}, -+ {0x5403b,0x4d}, -+ {0x5403c,0x4d}, -+ {0x5403d,0x1600}, -+ {0xd0000, 0x1}, -+}; -+ -+ -+/* P0 2D message block paremeter for training firmware */ -+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { -+ {0xd0000, 0x0}, -+ {0x54003,0x960}, -+ {0x54004,0x2}, -+ {0x54005,0x2228}, -+ {0x54006,0x11}, -+ {0x54008,0x61}, -+ {0x54009,0xc8}, -+ {0x5400b,0x2}, -+ {0x5400f,0x100}, -+ {0x54010,0x1f7f}, -+ {0x54012,0x110}, -+ {0x54019,0x24c4}, -+ {0x5401a,0x31}, -+ {0x5401b,0x4d66}, -+ {0x5401c,0x4d00}, -+ {0x5401e,0x16}, -+ {0x5401f,0x24c4}, -+ {0x54020,0x31}, -+ {0x54021,0x4d66}, -+ {0x54022,0x4d00}, -+ {0x54024,0x16}, -+ {0x5402b,0x1000}, -+ {0x5402c,0x1}, -+ {0x54032,0xc400}, -+ {0x54033,0x3124}, -+ {0x54034,0x6600}, -+ {0x54035,0x4d}, -+ {0x54036,0x4d}, -+ {0x54037,0x1600}, -+ {0x54038,0xc400}, -+ {0x54039,0x3124}, -+ {0x5403a,0x6600}, -+ {0x5403b,0x4d}, -+ {0x5403c,0x4d}, -+ {0x5403d,0x1600}, -+ { 0xd0000, 0x1 }, -+}; -+ -+/* DRAM PHY init engine image */ -+static struct dram_cfg_param ddr_phy_pie[] = { -+ {0xd0000, 0x0}, -+ {0x90000,0x10}, -+ {0x90001,0x400}, -+ {0x90002,0x10e}, -+ {0x90003,0x0}, -+ {0x90004,0x0}, -+ {0x90005,0x8}, -+ {0x90029,0xb}, -+ {0x9002a,0x480}, -+ {0x9002b,0x109}, -+ {0x9002c,0x8}, -+ {0x9002d,0x448}, -+ {0x9002e,0x139}, -+ {0x9002f,0x8}, -+ {0x90030,0x478}, -+ {0x90031,0x109}, -+ {0x90032,0x0}, -+ {0x90033,0xe8}, -+ {0x90034,0x109}, -+ {0x90035,0x2}, -+ {0x90036,0x10}, -+ {0x90037,0x139}, -+ {0x90038,0xf}, -+ {0x90039,0x7c0}, -+ {0x9003a,0x139}, -+ {0x9003b,0x44}, -+ {0x9003c,0x630}, -+ {0x9003d,0x159}, -+ {0x9003e,0x14f}, -+ {0x9003f,0x630}, -+ {0x90040,0x159}, -+ {0x90041,0x47}, -+ {0x90042,0x630}, -+ {0x90043,0x149}, -+ {0x90044,0x4f}, -+ {0x90045,0x630}, -+ {0x90046,0x179}, -+ {0x90047,0x8}, -+ {0x90048,0xe0}, -+ {0x90049,0x109}, -+ {0x9004a,0x0}, -+ {0x9004b,0x7c8}, -+ {0x9004c,0x109}, -+ {0x9004d,0x0}, -+ {0x9004e,0x1}, -+ {0x9004f,0x8}, -+ {0x90050,0x0}, -+ {0x90051,0x45a}, -+ {0x90052,0x9}, -+ {0x90053,0x0}, -+ {0x90054,0x448}, -+ {0x90055,0x109}, -+ {0x90056,0x40}, -+ {0x90057,0x630}, -+ {0x90058,0x179}, -+ {0x90059,0x1}, -+ {0x9005a,0x618}, -+ {0x9005b,0x109}, -+ {0x9005c,0x40c0}, -+ {0x9005d,0x630}, -+ {0x9005e,0x149}, -+ {0x9005f,0x8}, -+ {0x90060,0x4}, -+ {0x90061,0x48}, -+ {0x90062,0x4040}, -+ {0x90063,0x630}, -+ {0x90064,0x149}, -+ {0x90065,0x0}, -+ {0x90066,0x4}, -+ {0x90067,0x48}, -+ {0x90068,0x40}, -+ {0x90069,0x630}, -+ {0x9006a,0x149}, -+ {0x9006b,0x10}, -+ {0x9006c,0x4}, -+ {0x9006d,0x18}, -+ {0x9006e,0x0}, -+ {0x9006f,0x4}, -+ {0x90070,0x78}, -+ {0x90071,0x549}, -+ {0x90072,0x630}, -+ {0x90073,0x159}, -+ {0x90074,0xd49}, -+ {0x90075,0x630}, -+ {0x90076,0x159}, -+ {0x90077,0x94a}, -+ {0x90078,0x630}, -+ {0x90079,0x159}, -+ {0x9007a,0x441}, -+ {0x9007b,0x630}, -+ {0x9007c,0x149}, -+ {0x9007d,0x42}, -+ {0x9007e,0x630}, -+ {0x9007f,0x149}, -+ {0x90080,0x1}, -+ {0x90081,0x630}, -+ {0x90082,0x149}, -+ {0x90083,0x0}, -+ {0x90084,0xe0}, -+ {0x90085,0x109}, -+ {0x90086,0xa}, -+ {0x90087,0x10}, -+ {0x90088,0x109}, -+ {0x90089,0x9}, -+ {0x9008a,0x3c0}, -+ {0x9008b,0x149}, -+ {0x9008c,0x9}, -+ {0x9008d,0x3c0}, -+ {0x9008e,0x159}, -+ {0x9008f,0x18}, -+ {0x90090,0x10}, -+ {0x90091,0x109}, -+ {0x90092,0x0}, -+ {0x90093,0x3c0}, -+ {0x90094,0x109}, -+ {0x90095,0x18}, -+ {0x90096,0x4}, -+ {0x90097,0x48}, -+ {0x90098,0x18}, -+ {0x90099,0x4}, -+ {0x9009a,0x58}, -+ {0x9009b,0xa}, -+ {0x9009c,0x10}, -+ {0x9009d,0x109}, -+ {0x9009e,0x2}, -+ {0x9009f,0x10}, -+ {0x900a0,0x109}, -+ {0x900a1,0x5}, -+ {0x900a2,0x7c0}, -+ {0x900a3,0x109}, -+ {0x900a4,0x10}, -+ {0x900a5,0x10}, -+ {0x900a6,0x109}, -+ {0x40000,0x811}, -+ {0x40020,0x880}, -+ {0x40040,0x0}, -+ {0x40060,0x0}, -+ {0x40001,0x4008}, -+ {0x40021,0x83}, -+ {0x40041,0x4f}, -+ {0x40061,0x0}, -+ {0x40002,0x4040}, -+ {0x40022,0x83}, -+ {0x40042,0x51}, -+ {0x40062,0x0}, -+ {0x40003,0x811}, -+ {0x40023,0x880}, -+ {0x40043,0x0}, -+ {0x40063,0x0}, -+ {0x40004,0x720}, -+ {0x40024,0xf}, -+ {0x40044,0x1740}, -+ {0x40064,0x0}, -+ {0x40005,0x16}, -+ {0x40025,0x83}, -+ {0x40045,0x4b}, -+ {0x40065,0x0}, -+ {0x40006,0x716}, -+ {0x40026,0xf}, -+ {0x40046,0x2001}, -+ {0x40066,0x0}, -+ {0x40007,0x716}, -+ {0x40027,0xf}, -+ {0x40047,0x2800}, -+ {0x40067,0x0}, -+ {0x40008,0x716}, -+ {0x40028,0xf}, -+ {0x40048,0xf00}, -+ {0x40068,0x0}, -+ {0x40009,0x720}, -+ {0x40029,0xf}, -+ {0x40049,0x1400}, -+ {0x40069,0x0}, -+ {0x4000a,0xe08}, -+ {0x4002a,0xc15}, -+ {0x4004a,0x0}, -+ {0x4006a,0x0}, -+ {0x4000b,0x623}, -+ {0x4002b,0x15}, -+ {0x4004b,0x0}, -+ {0x4006b,0x0}, -+ {0x4000c,0x4028}, -+ {0x4002c,0x80}, -+ {0x4004c,0x0}, -+ {0x4006c,0x0}, -+ {0x4000d,0xe08}, -+ {0x4002d,0xc1a}, -+ {0x4004d,0x0}, -+ {0x4006d,0x0}, -+ {0x4000e,0x623}, -+ {0x4002e,0x1a}, -+ {0x4004e,0x0}, -+ {0x4006e,0x0}, -+ {0x4000f,0x4040}, -+ {0x4002f,0x80}, -+ {0x4004f,0x0}, -+ {0x4006f,0x0}, -+ {0x40010,0x2604}, -+ {0x40030,0x15}, -+ {0x40050,0x0}, -+ {0x40070,0x0}, -+ {0x40011,0x708}, -+ {0x40031,0x5}, -+ {0x40051,0x0}, -+ {0x40071,0x2002}, -+ {0x40012,0x8}, -+ {0x40032,0x80}, -+ {0x40052,0x0}, -+ {0x40072,0x0}, -+ {0x40013,0x2604}, -+ {0x40033,0x1a}, -+ {0x40053,0x0}, -+ {0x40073,0x0}, -+ {0x40014,0x708}, -+ {0x40034,0xa}, -+ {0x40054,0x0}, -+ {0x40074,0x2002}, -+ {0x40015,0x4040}, -+ {0x40035,0x80}, -+ {0x40055,0x0}, -+ {0x40075,0x0}, -+ {0x40016,0x60a}, -+ {0x40036,0x15}, -+ {0x40056,0x1200}, -+ {0x40076,0x0}, -+ {0x40017,0x61a}, -+ {0x40037,0x15}, -+ {0x40057,0x1300}, -+ {0x40077,0x0}, -+ {0x40018,0x60a}, -+ {0x40038,0x1a}, -+ {0x40058,0x1200}, -+ {0x40078,0x0}, -+ {0x40019,0x642}, -+ {0x40039,0x1a}, -+ {0x40059,0x1300}, -+ {0x40079,0x0}, -+ {0x4001a,0x4808}, -+ {0x4003a,0x880}, -+ {0x4005a,0x0}, -+ {0x4007a,0x0}, -+ {0x900a7,0x0}, -+ {0x900a8,0x790}, -+ {0x900a9,0x11a}, -+ {0x900aa,0x8}, -+ {0x900ab,0x7aa}, -+ {0x900ac,0x2a}, -+ {0x900ad,0x10}, -+ {0x900ae,0x7b2}, -+ {0x900af,0x2a}, -+ {0x900b0,0x0}, -+ {0x900b1,0x7c8}, -+ {0x900b2,0x109}, -+ {0x900b3,0x10}, -+ {0x900b4,0x2a8}, -+ {0x900b5,0x129}, -+ {0x900b6,0x8}, -+ {0x900b7,0x370}, -+ {0x900b8,0x129}, -+ {0x900b9,0xa}, -+ {0x900ba,0x3c8}, -+ {0x900bb,0x1a9}, -+ {0x900bc,0xc}, -+ {0x900bd,0x408}, -+ {0x900be,0x199}, -+ {0x900bf,0x14}, -+ {0x900c0,0x790}, -+ {0x900c1,0x11a}, -+ {0x900c2,0x8}, -+ {0x900c3,0x4}, -+ {0x900c4,0x18}, -+ {0x900c5,0xe}, -+ {0x900c6,0x408}, -+ {0x900c7,0x199}, -+ {0x900c8,0x8}, -+ {0x900c9,0x8568}, -+ {0x900ca,0x108}, -+ {0x900cb,0x18}, -+ {0x900cc,0x790}, -+ {0x900cd,0x16a}, -+ {0x900ce,0x8}, -+ {0x900cf,0x1d8}, -+ {0x900d0,0x169}, -+ {0x900d1,0x10}, -+ {0x900d2,0x8558}, -+ {0x900d3,0x168}, -+ {0x900d4,0x70}, -+ {0x900d5,0x788}, -+ {0x900d6,0x16a}, -+ {0x900d7,0x1ff8}, -+ {0x900d8,0x85a8}, -+ {0x900d9,0x1e8}, -+ {0x900da,0x50}, -+ {0x900db,0x798}, -+ {0x900dc,0x16a}, -+ {0x900dd,0x60}, -+ {0x900de,0x7a0}, -+ {0x900df,0x16a}, -+ {0x900e0,0x8}, -+ {0x900e1,0x8310}, -+ {0x900e2,0x168}, -+ {0x900e3,0x8}, -+ {0x900e4,0xa310}, -+ {0x900e5,0x168}, -+ {0x900e6,0xa}, -+ {0x900e7,0x408}, -+ {0x900e8,0x169}, -+ {0x900e9,0x6e}, -+ {0x900ea,0x0}, -+ {0x900eb,0x68}, -+ {0x900ec,0x0}, -+ {0x900ed,0x408}, -+ {0x900ee,0x169}, -+ {0x900ef,0x0}, -+ {0x900f0,0x8310}, -+ {0x900f1,0x168}, -+ {0x900f2,0x0}, -+ {0x900f3,0xa310}, -+ {0x900f4,0x168}, -+ {0x900f5,0x1ff8}, -+ {0x900f6,0x85a8}, -+ {0x900f7,0x1e8}, -+ {0x900f8,0x68}, -+ {0x900f9,0x798}, -+ {0x900fa,0x16a}, -+ {0x900fb,0x78}, -+ {0x900fc,0x7a0}, -+ {0x900fd,0x16a}, -+ {0x900fe,0x68}, -+ {0x900ff,0x790}, -+ {0x90100,0x16a}, -+ {0x90101,0x8}, -+ {0x90102,0x8b10}, -+ {0x90103,0x168}, -+ {0x90104,0x8}, -+ {0x90105,0xab10}, -+ {0x90106,0x168}, -+ {0x90107,0xa}, -+ {0x90108,0x408}, -+ {0x90109,0x169}, -+ {0x9010a,0x58}, -+ {0x9010b,0x0}, -+ {0x9010c,0x68}, -+ {0x9010d,0x0}, -+ {0x9010e,0x408}, -+ {0x9010f,0x169}, -+ {0x90110,0x0}, -+ {0x90111,0x8b10}, -+ {0x90112,0x168}, -+ {0x90113,0x0}, -+ {0x90114,0xab10}, -+ {0x90115,0x168}, -+ {0x90116,0x0}, -+ {0x90117,0x1d8}, -+ {0x90118,0x169}, -+ {0x90119,0x80}, -+ {0x9011a,0x790}, -+ {0x9011b,0x16a}, -+ {0x9011c,0x18}, -+ {0x9011d,0x7aa}, -+ {0x9011e,0x6a}, -+ {0x9011f,0xa}, -+ {0x90120,0x0}, -+ {0x90121,0x1e9}, -+ {0x90122,0x8}, -+ {0x90123,0x8080}, -+ {0x90124,0x108}, -+ {0x90125,0xf}, -+ {0x90126,0x408}, -+ {0x90127,0x169}, -+ {0x90128,0xc}, -+ {0x90129,0x0}, -+ {0x9012a,0x68}, -+ {0x9012b,0x9}, -+ {0x9012c,0x0}, -+ {0x9012d,0x1a9}, -+ {0x9012e,0x0}, -+ {0x9012f,0x408}, -+ {0x90130,0x169}, -+ {0x90131,0x0}, -+ {0x90132,0x8080}, -+ {0x90133,0x108}, -+ {0x90134,0x8}, -+ {0x90135,0x7aa}, -+ {0x90136,0x6a}, -+ {0x90137,0x0}, -+ {0x90138,0x8568}, -+ {0x90139,0x108}, -+ {0x9013a,0xb7}, -+ {0x9013b,0x790}, -+ {0x9013c,0x16a}, -+ {0x9013d,0x1f}, -+ {0x9013e,0x0}, -+ {0x9013f,0x68}, -+ {0x90140,0x8}, -+ {0x90141,0x8558}, -+ {0x90142,0x168}, -+ {0x90143,0xf}, -+ {0x90144,0x408}, -+ {0x90145,0x169}, -+ {0x90146,0xc}, -+ {0x90147,0x0}, -+ {0x90148,0x68}, -+ {0x90149,0x0}, -+ {0x9014a,0x408}, -+ {0x9014b,0x169}, -+ {0x9014c,0x0}, -+ {0x9014d,0x8558}, -+ {0x9014e,0x168}, -+ {0x9014f,0x8}, -+ {0x90150,0x3c8}, -+ {0x90151,0x1a9}, -+ {0x90152,0x3}, -+ {0x90153,0x370}, -+ {0x90154,0x129}, -+ {0x90155,0x20}, -+ {0x90156,0x2aa}, -+ {0x90157,0x9}, -+ {0x90158,0x0}, -+ {0x90159,0x400}, -+ {0x9015a,0x10e}, -+ {0x9015b,0x8}, -+ {0x9015c,0xe8}, -+ {0x9015d,0x109}, -+ {0x9015e,0x0}, -+ {0x9015f,0x8140}, -+ {0x90160,0x10c}, -+ {0x90161,0x10}, -+ {0x90162,0x8138}, -+ {0x90163,0x10c}, -+ {0x90164,0x8}, -+ {0x90165,0x7c8}, -+ {0x90166,0x101}, -+ {0x90167,0x8}, -+ {0x90168,0x0}, -+ {0x90169,0x8}, -+ {0x9016a,0x8}, -+ {0x9016b,0x448}, -+ {0x9016c,0x109}, -+ {0x9016d,0xf}, -+ {0x9016e,0x7c0}, -+ {0x9016f,0x109}, -+ {0x90170,0x0}, -+ {0x90171,0xe8}, -+ {0x90172,0x109}, -+ {0x90173,0x47}, -+ {0x90174,0x630}, -+ {0x90175,0x109}, -+ {0x90176,0x8}, -+ {0x90177,0x618}, -+ {0x90178,0x109}, -+ {0x90179,0x8}, -+ {0x9017a,0xe0}, -+ {0x9017b,0x109}, -+ {0x9017c,0x0}, -+ {0x9017d,0x7c8}, -+ {0x9017e,0x109}, -+ {0x9017f,0x8}, -+ {0x90180,0x8140}, -+ {0x90181,0x10c}, -+ {0x90182,0x0}, -+ {0x90183,0x1}, -+ {0x90184,0x8}, -+ {0x90185,0x8}, -+ {0x90186,0x4}, -+ {0x90187,0x8}, -+ {0x90188,0x8}, -+ {0x90189,0x7c8}, -+ {0x9018a,0x101}, -+ {0x90006,0x0}, -+ {0x90007,0x0}, -+ {0x90008,0x8}, -+ {0x90009,0x0}, -+ {0x9000a,0x0}, -+ {0x9000b,0x0}, -+ {0xd00e7,0x400}, -+ {0x90017,0x0}, -+ {0x9001f,0x2a}, -+ {0x90026,0x6a}, -+ {0x400d0,0x0}, -+ {0x400d1,0x101}, -+ {0x400d2,0x105}, -+ {0x400d3,0x107}, -+ {0x400d4,0x10f}, -+ {0x400d5,0x202}, -+ {0x400d6,0x20a}, -+ {0x400d7,0x20b}, -+ {0x2003a,0x2}, -+ {0x2000b,0x4b}, -+ {0x2000c,0x96}, -+ {0x2000d,0x5dc}, -+ {0x2000e,0x2c}, -+ {0x12000b,0xc}, -+ {0x12000c,0x19}, -+ {0x12000d,0xfa}, -+ {0x12000e,0x10}, -+ {0x22000b,0x3}, -+ {0x22000c,0x6}, -+ {0x22000d,0x3e}, -+ {0x22000e,0x10}, -+ {0x9000c,0x0}, -+ {0x9000d,0x173}, -+ {0x9000e,0x60}, -+ {0x9000f,0x6110}, -+ {0x90010,0x2152}, -+ {0x90011,0xdfbd}, -+ {0x90012,0x60}, -+ {0x90013,0x6152}, -+ {0x20010,0x5a}, -+ {0x20011,0x3}, -+ {0x120010,0x5a}, -+ {0x120011,0x3}, -+ {0x220010,0x5a}, -+ {0x220011,0x3}, -+ {0x40080,0xe0}, -+ {0x40081,0x12}, -+ {0x40082,0xe0}, -+ {0x40083,0x12}, -+ {0x40084,0xe0}, -+ {0x40085,0x12}, -+ {0x140080,0xe0}, -+ {0x140081,0x12}, -+ {0x140082,0xe0}, -+ {0x140083,0x12}, -+ {0x140084,0xe0}, -+ {0x140085,0x12}, -+ {0x240080,0xe0}, -+ {0x240081,0x12}, -+ {0x240082,0xe0}, -+ {0x240083,0x12}, -+ {0x240084,0xe0}, -+ {0x240085,0x12}, -+ {0x400fd,0xf}, -+ {0x10011,0x1}, -+ {0x10012,0x1}, -+ {0x10013,0x180}, -+ {0x10018,0x1}, -+ {0x10002,0x6209}, -+ {0x100b2,0x1}, -+ {0x101b4,0x1}, -+ {0x102b4,0x1}, -+ {0x103b4,0x1}, -+ {0x104b4,0x1}, -+ {0x105b4,0x1}, -+ {0x106b4,0x1}, -+ {0x107b4,0x1}, -+ {0x108b4,0x1}, -+ {0x11011,0x1}, -+ {0x11012,0x1}, -+ {0x11013,0x180}, -+ {0x11018,0x1}, -+ {0x11002,0x6209}, -+ {0x110b2,0x1}, -+ {0x111b4,0x1}, -+ {0x112b4,0x1}, -+ {0x113b4,0x1}, -+ {0x114b4,0x1}, -+ {0x115b4,0x1}, -+ {0x116b4,0x1}, -+ {0x117b4,0x1}, -+ {0x118b4,0x1}, -+ {0x12011,0x1}, -+ {0x12012,0x1}, -+ {0x12013,0x180}, -+ {0x12018,0x1}, -+ {0x12002,0x6209}, -+ {0x120b2,0x1}, -+ {0x121b4,0x1}, -+ {0x122b4,0x1}, -+ {0x123b4,0x1}, -+ {0x124b4,0x1}, -+ {0x125b4,0x1}, -+ {0x126b4,0x1}, -+ {0x127b4,0x1}, -+ {0x128b4,0x1}, -+ {0x13011,0x1}, -+ {0x13012,0x1}, -+ {0x13013,0x180}, -+ {0x13018,0x1}, -+ {0x13002,0x6209}, -+ {0x130b2,0x1}, -+ {0x131b4,0x1}, -+ {0x132b4,0x1}, -+ {0x133b4,0x1}, -+ {0x134b4,0x1}, -+ {0x135b4,0x1}, -+ {0x136b4,0x1}, -+ {0x137b4,0x1}, -+ {0x138b4,0x1}, -+ {0x2003a,0x2}, -+ {0xc0080,0x2}, -+ {0xd0000, 0x1} -+}; -+ -+static struct dram_fsp_msg ddr_dram_fsp_msg[] = { -+ { -+ /* P0 2400mts 1D */ -+ .drate = 2400, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp0_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), -+ }, -+ { -+ /* P1 400mts 1D */ -+ .drate = 400, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp1_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), -+ }, -+ { -+ /* P2 100mts 1D */ -+ .drate = 100, -+ .fw_type = FW_1D_IMAGE, -+ .fsp_cfg = ddr_fsp2_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), -+ }, -+ { -+ /* P0 2400mts 2D */ -+ .drate = 2400, -+ .fw_type = FW_2D_IMAGE, -+ .fsp_cfg = ddr_fsp0_2d_cfg, -+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), -+ }, -+}; -+ -+/* ddr timing config params */ -+struct dram_timing_info ucm_dram_timing_05000010 = { -+ .ddrc_cfg = ddr_ddrc_cfg, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -+ .ddrphy_cfg = ddr_ddrphy_cfg, -+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -+ .fsp_msg = ddr_dram_fsp_msg, -+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -+ .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -+ .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), -+ .ddrphy_pie = ddr_phy_pie, -+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -+ .fsp_table = { 2400, 400, 100, }, -+}; -+ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0079-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch b/recipes-bsp/u-boot/compulab/imx8mm/0079-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch deleted file mode 100644 index 0c51053..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0079-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 0102a6b66097789b274fb48e37b509fb1301dcdb Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 2 Sep 2020 23:11:10 +0300 -Subject: [PATCH 79/91] ucm-imx8m-mini: Enable status LED and cmd led - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/ucm-imx8m-mini.dts | 20 ++++++++++++++++++++ - board/compulab/plat/imx8mm/board/board.c | 3 +++ - configs/ucm-imx8m-mini_defconfig | 5 ++++- - 3 files changed, 27 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts -index 7b81e8a75b..ba0e169004 100644 ---- a/arch/arm/dts/ucm-imx8m-mini.dts -+++ b/arch/arm/dts/ucm-imx8m-mini.dts -@@ -19,4 +19,24 @@ - / { - model = "CompuLab UCM-iMX8M-Mini board"; - compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_led>; -+ -+ status_led { -+ label = "status"; -+ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; -+ default-state = "on"; -+ }; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl_gpio_led: gpioledgrp { -+ fsl,pins = < -+ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 -+ >; -+ }; - }; -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 3cf689e2d6..ea9b4293d4 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -212,6 +212,9 @@ int board_init(void) - printf("uboot_board_private_init() failed\n"); - hang(); - } -+ if (IS_ENABLED(CONFIG_LED)) -+ led_default_state(); -+ - show_suite_info(); - return 0; - } -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 2a9b39fc29..331ebf7659 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -45,7 +45,7 @@ CONFIG_CMD_DHCP=y - CONFIG_CMD_MII=y - CONFIG_CMD_PING=y - CONFIG_CMD_CACHE=y --CONFIG_CMD_REGULATOR=y -+CONFIG_CMD_REGULATOR= - CONFIG_CMD_EXT2=y - CONFIG_CMD_EXT4=y - CONFIG_CMD_FAT=y -@@ -97,3 +97,6 @@ CONFIG_EXT4_WRITE=y - CONFIG_FAT_WRITE=y - CONFIG_OF_LIBFDT_OVERLAY=y - # CONFIG_EFI_LOADER is not set -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0080-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch b/recipes-bsp/u-boot/compulab/imx8mm/0080-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch deleted file mode 100644 index a185f10..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0080-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 044ba2df3dc7767515b2d2e99be6a9ad575e1b67 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sat, 5 Sep 2020 17:18:29 +0300 -Subject: [PATCH 80/91] mcm and ucm: Enable status LED for both platforms - -Signed-off-by: Kirill Kapranov ---- - arch/arm/dts/cpl-imx8m-mini.dtsi | 17 +++++++++++++++++ - arch/arm/dts/ucm-imx8m-mini.dts | 20 -------------------- - board/compulab/plat/imx8mm/board/board.c | 1 + - configs/mcm-imx8m-mini_defconfig | 2 ++ - configs/ucm-imx8m-mini_defconfig | 1 - - 5 files changed, 20 insertions(+), 21 deletions(-) - -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -index a587c3dda0..c37ad9c71d 100644 ---- a/arch/arm/dts/cpl-imx8m-mini.dtsi -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -32,6 +32,17 @@ - off-on-delay-us = <12000>; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_led>; -+ -+ status_led { -+ label = "status"; -+ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; -+ default-state = "on"; -+ }; -+ }; - }; - - &iomuxc { -@@ -219,6 +230,12 @@ - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 - >; - }; -+ -+ pinctrl_gpio_led: gpioledgrp { -+ fsl,pins = < -+ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 -+ >; -+ }; - }; - }; - -diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts -index ba0e169004..7b81e8a75b 100644 ---- a/arch/arm/dts/ucm-imx8m-mini.dts -+++ b/arch/arm/dts/ucm-imx8m-mini.dts -@@ -19,24 +19,4 @@ - / { - model = "CompuLab UCM-iMX8M-Mini board"; - compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; -- -- leds { -- compatible = "gpio-leds"; -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_led>; -- -- status_led { -- label = "status"; -- gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; -- default-state = "on"; -- }; -- }; --}; -- --&iomuxc { -- pinctrl_gpio_led: gpioledgrp { -- fsl,pins = < -- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 -- >; -- }; - }; -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index ea9b4293d4..5b751e0eb8 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig -index e0e4f86329..cf388e99a5 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/mcm-imx8m-mini_defconfig -@@ -96,3 +96,5 @@ CONFIG_EXT4_WRITE=y - CONFIG_FAT_WRITE=y - CONFIG_OF_LIBFDT_OVERLAY=y - # CONFIG_EFI_LOADER is not set -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 331ebf7659..9fe7268870 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -99,4 +99,3 @@ CONFIG_OF_LIBFDT_OVERLAY=y - # CONFIG_EFI_LOADER is not set - CONFIG_LED=y - CONFIG_LED_GPIO=y -- --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0081-Enable-env-address-export-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0081-Enable-env-address-export-via-FDT.patch deleted file mode 100644 index 78040cc..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0081-Enable-env-address-export-via-FDT.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 97c243f59ecde9b0749de6adf400d4a588a50831 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Thu, 8 Oct 2020 20:33:08 +0300 -Subject: [PATCH 81/91] Enable env address export via FDT - -Signed-off-by: Kirill Kapranov ---- - board/compulab/common/mmc.c | 2 + - board/compulab/plat/imx8mm/board/board.c | 47 +++++++++++++++++++++--- - 2 files changed, 44 insertions(+), 5 deletions(-) - -diff --git a/board/compulab/common/mmc.c b/board/compulab/common/mmc.c -index 9fc3e68728..a5befbb618 100644 ---- a/board/compulab/common/mmc.c -+++ b/board/compulab/common/mmc.c -@@ -47,4 +47,6 @@ void board_late_mmc_env_init(void) - - sprintf(cmd, "mmc dev %d", dev_no); - run_command(cmd, 0); -+ -+ return; - } -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 5b751e0eb8..0caa4dc1b8 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -33,6 +33,9 @@ - - DECLARE_GLOBAL_DATA_PTR; - -+static int env_dev = -1; -+static int env_part= -1; -+ - #ifdef CONFIG_BOARD_POSTCLK_INIT - int board_postclk_init(void) - { -@@ -83,8 +86,30 @@ int dram_init(void) - } - - #ifdef CONFIG_OF_BOARD_SETUP -+static int fdt_set_env_addr(void *blob, bd_t *bd) -+{ -+ char tmp[32]; -+ int nodeoff = fdt_add_subnode(blob, 0, "fw_env"); -+ if(0 > nodeoff) -+ return nodeoff; -+ -+ fdt_setprop(blob, nodeoff, "env_off", tmp, sprintf(tmp, "0x%x", CONFIG_ENV_OFFSET)); -+ fdt_setprop(blob, nodeoff, "env_size", tmp, sprintf(tmp, "0x%x", CONFIG_ENV_SIZE)); -+ if(0 < env_dev) { -+ switch(env_part) { -+ case 1 ... 2: -+ fdt_setprop(blob, nodeoff, "env_dev", tmp, sprintf(tmp, "/dev/mmcblk%iboot%i", env_dev, env_part - 1)); -+ break; -+ default: -+ fdt_setprop(blob, nodeoff, "env_dev", tmp, sprintf(tmp, "/dev/mmcblk%i", env_dev)); -+ break; -+ } -+ } -+} -+ - int ft_board_setup(void *blob, bd_t *bd) - { -+ fdt_set_env_addr(blob, bd); - return 0; - } - #endif -@@ -230,27 +255,32 @@ int board_mmc_get_env_dev(int devno) - return devno; - } - --static int _mmc_get_env_part(void) -+static int _mmc_get_env_part(struct mmc *mmc) - { - const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); - if (user_env_part != ULONG_MAX) { - printf("User Environment part# is (%lu)\n", user_env_part); - return (int)user_env_part; - } -- return CONFIG_SYS_MMC_ENV_PART; -+ -+ return EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); - } - - uint mmc_get_env_part(struct mmc *mmc) - { -- if (mmc->part_support) -- return _mmc_get_env_part(); -- -+ if (mmc->part_support && mmc->part_config != MMCPART_NOAVAILABLE) { -+ uint partno = _mmc_get_env_part(mmc); -+ env_part = partno; -+ return partno; -+ } - return 0; - } - - static void board_bootdev_init(void) - { - u32 bootdev = get_boot_device(); -+ struct mmc *mmc; -+ - switch (bootdev) { - case MMC3_BOOT: - bootdev = 2; -@@ -262,6 +292,13 @@ static void board_bootdev_init(void) - env_set("bootdev", NULL); - return; - } -+ -+ env_dev = bootdev; -+ -+ mmc = find_mmc_device(bootdev); -+ if (mmc && mmc->part_support && mmc->part_config != MMCPART_NOAVAILABLE) -+ env_part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); -+ - env_set_ulong("bootdev", bootdev); - } - --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0082-fw_utils-Enable-actual-env-address-readout.patch b/recipes-bsp/u-boot/compulab/imx8mm/0082-fw_utils-Enable-actual-env-address-readout.patch deleted file mode 100644 index d9dc781..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0082-fw_utils-Enable-actual-env-address-readout.patch +++ /dev/null @@ -1,131 +0,0 @@ -From c45a4fa08e41dbdbe001cf1151c63bebd328005b Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Thu, 8 Oct 2020 20:38:21 +0300 -Subject: [PATCH 82/91] fw_utils: Enable actual env address readout - -Signed-off-by: Kirill Kapranov ---- - tools/env/fw_env_main.c | 66 +++++++++++++++++++++++++++++++++++++- - tools/env/fw_env_private.h | 1 + - 2 files changed, 66 insertions(+), 1 deletion(-) - -diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c -index ca9ad78014..8d247ae910 100644 ---- a/tools/env/fw_env_main.c -+++ b/tools/env/fw_env_main.c -@@ -50,6 +50,7 @@ static struct option long_options[] = { - {"lock", required_argument, NULL, 'l'}, - {"version", no_argument, NULL, 'v'}, - {"env", no_argument, NULL, 'e'}, -+ {"viadt", no_argument, NULL, 'E'}, - {NULL, 0, NULL, 0} - }; - -@@ -76,6 +77,9 @@ void usage_printenv(void) - " -n, --noheader do not repeat variable name in output\n" - " -l, --lock lock node, default:/var/lock\n" - " -e, --env print default fw_env.config\n" -+#ifdef CONFIG_DT_NODE -+ " -E, --viadt print environment passed via devicetree\n" -+#endif - "\n"); - } - -@@ -114,6 +118,61 @@ void usage_env_set(void) - "\n"); - } - -+ -+#if defined(CONFIG_DT_NODE) -+ -+#define GET_PROP_i(NAME) int NAME = read_dt_prop_int( CONFIG_DT_NODE "/" #NAME, NULL ) -+#define GET_PROP_s(NAME) char* NAME = NULL; read_dt_prop_int( CONFIG_DT_NODE "/" #NAME , &NAME) -+#define CLEAR_s(NAME) if(NAME) free(NAME) -+ -+static int read_dt_prop_int(const char *name, char** str) -+{ -+ FILE *fp; -+ int retval; -+ char *buf = NULL; -+ size_t count = 0; -+ -+ fp = fopen(name, "r"); -+ if(fp == NULL) { -+ fprintf(stderr, "Can't open property %s %m\n", name); -+ return -1; -+ } -+ -+ retval = getline(&buf, &count, fp); -+ fclose(fp); -+ if(0 < retval) { -+ if(str) { //extract a string property -+ *str = buf; -+ return 0; -+ } -+ else { //extract a integer property -+ retval = strtoul(buf, NULL, 0); -+ } -+ } -+ -+ CLEAR_s(buf); -+ -+ return retval; -+} -+ -+int get_config_via_dt(void) -+{ -+ GET_PROP_i(env_size); -+ GET_PROP_i(env_off); -+ GET_PROP_s(env_dev); -+ -+ if( !env_dev || 0 >= env_size || 0>= env_off) { -+ fprintf(stderr, "Valid DT node %s not found\n", CONFIG_DT_NODE); -+ return -1; -+ } -+ -+ printf("%s\t0x%x\t0x%x\n", env_dev, env_off, env_size); -+ -+ CLEAR_s(env_dev); -+ -+ return 0; -+} -+#endif - static void parse_common_args(int argc, char *argv[]) - { - int c; -@@ -122,7 +181,7 @@ static void parse_common_args(int argc, char *argv[]) - env_opts.config_file = CONFIG_FILE; - #endif - -- while ((c = getopt_long(argc, argv, ":a:c:l:h:ve", long_options, NULL)) != -+ while ((c = getopt_long(argc, argv, ":a:c:l:h:veE", long_options, NULL)) != - EOF) { - switch (c) { - #ifdef CONFIG_FILE -@@ -146,6 +205,11 @@ static void parse_common_args(int argc, char *argv[]) - fprintf(stdout, "/dev/mmcblk1 0x%x 0x%x\n", CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE); - exit(EXIT_SUCCESS); - break; -+#if defined(CONFIG_DT_NODE) -+ case 'E': -+ exit(get_config_via_dt()); -+ break; -+#endif - default: - /* ignore unknown options */ - break; -diff --git a/tools/env/fw_env_private.h b/tools/env/fw_env_private.h -index 86be16dabc..9c3b7bf50c 100644 ---- a/tools/env/fw_env_private.h -+++ b/tools/env/fw_env_private.h -@@ -22,6 +22,7 @@ - * for notes on configuration. - */ - #define CONFIG_FILE "/etc/fw_env.config" -+#define CONFIG_DT_NODE "/sys/firmware/devicetree/base/fw_env" - - #ifndef CONFIG_FILE - #define HAVE_REDUND /* For systems with 2 env sectors */ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0083-SPL-Disable-fake-memsize-report.patch b/recipes-bsp/u-boot/compulab/imx8mm/0083-SPL-Disable-fake-memsize-report.patch deleted file mode 100644 index 26ebfcd..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0083-SPL-Disable-fake-memsize-report.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 8591a1f2d32ecbc57e2759f73d1d47372bd6febd Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Thu, 22 Oct 2020 21:02:05 +0300 -Subject: [PATCH 83/91] SPL: Disable fake memsize report - -The SPL can reports to U-boot a fake memsize, read from EEPROM. This feature is purposed only for -debug; it may be enabled using config. - -Signed-off-by: Kirill Kapranov ---- - arch/arm/mach-imx/imx8m/Kconfig | 1 + - board/compulab/plat/Kconfig | 11 +++++++++++ - board/compulab/plat/imx8/eeprom/eeprom_spl.c | 4 ++++ - board/compulab/plat/imx8mm/ddr/ddr.c | 9 +++++++-- - 4 files changed, 23 insertions(+), 2 deletions(-) - create mode 100644 board/compulab/plat/Kconfig - -diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig -index 1664a9c1d0..33e56e79fb 100644 ---- a/arch/arm/mach-imx/imx8m/Kconfig -+++ b/arch/arm/mach-imx/imx8m/Kconfig -@@ -239,5 +239,6 @@ source "board/phytec/phycore_imx8mp/Kconfig" - source "board/compulab/ucm-imx8m-mini/Kconfig" - source "board/compulab/mcm-imx8m-mini/Kconfig" - source "board/compulab/iot-gate-imx8/Kconfig" -+source "board/compulab/plat/Kconfig" - - endif -diff --git a/board/compulab/plat/Kconfig b/board/compulab/plat/Kconfig -new file mode 100644 -index 0000000000..af14b8b642 ---- /dev/null -+++ b/board/compulab/plat/Kconfig -@@ -0,0 +1,11 @@ -+menu "Compulab platform features" -+ depends on TARGET_UCM_IMX8M_MINI || TARGET_MCM_IMX8M_MINI || TARGET_IOT_GATE_IMX8 -+ -+config SPL_REPORT_FAKE_MEMSIZE -+ bool "SPL passes a fake DRAM size to U-Boot" -+ default n -+ help -+ SPL passes to the U-Boot a value from EEPROM instead of a real memory -+ size. For debug purposes ONLY!!! -+ -+endmenu -diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -index ece6b38101..ed7bc96cd4 100644 ---- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c -+++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c -@@ -86,9 +86,11 @@ static u8 board_ddrsubind = 0xff; - #define BOARD_DRATE_SIZE 4 - static u32 board_drate = 0xdeadbeef; - -+#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE - #define BOARD_OSIZE_OFFSET 0x80 - #define BOARD_OSIZE_SIZE 4 - static u32 board_osize = 0xdeadbeef; -+#endif - - #define BOARD_DDRINFO_VALID(A) (A != 0xdeadbeef) - -@@ -149,6 +151,7 @@ u8 cl_eeprom_set_subind(u8 ddrsubind) - return board_ddrsubind; - }; - -+#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE - /* override-size ifaces */ - u32 cl_eeprom_get_osize(void) - { -@@ -167,5 +170,6 @@ u32 cl_eeprom_set_osize(u32 osize) - - return board_osize; - }; -+#endif //CONFIG_SPL_REPORT_FAKE_MEMSIZE - - #endif -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index bea5f7c3dc..9d463cef13 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -21,8 +21,9 @@ u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); - u32 cl_eeprom_get_subind(void); - u32 cl_eeprom_set_subind(u32 subind); - -+#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE - u32 cl_eeprom_get_osize(void); -- -+#endif - static unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr) - { - unsigned int tmp; -@@ -201,7 +202,7 @@ void spl_dram_init(void) - printf("DDRINFO(EEPROM): i2c dev 1; i2c md 0x51 0x40 0x50\n"); - } - } -- -+#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE - /* Pass the dram size to th U-Boot through the tcm memory */ - { /* To figure out what to store into the TCM buffer */ - /* For debug purpouse only. To override the real memsize */ -@@ -211,4 +212,8 @@ void spl_dram_init(void) - - lpddr4_tcm_desc->size = ddr_tcm_size; - } -+#else -+ lpddr4_tcm_desc->size = lpddr4_array[i].size; -+#endif -+ - } --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0084-fdt-Add-export-SoM-data-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0084-fdt-Add-export-SoM-data-via-FDT.patch deleted file mode 100644 index bea7dd6..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0084-fdt-Add-export-SoM-data-via-FDT.patch +++ /dev/null @@ -1,184 +0,0 @@ -From af8945a574d2cfde0e05192da479c0c9d501d788 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 3 Nov 2020 22:20:00 +0200 -Subject: [PATCH 84/91] fdt: Add export SoM data via FDT - -Export via FDT the following data: - board options - board revision (major) - product name - serial number - -Signed-off-by: Kirill Kapranov ---- - board/compulab/common/eeprom.c | 40 +++++++++++++++++------- - board/compulab/common/eeprom.h | 22 +++++++++++++ - board/compulab/plat/imx8mm/board/board.c | 28 +++++++++++++++++ - 3 files changed, 79 insertions(+), 11 deletions(-) - -diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c -index ebcafac04b..95467149f3 100644 ---- a/board/compulab/common/eeprom.c -+++ b/board/compulab/common/eeprom.c -@@ -35,17 +35,6 @@ - # define CONFIG_SYS_I2C_EEPROM_BUS_SB 0 - #endif - --#define EEPROM_LAYOUT_VER_OFFSET 44 --#define BOARD_SERIAL_OFFSET 20 --#define BOARD_SERIAL_OFFSET_LEGACY 8 --#define BOARD_REV_OFFSET 0 --#define BOARD_REV_OFFSET_LEGACY 6 --#define BOARD_REV_SIZE 2 --#define PRODUCT_NAME_OFFSET 128 --#define PRODUCT_NAME_SIZE 16 --#define MAC_ADDR_OFFSET 4 --#define MAC_ADDR_OFFSET_LEGACY 0 -- - #define LAYOUT_INVALID 0 - #define LAYOUT_LEGACY 0xff - -@@ -238,6 +227,30 @@ int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus __attribute__((unused - return err; - } - -+static int cl_eeprom_read_options(char *buf, const struct eeprom_path *eeprom) -+{ -+ int len = 0; -+ int err; -+ uchar tmp[PRODUCT_OPTION_SIZE]; -+ -+ err = cl_eeprom_setup(eeprom); -+ if (err) { -+ printf("%s: Error accesing i2c %x@%x\n", __func__, eeprom->bus, eeprom->chip); -+ return snprintf(buf, PRODUCT_NAME_SIZE, "unknown"); -+ } -+ -+ for(int i = 0; i < PRODUCT_OPTION_NUM; ++i) { -+ err = cl_eeprom_read(PRODUCT_OPTION_OFFSET + PRODUCT_OPTION_SIZE * i, tmp, PRODUCT_OPTION_SIZE); -+ if (!err && tmp[0] != 0xff) // Check if the flash isn't written -+ len += snprintf(buf + len, PRODUCT_OPTION_SIZE, (char*)tmp); -+ } -+ return len; -+} -+int cl_eeprom_read_som_options(char *buf) -+{ -+ return cl_eeprom_read_options(buf, &eeprom_som); -+} -+ - static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) - { - int len; -@@ -257,6 +270,11 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr - - return len; - } -+int cl_eeprom_read_som_name(char *buf) -+{ -+ return cl_eeprom_read_product_name(buf, &eeprom_som); -+} -+ - void cl_eeprom_get_suite(char *buf) - { - buf += cl_eeprom_read_product_name(buf, &eeprom_som); -diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h -index d366f59288..dd7d82d855 100644 ---- a/board/compulab/common/eeprom.h -+++ b/board/compulab/common/eeprom.h -@@ -11,11 +11,28 @@ - #define _EEPROM_ - #include - -+#define EEPROM_LAYOUT_VER_OFFSET 44 -+#define BOARD_SERIAL_OFFSET 20 -+#define BOARD_SERIAL_OFFSET_LEGACY 8 -+#define BOARD_REV_OFFSET 0 -+#define BOARD_REV_OFFSET_LEGACY 6 -+#define BOARD_REV_SIZE 2 -+#define PRODUCT_NAME_OFFSET 128 -+#define PRODUCT_NAME_SIZE 16 -+#define PRODUCT_OPTION_OFFSET 144 -+#define PRODUCT_OPTION_SIZE 16 -+#define PRODUCT_OPTION_NUM 5 -+#define MAC_ADDR_OFFSET 4 -+#define MAC_ADDR_OFFSET_LEGACY 0 -+ - #if (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)) - int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); - u32 cl_eeprom_get_board_rev(uint eeprom_bus); - int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); -+int cl_eeprom_read_som_name(char *buf); -+int cl_eeprom_read_som_options(char *buf); - void cl_eeprom_get_suite(char* buf); -+void cpl_get_board_serial(struct tag_serialnr *serialnr); - #else - static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) - { -@@ -29,6 +46,11 @@ static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) - { - return -ENOSYS; - } -+static inline void cpl_get_board_serial(struct tag_serialnr *serialnr) -+{ -+ return 0; -+} -+ - #endif - - #endif -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 0caa4dc1b8..0801844bfe 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - #include - #include - #include "ddr/ddr.h" -@@ -86,6 +87,32 @@ int dram_init(void) - } - - #ifdef CONFIG_OF_BOARD_SETUP -+static void fdt_set_sn(void *blob) -+{ -+ u32 rev; -+ char buf[100]; -+ int len; -+ union { -+ struct tag_serialnr s; -+ u64 u; -+ } serialnr; -+ -+ len = cl_eeprom_read_som_name(buf); -+ fdt_setprop(blob, 0, "product-name", buf, len); -+ -+ cpl_get_board_serial(&serialnr.s); -+ fdt_setprop(blob, 0, "serial-number", buf, sprintf(buf, "%llx", serialnr.u) + 1); -+ -+ rev = cl_eeprom_get_board_rev(0); -+ fdt_setprop(blob, 0, "board-revision", buf, -+ sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); -+ -+ len = cl_eeprom_read_som_options(buf); -+ fdt_setprop(blob, 0, "board-options", buf, len); -+ -+ return; -+} -+ - static int fdt_set_env_addr(void *blob, bd_t *bd) - { - char tmp[32]; -@@ -110,6 +137,7 @@ static int fdt_set_env_addr(void *blob, bd_t *bd) - int ft_board_setup(void *blob, bd_t *bd) - { - fdt_set_env_addr(blob, bd); -+ fdt_set_sn(blob); - return 0; - } - #endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0085-board-minor-cleaninig.patch b/recipes-bsp/u-boot/compulab/imx8mm/0085-board-minor-cleaninig.patch deleted file mode 100644 index 401cd39..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0085-board-minor-cleaninig.patch +++ /dev/null @@ -1,40 +0,0 @@ -From ee5bba5f883f8bd2e380815b4343fc360c2a35d4 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sat, 7 Nov 2020 22:25:40 +0200 -Subject: [PATCH 85/91] board: minor cleaninig - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/board/board.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 0801844bfe..8d7963f2a5 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -113,7 +113,7 @@ static void fdt_set_sn(void *blob) - return; - } - --static int fdt_set_env_addr(void *blob, bd_t *bd) -+static int fdt_set_env_addr(void *blob) - { - char tmp[32]; - int nodeoff = fdt_add_subnode(blob, 0, "fw_env"); -@@ -132,11 +132,12 @@ static int fdt_set_env_addr(void *blob, bd_t *bd) - break; - } - } -+ return 0; - } - - int ft_board_setup(void *blob, bd_t *bd) - { -- fdt_set_env_addr(blob, bd); -+ fdt_set_env_addr(blob); - fdt_set_sn(blob); - return 0; - } --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0086-rtc-Disable-bus-when-powered-from-battery.patch b/recipes-bsp/u-boot/compulab/imx8mm/0086-rtc-Disable-bus-when-powered-from-battery.patch deleted file mode 100644 index a7ed954..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0086-rtc-Disable-bus-when-powered-from-battery.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 6d0611fe5ce5a57be217e7c00432cfe75af085e4 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 18 Nov 2020 22:10:58 +0200 -Subject: [PATCH 86/91] rtc: Disable bus when powered from battery - -Signed-off-by: Kirill Kapranov ---- - board/compulab/common/rtc.h | 20 +++++++++++++++++ - board/compulab/plat/imx8mm/board/board.c | 28 ++++++++++++++++++++++++ - 2 files changed, 48 insertions(+) - create mode 100644 board/compulab/common/rtc.h - -diff --git a/board/compulab/common/rtc.h b/board/compulab/common/rtc.h -new file mode 100644 -index 0000000000..b5927a86f4 ---- /dev/null -+++ b/board/compulab/common/rtc.h -@@ -0,0 +1,20 @@ -+#ifndef _RTC_H_ -+#define _RTC_H_ -+ -+ -+#ifndef CONFIG_SYS_I2C_RTC_BUS -+#define CONFIG_SYS_I2C_RTC_BUS 1 -+#endif -+ -+#ifndef CONFIG_SYS_I2C_RTC_ADDR -+#define CONFIG_SYS_I2C_RTC_ADDR 0x69 -+#endif -+ -+#define ABX8XX_REG_CFG_KEY 0x1f -+#define ABX8XX_CFG_KEY_MISC 0x9d -+ -+#define ABX8XX_REG_BATMODE 0x27 -+#define ABX8XX_BATMODE_IOBM_NOT 0 -+ -+#endif //_RTC_H_ -+ -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 8d7963f2a5..405b681e4d 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -31,6 +31,7 @@ - #include - #include "ddr/ddr.h" - #include "common/eeprom.h" -+#include "common/rtc.h" - - DECLARE_GLOBAL_DATA_PTR; - -@@ -257,9 +258,36 @@ static void show_suite_info(void) - return; - } - -+static void disable_rtc_bus_on_battery(void) -+{ -+ struct udevice *bus, *dev; -+ int ret; -+ -+ ret = uclass_get_device_by_seq(UCLASS_I2C, CONFIG_SYS_I2C_RTC_BUS, &bus); -+ if (ret) { -+ printf("%s: No bus %d\n", __func__, CONFIG_SYS_I2C_RTC_BUS); -+ return; -+ } -+ -+ ret = dm_i2c_probe(bus, CONFIG_SYS_I2C_RTC_ADDR, 0, &dev); -+ if (ret) { -+ printf("%s: Can't find device id=0x%x, on bus %d\n", -+ __func__, CONFIG_SYS_I2C_RTC_BUS, CONFIG_SYS_I2C_RTC_ADDR); -+ return; -+ } -+ -+ if((ret = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY, ABX8XX_CFG_KEY_MISC)) || -+ (ret = dm_i2c_reg_write(dev, ABX8XX_REG_BATMODE, ABX8XX_BATMODE_IOBM_NOT))) -+ printf("%s: i2c write error %d\n", __func__, ret); -+ -+ return; -+} -+ - int board_init(void) - { - -+ disable_rtc_bus_on_battery(); -+ - #ifdef CONFIG_FEC_MXC - setup_fec(); - #endif --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0087-fdt-Add-export-of-base-board-data-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0087-fdt-Add-export-of-base-board-data-via-FDT.patch deleted file mode 100644 index 79d59bd..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0087-fdt-Add-export-of-base-board-data-via-FDT.patch +++ /dev/null @@ -1,191 +0,0 @@ -From feb66e99631ac1c9ee7cd0cb0847e921c5f9a5c1 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sun, 6 Dec 2020 23:11:15 +0200 -Subject: [PATCH 87/91] fdt: Add export of base board data via FDT - -Export via FDT the following data: - base board options - base board revision (major) - base board name - base board serial number - -Signed-off-by: Kirill Kapranov ---- - board/compulab/common/eeprom.c | 46 ++++++++++++++++++++++-- - board/compulab/common/eeprom.h | 17 ++++----- - board/compulab/plat/imx8mm/board/board.c | 23 +++++++++--- - 3 files changed, 67 insertions(+), 19 deletions(-) - -diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c -index 95467149f3..c1d321361c 100644 ---- a/board/compulab/common/eeprom.c -+++ b/board/compulab/common/eeprom.c -@@ -124,14 +124,14 @@ static int cl_eeprom_setup(const struct eeprom_path *eeprom) - return 0; - } - --void cpl_get_board_serial(struct tag_serialnr *serialnr) -+static void cpl_get_board_serial(struct tag_serialnr *serialnr, const struct eeprom_path *eeprom) - { - u32 serial[2]; - uint offset; - - memset(serialnr, 0, sizeof(*serialnr)); - -- if (cl_eeprom_setup(&eeprom_som)) -+ if (cl_eeprom_setup(eeprom)) - return; - - offset = (cl_eeprom_layout != LAYOUT_LEGACY) ? -@@ -145,6 +145,14 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) - serialnr->high = serial[1]; - } - } -+inline void cpl_get_som_serial(struct tag_serialnr *serialnr) -+{ -+ return cpl_get_board_serial(serialnr, &eeprom_som); -+} -+inline void cpl_get_sb_serial(struct tag_serialnr *serialnr) -+{ -+ return cpl_get_board_serial(serialnr, &eeprom_sb); -+} - - /* - * Routine: cl_eeprom_read_mac_addr -@@ -198,7 +206,29 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus __attribute__((unused))) - } - - return board_rev; --}; -+} -+ -+static u32 cl_eeprom_get_revision(const struct eeprom_path *eeprom) -+{ -+ u32 revision; -+ -+ if (cl_eeprom_setup(eeprom)) -+ return 0; -+ -+ if (cl_eeprom_read(BOARD_REV_OFFSET, (uchar *)&revision, BOARD_REV_SIZE)) -+ return 0; -+ -+ return revision; -+} -+u32 cl_eeprom_get_som_revision(void) -+{ -+ return cl_eeprom_get_revision(&eeprom_som); -+} -+u32 cl_eeprom_get_sb_revision(void) -+{ -+ return cl_eeprom_get_revision(&eeprom_sb); -+} -+ - - /* - * Routine: cl_eeprom_get_board_rev -@@ -250,6 +280,10 @@ int cl_eeprom_read_som_options(char *buf) - { - return cl_eeprom_read_options(buf, &eeprom_som); - } -+int cl_eeprom_read_sb_options(char *buf) -+{ -+ return cl_eeprom_read_options(buf, &eeprom_sb); -+} - - static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) - { -@@ -270,6 +304,12 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr - - return len; - } -+ -+int cl_eeprom_read_sb_name(char *buf) -+{ -+ return cl_eeprom_read_product_name(buf, &eeprom_sb); -+} -+ - int cl_eeprom_read_som_name(char *buf) - { - return cl_eeprom_read_product_name(buf, &eeprom_som); -diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h -index dd7d82d855..6d447a6fac 100644 ---- a/board/compulab/common/eeprom.h -+++ b/board/compulab/common/eeprom.h -@@ -27,30 +27,25 @@ - - #if (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)) - int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); --u32 cl_eeprom_get_board_rev(uint eeprom_bus); -+u32 cl_eeprom_get_som_revision(void); -+u32 cl_eeprom_get_sb_revision(void); - int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); -+int cl_eeprom_read_sb_name(char *buf); - int cl_eeprom_read_som_name(char *buf); - int cl_eeprom_read_som_options(char *buf); -+int cl_eeprom_read_sb_options(char *buf); - void cl_eeprom_get_suite(char* buf); --void cpl_get_board_serial(struct tag_serialnr *serialnr); -+void cpl_get_som_serial(struct tag_serialnr *serialnr); -+void cpl_get_sb_serial(struct tag_serialnr *serialnr); - #else - static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) - { - return 1; - } --static inline u32 cl_eeprom_get_board_rev(uint eeprom_bus) --{ -- return 0; --} - static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) - { - return -ENOSYS; - } --static inline void cpl_get_board_serial(struct tag_serialnr *serialnr) --{ -- return 0; --} -- - #endif - - #endif -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 405b681e4d..13bb161e51 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -101,15 +101,28 @@ static void fdt_set_sn(void *blob) - len = cl_eeprom_read_som_name(buf); - fdt_setprop(blob, 0, "product-name", buf, len); - -- cpl_get_board_serial(&serialnr.s); -- fdt_setprop(blob, 0, "serial-number", buf, sprintf(buf, "%llx", serialnr.u) + 1); -+ len = cl_eeprom_read_sb_name(buf); -+ fdt_setprop(blob, 0, "baseboard-name", buf, len); - -- rev = cl_eeprom_get_board_rev(0); -- fdt_setprop(blob, 0, "board-revision", buf, -+ cpl_get_som_serial(&serialnr.s); -+ fdt_setprop(blob, 0, "product-sn", buf, sprintf(buf, "%llx", serialnr.u) + 1); -+ -+ cpl_get_sb_serial(&serialnr.s); -+ fdt_setprop(blob, 0, "baseboard-sn", buf, sprintf(buf, "%llx", serialnr.u) + 1); -+ -+ rev = cl_eeprom_get_som_revision(); -+ fdt_setprop(blob, 0, "product-revision", buf, -+ sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); -+ -+ rev = cl_eeprom_get_sb_revision(); -+ fdt_setprop(blob, 0, "baseboard-revision", buf, - sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); - - len = cl_eeprom_read_som_options(buf); -- fdt_setprop(blob, 0, "board-options", buf, len); -+ fdt_setprop(blob, 0, "product-options", buf, len); -+ -+ len = cl_eeprom_read_sb_options(buf); -+ fdt_setprop(blob, 0, "baseboard-options", buf, len); - - return; - } --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0088-spl-ddr-Enable-DDR-ID-0x1060008.patch b/recipes-bsp/u-boot/compulab/imx8mm/0088-spl-ddr-Enable-DDR-ID-0x1060008.patch deleted file mode 100644 index 5213d1e..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0088-spl-ddr-Enable-DDR-ID-0x1060008.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a8e8cd9b2b280e57cd0fc05f9a346d416f3e9225 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sun, 14 Feb 2021 22:59:10 +0200 -Subject: [PATCH 88/91] spl:ddr: Enable DDR ID 0x1060008 - -Enable Samsung 1G chip. - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/ddr/ddr.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 9d463cef13..941065c129 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -77,6 +77,7 @@ static const struct lpddr4_desc lpddr4_array[] = { - #endif - { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, -+ { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0089-drivers-video-Add-startek-ili9881c-panel-driver.patch b/recipes-bsp/u-boot/compulab/imx8mm/0089-drivers-video-Add-startek-ili9881c-panel-driver.patch deleted file mode 100644 index 6154b2f..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0089-drivers-video-Add-startek-ili9881c-panel-driver.patch +++ /dev/null @@ -1,559 +0,0 @@ -From 207e82f7e6edb62992e3b83c4048f29868570c1d Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 19 Jul 2021 16:31:04 +0300 -Subject: [PATCH 89/91] drivers: video: Add startek-ili9881c panel driver - -Signed-off-by: Kirill Kapranov ---- - drivers/video/Kconfig | 9 + - drivers/video/Makefile | 1 + - drivers/video/startek-ili9881c.c | 505 +++++++++++++++++++++++++++++++ - 3 files changed, 515 insertions(+) - create mode 100644 drivers/video/startek-ili9881c.c - -diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 653e6d72a7..a13d90f3d1 100644 ---- a/drivers/video/Kconfig -+++ b/drivers/video/Kconfig -@@ -439,6 +439,15 @@ config VIDEO_LCD_RAYDIUM_RM67191 - Say Y here if you want to enable support for Raydium RM68200 - 1080x1920 DSI video mode panel. - -+config VIDEO_LCD_STARTEK_ILI9881C -+ tristate "Startek ILI9881C-based panels" -+ depends on DM_VIDEO -+ select VIDEO_MIPI_DSI -+ default n -+ help -+ Say Y if you want to enable support for panels based on the -+ Startek panel with an ILI9881c controller. -+ - config VIDEO_LCD_SSD2828 - bool "SSD2828 bridge chip" - default n -diff --git a/drivers/video/Makefile b/drivers/video/Makefile -index bd6056ccf1..c48cde4760 100644 ---- a/drivers/video/Makefile -+++ b/drivers/video/Makefile -@@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o - obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o - obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o - obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM67191) += raydium-rm67191.o -+obj-$(CONFIG_VIDEO_LCD_STARTEK_ILI9881C) += startek-ili9881c.o - obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o - obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o - obj-$(CONFIG_VIDEO_ADV7535) += adv7535.o -diff --git a/drivers/video/startek-ili9881c.c b/drivers/video/startek-ili9881c.c -new file mode 100644 -index 0000000000..d7c32a0de4 ---- /dev/null -+++ b/drivers/video/startek-ili9881c.c -@@ -0,0 +1,505 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2019 NXP -+ * Copyright 2021 CompuLab LTD. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define LCD_XSIZE_TFT 720 -+#define LCD_YSIZE_TFT 1280 -+#define PCLOCK 62000 -+#define LCD_VBPD 20 -+#define LCD_VFPD 10 -+#define LCD_VSPW 10 -+#define LCD_HBPD 30 -+#define LCD_HFPD 10 -+#define LCD_HSPW 20 -+ -+enum ili9881c_op { -+ ILI9881C_SWITCH_PAGE, -+ ILI9881C_COMMAND, -+}; -+ -+struct ili9881c_instr { -+ enum ili9881c_op op; -+ -+ union arg { -+ struct cmd { -+ u8 cmd; -+ u8 data; -+ } cmd; -+ u8 page; -+ } arg; -+}; -+ -+#define ILI9881C_SWITCH_PAGE_INSTR(_page) \ -+ { \ -+ .op = ILI9881C_SWITCH_PAGE, \ -+ .arg = { \ -+ .page = (_page), \ -+ }, \ -+ } -+ -+#define ILI9881C_COMMAND_INSTR(_cmd, _data) \ -+ { \ -+ .op = ILI9881C_COMMAND, \ -+ .arg = { \ -+ .cmd = { \ -+ .cmd = (_cmd), \ -+ .data = (_data), \ -+ }, \ -+ }, \ -+ } -+ -+static const struct ili9881c_instr ili9881c_init[] = { -+ ILI9881C_SWITCH_PAGE_INSTR(3), -+ ILI9881C_COMMAND_INSTR(0x01, 0x00), -+ ILI9881C_COMMAND_INSTR(0x02, 0x00), -+ ILI9881C_COMMAND_INSTR(0x03, 0x72), -+ ILI9881C_COMMAND_INSTR(0x04, 0x00), -+ ILI9881C_COMMAND_INSTR(0x05, 0x00), -+ ILI9881C_COMMAND_INSTR(0x06, 0x09), -+ ILI9881C_COMMAND_INSTR(0x07, 0x00), -+ ILI9881C_COMMAND_INSTR(0x08, 0x00), -+ ILI9881C_COMMAND_INSTR(0x09, 0x01), -+ ILI9881C_COMMAND_INSTR(0x0a, 0x00), -+ ILI9881C_COMMAND_INSTR(0x0b, 0x00), -+ ILI9881C_COMMAND_INSTR(0x0c, 0x01), -+ ILI9881C_COMMAND_INSTR(0x0d, 0x00), -+ ILI9881C_COMMAND_INSTR(0x0e, 0x00), -+ ILI9881C_COMMAND_INSTR(0x0f, 0x00), -+ ILI9881C_COMMAND_INSTR(0x10, 0x00), -+ ILI9881C_COMMAND_INSTR(0x11, 0x00), -+ ILI9881C_COMMAND_INSTR(0x12, 0x00), -+ ILI9881C_COMMAND_INSTR(0x13, 0x00), -+ ILI9881C_COMMAND_INSTR(0x14, 0x00), -+ ILI9881C_COMMAND_INSTR(0x15, 0x00), -+ ILI9881C_COMMAND_INSTR(0x16, 0x00), -+ ILI9881C_COMMAND_INSTR(0x17, 0x00), -+ ILI9881C_COMMAND_INSTR(0x18, 0x00), -+ ILI9881C_COMMAND_INSTR(0x19, 0x00), -+ ILI9881C_COMMAND_INSTR(0x1a, 0x00), -+ ILI9881C_COMMAND_INSTR(0x1b, 0x00), -+ ILI9881C_COMMAND_INSTR(0x1c, 0x00), -+ ILI9881C_COMMAND_INSTR(0x1d, 0x00), -+ ILI9881C_COMMAND_INSTR(0x1e, 0x40), -+ ILI9881C_COMMAND_INSTR(0x1f, 0x80), -+ ILI9881C_COMMAND_INSTR(0x20, 0x05), -+ ILI9881C_COMMAND_INSTR(0x20, 0x05), -+ ILI9881C_COMMAND_INSTR(0x21, 0x02), -+ ILI9881C_COMMAND_INSTR(0x22, 0x00), -+ ILI9881C_COMMAND_INSTR(0x23, 0x00), -+ ILI9881C_COMMAND_INSTR(0x24, 0x00), -+ ILI9881C_COMMAND_INSTR(0x25, 0x00), -+ ILI9881C_COMMAND_INSTR(0x26, 0x00), -+ ILI9881C_COMMAND_INSTR(0x27, 0x00), -+ ILI9881C_COMMAND_INSTR(0x28, 0x33), -+ ILI9881C_COMMAND_INSTR(0x29, 0x02), -+ ILI9881C_COMMAND_INSTR(0x2a, 0x00), -+ ILI9881C_COMMAND_INSTR(0x2b, 0x00), -+ ILI9881C_COMMAND_INSTR(0x2c, 0x00), -+ ILI9881C_COMMAND_INSTR(0x2d, 0x00), -+ ILI9881C_COMMAND_INSTR(0x2e, 0x00), -+ ILI9881C_COMMAND_INSTR(0x2f, 0x00), -+ ILI9881C_COMMAND_INSTR(0x30, 0x00), -+ ILI9881C_COMMAND_INSTR(0x31, 0x00), -+ ILI9881C_COMMAND_INSTR(0x32, 0x00), -+ ILI9881C_COMMAND_INSTR(0x32, 0x00), -+ ILI9881C_COMMAND_INSTR(0x33, 0x00), -+ ILI9881C_COMMAND_INSTR(0x34, 0x04), -+ ILI9881C_COMMAND_INSTR(0x35, 0x00), -+ ILI9881C_COMMAND_INSTR(0x36, 0x00), -+ ILI9881C_COMMAND_INSTR(0x37, 0x00), -+ ILI9881C_COMMAND_INSTR(0x38, 0x3C), -+ ILI9881C_COMMAND_INSTR(0x39, 0x00), -+ ILI9881C_COMMAND_INSTR(0x3a, 0x40), -+ ILI9881C_COMMAND_INSTR(0x3b, 0x40), -+ ILI9881C_COMMAND_INSTR(0x3c, 0x00), -+ ILI9881C_COMMAND_INSTR(0x3d, 0x00), -+ ILI9881C_COMMAND_INSTR(0x3e, 0x00), -+ ILI9881C_COMMAND_INSTR(0x3f, 0x00), -+ ILI9881C_COMMAND_INSTR(0x40, 0x00), -+ ILI9881C_COMMAND_INSTR(0x41, 0x00), -+ ILI9881C_COMMAND_INSTR(0x42, 0x00), -+ ILI9881C_COMMAND_INSTR(0x43, 0x00), -+ ILI9881C_COMMAND_INSTR(0x44, 0x00), -+ ILI9881C_COMMAND_INSTR(0x50, 0x01), -+ ILI9881C_COMMAND_INSTR(0x51, 0x23), -+ ILI9881C_COMMAND_INSTR(0x52, 0x45), -+ ILI9881C_COMMAND_INSTR(0x53, 0x67), -+ ILI9881C_COMMAND_INSTR(0x54, 0x89), -+ ILI9881C_COMMAND_INSTR(0x55, 0xab), -+ ILI9881C_COMMAND_INSTR(0x56, 0x01), -+ ILI9881C_COMMAND_INSTR(0x57, 0x23), -+ ILI9881C_COMMAND_INSTR(0x58, 0x45), -+ ILI9881C_COMMAND_INSTR(0x59, 0x67), -+ ILI9881C_COMMAND_INSTR(0x5a, 0x89), -+ ILI9881C_COMMAND_INSTR(0x5b, 0xab), -+ ILI9881C_COMMAND_INSTR(0x5c, 0xcd), -+ ILI9881C_COMMAND_INSTR(0x5d, 0xef), -+ ILI9881C_COMMAND_INSTR(0x5e, 0x11), -+ ILI9881C_COMMAND_INSTR(0x5f, 0x01), -+ ILI9881C_COMMAND_INSTR(0x60, 0x00), -+ ILI9881C_COMMAND_INSTR(0x61, 0x15), -+ ILI9881C_COMMAND_INSTR(0x62, 0x14), -+ ILI9881C_COMMAND_INSTR(0x63, 0x0E), -+ ILI9881C_COMMAND_INSTR(0x64, 0x0F), -+ ILI9881C_COMMAND_INSTR(0x65, 0x0C), -+ ILI9881C_COMMAND_INSTR(0x66, 0x0D), -+ ILI9881C_COMMAND_INSTR(0x67, 0x06), -+ ILI9881C_COMMAND_INSTR(0x68, 0x02), -+ ILI9881C_COMMAND_INSTR(0x69, 0x07), -+ ILI9881C_COMMAND_INSTR(0x6a, 0x02), -+ ILI9881C_COMMAND_INSTR(0x6b, 0x02), -+ ILI9881C_COMMAND_INSTR(0x6c, 0x02), -+ ILI9881C_COMMAND_INSTR(0x6d, 0x02), -+ ILI9881C_COMMAND_INSTR(0x6e, 0x02), -+ ILI9881C_COMMAND_INSTR(0x6f, 0x02), -+ ILI9881C_COMMAND_INSTR(0x70, 0x02), -+ ILI9881C_COMMAND_INSTR(0x71, 0x02), -+ ILI9881C_COMMAND_INSTR(0x72, 0x02), -+ ILI9881C_COMMAND_INSTR(0x73, 0x02), -+ ILI9881C_COMMAND_INSTR(0x74, 0x02), -+ ILI9881C_COMMAND_INSTR(0x75, 0x01), -+ ILI9881C_COMMAND_INSTR(0x76, 0x00), -+ ILI9881C_COMMAND_INSTR(0x77, 0x14), -+ ILI9881C_COMMAND_INSTR(0x78, 0x15), -+ ILI9881C_COMMAND_INSTR(0x79, 0x0E), -+ ILI9881C_COMMAND_INSTR(0x7a, 0x0F), -+ ILI9881C_COMMAND_INSTR(0x7b, 0x0C), -+ ILI9881C_COMMAND_INSTR(0x7c, 0x0D), -+ ILI9881C_COMMAND_INSTR(0x7d, 0x06), -+ ILI9881C_COMMAND_INSTR(0x7e, 0x02), -+ ILI9881C_COMMAND_INSTR(0x7f, 0x07), -+ ILI9881C_COMMAND_INSTR(0x80, 0x02), -+ ILI9881C_COMMAND_INSTR(0x81, 0x02), -+ ILI9881C_COMMAND_INSTR(0x83, 0x02), -+ ILI9881C_COMMAND_INSTR(0x84, 0x02), -+ ILI9881C_COMMAND_INSTR(0x85, 0x02), -+ ILI9881C_COMMAND_INSTR(0x86, 0x02), -+ ILI9881C_COMMAND_INSTR(0x87, 0x02), -+ ILI9881C_COMMAND_INSTR(0x88, 0x02), -+ ILI9881C_COMMAND_INSTR(0x89, 0x02), -+ ILI9881C_COMMAND_INSTR(0x8A, 0x02), -+ ILI9881C_SWITCH_PAGE_INSTR(0x4), -+ ILI9881C_COMMAND_INSTR(0x6C, 0x15), -+ ILI9881C_COMMAND_INSTR(0x6E, 0x2A), -+ ILI9881C_COMMAND_INSTR(0x6F, 0x33), -+ ILI9881C_COMMAND_INSTR(0x3A, 0x94), -+ ILI9881C_COMMAND_INSTR(0x8D, 0x15), -+ ILI9881C_COMMAND_INSTR(0x87, 0xBA), -+ ILI9881C_COMMAND_INSTR(0x26, 0x76), -+ ILI9881C_COMMAND_INSTR(0xB2, 0xD1), -+ ILI9881C_COMMAND_INSTR(0xB5, 0x06), -+ ILI9881C_SWITCH_PAGE_INSTR(0x1), -+ ILI9881C_COMMAND_INSTR(0x22, 0x0A), -+ ILI9881C_COMMAND_INSTR(0x31, 0x00), -+ ILI9881C_COMMAND_INSTR(0x53, 0x90), -+ ILI9881C_COMMAND_INSTR(0x55, 0xA2), -+ ILI9881C_COMMAND_INSTR(0x50, 0xB7), -+ ILI9881C_COMMAND_INSTR(0x51, 0xB7), -+ ILI9881C_COMMAND_INSTR(0x60, 0x22), -+ ILI9881C_COMMAND_INSTR(0x61, 0x00), -+ ILI9881C_COMMAND_INSTR(0x62, 0x19), -+ ILI9881C_COMMAND_INSTR(0x63, 0x10), -+ ILI9881C_COMMAND_INSTR(0xA0, 0x08), -+ ILI9881C_COMMAND_INSTR(0xA1, 0x1A), -+ ILI9881C_COMMAND_INSTR(0xA2, 0x27), -+ ILI9881C_COMMAND_INSTR(0xA3, 0x15), -+ ILI9881C_COMMAND_INSTR(0xA4, 0x17), -+ ILI9881C_COMMAND_INSTR(0xA5, 0x2A), -+ ILI9881C_COMMAND_INSTR(0xA6, 0x1E), -+ ILI9881C_COMMAND_INSTR(0xA7, 0x1F), -+ ILI9881C_COMMAND_INSTR(0xA8, 0x8B), -+ ILI9881C_COMMAND_INSTR(0xA9, 0x1B), -+ ILI9881C_COMMAND_INSTR(0xAA, 0x27), -+ ILI9881C_COMMAND_INSTR(0xAB, 0x78), -+ ILI9881C_COMMAND_INSTR(0xAC, 0x18), -+ ILI9881C_COMMAND_INSTR(0xAD, 0x18), -+ ILI9881C_COMMAND_INSTR(0xAE, 0x4C), -+ ILI9881C_COMMAND_INSTR(0xAF, 0x21), -+ ILI9881C_COMMAND_INSTR(0xB0, 0x27), -+ ILI9881C_COMMAND_INSTR(0xB1, 0x54), -+ ILI9881C_COMMAND_INSTR(0xB2, 0x67), -+ ILI9881C_COMMAND_INSTR(0xB3, 0x39), -+ ILI9881C_COMMAND_INSTR(0xC0, 0x08), -+ ILI9881C_COMMAND_INSTR(0xC1, 0x1A), -+ ILI9881C_COMMAND_INSTR(0xC2, 0x27), -+ ILI9881C_COMMAND_INSTR(0xC3, 0x15), -+ ILI9881C_COMMAND_INSTR(0xC4, 0x17), -+ ILI9881C_COMMAND_INSTR(0xC5, 0x2A), -+ ILI9881C_COMMAND_INSTR(0xC6, 0x1E), -+ ILI9881C_COMMAND_INSTR(0xC7, 0x1F), -+ ILI9881C_COMMAND_INSTR(0xC8, 0x8B), -+ ILI9881C_COMMAND_INSTR(0xC9, 0x1B), -+ ILI9881C_COMMAND_INSTR(0xCA, 0x27), -+ ILI9881C_COMMAND_INSTR(0xCB, 0x78), -+ ILI9881C_COMMAND_INSTR(0xCC, 0x18), -+ ILI9881C_COMMAND_INSTR(0xCD, 0x18), -+ ILI9881C_COMMAND_INSTR(0xCE, 0x4C), -+ ILI9881C_COMMAND_INSTR(0xCF, 0x21), -+ ILI9881C_COMMAND_INSTR(0xD0, 0x27), -+ ILI9881C_COMMAND_INSTR(0xD1, 0x54), -+ ILI9881C_COMMAND_INSTR(0xD2, 0x67), -+ ILI9881C_COMMAND_INSTR(0xD3, 0x39), -+ ILI9881C_SWITCH_PAGE_INSTR(0), -+ ILI9881C_COMMAND_INSTR(0x35, 0x00), -+ ILI9881C_COMMAND_INSTR(0x3A, 0x7), -+}; -+ -+struct ili9881c_panel_priv { -+ struct gpio_desc reset; -+ unsigned int lanes; -+ enum mipi_dsi_pixel_format format; -+ unsigned long mode_flags; -+}; -+ -+static const struct display_timing default_timing = { -+ .pixelclock.typ = ( 61776000 << 1 ), -+ .hactive.typ = LCD_XSIZE_TFT, -+ .hfront_porch.typ = LCD_HFPD, -+ .hback_porch.typ = LCD_HBPD, -+ .hsync_len.typ = LCD_HSPW, -+ .vactive.typ = LCD_YSIZE_TFT, -+ .vfront_porch.typ = LCD_VFPD, -+ .vback_porch.typ = LCD_VBPD, -+ .vsync_len.typ = LCD_VSPW, -+ .flags = DISPLAY_FLAGS_HSYNC_LOW | -+ DISPLAY_FLAGS_VSYNC_LOW | -+ DISPLAY_FLAGS_DE_LOW, -+}; -+ -+static u8 color_format_from_dsi_format(enum mipi_dsi_pixel_format format) -+{ -+ switch (format) { -+ case MIPI_DSI_FMT_RGB565: -+ return 0x55; -+ case MIPI_DSI_FMT_RGB666: -+ case MIPI_DSI_FMT_RGB666_PACKED: -+ return 0x66; -+ case MIPI_DSI_FMT_RGB888: -+ return 0x77; -+ default: -+ return 0x77; /* for backward compatibility */ -+ } -+}; -+ -+static int ili9881c_switch_page(struct mipi_dsi_device *dsi, u8 page) -+{ -+ u8 buf[4] = { 0xff, 0x98, 0x81, page }; -+ int ret; -+ -+ ret = mipi_dsi_dcs_write_buffer(dsi, buf, sizeof(buf)); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int ili9881c_send_cmd_data(struct mipi_dsi_device *dsi, u8 cmd, u8 data) -+{ -+ u8 buf[2] = { cmd, data }; -+ int ret; -+ -+ ret = mipi_dsi_dcs_write_buffer(dsi, buf, sizeof(buf)); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int ili9881c_enable(struct udevice *dev) -+{ -+ struct ili9881c_panel_priv *priv = dev_get_priv(dev); -+ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_device *dsi = plat->device; -+ u8 color_format = color_format_from_dsi_format(priv->format); -+ int ret; -+ unsigned int i; -+ -+ dsi->mode_flags |= MIPI_DSI_MODE_LPM; -+ -+ for (i = 0; i < ARRAY_SIZE(ili9881c_init); i++) { -+ const struct ili9881c_instr *instr = &ili9881c_init[i]; -+ -+ if (instr->op == ILI9881C_SWITCH_PAGE) -+ ret = ili9881c_switch_page(dsi, instr->arg.page); -+ else if (instr->op == ILI9881C_COMMAND) -+ ret = ili9881c_send_cmd_data(dsi, instr->arg.cmd.cmd, -+ instr->arg.cmd.data); -+ -+ if (ret) { -+ dev_warn(dev, "%s %d Failed command # = [ 0x%x ]; ret = [ %d ]\n",__func__,__LINE__,i,ret); -+ return ret; -+ } -+ } -+ -+ /* The default value is 4-lane mode -+ * Issue if 2-lane required -+ */ -+ if (dsi->lanes == 2) { -+ ret = ili9881c_switch_page(dsi, 1); -+ if (ret) -+ return ret; -+ -+ ret = ili9881c_send_cmd_data(dsi, 0xB7, 0x03); -+ if (ret) -+ return ret; -+ -+ ret = ili9881c_switch_page(dsi, 0); -+ if (ret) -+ return ret; -+ } -+ -+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); -+ if (ret) -+ return ret; -+ -+ /* Set tear scanline */ -+ ret = mipi_dsi_dcs_set_tear_scanline(dsi, 0x380); -+ if (ret < 0) { -+ dev_warn(dev, "Failed to set tear scanline (%d)\n", ret); -+ return ret; -+ } -+ -+ /* Set pixel format */ -+ ret = mipi_dsi_dcs_set_pixel_format(dsi, color_format); -+ if (ret < 0) { -+ dev_warn(dev, "Failed to set pixel format (%d)\n", ret); -+ return ret; -+ } -+ -+ ret = mipi_dsi_dcs_set_display_brightness(dsi, 0xffff); -+ if (ret < 0) { -+ dev_warn(dev, "Failed to set display brightness (%d)\n", ret); -+ return ret; -+ } -+ -+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi); -+ if (ret) { -+ dev_warn(dev, "Failed to exit sleep mode (%d)\n", ret); -+ return ret; -+ } -+ mdelay(120); -+ -+ ret = mipi_dsi_dcs_set_display_on(dsi); -+ if (ret) { -+ dev_warn(dev, "Failed to set display on (%d)\n", ret); -+ return ret; -+ } -+ mdelay(20); -+ -+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; -+ -+ dev_dbg(dev,"Set %d-lane mode ; Color %d\n",dsi->lanes,color_format); -+ -+ return 0; -+} -+ -+static int ili9881c_panel_enable_backlight(struct udevice *dev) -+{ -+ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_device *device = plat->device; -+ int ret; -+ -+ ret = mipi_dsi_attach(device); -+ if (ret < 0) -+ return ret; -+ -+ return ili9881c_enable(dev); -+} -+ -+static int ili9881c_panel_get_display_timing(struct udevice *dev, -+ struct display_timing *timings) -+{ -+ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_device *device = plat->device; -+ struct ili9881c_panel_priv *priv = dev_get_priv(dev); -+ -+ memcpy(timings, &default_timing, sizeof(*timings)); -+ -+ /* fill characteristics of DSI data link */ -+ if (device) { -+ device->lanes = priv->lanes; -+ device->format = priv->format; -+ device->mode_flags = priv->mode_flags; -+ } -+ -+ return 0; -+} -+ -+static int ili9881c_panel_probe(struct udevice *dev) -+{ -+ struct ili9881c_panel_priv *priv = dev_get_priv(dev); -+ int ret; -+ -+ priv->format = MIPI_DSI_FMT_RGB888; -+ priv->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE; -+ priv->mode_flags |= MIPI_DSI_MODE_VIDEO; -+ -+ ret = dev_read_u32(dev, "dsi-lanes", &priv->lanes); -+ if (ret) { -+ dev_warn(dev, "Failed to get dsi-lanes property (%d)\n", ret); -+ return ret; -+ } -+ -+ ret = gpio_request_by_name(dev, "reset-gpio", 0, &priv->reset, -+ GPIOD_IS_OUT); -+ if (ret) { -+ dev_warn(dev, "Warning: cannot get reset GPIO\n"); -+ if (ret != -ENOENT) -+ return ret; -+ } -+ -+ /* reset panel */ -+ ret = dm_gpio_set_value(&priv->reset, true); -+ if (ret) -+ dev_warn(dev, "reset gpio fails to set true\n"); -+ -+ mdelay(100); -+ -+ ret = dm_gpio_set_value(&priv->reset, false); -+ if (ret) -+ dev_warn(dev, "reset gpio fails to set true\n"); -+ -+ mdelay(100); -+ -+ return 0; -+} -+ -+static int ili9881c_panel_disable(struct udevice *dev) -+{ -+ struct ili9881c_panel_priv *priv = dev_get_priv(dev); -+ -+ dm_gpio_set_value(&priv->reset, true); -+ -+ return 0; -+} -+ -+static const struct panel_ops ili9881c_panel_ops = { -+ .enable_backlight = ili9881c_panel_enable_backlight, -+ .get_display_timing = ili9881c_panel_get_display_timing, -+}; -+ -+static const struct udevice_id ili9881c_panel_ids[] = { -+ { .compatible = "startek,ili9881c" }, -+ { } -+}; -+ -+U_BOOT_DRIVER(ili9881c_panel) = { -+ .name = "ili9881c_panel", -+ .id = UCLASS_PANEL, -+ .of_match = ili9881c_panel_ids, -+ .ops = &ili9881c_panel_ops, -+ .probe = ili9881c_panel_probe, -+ .remove = ili9881c_panel_disable, -+ .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), -+ .priv_auto_alloc_size = sizeof(struct ili9881c_panel_priv), -+}; --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0090-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0090-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch deleted file mode 100644 index 175ce95..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0090-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch +++ /dev/null @@ -1,160 +0,0 @@ -From d8f1eaa1b7b0a57bd3745c4948400d419aa70a32 Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 24 Feb 2021 15:02:17 +0200 -Subject: [PATCH 90/91] cpl-imx8m-mini: Enable startek-ili9881c panel support - -Signed-off-by: Valentin Raevsky ---- - arch/arm/dts/cpl-imx8m-mini.dtsi | 57 ++++++++++++++++++++++++ - board/compulab/plat/imx8mm/board/board.c | 8 ++++ - include/configs/cpl-imx8m-mini.h | 7 +-- - 3 files changed, 69 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -index c37ad9c71d..98cdae0d22 100644 ---- a/arch/arm/dts/cpl-imx8m-mini.dtsi -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -43,6 +43,26 @@ - default-state = "on"; - }; - }; -+ -+ dsi_host: dsi-host { -+ compatible = "samsung,sec-mipi-dsi"; -+ status = "okay"; -+ }; -+ -+ ili9881c_panel { -+ compatible = "startek,ili9881c"; -+ reset-gpio = <&pca9555 6 GPIO_ACTIVE_LOW>; -+ dsi-lanes = <4>; -+ panel-width-mm = <63>; -+ panel-height-mm = <115>; -+ status = "okay"; -+ -+ port { -+ ili9881c_from_dsim: endpoint { -+ remote-endpoint = <&ili9881c_to_dsim>; -+ }; -+ }; -+ }; - }; - - &iomuxc { -@@ -245,6 +265,12 @@ - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - -+ pca9555:pca9555@20 { -+ compatible = "nxp,pca9555"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ reg = <0x20>; -+ }; - }; - - &i2c2 { -@@ -410,6 +436,24 @@ - status = "disabled"; - }; - -+&lcdif { -+ display = <&display0>; -+ status = "okay"; -+ display0: display@0 { -+ bits-per-pixel = <24>; -+ bus-width = <24>; -+ }; -+}; -+ -+&mipi_dsi { -+ status = "okay"; -+ port@1 { -+ ili9881c_to_dsim: endpoint { -+ remote-endpoint = <&ili9881c_from_dsim>; -+ }; -+ }; -+}; -+ - &fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; -@@ -488,3 +532,16 @@ - &cpu_crit0 { - temperature = <115000>; - }; -+ -+&lcdif { -+ enable_polarity_low; -+ /delete-property/ assigned-clocks; -+ /delete-property/ assigned-clock-parents; -+ /delete-property/ assigned-clock-rates; -+}; -+ -+&mipi_dsi { -+ /delete-property/ assigned-clocks; -+ /delete-property/ assigned-clock-parents; -+ /delete-property/ assigned-clock-rates; -+}; -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 13bb161e51..a60351b77e 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -296,6 +296,11 @@ static void disable_rtc_bus_on_battery(void) - return; - } - -+#define FSL_SIP_GPC 0xC2000000 -+#define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x3 -+#define DISPMIX 9 -+#define MIPI 10 -+ - int board_init(void) - { - -@@ -311,6 +316,9 @@ int board_init(void) - if (IS_ENABLED(CONFIG_LED)) - led_default_state(); - -+ call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); -+ call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); -+ - show_suite_info(); - return 0; - } -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -index dd8120f4dc..d0252592f5 100644 ---- a/include/configs/cpl-imx8m-mini.h -+++ b/include/configs/cpl-imx8m-mini.h -@@ -102,6 +102,7 @@ - /* Initial environment variables */ - #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ -+ "splashimage=0x50000000\0" \ - "autoload=off\0" \ - "script=boot.scr\0" \ - "image=Image\0" \ -@@ -256,17 +257,17 @@ - #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) - #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 - --#ifdef CONFIG_VIDEO -+#ifdef CONFIG_DM_VIDEO - #define CONFIG_VIDEO_MXS - #define CONFIG_VIDEO_LOGO - #define CONFIG_SPLASH_SCREEN - #define CONFIG_SPLASH_SCREEN_ALIGN - #define CONFIG_CMD_BMP - #define CONFIG_BMP_16BPP -+#define CONFIG_BMP_24BPP -+#define CONFIG_BMP_32BPP - #define CONFIG_VIDEO_BMP_RLE8 - #define CONFIG_VIDEO_BMP_LOGO --#define CONFIG_IMX_VIDEO_SKIP --#define CONFIG_RM67191 - #endif - - #define CONFIG_BOARD_POSTCLK_INIT --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0091-cm-imx8m-mini-config-Enable-startek-ili9881c.patch b/recipes-bsp/u-boot/compulab/imx8mm/0091-cm-imx8m-mini-config-Enable-startek-ili9881c.patch deleted file mode 100644 index d3d8e15..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0091-cm-imx8m-mini-config-Enable-startek-ili9881c.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 7bab11b657b8a93d6853eb8baf0727513f26ac8c Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Wed, 24 Feb 2021 15:06:16 +0200 -Subject: [PATCH 91/91] cm-imx8m-mini: config: Enable startek-ili9881c - -Signed-off-by: Valentin Raevsky ---- - configs/mcm-imx8m-mini_defconfig | 5 +++++ - configs/ucm-imx8m-mini_defconfig | 7 ++++++- - 2 files changed, 11 insertions(+), 1 deletion(-) - -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig -index cf388e99a5..a54442424e 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/mcm-imx8m-mini_defconfig -@@ -60,6 +60,7 @@ CONFIG_SYSCON=y - CONFIG_CLK_COMPOSITE_CCF=y - CONFIG_CLK_IMX8MM=y - CONFIG_MXC_GPIO=y -+CONFIG_DM_PCA953X=y - CONFIG_DM_I2C=y - CONFIG_SYS_I2C_MXC=y - CONFIG_DM_MMC=y -@@ -92,6 +93,10 @@ CONFIG_SDP_LOADADDR=0x40400000 - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y -+CONFIG_VIDEO_IMX_SEC_DSI=y - CONFIG_EXT4_WRITE=y - CONFIG_FAT_WRITE=y - CONFIG_OF_LIBFDT_OVERLAY=y -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 9fe7268870..46449f7bc3 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -45,7 +45,7 @@ CONFIG_CMD_DHCP=y - CONFIG_CMD_MII=y - CONFIG_CMD_PING=y - CONFIG_CMD_CACHE=y --CONFIG_CMD_REGULATOR= -+CONFIG_CMD_REGULATOR=y - CONFIG_CMD_EXT2=y - CONFIG_CMD_EXT4=y - CONFIG_CMD_FAT=y -@@ -61,6 +61,7 @@ CONFIG_SYSCON=y - CONFIG_CLK_COMPOSITE_CCF=y - CONFIG_CLK_IMX8MM=y - CONFIG_MXC_GPIO=y -+CONFIG_DM_PCA953X=y - CONFIG_DM_I2C=y - CONFIG_SYS_I2C_MXC=y - CONFIG_DM_MMC=y -@@ -93,6 +94,10 @@ CONFIG_SDP_LOADADDR=0x40400000 - CONFIG_USB_GADGET_DOWNLOAD=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y -+CONFIG_VIDEO_IMX_SEC_DSI=y - CONFIG_EXT4_WRITE=y - CONFIG_FAT_WRITE=y - CONFIG_OF_LIBFDT_OVERLAY=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0092-Migration-to-5.10.35.patch b/recipes-bsp/u-boot/compulab/imx8mm/0092-Migration-to-5.10.35.patch deleted file mode 100644 index 5946572..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0092-Migration-to-5.10.35.patch +++ /dev/null @@ -1,222 +0,0 @@ -From 9ca9c612e9fe8772e08f8155c827497e836a72d3 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 20 Jul 2021 23:50:14 +0300 -Subject: [PATCH 92/92] Migration to 5.10.35 - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/board/board.c | 12 +++++++++--- - board/compulab/plat/imx8mm/ddr/ddr.c | 2 +- - board/compulab/plat/imx8mm/spl/common.c | 1 + - board/compulab/plat/imx8mm/spl/spl.c | 14 +++++++------- - configs/ucm-imx8m-mini_defconfig | 2 +- - drivers/video/startek-ili9881c.c | 24 +++++++++++++----------- - include/configs/cpl-imx8m-mini.h | 2 -- - 7 files changed, 32 insertions(+), 25 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index a60351b77e..3ce1659c61 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -29,6 +29,8 @@ - #include - #include - #include -+#include -+#include - #include "ddr/ddr.h" - #include "common/eeprom.h" - #include "common/rtc.h" -@@ -149,7 +151,7 @@ static int fdt_set_env_addr(void *blob) - return 0; - } - --int ft_board_setup(void *blob, bd_t *bd) -+int ft_board_setup(void *blob, struct bd_info *bd) - { - fdt_set_env_addr(blob); - fdt_set_sn(blob); -@@ -304,6 +306,8 @@ static void disable_rtc_bus_on_battery(void) - int board_init(void) - { - -+ struct arm_smccc_res res; -+ - disable_rtc_bus_on_battery(); - - #ifdef CONFIG_FEC_MXC -@@ -316,8 +320,10 @@ int board_init(void) - if (IS_ENABLED(CONFIG_LED)) - led_default_state(); - -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); -- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); -+ arm_smccc_smc(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, -+ DISPMIX, true, 0, 0, 0, 0, &res); -+ arm_smccc_smc(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, -+ MIPI, true, 0, 0, 0, 0, &res); - - show_suite_info(); - return 0; -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 941065c129..be967051fb 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -12,8 +12,8 @@ - #include - #include - #include -+#include - #include "ddr.h" --#include "../ucm-imx8m-mini.h" - - /* Forward declarations */ - u32 cl_eeprom_get_ddrinfo(void); -diff --git a/board/compulab/plat/imx8mm/spl/common.c b/board/compulab/plat/imx8mm/spl/common.c -index 5f1d1e5b97..14ef0e6b8f 100644 ---- a/board/compulab/plat/imx8mm/spl/common.c -+++ b/board/compulab/plat/imx8mm/spl/common.c -@@ -2,6 +2,7 @@ - #include - #include - #include -+#include - #include - - #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -index 325d6b6a5f..7786f6616a 100644 ---- a/board/compulab/plat/imx8mm/spl/spl.c -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -89,7 +89,7 @@ static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR, 0, 8}, - }; - --int board_mmc_init(bd_t *bis) -+int board_mmc_init(struct bd_info *bis) - { - int i, ret; - /* -@@ -166,22 +166,22 @@ int power_init_board(void) - - - /* decrease RESET key long push time from the default 10s to 10ms */ -- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); -+ pmic_reg_write(p, BD718XX_PWRONCONFIG1, 0x0); - - /* unlock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x1); -+ pmic_reg_write(p, BD718XX_REGLOCK, 0x1); - - /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ -- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); -+ pmic_reg_write(p, BD718XX_BUCK1_VOLT_RUN, 0x0f); - - /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ -- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); -+ pmic_reg_write(p, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83); - - /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ -- pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); -+ pmic_reg_write(p, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28); - - /* lock the PMIC regs */ -- pmic_reg_write(p, BD71837_REGLOCK, 0x11); -+ pmic_reg_write(p, BD718XX_REGLOCK, 0x11); - - return 0; - } -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 46449f7bc3..8bfde68c49 100644 ---- a/configs/ucm-imx8m-mini_defconfig -+++ b/configs/ucm-imx8m-mini_defconfig -@@ -1,3 +1,4 @@ -+CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.2" - CONFIG_ARM=y - CONFIG_SPL_SYS_ICACHE_OFF=y - CONFIG_SPL_SYS_DCACHE_OFF=y -@@ -14,7 +15,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y - CONFIG_SPL=y - CONFIG_CSF_SIZE=0x2000 - CONFIG_SPL_TEXT_BASE=0x7E1000 --CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0" - CONFIG_FIT=y - CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y -diff --git a/drivers/video/startek-ili9881c.c b/drivers/video/startek-ili9881c.c -index d7c32a0de4..0615dba17f 100644 ---- a/drivers/video/startek-ili9881c.c -+++ b/drivers/video/startek-ili9881c.c -@@ -11,6 +11,8 @@ - #include - #include - #include -+#include -+#include - - #define LCD_XSIZE_TFT 720 - #define LCD_YSIZE_TFT 1280 -@@ -318,7 +320,7 @@ static int ili9881c_send_cmd_data(struct mipi_dsi_device *dsi, u8 cmd, u8 data) - static int ili9881c_enable(struct udevice *dev) - { - struct ili9881c_panel_priv *priv = dev_get_priv(dev); -- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); - struct mipi_dsi_device *dsi = plat->device; - u8 color_format = color_format_from_dsi_format(priv->format); - int ret; -@@ -405,7 +407,7 @@ static int ili9881c_enable(struct udevice *dev) - - static int ili9881c_panel_enable_backlight(struct udevice *dev) - { -- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); - struct mipi_dsi_device *device = plat->device; - int ret; - -@@ -419,7 +421,7 @@ static int ili9881c_panel_enable_backlight(struct udevice *dev) - static int ili9881c_panel_get_display_timing(struct udevice *dev, - struct display_timing *timings) - { -- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); -+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); - struct mipi_dsi_device *device = plat->device; - struct ili9881c_panel_priv *priv = dev_get_priv(dev); - -@@ -494,12 +496,12 @@ static const struct udevice_id ili9881c_panel_ids[] = { - }; - - U_BOOT_DRIVER(ili9881c_panel) = { -- .name = "ili9881c_panel", -- .id = UCLASS_PANEL, -- .of_match = ili9881c_panel_ids, -- .ops = &ili9881c_panel_ops, -- .probe = ili9881c_panel_probe, -- .remove = ili9881c_panel_disable, -- .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), -- .priv_auto_alloc_size = sizeof(struct ili9881c_panel_priv), -+ .name = "ili9881c_panel", -+ .id = UCLASS_PANEL, -+ .of_match = ili9881c_panel_ids, -+ .ops = &ili9881c_panel_ops, -+ .probe = ili9881c_panel_probe, -+ .remove = ili9881c_panel_disable, -+ .plat_auto = sizeof(struct mipi_dsi_panel_plat), -+ .priv_auto = sizeof(struct ili9881c_panel_priv), - }; -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -index d0252592f5..23c2623130 100644 ---- a/include/configs/cpl-imx8m-mini.h -+++ b/include/configs/cpl-imx8m-mini.h -@@ -182,8 +182,6 @@ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - - #define CONFIG_ENV_OVERWRITE --#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ --#define CONFIG_SYS_MMC_ENV_PART 1 - #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ - - /* Size of malloc() pool */ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0093-Fix-enable_cache.patch b/recipes-bsp/u-boot/compulab/imx8mm/0093-Fix-enable_cache.patch deleted file mode 100644 index 6ea92d2..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0093-Fix-enable_cache.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 52737ad32020eb2ff0222ef19e2b793ffa31875a Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Fri, 13 Aug 2021 21:54:24 +0300 -Subject: [PATCH 93/93] Fix enable_cache - -Signed-off-by: Kirill Kapranov ---- - arch/arm/mach-imx/imx8m/soc.c | 41 +++++++++++++++-------------------------- - 1 file changed, 15 insertions(+), 26 deletions(-) - -diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c -index ab8bd2e1ec..3be19181e9 100644 ---- a/arch/arm/mach-imx/imx8m/soc.c -+++ b/arch/arm/mach-imx/imx8m/soc.c -@@ -181,32 +181,21 @@ static unsigned int imx8m_find_dram_entry_in_mem_map(void) - - void enable_caches(void) - { -- /* If OPTEE runs, remove OPTEE memory from MMU table to avoid speculative prefetch */ -- if (rom_pointer[1]) { -- /* -- * TEE are loaded, So the ddr bank structures -- * have been modified update mmu table accordingly -- */ -- int i = 0; -- /* -- * please make sure that entry initial value matches -- * imx8m_mem_map for DRAM1 -- */ -- int entry = imx8m_find_dram_entry_in_mem_map(); -- u64 attrs = imx8m_mem_map[entry].attrs; -- -- while (i < CONFIG_NR_DRAM_BANKS && -- entry < ARRAY_SIZE(imx8m_mem_map)) { -- if (gd->bd->bi_dram[i].start == 0) -- break; -- imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start; -- imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; -- imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; -- imx8m_mem_map[entry].attrs = attrs; -- debug("Added memory mapping (%d): %llx %llx\n", entry, -- imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); -- i++; entry++; -- } -+ int i = 0; -+ int entry = imx8m_find_dram_entry_in_mem_map(); -+ u64 attrs = imx8m_mem_map[entry].attrs; -+ -+ while (i < CONFIG_NR_DRAM_BANKS && -+ entry < ARRAY_SIZE(imx8m_mem_map)) { -+ if (gd->bd->bi_dram[i].start == 0) -+ break; -+ imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start; -+ imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; -+ imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; -+ imx8m_mem_map[entry].attrs = attrs; -+ printf("Added memory mapping (%d): %llx %llx\n", entry, -+ imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); -+ i++; entry++; - } - - icache_enable(); --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0094-Fix-mmc_autodetect.patch b/recipes-bsp/u-boot/compulab/imx8mm/0094-Fix-mmc_autodetect.patch deleted file mode 100644 index 6058ca9..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0094-Fix-mmc_autodetect.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 52f44310aba9bd5e3a1c47869d2065fd47cb1520 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Thu, 26 Aug 2021 01:04:37 +0300 -Subject: [PATCH 94/94] Fix mmc_autodetect - -Signed-off-by: Kirill Kapranov -Suggested-by: Marc Haesen - ---- - board/compulab/common/mmc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/board/compulab/common/mmc.c b/board/compulab/common/mmc.c -index db449cb4da..4450cadb99 100644 ---- a/board/compulab/common/mmc.c -+++ b/board/compulab/common/mmc.c -@@ -9,7 +9,7 @@ - #include - #include - #include --#include -+#include - - static int check_mmc_autodetect(void) - { --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0095-config-Enable-video.patch b/recipes-bsp/u-boot/compulab/imx8mm/0095-config-Enable-video.patch deleted file mode 100644 index ca3a291..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0095-config-Enable-video.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 4188f41f6084169285683de11d4365bc6be1163d Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 14 Sep 2021 22:44:44 +0300 -Subject: [PATCH 95/96] config: Enable video - -Signed-off-by: Kirill Kapranov ---- - include/configs/cpl-imx8m-mini.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -index 23c2623130..a65d86e253 100644 ---- a/include/configs/cpl-imx8m-mini.h -+++ b/include/configs/cpl-imx8m-mini.h -@@ -258,9 +258,9 @@ - #ifdef CONFIG_DM_VIDEO - #define CONFIG_VIDEO_MXS - #define CONFIG_VIDEO_LOGO --#define CONFIG_SPLASH_SCREEN -+#define CONFIG_SPLASH_SCREEN 1 - #define CONFIG_SPLASH_SCREEN_ALIGN --#define CONFIG_CMD_BMP -+#define CONFIG_CMD_BMP 1 - #define CONFIG_BMP_16BPP - #define CONFIG_BMP_24BPP - #define CONFIG_BMP_32BPP --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0096-readout-some-cleannig.patch b/recipes-bsp/u-boot/compulab/imx8mm/0096-readout-some-cleannig.patch deleted file mode 100644 index d79bbfe..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0096-readout-some-cleannig.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 44e574730fd48bf7873eb0643c7b17f08341b7a4 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 14 Sep 2021 23:00:09 +0300 -Subject: [PATCH 96/96] readout: some cleannig - -Signed-off-by: Kirill Kapranov ---- - arch/arm/mach-imx/imx8m/soc.c | 5 +---- - 1 file changed, 1 insertion(+), 4 deletions(-) - -diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c -index 3be19181e9..80d8cea198 100644 ---- a/arch/arm/mach-imx/imx8m/soc.c -+++ b/arch/arm/mach-imx/imx8m/soc.c -@@ -185,16 +185,13 @@ void enable_caches(void) - int entry = imx8m_find_dram_entry_in_mem_map(); - u64 attrs = imx8m_mem_map[entry].attrs; - -- while (i < CONFIG_NR_DRAM_BANKS && -- entry < ARRAY_SIZE(imx8m_mem_map)) { -+ while (i < CONFIG_NR_DRAM_BANKS && entry < ARRAY_SIZE(imx8m_mem_map)) { - if (gd->bd->bi_dram[i].start == 0) - break; - imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start; - imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; - imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; - imx8m_mem_map[entry].attrs = attrs; -- printf("Added memory mapping (%d): %llx %llx\n", entry, -- imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); - i++; entry++; - } - --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0097-mmc-Fix-mmc_switch-workflow-issue.patch b/recipes-bsp/u-boot/compulab/imx8mm/0097-mmc-Fix-mmc_switch-workflow-issue.patch deleted file mode 100644 index 970ad96..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0097-mmc-Fix-mmc_switch-workflow-issue.patch +++ /dev/null @@ -1,36 +0,0 @@ -From e6b1432e42c06a2a1200731f91e0be99b70c01cc Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sun, 3 Oct 2021 01:41:43 +0300 -Subject: [PATCH 97/97] mmc: Fix mmc_switch workflow issue - -Revert the patch 9a461acedebe664cf1e557c3b9ec983e6b04e805, that introduces -premature falling back on a long timeout instead of continuation of the -initialization. -Clear the ambiguity of the comment that led this. - -Signed-off-by: Kirill Kapranov ---- - drivers/mmc/mmc.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c -index 785ebc0cd3..6d9766a697 100644 ---- a/drivers/mmc/mmc.c -+++ b/drivers/mmc/mmc.c -@@ -819,11 +819,11 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, - return ret; - - /* -- * In cases when not allowed to poll by using CMD13 or because we aren't -+ * In cases we aren't allowed to poll by using CMD13, nor are we - * capable of polling by using mmc_wait_dat0, then rely on waiting the - * stated timeout to be sufficient. - */ -- if (ret == -ENOSYS || !send_status) { -+ if (ret == -ENOSYS && !send_status) { - mdelay(timeout_ms); - return 0; - } --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0098-defconfig-Break-down-to-common-and-specific-parts.patch b/recipes-bsp/u-boot/compulab/imx8mm/0098-defconfig-Break-down-to-common-and-specific-parts.patch deleted file mode 100644 index 5781272..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0098-defconfig-Break-down-to-common-and-specific-parts.patch +++ /dev/null @@ -1,324 +0,0 @@ -From e01f1bf65ea9a296254c84389b846f8388642105 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 4 Oct 2021 00:18:04 +0300 -Subject: [PATCH 98/98] defconfig: Break down to common and specific parts - -Signed-off-by: Kirill Kapranov ---- - ...mini_defconfig => cl-imx8m-mini_defconfig} | 4 - - configs/iot-gate-imx8.config | 15 +++ - configs/iot-gate-imx8_defconfig | 102 ----------------- - configs/mcm-imx8m-mini.config | 5 + - configs/ucm-imx8m-mini.config | 5 + - configs/ucm-imx8m-mini_defconfig | 106 ------------------ - 6 files changed, 25 insertions(+), 212 deletions(-) - rename configs/{mcm-imx8m-mini_defconfig => cl-imx8m-mini_defconfig} (93%) - create mode 100644 configs/iot-gate-imx8.config - delete mode 100644 configs/iot-gate-imx8_defconfig - create mode 100644 configs/mcm-imx8m-mini.config - create mode 100644 configs/ucm-imx8m-mini.config - delete mode 100644 configs/ucm-imx8m-mini_defconfig - -diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig -similarity index 93% -rename from configs/mcm-imx8m-mini_defconfig -rename to configs/cl-imx8m-mini_defconfig -index a54442424e..b54110b42f 100644 ---- a/configs/mcm-imx8m-mini_defconfig -+++ b/configs/cl-imx8m-mini_defconfig -@@ -7,13 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y - CONFIG_ENV_SIZE=0x1000 - CONFIG_ENV_OFFSET=0x4400 - CONFIG_DM_GPIO=y --CONFIG_TARGET_MCM_IMX8M_MINI=y - CONFIG_SPL_MMC_SUPPORT=y - CONFIG_SPL_SERIAL_SUPPORT=y - CONFIG_SPL=y - CONFIG_CSF_SIZE=0x2000 - CONFIG_SPL_TEXT_BASE=0x7E1000 --CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0" - CONFIG_FIT=y - CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y -@@ -21,7 +19,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" - CONFIG_OF_SYSTEM_SETUP=y - CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" - CONFIG_CONSOLE_MUX=y --CONFIG_DEFAULT_FDT_FILE="mcm-imx8m-mini.dtb" - CONFIG_BOARD_LATE_INIT=y - CONFIG_ARCH_MISC_INIT=y - CONFIG_BOARD_EARLY_INIT_F=y -@@ -51,7 +48,6 @@ CONFIG_CMD_FAT=y - CONFIG_CMD_FS_GENERIC=y - CONFIG_EFI_PARTITION=y - CONFIG_OF_CONTROL=y --CONFIG_DEFAULT_DEVICE_TREE="mcm-imx8m-mini" - CONFIG_ENV_IS_IN_MMC=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config -new file mode 100644 -index 0000000000..bbf57904a3 ---- /dev/null -+++ b/configs/iot-gate-imx8.config -@@ -0,0 +1,15 @@ -+CONFIG_TARGET_IOT_GATE_IMX8=y -+CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" -+CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" -+CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" -+CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" -+CONFIG_DM_PCA953X=n -+CONFIG_DM_RESET=y -+CONFIG_SYSRESET=y -+CONFIG_SYSRESET_PSCI=y -+CONFIG_DM_VIDEO=n -+CONFIG_SYS_WHITE_ON_BLACK=n -+CONFIG_VIDEO_LCD_STARTEK_ILI9881C=n -+CONFIG_VIDEO_IMX_SEC_DSI=n -+ONFIG_LED=n -+CONFIG_LED_GPIO=n -diff --git a/configs/iot-gate-imx8_defconfig b/configs/iot-gate-imx8_defconfig -deleted file mode 100644 -index 39c448eca0..0000000000 ---- a/configs/iot-gate-imx8_defconfig -+++ /dev/null -@@ -1,102 +0,0 @@ --CONFIG_ARM=y --CONFIG_SPL_SYS_ICACHE_OFF=y --CONFIG_SPL_SYS_DCACHE_OFF=y --CONFIG_ARCH_IMX8M=y --CONFIG_SYS_TEXT_BASE=0x40200000 --CONFIG_SPL_GPIO_SUPPORT=y --CONFIG_ENV_SIZE=0x1000 --CONFIG_ENV_OFFSET=0x4400 --CONFIG_DM_GPIO=y --CONFIG_TARGET_IOT_GATE_IMX8=y --CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" --CONFIG_SPL_MMC_SUPPORT=y --CONFIG_SPL_SERIAL_SUPPORT=y --CONFIG_SPL=y --CONFIG_CSF_SIZE=0x2000 --CONFIG_SPL_TEXT_BASE=0x7E1000 --CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" --CONFIG_FIT=y --CONFIG_FIT_EXTERNAL_OFFSET=0x3000 --CONFIG_SPL_LOAD_FIT=y --CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" --CONFIG_OF_SYSTEM_SETUP=y --CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" --CONFIG_CONSOLE_MUX=y --CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" --CONFIG_BOARD_LATE_INIT=y --CONFIG_ARCH_MISC_INIT=y --CONFIG_BOARD_EARLY_INIT_F=y --CONFIG_SPL_BOARD_INIT=y --CONFIG_SPL_SEPARATE_BSS=y --CONFIG_SPL_POWER_SUPPORT=y --CONFIG_HUSH_PARSER=y --CONFIG_SYS_PROMPT="u-boot=> " --# CONFIG_BOOTM_NETBSD is not set --CONFIG_CMD_EEPROM=y --CONFIG_CMD_EEPROM_LAYOUT=y --CONFIG_CMD_MEMINFO=y --CONFIG_CMD_MEMTEST=y --CONFIG_CMD_CLK=y --CONFIG_CMD_FUSE=y --CONFIG_CMD_GPIO=y --CONFIG_CMD_I2C=y --CONFIG_CMD_MMC=y --CONFIG_CMD_DHCP=y --CONFIG_CMD_MII=y --CONFIG_CMD_PING=y --CONFIG_CMD_CACHE=y --CONFIG_CMD_REGULATOR=y --CONFIG_CMD_EXT2=y --CONFIG_CMD_EXT4=y --CONFIG_CMD_FAT=y --CONFIG_CMD_FS_GENERIC=y --CONFIG_EFI_PARTITION=y --CONFIG_OF_CONTROL=y --CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" --CONFIG_ENV_IS_IN_MMC=y --CONFIG_SYS_RELOC_GD_ENV_ADDR=y --CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --CONFIG_REGMAP=y --CONFIG_SYSCON=y --CONFIG_CLK_COMPOSITE_CCF=y --CONFIG_CLK_IMX8MM=y --CONFIG_MXC_GPIO=y --CONFIG_DM_I2C=y --CONFIG_SYS_I2C_MXC=y --CONFIG_DM_MMC=y --CONFIG_SUPPORT_EMMC_BOOT=y --CONFIG_MMC_IO_VOLTAGE=y --CONFIG_MMC_UHS_SUPPORT=y --CONFIG_MMC_HS400_ES_SUPPORT=y --CONFIG_MMC_HS400_SUPPORT=y --CONFIG_FSL_ESDHC_IMX=y --CONFIG_DM_ETH=y --CONFIG_FEC_MXC=y --CONFIG_MII=y --CONFIG_PINCTRL=y --CONFIG_PINCTRL_IMX8M=y --CONFIG_DM_REGULATOR=y --CONFIG_DM_REGULATOR_FIXED=y --CONFIG_DM_REGULATOR_GPIO=y --CONFIG_DM_RESET=y --CONFIG_MXC_UART=y --CONFIG_SYSRESET=y --CONFIG_SYSRESET_PSCI=y --CONFIG_DM_THERMAL=y --CONFIG_NXP_TMU=y --CONFIG_USB=y --CONFIG_DM_USB=y --CONFIG_USB_EHCI_HCD=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_MANUFACTURER="FSL" --CONFIG_USB_GADGET_VENDOR_NUM=0x0525 --CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 --CONFIG_CI_UDC=y --CONFIG_SDP_LOADADDR=0x40400000 --CONFIG_USB_GADGET_DOWNLOAD=y --CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_ASIX88179=y --CONFIG_EXT4_WRITE=y --CONFIG_FAT_WRITE=y --CONFIG_OF_LIBFDT_OVERLAY=y --# CONFIG_EFI_LOADER is not set -diff --git a/configs/mcm-imx8m-mini.config b/configs/mcm-imx8m-mini.config -new file mode 100644 -index 0000000000..0cf37e709b ---- /dev/null -+++ b/configs/mcm-imx8m-mini.config -@@ -0,0 +1,5 @@ -+CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.1" -+CONFIG_TARGET_MCM_IMX8M_MINI=y -+CONFIG_DEFAULT_DTB="mcm-imx8m-mini.dtb" -+CONFIG_DEFAULT_FDT_FILE="mcm-imx8m-mini.dtb" -+CONFIG_DEFAULT_DEVICE_TREE="mcm-imx8m-mini" -diff --git a/configs/ucm-imx8m-mini.config b/configs/ucm-imx8m-mini.config -new file mode 100644 -index 0000000000..41d00fe549 ---- /dev/null -+++ b/configs/ucm-imx8m-mini.config -@@ -0,0 +1,5 @@ -+CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.1" -+CONFIG_TARGET_UCM_IMX8M_MINI=y -+CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" -+CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" -+CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" -diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -deleted file mode 100644 -index 8bfde68c49..0000000000 ---- a/configs/ucm-imx8m-mini_defconfig -+++ /dev/null -@@ -1,106 +0,0 @@ --CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.2" --CONFIG_ARM=y --CONFIG_SPL_SYS_ICACHE_OFF=y --CONFIG_SPL_SYS_DCACHE_OFF=y --CONFIG_ARCH_IMX8M=y --CONFIG_SYS_TEXT_BASE=0x40200000 --CONFIG_SPL_GPIO_SUPPORT=y --CONFIG_ENV_SIZE=0x1000 --CONFIG_ENV_OFFSET=0x4400 --CONFIG_DM_GPIO=y --CONFIG_TARGET_UCM_IMX8M_MINI=y --CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" --CONFIG_SPL_MMC_SUPPORT=y --CONFIG_SPL_SERIAL_SUPPORT=y --CONFIG_SPL=y --CONFIG_CSF_SIZE=0x2000 --CONFIG_SPL_TEXT_BASE=0x7E1000 --CONFIG_FIT=y --CONFIG_FIT_EXTERNAL_OFFSET=0x3000 --CONFIG_SPL_LOAD_FIT=y --CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" --CONFIG_OF_SYSTEM_SETUP=y --CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" --CONFIG_CONSOLE_MUX=y --CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" --CONFIG_BOARD_LATE_INIT=y --CONFIG_ARCH_MISC_INIT=y --CONFIG_BOARD_EARLY_INIT_F=y --CONFIG_SPL_BOARD_INIT=y --CONFIG_SPL_SEPARATE_BSS=y --CONFIG_SPL_POWER_SUPPORT=y --CONFIG_HUSH_PARSER=y --CONFIG_SYS_PROMPT="u-boot=> " --# CONFIG_BOOTM_NETBSD is not set --CONFIG_CMD_EEPROM=y --CONFIG_CMD_EEPROM_LAYOUT=y --CONFIG_CMD_MEMINFO=y --CONFIG_CMD_MEMTEST=y --CONFIG_CMD_CLK=y --CONFIG_CMD_FUSE=y --CONFIG_CMD_GPIO=y --CONFIG_CMD_I2C=y --CONFIG_CMD_MMC=y --CONFIG_CMD_DHCP=y --CONFIG_CMD_MII=y --CONFIG_CMD_PING=y --CONFIG_CMD_CACHE=y --CONFIG_CMD_REGULATOR=y --CONFIG_CMD_EXT2=y --CONFIG_CMD_EXT4=y --CONFIG_CMD_FAT=y --CONFIG_CMD_FS_GENERIC=y --CONFIG_EFI_PARTITION=y --CONFIG_OF_CONTROL=y --CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" --CONFIG_ENV_IS_IN_MMC=y --CONFIG_SYS_RELOC_GD_ENV_ADDR=y --CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y --CONFIG_REGMAP=y --CONFIG_SYSCON=y --CONFIG_CLK_COMPOSITE_CCF=y --CONFIG_CLK_IMX8MM=y --CONFIG_MXC_GPIO=y --CONFIG_DM_PCA953X=y --CONFIG_DM_I2C=y --CONFIG_SYS_I2C_MXC=y --CONFIG_DM_MMC=y --CONFIG_SUPPORT_EMMC_BOOT=y --CONFIG_MMC_IO_VOLTAGE=y --CONFIG_MMC_UHS_SUPPORT=y --CONFIG_MMC_HS400_ES_SUPPORT=y --CONFIG_MMC_HS400_SUPPORT=y --CONFIG_FSL_ESDHC_IMX=y --CONFIG_DM_ETH=y --CONFIG_FEC_MXC=y --CONFIG_MII=y --CONFIG_PINCTRL=y --CONFIG_PINCTRL_IMX8M=y --CONFIG_DM_REGULATOR=y --CONFIG_DM_REGULATOR_FIXED=y --CONFIG_DM_REGULATOR_GPIO=y --CONFIG_MXC_UART=y --CONFIG_DM_THERMAL=y --CONFIG_NXP_TMU=y --CONFIG_USB=y --CONFIG_DM_USB=y --CONFIG_USB_EHCI_HCD=y --CONFIG_USB_GADGET=y --CONFIG_USB_GADGET_MANUFACTURER="FSL" --CONFIG_USB_GADGET_VENDOR_NUM=0x0525 --CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 --CONFIG_CI_UDC=y --CONFIG_SDP_LOADADDR=0x40400000 --CONFIG_USB_GADGET_DOWNLOAD=y --CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_ASIX88179=y --CONFIG_DM_VIDEO=y --CONFIG_SYS_WHITE_ON_BLACK=y --CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y --CONFIG_VIDEO_IMX_SEC_DSI=y --CONFIG_EXT4_WRITE=y --CONFIG_FAT_WRITE=y --CONFIG_OF_LIBFDT_OVERLAY=y --# CONFIG_EFI_LOADER is not set --CONFIG_LED=y --CONFIG_LED_GPIO=y --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0099-spl-lpddr-training-size-optimisation.patch b/recipes-bsp/u-boot/compulab/imx8mm/0099-spl-lpddr-training-size-optimisation.patch deleted file mode 100644 index 91a2548..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0099-spl-lpddr-training-size-optimisation.patch +++ /dev/null @@ -1,7028 +0,0 @@ -From b5d924ef29f64a8b4e803f6cd58f1643db923b4c Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sun, 17 Oct 2021 21:29:34 +0300 -Subject: [PATCH 099/100] spl: lpddr training size optimisation - -LPDDR training tables have been shrunk by means of unification and -common parts detachment. - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/ddr/Makefile | 8 +- - board/compulab/plat/imx8mm/ddr/ddr.c | 5 + - .../plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h | 724 +++++++ - ...4_timing_01050008.c => lpddr4_timing_01.c} | 847 ++------ - .../plat/imx8mm/ddr/lpddr4_timing_01061010.c | 1849 ----------------- - ...4_timing_05000010.c => lpddr4_timing_05.c} | 724 ------- - ...4_timing_ff020008.c => lpddr4_timing_ff.c} | 850 ++------ - .../plat/imx8mm/ddr/lpddr4_timing_ff000110.c | 1848 ---------------- - 8 files changed, 975 insertions(+), 5880 deletions(-) - create mode 100644 board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h - rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_01050008.c => lpddr4_timing_01.c} (58%) - delete mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c - rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_05000010.c => lpddr4_timing_05.c} (58%) - rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_ff020008.c => lpddr4_timing_ff.c} (58%) - delete mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c - -diff --git a/board/compulab/plat/imx8mm/ddr/Makefile b/board/compulab/plat/imx8mm/ddr/Makefile -index be4a6abd7a..db35e41c71 100644 ---- a/board/compulab/plat/imx8mm/ddr/Makefile -+++ b/board/compulab/plat/imx8mm/ddr/Makefile -@@ -1,8 +1,6 @@ - obj-y += ddr.o --obj-y += lpddr4_timing_ff020008.o --obj-y += lpddr4_timing_ff000110.o --obj-y += lpddr4_timing_01061010.o --obj-y += lpddr4_timing_01050008.o -+obj-y += lpddr4_timing_ff.o -+obj-y += lpddr4_timing_01.o - ifndef CONFIG_TARGET_MCM_IMX8M_MINI --obj-y += lpddr4_timing_05000010.o -+obj-y += lpddr4_timing_05.o - endif -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index be967051fb..a53fb30b41 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -14,6 +14,7 @@ - #include - #include - #include "ddr.h" -+#include "ddr_ddrphy_trained_csr.h" - - /* Forward declarations */ - u32 cl_eeprom_get_ddrinfo(void); -@@ -167,6 +168,10 @@ void spl_dram_init(void) - printf("DDRINFO(%s): %s %dG @ %d MHz\n", (ddr_found ? "D" : "?" ), lpddr4_array[i].name, - lpddr4_array[i].size, lpddr4_array[i].timing->fsp_table[0]); - -+ //Initialize the common part of all trainigs -+ lpddr4_array[i].timing->ddrphy_trained_csr = ddr_ddrphy_trained_csr; -+ lpddr4_array[i].timing->ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr); -+ - if (ddr_init(lpddr4_array[i].timing)) { - SPL_TCM_INIT; - do_reset(NULL,0,0,NULL); -diff --git a/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h b/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h -new file mode 100644 -index 0000000000..ec0a3e463f ---- /dev/null -+++ b/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h -@@ -0,0 +1,724 @@ -+#include -+ -+/* ddr phy trained csr */ -+struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, -+ { 0x1200b2, 0x0 }, -+ { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, -+ { 0x110043, 0x0 }, -+ { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, -+ { 0x110143, 0x0 }, -+ { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, -+ { 0x111043, 0x0 }, -+ { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, -+ { 0x111143, 0x0 }, -+ { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, -+ { 0x112043, 0x0 }, -+ { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, -+ { 0x112143, 0x0 }, -+ { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, -+ { 0x113043, 0x0 }, -+ { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, -+ { 0x113143, 0x0 }, -+ { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, -+ { 0x100080, 0x0 }, -+ { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, -+ { 0x101080, 0x0 }, -+ { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, -+ { 0x102080, 0x0 }, -+ { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, -+ { 0x103080, 0x0 }, -+ { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, -+ { 0x104080, 0x0 }, -+ { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, -+ { 0x105080, 0x0 }, -+ { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, -+ { 0x106080, 0x0 }, -+ { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, -+ { 0x107080, 0x0 }, -+ { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, -+ { 0x108080, 0x0 }, -+ { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, -+ { 0x109080, 0x0 }, -+ { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, -+ { 0x110080, 0x0 }, -+ { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, -+ { 0x110180, 0x0 }, -+ { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, -+ { 0x111080, 0x0 }, -+ { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, -+ { 0x111180, 0x0 }, -+ { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, -+ { 0x112080, 0x0 }, -+ { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, -+ { 0x112180, 0x0 }, -+ { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, -+ { 0x113080, 0x0 }, -+ { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, -+ { 0x113180, 0x0 }, -+ { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, -+ { 0x110081, 0x0 }, -+ { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, -+ { 0x110181, 0x0 }, -+ { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, -+ { 0x111081, 0x0 }, -+ { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, -+ { 0x111181, 0x0 }, -+ { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, -+ { 0x112081, 0x0 }, -+ { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, -+ { 0x112181, 0x0 }, -+ { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, -+ { 0x113081, 0x0 }, -+ { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, -+ { 0x113181, 0x0 }, -+ { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, -+ { 0x1100d0, 0x0 }, -+ { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, -+ { 0x1101d0, 0x0 }, -+ { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, -+ { 0x1110d0, 0x0 }, -+ { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, -+ { 0x1111d0, 0x0 }, -+ { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, -+ { 0x1120d0, 0x0 }, -+ { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, -+ { 0x1121d0, 0x0 }, -+ { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, -+ { 0x1130d0, 0x0 }, -+ { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, -+ { 0x1131d0, 0x0 }, -+ { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, -+ { 0x1100d1, 0x0 }, -+ { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, -+ { 0x1101d1, 0x0 }, -+ { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, -+ { 0x1110d1, 0x0 }, -+ { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, -+ { 0x1111d1, 0x0 }, -+ { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, -+ { 0x1120d1, 0x0 }, -+ { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, -+ { 0x1121d1, 0x0 }, -+ { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, -+ { 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{ 0x130a1, 0x0 }, -+ { 0x130a2, 0x0 }, -+ { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, -+ { 0x12007c, 0x0 }, -+ { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, -+ { 0x12007d, 0x0 }, -+ { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, -+ { 0x190201, 0x0 }, -+ { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, -+ { 0x190202, 0x0 }, -+ { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, -+ { 0x190203, 0x0 }, -+ { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, -+ { 0x190204, 0x0 }, -+ { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, -+ { 0x190205, 0x0 }, -+ { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, -+ { 0x190206, 0x0 }, -+ { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, -+ { 0x190207, 0x0 }, -+ { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, -+ { 0x190208, 0x0 }, -+ { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, -+ { 0x11662, 0x0 }, -+ { 0x11762, 0x0 }, -+ { 0x11862, 0x0 }, -+ { 0x12062, 0x0 }, -+ { 0x12162, 0x0 }, -+ { 0x12262, 0x0 }, -+ { 0x12362, 0x0 }, -+ { 0x12462, 0x0 }, -+ { 0x12562, 0x0 }, -+ { 0x12662, 0x0 }, -+ { 0x12762, 0x0 }, -+ { 0x12862, 0x0 }, -+ { 0x13062, 0x0 }, -+ { 0x13162, 0x0 }, -+ { 0x13262, 0x0 }, -+ { 0x13362, 0x0 }, -+ { 0x13462, 0x0 }, -+ { 0x13562, 0x0 }, -+ { 0x13662, 0x0 }, -+ { 0x13762, 0x0 }, -+ { 0x13862, 0x0 }, -+ { 0x20077, 0x0 }, -+ { 0x10001, 0x0 }, -+ { 0x11001, 0x0 }, -+ { 0x12001, 0x0 }, -+ { 0x13001, 0x0 }, -+ { 0x10040, 0x0 }, -+ { 0x10140, 0x0 }, -+ { 0x10240, 0x0 }, -+ { 0x10340, 0x0 }, -+ { 0x10440, 0x0 }, -+ { 0x10540, 0x0 }, -+ { 0x10640, 0x0 }, -+ { 0x10740, 0x0 }, -+ { 0x10840, 0x0 }, -+ { 0x10030, 0x0 }, -+ { 0x10130, 0x0 }, -+ { 0x10230, 0x0 }, -+ { 0x10330, 0x0 }, -+ { 0x10430, 0x0 }, -+ { 0x10530, 0x0 }, -+ { 0x10630, 0x0 }, -+ { 0x10730, 0x0 }, -+ { 0x10830, 0x0 }, -+ { 0x11040, 0x0 }, -+ { 0x11140, 0x0 }, -+ { 0x11240, 0x0 }, -+ { 0x11340, 0x0 }, -+ { 0x11440, 0x0 }, -+ { 0x11540, 0x0 }, -+ { 0x11640, 0x0 }, -+ { 0x11740, 0x0 }, -+ { 0x11840, 0x0 }, -+ { 0x11030, 0x0 }, -+ { 0x11130, 0x0 }, -+ { 0x11230, 0x0 }, -+ { 0x11330, 0x0 }, -+ { 0x11430, 0x0 }, -+ { 0x11530, 0x0 }, -+ { 0x11630, 0x0 }, -+ { 0x11730, 0x0 }, -+ { 0x11830, 0x0 }, -+ { 0x12040, 0x0 }, -+ { 0x12140, 0x0 }, -+ { 0x12240, 0x0 }, -+ { 0x12340, 0x0 }, -+ { 0x12440, 0x0 }, -+ { 0x12540, 0x0 }, -+ { 0x12640, 0x0 }, -+ { 0x12740, 0x0 }, -+ { 0x12840, 0x0 }, -+ { 0x12030, 0x0 }, -+ { 0x12130, 0x0 }, -+ { 0x12230, 0x0 }, -+ { 0x12330, 0x0 }, -+ { 0x12430, 0x0 }, -+ { 0x12530, 0x0 }, -+ { 0x12630, 0x0 }, -+ { 0x12730, 0x0 }, -+ { 0x12830, 0x0 }, -+ { 0x13040, 0x0 }, -+ { 0x13140, 0x0 }, -+ { 0x13240, 0x0 }, -+ { 0x13340, 0x0 }, -+ { 0x13440, 0x0 }, -+ { 0x13540, 0x0 }, -+ { 0x13640, 0x0 }, -+ { 0x13740, 0x0 }, -+ { 0x13840, 0x0 }, -+ { 0x13030, 0x0 }, -+ { 0x13130, 0x0 }, -+ { 0x13230, 0x0 }, -+ { 0x13330, 0x0 }, -+ { 0x13430, 0x0 }, -+ { 0x13530, 0x0 }, -+ { 0x13630, 0x0 }, -+ { 0x13730, 0x0 }, -+ { 0x13830, 0x0 }, -+}; -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c -similarity index 58% -rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c -rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c -index 54c3922de5..3441b1cd17 100644 ---- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c -+++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c -@@ -10,7 +10,7 @@ - #include - #include - --static struct dram_cfg_param ddr_ddrc_cfg[] = { -+static struct dram_cfg_param ddr_ddrc_cfg_01050008[] = { - /** Initialize DDRC registers **/ - {0x3d400304,0x1}, - {0x3d400030,0x1}, -@@ -117,6 +117,112 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = { - {0x3d400028,0x0}, - }; - -+static struct dram_cfg_param ddr_ddrc_cfg_01061010[] = { -+ /** Initialize DDRC registers **/ -+ {0x3d400304,0x1}, -+ {0x3d400030,0x1}, -+ {0x3d400000,0xa1080020}, -+ {0x3d400020,0x223}, -+ {0x3d400024,0x3a980}, -+ {0x3d400064,0x5b00d2}, -+ {0x3d4000d0,0xc00305ba}, -+ {0x3d4000d4,0x940000}, -+ {0x3d4000dc,0xd4002d}, -+ {0x3d4000e0,0x310000}, -+ {0x3d4000e8,0x66004d}, -+ {0x3d4000ec,0x16004d}, -+ {0x3d400100,0x191e1920}, -+ {0x3d400104,0x60630}, -+ {0x3d40010c,0xb0b000}, -+ {0x3d400110,0xe04080e}, -+ {0x3d400114,0x2040c0c}, -+ {0x3d400118,0x1010007}, -+ {0x3d40011c,0x401}, -+ {0x3d400130,0x20600}, -+ {0x3d400134,0xc100002}, -+ {0x3d400138,0xd8}, -+ {0x3d400144,0x96004b}, -+ {0x3d400180,0x2ee0017}, -+ {0x3d400184,0x2605b8e}, -+ {0x3d400188,0x0}, -+ {0x3d400190,0x497820a}, -+ {0x3d400194,0x80303}, -+ {0x3d4001b4,0x170a}, -+ {0x3d4001a0,0xe0400018}, -+ {0x3d4001a4,0xdf00e4}, -+ {0x3d4001a8,0x80000000}, -+ {0x3d4001b0,0x11}, -+ {0x3d4001c0,0x1}, -+ {0x3d4001c4,0x0}, -+ {0x3d4000f4,0xc99}, -+ {0x3d400108,0x70e1617}, -+ {0x3d400200,0x1f}, -+ {0x3d40020c,0x0}, -+ {0x3d400210,0x1f1f}, -+ {0x3d400204,0x80808}, -+ {0x3d400214,0x7070707}, -+ {0x3d400218,0x7070707}, -+ {0x3d400250,0x29001701}, -+ {0x3d400254,0x2c}, -+ {0x3d40025c,0x4000030}, -+ {0x3d400264,0x900093e7}, -+ {0x3d40026c,0x2005574}, -+ {0x3d400400,0x111}, -+ {0x3d400408,0x72ff}, -+ {0x3d400494,0x2100e07}, -+ {0x3d400498,0x620096}, -+ {0x3d40049c,0x1100e07}, -+ {0x3d4004a0,0xc8012c}, -+ {0x3d402020,0x21}, -+ {0x3d402024,0x7d00}, -+ {0x3d402050,0x20d040}, -+ {0x3d402064,0xc001c}, -+ {0x3d4020dc,0x840000}, -+ {0x3d4020e0,0x310000}, -+ {0x3d4020e8,0x66004d}, -+ {0x3d4020ec,0x16004d}, -+ {0x3d402100,0xa040305}, -+ {0x3d402104,0x30407}, -+ {0x3d402108,0x203060b}, -+ {0x3d40210c,0x505000}, -+ {0x3d402110,0x2040202}, -+ {0x3d402114,0x2030202}, -+ {0x3d402118,0x1010004}, -+ {0x3d40211c,0x301}, -+ {0x3d402130,0x20300}, -+ {0x3d402134,0xa100002}, -+ {0x3d402138,0x1d}, -+ {0x3d402144,0x14000a}, -+ {0x3d402180,0x640004}, -+ {0x3d402190,0x3818200}, -+ {0x3d402194,0x80303}, -+ {0x3d4021b4,0x100}, -+ {0x3d403020,0x21}, -+ {0x3d403024,0x1f40}, -+ {0x3d403050,0x20d040}, -+ {0x3d403064,0x30007}, -+ {0x3d4030dc,0x840000}, -+ {0x3d4030e0,0x310000}, -+ {0x3d4030e8,0x66004d}, -+ {0x3d4030ec,0x16004d}, -+ {0x3d403100,0xa010102}, -+ {0x3d403104,0x30404}, -+ {0x3d403108,0x203060b}, -+ {0x3d40310c,0x505000}, -+ {0x3d403110,0x2040202}, -+ {0x3d403114,0x2030202}, -+ {0x3d403118,0x1010004}, -+ {0x3d40311c,0x301}, -+ {0x3d403130,0x20300}, -+ {0x3d403134,0xa100002}, -+ {0x3d403138,0x8}, -+ {0x3d403144,0x50003}, -+ {0x3d403180,0x190004}, -+ {0x3d403190,0x3818200}, -+ {0x3d403194,0x80303}, -+ {0x3d4031b4,0x100}, -+ {0x3d400028,0x0}, -+}; - /* PHY Initialize Configuration */ - static struct dram_cfg_param ddr_ddrphy_cfg[] = { - {0x100a0,0x0}, -@@ -321,728 +427,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { - {0x2200ca,0x24}, - }; - --/* ddr phy trained csr */ --static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -- { 0x200b2, 0x0 }, -- { 0x1200b2, 0x0 }, -- { 0x2200b2, 0x0 }, -- { 0x200cb, 0x0 }, -- { 0x10043, 0x0 }, -- { 0x110043, 0x0 }, -- { 0x210043, 0x0 }, -- { 0x10143, 0x0 }, -- { 0x110143, 0x0 }, -- { 0x210143, 0x0 }, -- { 0x11043, 0x0 }, -- { 0x111043, 0x0 }, -- { 0x211043, 0x0 }, -- { 0x11143, 0x0 }, -- { 0x111143, 0x0 }, -- { 0x211143, 0x0 }, -- { 0x12043, 0x0 }, -- { 0x112043, 0x0 }, -- { 0x212043, 0x0 }, -- { 0x12143, 0x0 }, -- { 0x112143, 0x0 }, -- { 0x212143, 0x0 }, -- { 0x13043, 0x0 }, -- { 0x113043, 0x0 }, -- { 0x213043, 0x0 }, -- { 0x13143, 0x0 }, -- { 0x113143, 0x0 }, -- { 0x213143, 0x0 }, -- { 0x80, 0x0 }, -- { 0x100080, 0x0 }, -- { 0x200080, 0x0 }, -- { 0x1080, 0x0 }, -- { 0x101080, 0x0 }, -- { 0x201080, 0x0 }, -- { 0x2080, 0x0 }, -- { 0x102080, 0x0 }, -- { 0x202080, 0x0 }, -- { 0x3080, 0x0 }, -- { 0x103080, 0x0 }, -- { 0x203080, 0x0 }, -- { 0x4080, 0x0 }, -- { 0x104080, 0x0 }, -- { 0x204080, 0x0 }, -- { 0x5080, 0x0 }, -- { 0x105080, 0x0 }, -- { 0x205080, 0x0 }, -- { 0x6080, 0x0 }, -- { 0x106080, 0x0 }, -- { 0x206080, 0x0 }, -- { 0x7080, 0x0 }, -- { 0x107080, 0x0 }, -- { 0x207080, 0x0 }, -- { 0x8080, 0x0 }, -- { 0x108080, 0x0 }, -- { 0x208080, 0x0 }, -- { 0x9080, 0x0 }, -- { 0x109080, 0x0 }, -- { 0x209080, 0x0 }, -- { 0x10080, 0x0 }, -- { 0x110080, 0x0 }, -- { 0x210080, 0x0 }, -- { 0x10180, 0x0 }, -- { 0x110180, 0x0 }, -- { 0x210180, 0x0 }, -- { 0x11080, 0x0 }, -- { 0x111080, 0x0 }, -- { 0x211080, 0x0 }, -- { 0x11180, 0x0 }, -- { 0x111180, 0x0 }, -- { 0x211180, 0x0 }, -- { 0x12080, 0x0 }, -- { 0x112080, 0x0 }, -- { 0x212080, 0x0 }, -- { 0x12180, 0x0 }, -- { 0x112180, 0x0 }, -- { 0x212180, 0x0 }, -- { 0x13080, 0x0 }, -- { 0x113080, 0x0 }, -- { 0x213080, 0x0 }, -- { 0x13180, 0x0 }, -- { 0x113180, 0x0 }, -- { 0x213180, 0x0 }, -- { 0x10081, 0x0 }, -- { 0x110081, 0x0 }, -- { 0x210081, 0x0 }, -- { 0x10181, 0x0 }, -- { 0x110181, 0x0 }, -- { 0x210181, 0x0 }, -- { 0x11081, 0x0 }, -- { 0x111081, 0x0 }, -- { 0x211081, 0x0 }, -- { 0x11181, 0x0 }, -- { 0x111181, 0x0 }, -- { 0x211181, 0x0 }, -- { 0x12081, 0x0 }, -- { 0x112081, 0x0 }, -- { 0x212081, 0x0 }, -- { 0x12181, 0x0 }, -- { 0x112181, 0x0 }, -- { 0x212181, 0x0 }, -- { 0x13081, 0x0 }, -- { 0x113081, 0x0 }, -- { 0x213081, 0x0 }, -- { 0x13181, 0x0 }, -- { 0x113181, 0x0 }, -- { 0x213181, 0x0 }, -- { 0x100d0, 0x0 }, -- { 0x1100d0, 0x0 }, -- { 0x2100d0, 0x0 }, -- { 0x101d0, 0x0 }, -- { 0x1101d0, 0x0 }, -- { 0x2101d0, 0x0 }, -- { 0x110d0, 0x0 }, -- { 0x1110d0, 0x0 }, -- { 0x2110d0, 0x0 }, -- { 0x111d0, 0x0 }, -- { 0x1111d0, 0x0 }, -- { 0x2111d0, 0x0 }, -- { 0x120d0, 0x0 }, -- { 0x1120d0, 0x0 }, -- { 0x2120d0, 0x0 }, -- { 0x121d0, 0x0 }, -- { 0x1121d0, 0x0 }, -- { 0x2121d0, 0x0 }, -- { 0x130d0, 0x0 }, -- { 0x1130d0, 0x0 }, -- { 0x2130d0, 0x0 }, -- { 0x131d0, 0x0 }, -- { 0x1131d0, 0x0 }, -- { 0x2131d0, 0x0 }, -- { 0x100d1, 0x0 }, -- { 0x1100d1, 0x0 }, -- { 0x2100d1, 0x0 }, -- { 0x101d1, 0x0 }, -- { 0x1101d1, 0x0 }, -- { 0x2101d1, 0x0 }, -- { 0x110d1, 0x0 }, -- { 0x1110d1, 0x0 }, -- { 0x2110d1, 0x0 }, -- { 0x111d1, 0x0 }, -- { 0x1111d1, 0x0 }, -- { 0x2111d1, 0x0 }, -- { 0x120d1, 0x0 }, -- { 0x1120d1, 0x0 }, -- { 0x2120d1, 0x0 }, -- { 0x121d1, 0x0 }, -- { 0x1121d1, 0x0 }, -- { 0x2121d1, 0x0 }, -- { 0x130d1, 0x0 }, -- { 0x1130d1, 0x0 }, -- { 0x2130d1, 0x0 }, -- { 0x131d1, 0x0 }, -- { 0x1131d1, 0x0 }, -- { 0x2131d1, 0x0 }, -- { 0x10068, 0x0 }, -- { 0x10168, 0x0 }, -- { 0x10268, 0x0 }, -- { 0x10368, 0x0 }, -- { 0x10468, 0x0 }, -- { 0x10568, 0x0 }, -- { 0x10668, 0x0 }, -- { 0x10768, 0x0 }, -- { 0x10868, 0x0 }, -- { 0x11068, 0x0 }, -- { 0x11168, 0x0 }, -- { 0x11268, 0x0 }, -- { 0x11368, 0x0 }, -- { 0x11468, 0x0 }, -- { 0x11568, 0x0 }, -- { 0x11668, 0x0 }, -- { 0x11768, 0x0 }, -- { 0x11868, 0x0 }, -- { 0x12068, 0x0 }, -- { 0x12168, 0x0 }, -- { 0x12268, 0x0 }, -- { 0x12368, 0x0 }, -- { 0x12468, 0x0 }, -- { 0x12568, 0x0 }, -- { 0x12668, 0x0 }, -- { 0x12768, 0x0 }, -- { 0x12868, 0x0 }, -- { 0x13068, 0x0 }, -- { 0x13168, 0x0 }, -- { 0x13268, 0x0 }, -- { 0x13368, 0x0 }, -- { 0x13468, 0x0 }, -- { 0x13568, 0x0 }, -- { 0x13668, 0x0 }, -- { 0x13768, 0x0 }, -- { 0x13868, 0x0 }, -- { 0x10069, 0x0 }, -- { 0x10169, 0x0 }, -- { 0x10269, 0x0 }, -- { 0x10369, 0x0 }, -- { 0x10469, 0x0 }, -- { 0x10569, 0x0 }, -- { 0x10669, 0x0 }, -- { 0x10769, 0x0 }, -- { 0x10869, 0x0 }, -- { 0x11069, 0x0 }, -- { 0x11169, 0x0 }, -- { 0x11269, 0x0 }, -- { 0x11369, 0x0 }, -- { 0x11469, 0x0 }, -- { 0x11569, 0x0 }, -- { 0x11669, 0x0 }, -- { 0x11769, 0x0 }, -- { 0x11869, 0x0 }, -- { 0x12069, 0x0 }, -- { 0x12169, 0x0 }, -- { 0x12269, 0x0 }, -- { 0x12369, 0x0 }, -- { 0x12469, 0x0 }, -- { 0x12569, 0x0 }, -- { 0x12669, 0x0 }, -- { 0x12769, 0x0 }, -- { 0x12869, 0x0 }, -- { 0x13069, 0x0 }, -- { 0x13169, 0x0 }, -- { 0x13269, 0x0 }, -- { 0x13369, 0x0 }, -- { 0x13469, 0x0 }, -- { 0x13569, 0x0 }, -- { 0x13669, 0x0 }, -- { 0x13769, 0x0 }, -- { 0x13869, 0x0 }, -- { 0x1008c, 0x0 }, -- { 0x11008c, 0x0 }, -- { 0x21008c, 0x0 }, -- { 0x1018c, 0x0 }, -- { 0x11018c, 0x0 }, -- { 0x21018c, 0x0 }, -- { 0x1108c, 0x0 }, -- { 0x11108c, 0x0 }, -- { 0x21108c, 0x0 }, -- { 0x1118c, 0x0 }, -- { 0x11118c, 0x0 }, -- { 0x21118c, 0x0 }, -- { 0x1208c, 0x0 }, -- { 0x11208c, 0x0 }, -- { 0x21208c, 0x0 }, -- { 0x1218c, 0x0 }, -- { 0x11218c, 0x0 }, -- { 0x21218c, 0x0 }, -- { 0x1308c, 0x0 }, -- { 0x11308c, 0x0 }, -- { 0x21308c, 0x0 }, -- { 0x1318c, 0x0 }, -- { 0x11318c, 0x0 }, -- { 0x21318c, 0x0 }, -- { 0x1008d, 0x0 }, -- { 0x11008d, 0x0 }, -- { 0x21008d, 0x0 }, -- { 0x1018d, 0x0 }, -- { 0x11018d, 0x0 }, -- { 0x21018d, 0x0 }, -- { 0x1108d, 0x0 }, -- { 0x11108d, 0x0 }, -- { 0x21108d, 0x0 }, -- { 0x1118d, 0x0 }, -- { 0x11118d, 0x0 }, -- { 0x21118d, 0x0 }, -- { 0x1208d, 0x0 }, -- { 0x11208d, 0x0 }, -- { 0x21208d, 0x0 }, -- { 0x1218d, 0x0 }, -- { 0x11218d, 0x0 }, -- { 0x21218d, 0x0 }, -- { 0x1308d, 0x0 }, -- { 0x11308d, 0x0 }, -- { 0x21308d, 0x0 }, -- { 0x1318d, 0x0 }, -- { 0x11318d, 0x0 }, -- { 0x21318d, 0x0 }, -- { 0x100c0, 0x0 }, -- { 0x1100c0, 0x0 }, -- { 0x2100c0, 0x0 }, -- { 0x101c0, 0x0 }, -- { 0x1101c0, 0x0 }, -- { 0x2101c0, 0x0 }, -- { 0x102c0, 0x0 }, -- { 0x1102c0, 0x0 }, -- { 0x2102c0, 0x0 }, -- { 0x103c0, 0x0 }, -- { 0x1103c0, 0x0 }, -- { 0x2103c0, 0x0 }, -- { 0x104c0, 0x0 }, -- { 0x1104c0, 0x0 }, -- { 0x2104c0, 0x0 }, -- { 0x105c0, 0x0 }, -- { 0x1105c0, 0x0 }, -- { 0x2105c0, 0x0 }, -- { 0x106c0, 0x0 }, -- { 0x1106c0, 0x0 }, -- { 0x2106c0, 0x0 }, -- { 0x107c0, 0x0 }, -- { 0x1107c0, 0x0 }, -- { 0x2107c0, 0x0 }, -- { 0x108c0, 0x0 }, -- { 0x1108c0, 0x0 }, -- { 0x2108c0, 0x0 }, -- { 0x110c0, 0x0 }, -- { 0x1110c0, 0x0 }, -- { 0x2110c0, 0x0 }, -- { 0x111c0, 0x0 }, -- { 0x1111c0, 0x0 }, -- { 0x2111c0, 0x0 }, -- { 0x112c0, 0x0 }, -- { 0x1112c0, 0x0 }, -- { 0x2112c0, 0x0 }, -- { 0x113c0, 0x0 }, -- { 0x1113c0, 0x0 }, -- { 0x2113c0, 0x0 }, -- { 0x114c0, 0x0 }, -- { 0x1114c0, 0x0 }, -- { 0x2114c0, 0x0 }, -- { 0x115c0, 0x0 }, -- { 0x1115c0, 0x0 }, -- { 0x2115c0, 0x0 }, -- { 0x116c0, 0x0 }, -- { 0x1116c0, 0x0 }, -- { 0x2116c0, 0x0 }, -- { 0x117c0, 0x0 }, -- { 0x1117c0, 0x0 }, -- { 0x2117c0, 0x0 }, -- { 0x118c0, 0x0 }, -- { 0x1118c0, 0x0 }, -- { 0x2118c0, 0x0 }, -- { 0x120c0, 0x0 }, -- { 0x1120c0, 0x0 }, -- { 0x2120c0, 0x0 }, -- { 0x121c0, 0x0 }, -- { 0x1121c0, 0x0 }, -- { 0x2121c0, 0x0 }, -- { 0x122c0, 0x0 }, -- { 0x1122c0, 0x0 }, -- { 0x2122c0, 0x0 }, -- { 0x123c0, 0x0 }, -- { 0x1123c0, 0x0 }, -- { 0x2123c0, 0x0 }, -- { 0x124c0, 0x0 }, -- { 0x1124c0, 0x0 }, -- { 0x2124c0, 0x0 }, -- { 0x125c0, 0x0 }, -- { 0x1125c0, 0x0 }, -- { 0x2125c0, 0x0 }, -- { 0x126c0, 0x0 }, -- { 0x1126c0, 0x0 }, -- { 0x2126c0, 0x0 }, -- { 0x127c0, 0x0 }, -- { 0x1127c0, 0x0 }, -- { 0x2127c0, 0x0 }, -- { 0x128c0, 0x0 }, -- { 0x1128c0, 0x0 }, -- { 0x2128c0, 0x0 }, -- { 0x130c0, 0x0 }, -- { 0x1130c0, 0x0 }, -- { 0x2130c0, 0x0 }, -- { 0x131c0, 0x0 }, -- { 0x1131c0, 0x0 }, -- { 0x2131c0, 0x0 }, -- { 0x132c0, 0x0 }, -- { 0x1132c0, 0x0 }, -- { 0x2132c0, 0x0 }, -- { 0x133c0, 0x0 }, -- { 0x1133c0, 0x0 }, -- { 0x2133c0, 0x0 }, -- { 0x134c0, 0x0 }, -- { 0x1134c0, 0x0 }, -- { 0x2134c0, 0x0 }, -- { 0x135c0, 0x0 }, -- { 0x1135c0, 0x0 }, -- { 0x2135c0, 0x0 }, -- { 0x136c0, 0x0 }, -- { 0x1136c0, 0x0 }, -- { 0x2136c0, 0x0 }, -- { 0x137c0, 0x0 }, -- { 0x1137c0, 0x0 }, -- { 0x2137c0, 0x0 }, -- { 0x138c0, 0x0 }, -- { 0x1138c0, 0x0 }, -- { 0x2138c0, 0x0 }, -- { 0x100c1, 0x0 }, -- { 0x1100c1, 0x0 }, -- { 0x2100c1, 0x0 }, -- { 0x101c1, 0x0 }, -- { 0x1101c1, 0x0 }, -- { 0x2101c1, 0x0 }, -- { 0x102c1, 0x0 }, -- { 0x1102c1, 0x0 }, -- { 0x2102c1, 0x0 }, -- { 0x103c1, 0x0 }, -- { 0x1103c1, 0x0 }, -- { 0x2103c1, 0x0 }, -- { 0x104c1, 0x0 }, -- { 0x1104c1, 0x0 }, -- { 0x2104c1, 0x0 }, -- { 0x105c1, 0x0 }, -- { 0x1105c1, 0x0 }, -- { 0x2105c1, 0x0 }, -- { 0x106c1, 0x0 }, -- { 0x1106c1, 0x0 }, -- { 0x2106c1, 0x0 }, -- { 0x107c1, 0x0 }, -- { 0x1107c1, 0x0 }, -- { 0x2107c1, 0x0 }, -- { 0x108c1, 0x0 }, -- { 0x1108c1, 0x0 }, -- { 0x2108c1, 0x0 }, -- { 0x110c1, 0x0 }, -- { 0x1110c1, 0x0 }, -- { 0x2110c1, 0x0 }, -- { 0x111c1, 0x0 }, -- { 0x1111c1, 0x0 }, -- { 0x2111c1, 0x0 }, -- { 0x112c1, 0x0 }, -- { 0x1112c1, 0x0 }, -- { 0x2112c1, 0x0 }, -- { 0x113c1, 0x0 }, -- { 0x1113c1, 0x0 }, -- { 0x2113c1, 0x0 }, -- { 0x114c1, 0x0 }, -- { 0x1114c1, 0x0 }, -- { 0x2114c1, 0x0 }, -- { 0x115c1, 0x0 }, -- { 0x1115c1, 0x0 }, -- { 0x2115c1, 0x0 }, -- { 0x116c1, 0x0 }, -- { 0x1116c1, 0x0 }, -- { 0x2116c1, 0x0 }, -- { 0x117c1, 0x0 }, -- { 0x1117c1, 0x0 }, -- { 0x2117c1, 0x0 }, -- { 0x118c1, 0x0 }, -- { 0x1118c1, 0x0 }, -- { 0x2118c1, 0x0 }, -- { 0x120c1, 0x0 }, -- { 0x1120c1, 0x0 }, -- { 0x2120c1, 0x0 }, -- { 0x121c1, 0x0 }, -- { 0x1121c1, 0x0 }, -- { 0x2121c1, 0x0 }, -- { 0x122c1, 0x0 }, -- { 0x1122c1, 0x0 }, -- { 0x2122c1, 0x0 }, -- { 0x123c1, 0x0 }, -- { 0x1123c1, 0x0 }, -- { 0x2123c1, 0x0 }, -- { 0x124c1, 0x0 }, -- { 0x1124c1, 0x0 }, -- { 0x2124c1, 0x0 }, -- { 0x125c1, 0x0 }, -- { 0x1125c1, 0x0 }, -- { 0x2125c1, 0x0 }, -- { 0x126c1, 0x0 }, -- { 0x1126c1, 0x0 }, -- { 0x2126c1, 0x0 }, -- { 0x127c1, 0x0 }, -- { 0x1127c1, 0x0 }, -- { 0x2127c1, 0x0 }, -- { 0x128c1, 0x0 }, -- { 0x1128c1, 0x0 }, -- { 0x2128c1, 0x0 }, -- { 0x130c1, 0x0 }, -- { 0x1130c1, 0x0 }, -- { 0x2130c1, 0x0 }, -- { 0x131c1, 0x0 }, -- { 0x1131c1, 0x0 }, -- { 0x2131c1, 0x0 }, -- { 0x132c1, 0x0 }, -- { 0x1132c1, 0x0 }, -- { 0x2132c1, 0x0 }, -- { 0x133c1, 0x0 }, -- { 0x1133c1, 0x0 }, -- { 0x2133c1, 0x0 }, -- { 0x134c1, 0x0 }, -- { 0x1134c1, 0x0 }, -- { 0x2134c1, 0x0 }, -- { 0x135c1, 0x0 }, -- { 0x1135c1, 0x0 }, -- { 0x2135c1, 0x0 }, -- { 0x136c1, 0x0 }, -- { 0x1136c1, 0x0 }, -- { 0x2136c1, 0x0 }, -- { 0x137c1, 0x0 }, -- { 0x1137c1, 0x0 }, -- { 0x2137c1, 0x0 }, -- { 0x138c1, 0x0 }, -- { 0x1138c1, 0x0 }, -- { 0x2138c1, 0x0 }, -- { 0x10020, 0x0 }, -- { 0x110020, 0x0 }, -- { 0x210020, 0x0 }, -- { 0x11020, 0x0 }, -- { 0x111020, 0x0 }, -- { 0x211020, 0x0 }, -- { 0x12020, 0x0 }, -- { 0x112020, 0x0 }, -- { 0x212020, 0x0 }, -- { 0x13020, 0x0 }, -- { 0x113020, 0x0 }, -- { 0x213020, 0x0 }, -- { 0x20072, 0x0 }, -- { 0x20073, 0x0 }, -- { 0x20074, 0x0 }, -- { 0x100aa, 0x0 }, -- { 0x110aa, 0x0 }, -- { 0x120aa, 0x0 }, -- { 0x130aa, 0x0 }, -- { 0x20010, 0x0 }, -- { 0x120010, 0x0 }, -- { 0x220010, 0x0 }, -- { 0x20011, 0x0 }, -- { 0x120011, 0x0 }, -- { 0x220011, 0x0 }, -- { 0x100ae, 0x0 }, -- { 0x1100ae, 0x0 }, -- { 0x2100ae, 0x0 }, -- { 0x100af, 0x0 }, -- { 0x1100af, 0x0 }, -- { 0x2100af, 0x0 }, -- { 0x110ae, 0x0 }, -- { 0x1110ae, 0x0 }, -- { 0x2110ae, 0x0 }, -- { 0x110af, 0x0 }, -- { 0x1110af, 0x0 }, -- { 0x2110af, 0x0 }, -- { 0x120ae, 0x0 }, -- { 0x1120ae, 0x0 }, -- { 0x2120ae, 0x0 }, -- { 0x120af, 0x0 }, -- { 0x1120af, 0x0 }, -- { 0x2120af, 0x0 }, -- { 0x130ae, 0x0 }, -- { 0x1130ae, 0x0 }, -- { 0x2130ae, 0x0 }, -- { 0x130af, 0x0 }, -- { 0x1130af, 0x0 }, -- { 0x2130af, 0x0 }, -- { 0x20020, 0x0 }, -- { 0x120020, 0x0 }, -- { 0x220020, 0x0 }, -- { 0x100a0, 0x0 }, -- { 0x100a1, 0x0 }, -- { 0x100a2, 0x0 }, -- { 0x100a3, 0x0 }, -- { 0x100a4, 0x0 }, -- { 0x100a5, 0x0 }, -- { 0x100a6, 0x0 }, -- { 0x100a7, 0x0 }, -- { 0x110a0, 0x0 }, -- { 0x110a1, 0x0 }, -- { 0x110a2, 0x0 }, -- { 0x110a3, 0x0 }, -- { 0x110a4, 0x0 }, -- { 0x110a5, 0x0 }, -- { 0x110a6, 0x0 }, -- { 0x110a7, 0x0 }, -- { 0x120a0, 0x0 }, -- { 0x120a1, 0x0 }, -- { 0x120a2, 0x0 }, -- { 0x120a3, 0x0 }, -- { 0x120a4, 0x0 }, -- { 0x120a5, 0x0 }, -- { 0x120a6, 0x0 }, -- { 0x120a7, 0x0 }, -- { 0x130a0, 0x0 }, -- { 0x130a1, 0x0 }, -- { 0x130a2, 0x0 }, -- { 0x130a3, 0x0 }, -- { 0x130a4, 0x0 }, -- { 0x130a5, 0x0 }, -- { 0x130a6, 0x0 }, -- { 0x130a7, 0x0 }, -- { 0x2007c, 0x0 }, -- { 0x12007c, 0x0 }, -- { 0x22007c, 0x0 }, -- { 0x2007d, 0x0 }, -- { 0x12007d, 0x0 }, -- { 0x22007d, 0x0 }, -- { 0x400fd, 0x0 }, -- { 0x400c0, 0x0 }, -- { 0x90201, 0x0 }, -- { 0x190201, 0x0 }, -- { 0x290201, 0x0 }, -- { 0x90202, 0x0 }, -- { 0x190202, 0x0 }, -- { 0x290202, 0x0 }, -- { 0x90203, 0x0 }, -- { 0x190203, 0x0 }, -- { 0x290203, 0x0 }, -- { 0x90204, 0x0 }, -- { 0x190204, 0x0 }, -- { 0x290204, 0x0 }, -- { 0x90205, 0x0 }, -- { 0x190205, 0x0 }, -- { 0x290205, 0x0 }, -- { 0x90206, 0x0 }, -- { 0x190206, 0x0 }, -- { 0x290206, 0x0 }, -- { 0x90207, 0x0 }, -- { 0x190207, 0x0 }, -- { 0x290207, 0x0 }, -- { 0x90208, 0x0 }, -- { 0x190208, 0x0 }, -- { 0x290208, 0x0 }, -- { 0x10062, 0x0 }, -- { 0x10162, 0x0 }, -- { 0x10262, 0x0 }, -- { 0x10362, 0x0 }, -- { 0x10462, 0x0 }, -- { 0x10562, 0x0 }, -- { 0x10662, 0x0 }, -- { 0x10762, 0x0 }, -- { 0x10862, 0x0 }, -- { 0x11062, 0x0 }, -- { 0x11162, 0x0 }, -- { 0x11262, 0x0 }, -- { 0x11362, 0x0 }, -- { 0x11462, 0x0 }, -- { 0x11562, 0x0 }, -- { 0x11662, 0x0 }, -- { 0x11762, 0x0 }, -- { 0x11862, 0x0 }, -- { 0x12062, 0x0 }, -- { 0x12162, 0x0 }, -- { 0x12262, 0x0 }, -- { 0x12362, 0x0 }, -- { 0x12462, 0x0 }, -- { 0x12562, 0x0 }, -- { 0x12662, 0x0 }, -- { 0x12762, 0x0 }, -- { 0x12862, 0x0 }, -- { 0x13062, 0x0 }, -- { 0x13162, 0x0 }, -- { 0x13262, 0x0 }, -- { 0x13362, 0x0 }, -- { 0x13462, 0x0 }, -- { 0x13562, 0x0 }, -- { 0x13662, 0x0 }, -- { 0x13762, 0x0 }, -- { 0x13862, 0x0 }, -- { 0x20077, 0x0 }, -- { 0x10001, 0x0 }, -- { 0x11001, 0x0 }, -- { 0x12001, 0x0 }, -- { 0x13001, 0x0 }, -- { 0x10040, 0x0 }, -- { 0x10140, 0x0 }, -- { 0x10240, 0x0 }, -- { 0x10340, 0x0 }, -- { 0x10440, 0x0 }, -- { 0x10540, 0x0 }, -- { 0x10640, 0x0 }, -- { 0x10740, 0x0 }, -- { 0x10840, 0x0 }, -- { 0x10030, 0x0 }, -- { 0x10130, 0x0 }, -- { 0x10230, 0x0 }, -- { 0x10330, 0x0 }, -- { 0x10430, 0x0 }, -- { 0x10530, 0x0 }, -- { 0x10630, 0x0 }, -- { 0x10730, 0x0 }, -- { 0x10830, 0x0 }, -- { 0x11040, 0x0 }, -- { 0x11140, 0x0 }, -- { 0x11240, 0x0 }, -- { 0x11340, 0x0 }, -- { 0x11440, 0x0 }, -- { 0x11540, 0x0 }, -- { 0x11640, 0x0 }, -- { 0x11740, 0x0 }, -- { 0x11840, 0x0 }, -- { 0x11030, 0x0 }, -- { 0x11130, 0x0 }, -- { 0x11230, 0x0 }, -- { 0x11330, 0x0 }, -- { 0x11430, 0x0 }, -- { 0x11530, 0x0 }, -- { 0x11630, 0x0 }, -- { 0x11730, 0x0 }, -- { 0x11830, 0x0 }, -- { 0x12040, 0x0 }, -- { 0x12140, 0x0 }, -- { 0x12240, 0x0 }, -- { 0x12340, 0x0 }, -- { 0x12440, 0x0 }, -- { 0x12540, 0x0 }, -- { 0x12640, 0x0 }, -- { 0x12740, 0x0 }, -- { 0x12840, 0x0 }, -- { 0x12030, 0x0 }, -- { 0x12130, 0x0 }, -- { 0x12230, 0x0 }, -- { 0x12330, 0x0 }, -- { 0x12430, 0x0 }, -- { 0x12530, 0x0 }, -- { 0x12630, 0x0 }, -- { 0x12730, 0x0 }, -- { 0x12830, 0x0 }, -- { 0x13040, 0x0 }, -- { 0x13140, 0x0 }, -- { 0x13240, 0x0 }, -- { 0x13340, 0x0 }, -- { 0x13440, 0x0 }, -- { 0x13540, 0x0 }, -- { 0x13640, 0x0 }, -- { 0x13740, 0x0 }, -- { 0x13840, 0x0 }, -- { 0x13030, 0x0 }, -- { 0x13130, 0x0 }, -- { 0x13230, 0x0 }, -- { 0x13330, 0x0 }, -- { 0x13430, 0x0 }, -- { 0x13530, 0x0 }, -- { 0x13630, 0x0 }, -- { 0x13730, 0x0 }, -- { 0x13830, 0x0 }, --}; - /* P0 message block paremeter for training firmware */ - static struct dram_cfg_param ddr_fsp0_cfg[] = { - {0xd0000, 0x0}, -@@ -1834,14 +1218,23 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { - - /* ddr timing config params */ - struct dram_timing_info ucm_dram_timing_01050008 = { -- .ddrc_cfg = ddr_ddrc_cfg, -- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -+ .ddrc_cfg = ddr_ddrc_cfg_01050008, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_01050008), -+ .ddrphy_cfg = ddr_ddrphy_cfg, -+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -+ .fsp_msg = ddr_dram_fsp_msg, -+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -+ .ddrphy_pie = ddr_phy_pie, -+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -+ .fsp_table = { 3000, 400, 100, }, -+}; -+struct dram_timing_info ucm_dram_timing_01061010 = { -+ .ddrc_cfg = ddr_ddrc_cfg_01061010, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_01061010), - .ddrphy_cfg = ddr_ddrphy_cfg, - .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), - .fsp_msg = ddr_dram_fsp_msg, - .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), - .ddrphy_pie = ddr_phy_pie, - .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3000, 400, 100, }, -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c -deleted file mode 100644 -index ef7085d909..0000000000 ---- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c -+++ /dev/null -@@ -1,1849 +0,0 @@ --/* -- * Copyright 2018 NXP -- * -- * SPDX-License-Identifier: GPL-2.0+ -- * -- * Generated code from MX8M_DDR_tool -- * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga -- */ -- --#include --#include -- --static struct dram_cfg_param ddr_ddrc_cfg[] = { -- /** Initialize DDRC registers **/ -- {0x3d400304,0x1}, -- {0x3d400030,0x1}, -- {0x3d400000,0xa1080020}, -- {0x3d400020,0x223}, -- {0x3d400024,0x3a980}, -- {0x3d400064,0x5b00d2}, -- {0x3d4000d0,0xc00305ba}, -- {0x3d4000d4,0x940000}, -- {0x3d4000dc,0xd4002d}, -- {0x3d4000e0,0x310000}, -- {0x3d4000e8,0x66004d}, -- {0x3d4000ec,0x16004d}, -- {0x3d400100,0x191e1920}, -- {0x3d400104,0x60630}, -- {0x3d40010c,0xb0b000}, -- {0x3d400110,0xe04080e}, -- {0x3d400114,0x2040c0c}, -- {0x3d400118,0x1010007}, -- {0x3d40011c,0x401}, -- {0x3d400130,0x20600}, -- {0x3d400134,0xc100002}, -- {0x3d400138,0xd8}, -- {0x3d400144,0x96004b}, -- {0x3d400180,0x2ee0017}, -- {0x3d400184,0x2605b8e}, -- {0x3d400188,0x0}, -- {0x3d400190,0x497820a}, -- {0x3d400194,0x80303}, -- {0x3d4001b4,0x170a}, -- {0x3d4001a0,0xe0400018}, -- {0x3d4001a4,0xdf00e4}, -- {0x3d4001a8,0x80000000}, -- {0x3d4001b0,0x11}, -- {0x3d4001c0,0x1}, -- {0x3d4001c4,0x0}, -- {0x3d4000f4,0xc99}, -- {0x3d400108,0x70e1617}, -- {0x3d400200,0x1f}, -- {0x3d40020c,0x0}, -- {0x3d400210,0x1f1f}, -- {0x3d400204,0x80808}, -- {0x3d400214,0x7070707}, -- {0x3d400218,0x7070707}, -- {0x3d400250,0x29001701}, -- {0x3d400254,0x2c}, -- {0x3d40025c,0x4000030}, -- {0x3d400264,0x900093e7}, -- {0x3d40026c,0x2005574}, -- {0x3d400400,0x111}, -- {0x3d400408,0x72ff}, -- {0x3d400494,0x2100e07}, -- {0x3d400498,0x620096}, -- {0x3d40049c,0x1100e07}, -- {0x3d4004a0,0xc8012c}, -- {0x3d402020,0x21}, -- {0x3d402024,0x7d00}, -- {0x3d402050,0x20d040}, -- {0x3d402064,0xc001c}, -- {0x3d4020dc,0x840000}, -- {0x3d4020e0,0x310000}, -- {0x3d4020e8,0x66004d}, -- {0x3d4020ec,0x16004d}, -- {0x3d402100,0xa040305}, -- {0x3d402104,0x30407}, -- {0x3d402108,0x203060b}, -- {0x3d40210c,0x505000}, -- {0x3d402110,0x2040202}, -- {0x3d402114,0x2030202}, -- {0x3d402118,0x1010004}, -- {0x3d40211c,0x301}, -- {0x3d402130,0x20300}, -- {0x3d402134,0xa100002}, -- {0x3d402138,0x1d}, -- {0x3d402144,0x14000a}, -- {0x3d402180,0x640004}, -- {0x3d402190,0x3818200}, -- {0x3d402194,0x80303}, -- {0x3d4021b4,0x100}, -- {0x3d403020,0x21}, -- {0x3d403024,0x1f40}, -- {0x3d403050,0x20d040}, -- {0x3d403064,0x30007}, -- {0x3d4030dc,0x840000}, -- {0x3d4030e0,0x310000}, -- {0x3d4030e8,0x66004d}, -- {0x3d4030ec,0x16004d}, -- {0x3d403100,0xa010102}, -- {0x3d403104,0x30404}, -- {0x3d403108,0x203060b}, -- {0x3d40310c,0x505000}, -- {0x3d403110,0x2040202}, -- {0x3d403114,0x2030202}, -- {0x3d403118,0x1010004}, -- {0x3d40311c,0x301}, -- {0x3d403130,0x20300}, -- {0x3d403134,0xa100002}, -- {0x3d403138,0x8}, -- {0x3d403144,0x50003}, -- {0x3d403180,0x190004}, -- {0x3d403190,0x3818200}, -- {0x3d403194,0x80303}, -- {0x3d4031b4,0x100}, -- {0x3d400028,0x0}, --}; -- --/* PHY Initialize Configuration */ --static struct dram_cfg_param ddr_ddrphy_cfg[] = { -- {0x100a0,0x0}, -- {0x100a1,0x1}, -- {0x100a2,0x2}, -- {0x100a3,0x3}, -- {0x100a4,0x4}, -- {0x100a5,0x5}, -- {0x100a6,0x6}, -- {0x100a7,0x7}, -- {0x110a0,0x0}, -- {0x110a1,0x1}, -- {0x110a2,0x3}, -- {0x110a3,0x4}, -- {0x110a4,0x5}, -- {0x110a5,0x2}, -- {0x110a6,0x7}, -- {0x110a7,0x6}, -- {0x120a0,0x0}, -- {0x120a1,0x1}, -- {0x120a2,0x3}, -- {0x120a3,0x2}, -- {0x120a4,0x5}, -- {0x120a5,0x4}, -- {0x120a6,0x7}, -- {0x120a7,0x6}, -- {0x130a0,0x0}, -- {0x130a1,0x1}, -- {0x130a2,0x2}, -- {0x130a3,0x3}, -- {0x130a4,0x4}, -- {0x130a5,0x5}, -- {0x130a6,0x6}, -- {0x130a7,0x7}, -- {0x1005f,0x1ff}, -- {0x1015f,0x1ff}, -- {0x1105f,0x1ff}, -- {0x1115f,0x1ff}, -- {0x1205f,0x1ff}, -- {0x1215f,0x1ff}, -- {0x1305f,0x1ff}, -- {0x1315f,0x1ff}, -- {0x11005f,0x1ff}, -- {0x11015f,0x1ff}, -- {0x11105f,0x1ff}, -- {0x11115f,0x1ff}, -- {0x11205f,0x1ff}, -- {0x11215f,0x1ff}, -- {0x11305f,0x1ff}, -- {0x11315f,0x1ff}, -- {0x21005f,0x1ff}, -- {0x21015f,0x1ff}, -- {0x21105f,0x1ff}, -- {0x21115f,0x1ff}, -- {0x21205f,0x1ff}, -- {0x21215f,0x1ff}, -- {0x21305f,0x1ff}, -- {0x21315f,0x1ff}, -- {0x55,0x1ff}, -- {0x1055,0x1ff}, -- {0x2055,0x1ff}, -- {0x3055,0x1ff}, -- {0x4055,0x1ff}, -- {0x5055,0x1ff}, -- {0x6055,0x1ff}, -- {0x7055,0x1ff}, -- {0x8055,0x1ff}, -- {0x9055,0x1ff}, -- {0x200c5,0x19}, -- {0x1200c5,0x7}, -- {0x2200c5,0x7}, -- {0x2002e,0x2}, -- {0x12002e,0x2}, -- {0x22002e,0x2}, -- {0x90204,0x0}, -- {0x190204,0x0}, -- {0x290204,0x0}, -- {0x20024,0x1ab}, -- {0x2003a,0x0}, -- {0x120024,0x1ab}, -- {0x2003a,0x0}, -- {0x220024,0x1ab}, -- {0x2003a,0x0}, -- {0x20056,0x3}, -- {0x120056,0xa}, -- {0x220056,0xa}, -- {0x1004d,0xe00}, -- {0x1014d,0xe00}, -- {0x1104d,0xe00}, -- {0x1114d,0xe00}, -- {0x1204d,0xe00}, -- {0x1214d,0xe00}, -- {0x1304d,0xe00}, -- {0x1314d,0xe00}, -- {0x11004d,0xe00}, -- {0x11014d,0xe00}, -- {0x11104d,0xe00}, -- {0x11114d,0xe00}, -- {0x11204d,0xe00}, -- {0x11214d,0xe00}, -- {0x11304d,0xe00}, -- {0x11314d,0xe00}, -- {0x21004d,0xe00}, -- {0x21014d,0xe00}, -- {0x21104d,0xe00}, -- {0x21114d,0xe00}, -- {0x21204d,0xe00}, -- {0x21214d,0xe00}, -- {0x21304d,0xe00}, -- {0x21314d,0xe00}, -- {0x10049,0xeba}, -- {0x10149,0xeba}, -- {0x11049,0xeba}, -- {0x11149,0xeba}, -- {0x12049,0xeba}, -- {0x12149,0xeba}, -- {0x13049,0xeba}, -- {0x13149,0xeba}, -- {0x110049,0xeba}, -- {0x110149,0xeba}, -- {0x111049,0xeba}, -- {0x111149,0xeba}, -- {0x112049,0xeba}, -- {0x112149,0xeba}, -- {0x113049,0xeba}, -- {0x113149,0xeba}, -- {0x210049,0xeba}, -- {0x210149,0xeba}, -- {0x211049,0xeba}, -- {0x211149,0xeba}, -- {0x212049,0xeba}, -- {0x212149,0xeba}, -- {0x213049,0xeba}, -- {0x213149,0xeba}, -- {0x43,0x63}, -- {0x1043,0x63}, -- {0x2043,0x63}, -- {0x3043,0x63}, -- {0x4043,0x63}, -- {0x5043,0x63}, -- {0x6043,0x63}, -- {0x7043,0x63}, -- {0x8043,0x63}, -- {0x9043,0x63}, -- {0x20018,0x3}, -- {0x20075,0x4}, -- {0x20050,0x0}, -- {0x20008,0x2ee}, -- {0x120008,0x64}, -- {0x220008,0x19}, -- {0x20088,0x9}, -- {0x200b2,0xdc}, -- {0x10043,0x5a1}, -- {0x10143,0x5a1}, -- {0x11043,0x5a1}, -- {0x11143,0x5a1}, -- {0x12043,0x5a1}, -- {0x12143,0x5a1}, -- {0x13043,0x5a1}, -- {0x13143,0x5a1}, -- {0x1200b2,0xdc}, -- {0x110043,0x5a1}, -- {0x110143,0x5a1}, -- {0x111043,0x5a1}, -- {0x111143,0x5a1}, -- {0x112043,0x5a1}, -- {0x112143,0x5a1}, -- {0x113043,0x5a1}, -- {0x113143,0x5a1}, -- {0x2200b2,0xdc}, -- {0x210043,0x5a1}, -- {0x210143,0x5a1}, -- {0x211043,0x5a1}, -- {0x211143,0x5a1}, -- {0x212043,0x5a1}, -- {0x212143,0x5a1}, -- {0x213043,0x5a1}, -- {0x213143,0x5a1}, -- {0x200fa,0x1}, -- {0x1200fa,0x1}, -- {0x2200fa,0x1}, -- {0x20019,0x1}, -- {0x120019,0x1}, -- {0x220019,0x1}, -- {0x200f0,0x660}, -- {0x200f1,0x0}, -- {0x200f2,0x4444}, -- {0x200f3,0x8888}, -- {0x200f4,0x5665}, -- {0x200f5,0x0}, -- {0x200f6,0x0}, -- {0x200f7,0xf000}, -- {0x20025,0x0}, -- {0x2002d,0x0}, -- {0x12002d,0x0}, -- {0x22002d,0x0}, -- {0x200c7,0x21}, -- {0x1200c7,0x21}, -- {0x2200c7,0x21}, -- {0x200ca,0x24}, -- {0x1200ca,0x24}, -- {0x2200ca,0x24}, --}; -- --/* ddr phy trained csr */ --static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -- { 0x200b2, 0x0 }, -- { 0x1200b2, 0x0 }, -- { 0x2200b2, 0x0 }, -- { 0x200cb, 0x0 }, -- { 0x10043, 0x0 }, -- { 0x110043, 0x0 }, -- { 0x210043, 0x0 }, -- { 0x10143, 0x0 }, -- { 0x110143, 0x0 }, -- { 0x210143, 0x0 }, -- { 0x11043, 0x0 }, -- { 0x111043, 0x0 }, -- { 0x211043, 0x0 }, -- { 0x11143, 0x0 }, -- { 0x111143, 0x0 }, -- { 0x211143, 0x0 }, -- { 0x12043, 0x0 }, -- { 0x112043, 0x0 }, -- { 0x212043, 0x0 }, -- { 0x12143, 0x0 }, -- { 0x112143, 0x0 }, -- { 0x212143, 0x0 }, -- { 0x13043, 0x0 }, -- { 0x113043, 0x0 }, -- { 0x213043, 0x0 }, -- { 0x13143, 0x0 }, -- { 0x113143, 0x0 }, -- { 0x213143, 0x0 }, -- { 0x80, 0x0 }, -- { 0x100080, 0x0 }, -- { 0x200080, 0x0 }, -- { 0x1080, 0x0 }, -- { 0x101080, 0x0 }, -- { 0x201080, 0x0 }, -- { 0x2080, 0x0 }, -- { 0x102080, 0x0 }, -- { 0x202080, 0x0 }, -- { 0x3080, 0x0 }, -- { 0x103080, 0x0 }, -- { 0x203080, 0x0 }, -- { 0x4080, 0x0 }, -- { 0x104080, 0x0 }, -- { 0x204080, 0x0 }, -- { 0x5080, 0x0 }, -- { 0x105080, 0x0 }, -- { 0x205080, 0x0 }, -- { 0x6080, 0x0 }, -- { 0x106080, 0x0 }, -- { 0x206080, 0x0 }, -- { 0x7080, 0x0 }, -- { 0x107080, 0x0 }, -- { 0x207080, 0x0 }, -- { 0x8080, 0x0 }, -- { 0x108080, 0x0 }, -- { 0x208080, 0x0 }, -- { 0x9080, 0x0 }, -- { 0x109080, 0x0 }, -- { 0x209080, 0x0 }, -- { 0x10080, 0x0 }, -- { 0x110080, 0x0 }, -- { 0x210080, 0x0 }, -- { 0x10180, 0x0 }, -- { 0x110180, 0x0 }, -- { 0x210180, 0x0 }, -- { 0x11080, 0x0 }, -- { 0x111080, 0x0 }, -- { 0x211080, 0x0 }, -- { 0x11180, 0x0 }, -- { 0x111180, 0x0 }, -- { 0x211180, 0x0 }, -- { 0x12080, 0x0 }, -- { 0x112080, 0x0 }, -- { 0x212080, 0x0 }, -- { 0x12180, 0x0 }, -- { 0x112180, 0x0 }, -- { 0x212180, 0x0 }, -- { 0x13080, 0x0 }, -- { 0x113080, 0x0 }, -- { 0x213080, 0x0 }, -- { 0x13180, 0x0 }, -- { 0x113180, 0x0 }, -- { 0x213180, 0x0 }, -- { 0x10081, 0x0 }, -- { 0x110081, 0x0 }, -- { 0x210081, 0x0 }, -- { 0x10181, 0x0 }, -- { 0x110181, 0x0 }, -- { 0x210181, 0x0 }, -- { 0x11081, 0x0 }, -- { 0x111081, 0x0 }, -- { 0x211081, 0x0 }, -- { 0x11181, 0x0 }, -- { 0x111181, 0x0 }, -- { 0x211181, 0x0 }, -- { 0x12081, 0x0 }, -- { 0x112081, 0x0 }, -- { 0x212081, 0x0 }, -- { 0x12181, 0x0 }, -- { 0x112181, 0x0 }, -- { 0x212181, 0x0 }, -- { 0x13081, 0x0 }, -- { 0x113081, 0x0 }, -- { 0x213081, 0x0 }, -- { 0x13181, 0x0 }, -- { 0x113181, 0x0 }, -- { 0x213181, 0x0 }, -- { 0x100d0, 0x0 }, -- { 0x1100d0, 0x0 }, -- { 0x2100d0, 0x0 }, -- { 0x101d0, 0x0 }, -- { 0x1101d0, 0x0 }, -- { 0x2101d0, 0x0 }, -- { 0x110d0, 0x0 }, -- { 0x1110d0, 0x0 }, -- { 0x2110d0, 0x0 }, -- { 0x111d0, 0x0 }, -- { 0x1111d0, 0x0 }, -- { 0x2111d0, 0x0 }, -- { 0x120d0, 0x0 }, -- { 0x1120d0, 0x0 }, -- { 0x2120d0, 0x0 }, -- { 0x121d0, 0x0 }, -- { 0x1121d0, 0x0 }, -- { 0x2121d0, 0x0 }, -- { 0x130d0, 0x0 }, -- { 0x1130d0, 0x0 }, -- { 0x2130d0, 0x0 }, -- { 0x131d0, 0x0 }, -- { 0x1131d0, 0x0 }, -- { 0x2131d0, 0x0 }, -- { 0x100d1, 0x0 }, -- { 0x1100d1, 0x0 }, -- { 0x2100d1, 0x0 }, -- { 0x101d1, 0x0 }, -- { 0x1101d1, 0x0 }, -- { 0x2101d1, 0x0 }, -- { 0x110d1, 0x0 }, -- { 0x1110d1, 0x0 }, -- { 0x2110d1, 0x0 }, -- { 0x111d1, 0x0 }, -- { 0x1111d1, 0x0 }, -- { 0x2111d1, 0x0 }, -- { 0x120d1, 0x0 }, -- { 0x1120d1, 0x0 }, -- { 0x2120d1, 0x0 }, -- { 0x121d1, 0x0 }, -- { 0x1121d1, 0x0 }, -- { 0x2121d1, 0x0 }, -- { 0x130d1, 0x0 }, -- { 0x1130d1, 0x0 }, -- { 0x2130d1, 0x0 }, -- { 0x131d1, 0x0 }, -- { 0x1131d1, 0x0 }, -- { 0x2131d1, 0x0 }, -- { 0x10068, 0x0 }, -- { 0x10168, 0x0 }, -- { 0x10268, 0x0 }, -- { 0x10368, 0x0 }, -- { 0x10468, 0x0 }, -- { 0x10568, 0x0 }, -- { 0x10668, 0x0 }, -- { 0x10768, 0x0 }, -- { 0x10868, 0x0 }, -- { 0x11068, 0x0 }, -- { 0x11168, 0x0 }, -- { 0x11268, 0x0 }, -- { 0x11368, 0x0 }, -- { 0x11468, 0x0 }, -- { 0x11568, 0x0 }, -- { 0x11668, 0x0 }, -- { 0x11768, 0x0 }, -- { 0x11868, 0x0 }, -- { 0x12068, 0x0 }, -- { 0x12168, 0x0 }, -- { 0x12268, 0x0 }, -- { 0x12368, 0x0 }, -- { 0x12468, 0x0 }, -- { 0x12568, 0x0 }, -- { 0x12668, 0x0 }, -- { 0x12768, 0x0 }, -- { 0x12868, 0x0 }, -- { 0x13068, 0x0 }, -- { 0x13168, 0x0 }, -- { 0x13268, 0x0 }, -- { 0x13368, 0x0 }, -- { 0x13468, 0x0 }, -- { 0x13568, 0x0 }, -- { 0x13668, 0x0 }, -- { 0x13768, 0x0 }, -- { 0x13868, 0x0 }, -- { 0x10069, 0x0 }, -- { 0x10169, 0x0 }, -- { 0x10269, 0x0 }, -- { 0x10369, 0x0 }, -- { 0x10469, 0x0 }, -- { 0x10569, 0x0 }, -- { 0x10669, 0x0 }, -- { 0x10769, 0x0 }, -- { 0x10869, 0x0 }, -- { 0x11069, 0x0 }, -- { 0x11169, 0x0 }, -- { 0x11269, 0x0 }, -- { 0x11369, 0x0 }, -- { 0x11469, 0x0 }, -- { 0x11569, 0x0 }, -- { 0x11669, 0x0 }, -- { 0x11769, 0x0 }, -- { 0x11869, 0x0 }, -- { 0x12069, 0x0 }, -- { 0x12169, 0x0 }, -- { 0x12269, 0x0 }, -- { 0x12369, 0x0 }, -- { 0x12469, 0x0 }, -- { 0x12569, 0x0 }, -- { 0x12669, 0x0 }, -- { 0x12769, 0x0 }, -- { 0x12869, 0x0 }, -- { 0x13069, 0x0 }, -- { 0x13169, 0x0 }, -- { 0x13269, 0x0 }, -- { 0x13369, 0x0 }, -- { 0x13469, 0x0 }, -- { 0x13569, 0x0 }, -- { 0x13669, 0x0 }, -- { 0x13769, 0x0 }, -- { 0x13869, 0x0 }, -- { 0x1008c, 0x0 }, -- { 0x11008c, 0x0 }, -- { 0x21008c, 0x0 }, -- { 0x1018c, 0x0 }, -- { 0x11018c, 0x0 }, -- { 0x21018c, 0x0 }, -- { 0x1108c, 0x0 }, -- { 0x11108c, 0x0 }, -- { 0x21108c, 0x0 }, -- { 0x1118c, 0x0 }, -- { 0x11118c, 0x0 }, -- { 0x21118c, 0x0 }, -- { 0x1208c, 0x0 }, -- { 0x11208c, 0x0 }, -- { 0x21208c, 0x0 }, -- { 0x1218c, 0x0 }, -- { 0x11218c, 0x0 }, -- { 0x21218c, 0x0 }, -- { 0x1308c, 0x0 }, -- { 0x11308c, 0x0 }, -- { 0x21308c, 0x0 }, -- { 0x1318c, 0x0 }, -- { 0x11318c, 0x0 }, -- { 0x21318c, 0x0 }, -- { 0x1008d, 0x0 }, -- { 0x11008d, 0x0 }, -- { 0x21008d, 0x0 }, -- { 0x1018d, 0x0 }, -- { 0x11018d, 0x0 }, -- { 0x21018d, 0x0 }, -- { 0x1108d, 0x0 }, -- { 0x11108d, 0x0 }, -- { 0x21108d, 0x0 }, -- { 0x1118d, 0x0 }, -- { 0x11118d, 0x0 }, -- { 0x21118d, 0x0 }, -- { 0x1208d, 0x0 }, -- { 0x11208d, 0x0 }, -- { 0x21208d, 0x0 }, -- { 0x1218d, 0x0 }, -- { 0x11218d, 0x0 }, -- { 0x21218d, 0x0 }, -- { 0x1308d, 0x0 }, -- { 0x11308d, 0x0 }, -- { 0x21308d, 0x0 }, -- { 0x1318d, 0x0 }, -- { 0x11318d, 0x0 }, -- { 0x21318d, 0x0 }, -- { 0x100c0, 0x0 }, -- { 0x1100c0, 0x0 }, -- { 0x2100c0, 0x0 }, -- { 0x101c0, 0x0 }, -- { 0x1101c0, 0x0 }, -- { 0x2101c0, 0x0 }, -- { 0x102c0, 0x0 }, -- { 0x1102c0, 0x0 }, -- { 0x2102c0, 0x0 }, -- { 0x103c0, 0x0 }, -- { 0x1103c0, 0x0 }, -- { 0x2103c0, 0x0 }, -- { 0x104c0, 0x0 }, -- { 0x1104c0, 0x0 }, -- { 0x2104c0, 0x0 }, -- { 0x105c0, 0x0 }, -- { 0x1105c0, 0x0 }, -- { 0x2105c0, 0x0 }, -- { 0x106c0, 0x0 }, -- { 0x1106c0, 0x0 }, -- { 0x2106c0, 0x0 }, -- { 0x107c0, 0x0 }, -- { 0x1107c0, 0x0 }, -- { 0x2107c0, 0x0 }, -- { 0x108c0, 0x0 }, -- { 0x1108c0, 0x0 }, -- { 0x2108c0, 0x0 }, -- { 0x110c0, 0x0 }, -- { 0x1110c0, 0x0 }, -- { 0x2110c0, 0x0 }, -- { 0x111c0, 0x0 }, -- { 0x1111c0, 0x0 }, -- { 0x2111c0, 0x0 }, -- { 0x112c0, 0x0 }, -- { 0x1112c0, 0x0 }, -- { 0x2112c0, 0x0 }, -- { 0x113c0, 0x0 }, -- { 0x1113c0, 0x0 }, -- { 0x2113c0, 0x0 }, -- { 0x114c0, 0x0 }, -- { 0x1114c0, 0x0 }, -- { 0x2114c0, 0x0 }, -- { 0x115c0, 0x0 }, -- { 0x1115c0, 0x0 }, -- { 0x2115c0, 0x0 }, -- { 0x116c0, 0x0 }, -- { 0x1116c0, 0x0 }, -- { 0x2116c0, 0x0 }, -- { 0x117c0, 0x0 }, -- { 0x1117c0, 0x0 }, -- { 0x2117c0, 0x0 }, -- { 0x118c0, 0x0 }, -- { 0x1118c0, 0x0 }, -- { 0x2118c0, 0x0 }, -- { 0x120c0, 0x0 }, -- { 0x1120c0, 0x0 }, -- { 0x2120c0, 0x0 }, -- { 0x121c0, 0x0 }, -- { 0x1121c0, 0x0 }, -- { 0x2121c0, 0x0 }, -- { 0x122c0, 0x0 }, -- { 0x1122c0, 0x0 }, -- { 0x2122c0, 0x0 }, -- { 0x123c0, 0x0 }, -- { 0x1123c0, 0x0 }, -- { 0x2123c0, 0x0 }, -- { 0x124c0, 0x0 }, -- { 0x1124c0, 0x0 }, -- { 0x2124c0, 0x0 }, -- { 0x125c0, 0x0 }, -- { 0x1125c0, 0x0 }, -- { 0x2125c0, 0x0 }, -- { 0x126c0, 0x0 }, -- { 0x1126c0, 0x0 }, -- { 0x2126c0, 0x0 }, -- { 0x127c0, 0x0 }, -- { 0x1127c0, 0x0 }, -- { 0x2127c0, 0x0 }, -- { 0x128c0, 0x0 }, -- { 0x1128c0, 0x0 }, -- { 0x2128c0, 0x0 }, -- { 0x130c0, 0x0 }, -- { 0x1130c0, 0x0 }, -- { 0x2130c0, 0x0 }, -- { 0x131c0, 0x0 }, -- { 0x1131c0, 0x0 }, -- { 0x2131c0, 0x0 }, -- { 0x132c0, 0x0 }, -- { 0x1132c0, 0x0 }, -- { 0x2132c0, 0x0 }, -- { 0x133c0, 0x0 }, -- { 0x1133c0, 0x0 }, -- { 0x2133c0, 0x0 }, -- { 0x134c0, 0x0 }, -- { 0x1134c0, 0x0 }, -- { 0x2134c0, 0x0 }, -- { 0x135c0, 0x0 }, -- { 0x1135c0, 0x0 }, -- { 0x2135c0, 0x0 }, -- { 0x136c0, 0x0 }, -- { 0x1136c0, 0x0 }, -- { 0x2136c0, 0x0 }, -- { 0x137c0, 0x0 }, -- { 0x1137c0, 0x0 }, -- { 0x2137c0, 0x0 }, -- { 0x138c0, 0x0 }, -- { 0x1138c0, 0x0 }, -- { 0x2138c0, 0x0 }, -- { 0x100c1, 0x0 }, -- { 0x1100c1, 0x0 }, -- { 0x2100c1, 0x0 }, -- { 0x101c1, 0x0 }, -- { 0x1101c1, 0x0 }, -- { 0x2101c1, 0x0 }, -- { 0x102c1, 0x0 }, -- { 0x1102c1, 0x0 }, -- { 0x2102c1, 0x0 }, -- { 0x103c1, 0x0 }, -- { 0x1103c1, 0x0 }, -- { 0x2103c1, 0x0 }, -- { 0x104c1, 0x0 }, -- { 0x1104c1, 0x0 }, -- { 0x2104c1, 0x0 }, -- { 0x105c1, 0x0 }, -- { 0x1105c1, 0x0 }, -- { 0x2105c1, 0x0 }, -- { 0x106c1, 0x0 }, -- { 0x1106c1, 0x0 }, -- { 0x2106c1, 0x0 }, -- { 0x107c1, 0x0 }, -- { 0x1107c1, 0x0 }, -- { 0x2107c1, 0x0 }, -- { 0x108c1, 0x0 }, -- { 0x1108c1, 0x0 }, -- { 0x2108c1, 0x0 }, -- { 0x110c1, 0x0 }, -- { 0x1110c1, 0x0 }, -- { 0x2110c1, 0x0 }, -- { 0x111c1, 0x0 }, -- { 0x1111c1, 0x0 }, -- { 0x2111c1, 0x0 }, -- { 0x112c1, 0x0 }, -- { 0x1112c1, 0x0 }, -- { 0x2112c1, 0x0 }, -- { 0x113c1, 0x0 }, -- { 0x1113c1, 0x0 }, -- { 0x2113c1, 0x0 }, -- { 0x114c1, 0x0 }, -- { 0x1114c1, 0x0 }, -- { 0x2114c1, 0x0 }, -- { 0x115c1, 0x0 }, -- { 0x1115c1, 0x0 }, -- { 0x2115c1, 0x0 }, -- { 0x116c1, 0x0 }, -- { 0x1116c1, 0x0 }, -- { 0x2116c1, 0x0 }, -- { 0x117c1, 0x0 }, -- { 0x1117c1, 0x0 }, -- { 0x2117c1, 0x0 }, -- { 0x118c1, 0x0 }, -- { 0x1118c1, 0x0 }, -- { 0x2118c1, 0x0 }, -- { 0x120c1, 0x0 }, -- { 0x1120c1, 0x0 }, -- { 0x2120c1, 0x0 }, -- { 0x121c1, 0x0 }, -- { 0x1121c1, 0x0 }, -- { 0x2121c1, 0x0 }, -- { 0x122c1, 0x0 }, -- { 0x1122c1, 0x0 }, -- { 0x2122c1, 0x0 }, -- { 0x123c1, 0x0 }, -- { 0x1123c1, 0x0 }, -- { 0x2123c1, 0x0 }, -- { 0x124c1, 0x0 }, -- { 0x1124c1, 0x0 }, -- { 0x2124c1, 0x0 }, -- { 0x125c1, 0x0 }, -- { 0x1125c1, 0x0 }, -- { 0x2125c1, 0x0 }, -- { 0x126c1, 0x0 }, -- { 0x1126c1, 0x0 }, -- { 0x2126c1, 0x0 }, -- { 0x127c1, 0x0 }, -- { 0x1127c1, 0x0 }, -- { 0x2127c1, 0x0 }, -- { 0x128c1, 0x0 }, -- { 0x1128c1, 0x0 }, -- { 0x2128c1, 0x0 }, -- { 0x130c1, 0x0 }, -- { 0x1130c1, 0x0 }, -- { 0x2130c1, 0x0 }, -- { 0x131c1, 0x0 }, -- { 0x1131c1, 0x0 }, -- { 0x2131c1, 0x0 }, -- { 0x132c1, 0x0 }, -- { 0x1132c1, 0x0 }, -- { 0x2132c1, 0x0 }, -- { 0x133c1, 0x0 }, -- { 0x1133c1, 0x0 }, -- { 0x2133c1, 0x0 }, -- { 0x134c1, 0x0 }, -- { 0x1134c1, 0x0 }, -- { 0x2134c1, 0x0 }, -- { 0x135c1, 0x0 }, -- { 0x1135c1, 0x0 }, -- { 0x2135c1, 0x0 }, -- { 0x136c1, 0x0 }, -- { 0x1136c1, 0x0 }, -- { 0x2136c1, 0x0 }, -- { 0x137c1, 0x0 }, -- { 0x1137c1, 0x0 }, -- { 0x2137c1, 0x0 }, -- { 0x138c1, 0x0 }, -- { 0x1138c1, 0x0 }, -- { 0x2138c1, 0x0 }, -- { 0x10020, 0x0 }, -- { 0x110020, 0x0 }, -- { 0x210020, 0x0 }, -- { 0x11020, 0x0 }, -- { 0x111020, 0x0 }, -- { 0x211020, 0x0 }, -- { 0x12020, 0x0 }, -- { 0x112020, 0x0 }, -- { 0x212020, 0x0 }, -- { 0x13020, 0x0 }, -- { 0x113020, 0x0 }, -- { 0x213020, 0x0 }, -- { 0x20072, 0x0 }, -- { 0x20073, 0x0 }, -- { 0x20074, 0x0 }, -- { 0x100aa, 0x0 }, -- { 0x110aa, 0x0 }, -- { 0x120aa, 0x0 }, -- { 0x130aa, 0x0 }, -- { 0x20010, 0x0 }, -- { 0x120010, 0x0 }, -- { 0x220010, 0x0 }, -- { 0x20011, 0x0 }, -- { 0x120011, 0x0 }, -- { 0x220011, 0x0 }, -- { 0x100ae, 0x0 }, -- { 0x1100ae, 0x0 }, -- { 0x2100ae, 0x0 }, -- { 0x100af, 0x0 }, -- { 0x1100af, 0x0 }, -- { 0x2100af, 0x0 }, -- { 0x110ae, 0x0 }, -- { 0x1110ae, 0x0 }, -- { 0x2110ae, 0x0 }, -- { 0x110af, 0x0 }, -- { 0x1110af, 0x0 }, -- { 0x2110af, 0x0 }, -- { 0x120ae, 0x0 }, -- { 0x1120ae, 0x0 }, -- { 0x2120ae, 0x0 }, -- { 0x120af, 0x0 }, -- { 0x1120af, 0x0 }, -- { 0x2120af, 0x0 }, -- { 0x130ae, 0x0 }, -- { 0x1130ae, 0x0 }, -- { 0x2130ae, 0x0 }, -- { 0x130af, 0x0 }, -- { 0x1130af, 0x0 }, -- { 0x2130af, 0x0 }, -- { 0x20020, 0x0 }, -- { 0x120020, 0x0 }, -- { 0x220020, 0x0 }, -- { 0x100a0, 0x0 }, -- { 0x100a1, 0x0 }, -- { 0x100a2, 0x0 }, -- { 0x100a3, 0x0 }, -- { 0x100a4, 0x0 }, -- { 0x100a5, 0x0 }, -- { 0x100a6, 0x0 }, -- { 0x100a7, 0x0 }, -- { 0x110a0, 0x0 }, -- { 0x110a1, 0x0 }, -- { 0x110a2, 0x0 }, -- { 0x110a3, 0x0 }, -- { 0x110a4, 0x0 }, -- { 0x110a5, 0x0 }, -- { 0x110a6, 0x0 }, -- { 0x110a7, 0x0 }, -- { 0x120a0, 0x0 }, -- { 0x120a1, 0x0 }, -- { 0x120a2, 0x0 }, -- { 0x120a3, 0x0 }, -- { 0x120a4, 0x0 }, -- { 0x120a5, 0x0 }, -- { 0x120a6, 0x0 }, -- { 0x120a7, 0x0 }, -- { 0x130a0, 0x0 }, -- { 0x130a1, 0x0 }, -- { 0x130a2, 0x0 }, -- { 0x130a3, 0x0 }, -- { 0x130a4, 0x0 }, -- { 0x130a5, 0x0 }, -- { 0x130a6, 0x0 }, -- { 0x130a7, 0x0 }, -- { 0x2007c, 0x0 }, -- { 0x12007c, 0x0 }, -- { 0x22007c, 0x0 }, -- { 0x2007d, 0x0 }, -- { 0x12007d, 0x0 }, -- { 0x22007d, 0x0 }, -- { 0x400fd, 0x0 }, -- { 0x400c0, 0x0 }, -- { 0x90201, 0x0 }, -- { 0x190201, 0x0 }, -- { 0x290201, 0x0 }, -- { 0x90202, 0x0 }, -- { 0x190202, 0x0 }, -- { 0x290202, 0x0 }, -- { 0x90203, 0x0 }, -- { 0x190203, 0x0 }, -- { 0x290203, 0x0 }, -- { 0x90204, 0x0 }, -- { 0x190204, 0x0 }, -- { 0x290204, 0x0 }, -- { 0x90205, 0x0 }, -- { 0x190205, 0x0 }, -- { 0x290205, 0x0 }, -- { 0x90206, 0x0 }, -- { 0x190206, 0x0 }, -- { 0x290206, 0x0 }, -- { 0x90207, 0x0 }, -- { 0x190207, 0x0 }, -- { 0x290207, 0x0 }, -- { 0x90208, 0x0 }, -- { 0x190208, 0x0 }, -- { 0x290208, 0x0 }, -- { 0x10062, 0x0 }, -- { 0x10162, 0x0 }, -- { 0x10262, 0x0 }, -- { 0x10362, 0x0 }, -- { 0x10462, 0x0 }, -- { 0x10562, 0x0 }, -- { 0x10662, 0x0 }, -- { 0x10762, 0x0 }, -- { 0x10862, 0x0 }, -- { 0x11062, 0x0 }, -- { 0x11162, 0x0 }, -- { 0x11262, 0x0 }, -- { 0x11362, 0x0 }, -- { 0x11462, 0x0 }, -- { 0x11562, 0x0 }, -- { 0x11662, 0x0 }, -- { 0x11762, 0x0 }, -- { 0x11862, 0x0 }, -- { 0x12062, 0x0 }, -- { 0x12162, 0x0 }, -- { 0x12262, 0x0 }, -- { 0x12362, 0x0 }, -- { 0x12462, 0x0 }, -- { 0x12562, 0x0 }, -- { 0x12662, 0x0 }, -- { 0x12762, 0x0 }, -- { 0x12862, 0x0 }, -- { 0x13062, 0x0 }, -- { 0x13162, 0x0 }, -- { 0x13262, 0x0 }, -- { 0x13362, 0x0 }, -- { 0x13462, 0x0 }, -- { 0x13562, 0x0 }, -- { 0x13662, 0x0 }, -- { 0x13762, 0x0 }, -- { 0x13862, 0x0 }, -- { 0x20077, 0x0 }, -- { 0x10001, 0x0 }, -- { 0x11001, 0x0 }, -- { 0x12001, 0x0 }, -- { 0x13001, 0x0 }, -- { 0x10040, 0x0 }, -- { 0x10140, 0x0 }, -- { 0x10240, 0x0 }, -- { 0x10340, 0x0 }, -- { 0x10440, 0x0 }, -- { 0x10540, 0x0 }, -- { 0x10640, 0x0 }, -- { 0x10740, 0x0 }, -- { 0x10840, 0x0 }, -- { 0x10030, 0x0 }, -- { 0x10130, 0x0 }, -- { 0x10230, 0x0 }, -- { 0x10330, 0x0 }, -- { 0x10430, 0x0 }, -- { 0x10530, 0x0 }, -- { 0x10630, 0x0 }, -- { 0x10730, 0x0 }, -- { 0x10830, 0x0 }, -- { 0x11040, 0x0 }, -- { 0x11140, 0x0 }, -- { 0x11240, 0x0 }, -- { 0x11340, 0x0 }, -- { 0x11440, 0x0 }, -- { 0x11540, 0x0 }, -- { 0x11640, 0x0 }, -- { 0x11740, 0x0 }, -- { 0x11840, 0x0 }, -- { 0x11030, 0x0 }, -- { 0x11130, 0x0 }, -- { 0x11230, 0x0 }, -- { 0x11330, 0x0 }, -- { 0x11430, 0x0 }, -- { 0x11530, 0x0 }, -- { 0x11630, 0x0 }, -- { 0x11730, 0x0 }, -- { 0x11830, 0x0 }, -- { 0x12040, 0x0 }, -- { 0x12140, 0x0 }, -- { 0x12240, 0x0 }, -- { 0x12340, 0x0 }, -- { 0x12440, 0x0 }, -- { 0x12540, 0x0 }, -- { 0x12640, 0x0 }, -- { 0x12740, 0x0 }, -- { 0x12840, 0x0 }, -- { 0x12030, 0x0 }, -- { 0x12130, 0x0 }, -- { 0x12230, 0x0 }, -- { 0x12330, 0x0 }, -- { 0x12430, 0x0 }, -- { 0x12530, 0x0 }, -- { 0x12630, 0x0 }, -- { 0x12730, 0x0 }, -- { 0x12830, 0x0 }, -- { 0x13040, 0x0 }, -- { 0x13140, 0x0 }, -- { 0x13240, 0x0 }, -- { 0x13340, 0x0 }, -- { 0x13440, 0x0 }, -- { 0x13540, 0x0 }, -- { 0x13640, 0x0 }, -- { 0x13740, 0x0 }, -- { 0x13840, 0x0 }, -- { 0x13030, 0x0 }, -- { 0x13130, 0x0 }, -- { 0x13230, 0x0 }, -- { 0x13330, 0x0 }, -- { 0x13430, 0x0 }, -- { 0x13530, 0x0 }, -- { 0x13630, 0x0 }, -- { 0x13730, 0x0 }, -- { 0x13830, 0x0 }, --}; --/* P0 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp0_cfg[] = { -- {0xd0000, 0x0}, -- {0x54003,0xbb8}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x131f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x110}, -- {0x54019,0x2dd4}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x2dd4}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x1}, -- {0x54032,0xd400}, -- {0x54033,0x312d}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0xd400}, -- {0x54039,0x312d}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P1 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp1_cfg[] = { -- {0xd0000, 0x0}, -- {0x54002,0x101}, -- {0x54003,0x190}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x121f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x110}, -- {0x54019,0x84}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x84}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x1}, -- {0x54032,0x8400}, -- {0x54033,0x3100}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0x8400}, -- {0x54039,0x3100}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P2 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp2_cfg[] = { -- {0xd0000, 0x0}, -- {0x54002,0x102}, -- {0x54003,0x64}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x121f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x110}, -- {0x54019,0x84}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x84}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x1}, -- {0x54032,0x8400}, -- {0x54033,0x3100}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0x8400}, -- {0x54039,0x3100}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P0 2D message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { -- {0xd0000, 0x0}, -- {0x54003,0xbb8}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x61}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400f,0x100}, -- {0x54010,0x1f7f}, -- {0x54012,0x110}, -- {0x54019,0x2dd4}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x2dd4}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x1}, -- {0x54032,0xd400}, -- {0x54033,0x312d}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0xd400}, -- {0x54039,0x312d}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- { 0xd0000, 0x1 }, --}; -- --/* DRAM PHY init engine image */ --static struct dram_cfg_param ddr_phy_pie[] = { -- {0xd0000, 0x0}, -- {0x90000,0x10}, -- {0x90001,0x400}, -- {0x90002,0x10e}, -- {0x90003,0x0}, -- {0x90004,0x0}, -- {0x90005,0x8}, -- {0x90029,0xb}, -- {0x9002a,0x480}, -- {0x9002b,0x109}, -- {0x9002c,0x8}, -- {0x9002d,0x448}, -- {0x9002e,0x139}, -- {0x9002f,0x8}, -- {0x90030,0x478}, -- {0x90031,0x109}, -- {0x90032,0x0}, -- {0x90033,0xe8}, -- {0x90034,0x109}, -- {0x90035,0x2}, -- {0x90036,0x10}, -- {0x90037,0x139}, -- {0x90038,0xf}, -- {0x90039,0x7c0}, -- {0x9003a,0x139}, -- {0x9003b,0x44}, -- {0x9003c,0x630}, -- {0x9003d,0x159}, -- {0x9003e,0x14f}, -- {0x9003f,0x630}, -- {0x90040,0x159}, -- {0x90041,0x47}, -- {0x90042,0x630}, -- {0x90043,0x149}, -- {0x90044,0x4f}, -- {0x90045,0x630}, -- {0x90046,0x179}, -- {0x90047,0x8}, -- {0x90048,0xe0}, -- {0x90049,0x109}, -- {0x9004a,0x0}, -- {0x9004b,0x7c8}, -- {0x9004c,0x109}, -- {0x9004d,0x0}, -- {0x9004e,0x1}, -- {0x9004f,0x8}, -- {0x90050,0x0}, -- {0x90051,0x45a}, -- {0x90052,0x9}, -- {0x90053,0x0}, -- {0x90054,0x448}, -- {0x90055,0x109}, -- {0x90056,0x40}, -- {0x90057,0x630}, -- {0x90058,0x179}, -- {0x90059,0x1}, -- {0x9005a,0x618}, -- {0x9005b,0x109}, -- {0x9005c,0x40c0}, -- {0x9005d,0x630}, -- {0x9005e,0x149}, -- {0x9005f,0x8}, -- {0x90060,0x4}, -- {0x90061,0x48}, -- {0x90062,0x4040}, -- {0x90063,0x630}, -- {0x90064,0x149}, -- {0x90065,0x0}, -- {0x90066,0x4}, -- {0x90067,0x48}, -- {0x90068,0x40}, -- {0x90069,0x630}, -- {0x9006a,0x149}, -- {0x9006b,0x10}, -- {0x9006c,0x4}, -- {0x9006d,0x18}, -- {0x9006e,0x0}, -- {0x9006f,0x4}, -- {0x90070,0x78}, -- {0x90071,0x549}, -- {0x90072,0x630}, -- {0x90073,0x159}, -- {0x90074,0xd49}, -- {0x90075,0x630}, -- {0x90076,0x159}, -- {0x90077,0x94a}, -- {0x90078,0x630}, -- {0x90079,0x159}, -- {0x9007a,0x441}, -- {0x9007b,0x630}, -- {0x9007c,0x149}, -- {0x9007d,0x42}, -- {0x9007e,0x630}, -- {0x9007f,0x149}, -- {0x90080,0x1}, -- {0x90081,0x630}, -- {0x90082,0x149}, -- {0x90083,0x0}, -- {0x90084,0xe0}, -- {0x90085,0x109}, -- {0x90086,0xa}, -- {0x90087,0x10}, -- {0x90088,0x109}, -- {0x90089,0x9}, -- {0x9008a,0x3c0}, -- {0x9008b,0x149}, -- {0x9008c,0x9}, -- {0x9008d,0x3c0}, -- {0x9008e,0x159}, -- {0x9008f,0x18}, -- {0x90090,0x10}, -- {0x90091,0x109}, -- {0x90092,0x0}, -- {0x90093,0x3c0}, -- {0x90094,0x109}, -- {0x90095,0x18}, -- {0x90096,0x4}, -- {0x90097,0x48}, -- {0x90098,0x18}, -- {0x90099,0x4}, -- {0x9009a,0x58}, -- {0x9009b,0xa}, -- {0x9009c,0x10}, -- {0x9009d,0x109}, -- {0x9009e,0x2}, -- {0x9009f,0x10}, -- {0x900a0,0x109}, -- {0x900a1,0x5}, -- {0x900a2,0x7c0}, -- {0x900a3,0x109}, -- {0x900a4,0x10}, -- {0x900a5,0x10}, -- {0x900a6,0x109}, -- {0x40000,0x811}, -- {0x40020,0x880}, -- {0x40040,0x0}, -- {0x40060,0x0}, -- {0x40001,0x4008}, -- {0x40021,0x83}, -- {0x40041,0x4f}, -- {0x40061,0x0}, -- {0x40002,0x4040}, -- {0x40022,0x83}, -- {0x40042,0x51}, -- {0x40062,0x0}, -- {0x40003,0x811}, -- {0x40023,0x880}, -- {0x40043,0x0}, -- {0x40063,0x0}, -- {0x40004,0x720}, -- {0x40024,0xf}, -- {0x40044,0x1740}, -- {0x40064,0x0}, -- {0x40005,0x16}, -- {0x40025,0x83}, -- {0x40045,0x4b}, -- {0x40065,0x0}, -- {0x40006,0x716}, -- {0x40026,0xf}, -- {0x40046,0x2001}, -- {0x40066,0x0}, -- {0x40007,0x716}, -- {0x40027,0xf}, -- {0x40047,0x2800}, -- {0x40067,0x0}, -- {0x40008,0x716}, -- {0x40028,0xf}, -- {0x40048,0xf00}, -- {0x40068,0x0}, -- {0x40009,0x720}, -- {0x40029,0xf}, -- {0x40049,0x1400}, -- {0x40069,0x0}, -- {0x4000a,0xe08}, -- {0x4002a,0xc15}, -- {0x4004a,0x0}, -- {0x4006a,0x0}, -- {0x4000b,0x623}, -- {0x4002b,0x15}, -- {0x4004b,0x0}, -- {0x4006b,0x0}, -- {0x4000c,0x4028}, -- {0x4002c,0x80}, -- {0x4004c,0x0}, -- {0x4006c,0x0}, -- {0x4000d,0xe08}, -- {0x4002d,0xc1a}, -- {0x4004d,0x0}, -- {0x4006d,0x0}, -- {0x4000e,0x623}, -- {0x4002e,0x1a}, -- {0x4004e,0x0}, -- {0x4006e,0x0}, -- {0x4000f,0x4040}, -- {0x4002f,0x80}, -- {0x4004f,0x0}, -- {0x4006f,0x0}, -- {0x40010,0x2604}, -- {0x40030,0x15}, -- {0x40050,0x0}, -- {0x40070,0x0}, -- {0x40011,0x708}, -- {0x40031,0x5}, -- {0x40051,0x0}, -- {0x40071,0x2002}, -- {0x40012,0x8}, -- {0x40032,0x80}, -- {0x40052,0x0}, -- {0x40072,0x0}, -- {0x40013,0x2604}, -- {0x40033,0x1a}, -- {0x40053,0x0}, -- {0x40073,0x0}, -- {0x40014,0x708}, -- {0x40034,0xa}, -- {0x40054,0x0}, -- {0x40074,0x2002}, -- {0x40015,0x4040}, -- {0x40035,0x80}, -- {0x40055,0x0}, -- {0x40075,0x0}, -- {0x40016,0x60a}, -- {0x40036,0x15}, -- {0x40056,0x1200}, -- {0x40076,0x0}, -- {0x40017,0x61a}, -- {0x40037,0x15}, -- {0x40057,0x1300}, -- {0x40077,0x0}, -- {0x40018,0x60a}, -- {0x40038,0x1a}, -- {0x40058,0x1200}, -- {0x40078,0x0}, -- {0x40019,0x642}, -- {0x40039,0x1a}, -- {0x40059,0x1300}, -- {0x40079,0x0}, -- {0x4001a,0x4808}, -- {0x4003a,0x880}, -- {0x4005a,0x0}, -- {0x4007a,0x0}, -- {0x900a7,0x0}, -- {0x900a8,0x790}, -- {0x900a9,0x11a}, -- {0x900aa,0x8}, -- {0x900ab,0x7aa}, -- {0x900ac,0x2a}, -- {0x900ad,0x10}, -- {0x900ae,0x7b2}, -- {0x900af,0x2a}, -- {0x900b0,0x0}, -- {0x900b1,0x7c8}, -- {0x900b2,0x109}, -- {0x900b3,0x10}, -- {0x900b4,0x2a8}, -- {0x900b5,0x129}, -- {0x900b6,0x8}, -- {0x900b7,0x370}, -- {0x900b8,0x129}, -- {0x900b9,0xa}, -- {0x900ba,0x3c8}, -- {0x900bb,0x1a9}, -- {0x900bc,0xc}, -- {0x900bd,0x408}, -- {0x900be,0x199}, -- {0x900bf,0x14}, -- {0x900c0,0x790}, -- {0x900c1,0x11a}, -- {0x900c2,0x8}, -- {0x900c3,0x4}, -- {0x900c4,0x18}, -- {0x900c5,0xe}, -- {0x900c6,0x408}, -- {0x900c7,0x199}, -- {0x900c8,0x8}, -- {0x900c9,0x8568}, -- {0x900ca,0x108}, -- {0x900cb,0x18}, -- {0x900cc,0x790}, -- {0x900cd,0x16a}, -- {0x900ce,0x8}, -- {0x900cf,0x1d8}, -- {0x900d0,0x169}, -- {0x900d1,0x10}, -- {0x900d2,0x8558}, -- {0x900d3,0x168}, -- {0x900d4,0x70}, -- {0x900d5,0x788}, -- {0x900d6,0x16a}, -- {0x900d7,0x1ff8}, -- {0x900d8,0x85a8}, -- {0x900d9,0x1e8}, -- {0x900da,0x50}, -- {0x900db,0x798}, -- {0x900dc,0x16a}, -- {0x900dd,0x60}, -- {0x900de,0x7a0}, -- {0x900df,0x16a}, -- {0x900e0,0x8}, -- {0x900e1,0x8310}, -- {0x900e2,0x168}, -- {0x900e3,0x8}, -- {0x900e4,0xa310}, -- {0x900e5,0x168}, -- {0x900e6,0xa}, -- {0x900e7,0x408}, -- {0x900e8,0x169}, -- {0x900e9,0x6e}, -- {0x900ea,0x0}, -- {0x900eb,0x68}, -- {0x900ec,0x0}, -- {0x900ed,0x408}, -- {0x900ee,0x169}, -- {0x900ef,0x0}, -- {0x900f0,0x8310}, -- {0x900f1,0x168}, -- {0x900f2,0x0}, -- {0x900f3,0xa310}, -- {0x900f4,0x168}, -- {0x900f5,0x1ff8}, -- {0x900f6,0x85a8}, -- {0x900f7,0x1e8}, -- {0x900f8,0x68}, -- {0x900f9,0x798}, -- {0x900fa,0x16a}, -- {0x900fb,0x78}, -- {0x900fc,0x7a0}, -- {0x900fd,0x16a}, -- {0x900fe,0x68}, -- {0x900ff,0x790}, -- {0x90100,0x16a}, -- {0x90101,0x8}, -- {0x90102,0x8b10}, -- {0x90103,0x168}, -- {0x90104,0x8}, -- {0x90105,0xab10}, -- {0x90106,0x168}, -- {0x90107,0xa}, -- {0x90108,0x408}, -- {0x90109,0x169}, -- {0x9010a,0x58}, -- {0x9010b,0x0}, -- {0x9010c,0x68}, -- {0x9010d,0x0}, -- {0x9010e,0x408}, -- {0x9010f,0x169}, -- {0x90110,0x0}, -- {0x90111,0x8b10}, -- {0x90112,0x168}, -- {0x90113,0x0}, -- {0x90114,0xab10}, -- {0x90115,0x168}, -- {0x90116,0x0}, -- {0x90117,0x1d8}, -- {0x90118,0x169}, -- {0x90119,0x80}, -- {0x9011a,0x790}, -- {0x9011b,0x16a}, -- {0x9011c,0x18}, -- {0x9011d,0x7aa}, -- {0x9011e,0x6a}, -- {0x9011f,0xa}, -- {0x90120,0x0}, -- {0x90121,0x1e9}, -- {0x90122,0x8}, -- {0x90123,0x8080}, -- {0x90124,0x108}, -- {0x90125,0xf}, -- {0x90126,0x408}, -- {0x90127,0x169}, -- {0x90128,0xc}, -- {0x90129,0x0}, -- {0x9012a,0x68}, -- {0x9012b,0x9}, -- {0x9012c,0x0}, -- {0x9012d,0x1a9}, -- {0x9012e,0x0}, -- {0x9012f,0x408}, -- {0x90130,0x169}, -- {0x90131,0x0}, -- {0x90132,0x8080}, -- {0x90133,0x108}, -- {0x90134,0x8}, -- {0x90135,0x7aa}, -- {0x90136,0x6a}, -- {0x90137,0x0}, -- {0x90138,0x8568}, -- {0x90139,0x108}, -- {0x9013a,0xb7}, -- {0x9013b,0x790}, -- {0x9013c,0x16a}, -- {0x9013d,0x1f}, -- {0x9013e,0x0}, -- {0x9013f,0x68}, -- {0x90140,0x8}, -- {0x90141,0x8558}, -- {0x90142,0x168}, -- {0x90143,0xf}, -- {0x90144,0x408}, -- {0x90145,0x169}, -- {0x90146,0xc}, -- {0x90147,0x0}, -- {0x90148,0x68}, -- {0x90149,0x0}, -- {0x9014a,0x408}, -- {0x9014b,0x169}, -- {0x9014c,0x0}, -- {0x9014d,0x8558}, -- {0x9014e,0x168}, -- {0x9014f,0x8}, -- {0x90150,0x3c8}, -- {0x90151,0x1a9}, -- {0x90152,0x3}, -- {0x90153,0x370}, -- {0x90154,0x129}, -- {0x90155,0x20}, -- {0x90156,0x2aa}, -- {0x90157,0x9}, -- {0x90158,0x0}, -- {0x90159,0x400}, -- {0x9015a,0x10e}, -- {0x9015b,0x8}, -- {0x9015c,0xe8}, -- {0x9015d,0x109}, -- {0x9015e,0x0}, -- {0x9015f,0x8140}, -- {0x90160,0x10c}, -- {0x90161,0x10}, -- {0x90162,0x8138}, -- {0x90163,0x10c}, -- {0x90164,0x8}, -- {0x90165,0x7c8}, -- {0x90166,0x101}, -- {0x90167,0x8}, -- {0x90168,0x0}, -- {0x90169,0x8}, -- {0x9016a,0x8}, -- {0x9016b,0x448}, -- {0x9016c,0x109}, -- {0x9016d,0xf}, -- {0x9016e,0x7c0}, -- {0x9016f,0x109}, -- {0x90170,0x0}, -- {0x90171,0xe8}, -- {0x90172,0x109}, -- {0x90173,0x47}, -- {0x90174,0x630}, -- {0x90175,0x109}, -- {0x90176,0x8}, -- {0x90177,0x618}, -- {0x90178,0x109}, -- {0x90179,0x8}, -- {0x9017a,0xe0}, -- {0x9017b,0x109}, -- {0x9017c,0x0}, -- {0x9017d,0x7c8}, -- {0x9017e,0x109}, -- {0x9017f,0x8}, -- {0x90180,0x8140}, -- {0x90181,0x10c}, -- {0x90182,0x0}, -- {0x90183,0x1}, -- {0x90184,0x8}, -- {0x90185,0x8}, -- {0x90186,0x4}, -- {0x90187,0x8}, -- {0x90188,0x8}, -- {0x90189,0x7c8}, -- {0x9018a,0x101}, -- {0x90006,0x0}, -- {0x90007,0x0}, -- {0x90008,0x8}, -- {0x90009,0x0}, -- {0x9000a,0x0}, -- {0x9000b,0x0}, -- {0xd00e7,0x400}, -- {0x90017,0x0}, -- {0x9001f,0x2a}, -- {0x90026,0x6a}, -- {0x400d0,0x0}, -- {0x400d1,0x101}, -- {0x400d2,0x105}, -- {0x400d3,0x107}, -- {0x400d4,0x10f}, -- {0x400d5,0x202}, -- {0x400d6,0x20a}, -- {0x400d7,0x20b}, -- {0x2003a,0x2}, -- {0x2000b,0x5d}, -- {0x2000c,0xbb}, -- {0x2000d,0x753}, -- {0x2000e,0x2c}, -- {0x12000b,0xc}, -- {0x12000c,0x19}, -- {0x12000d,0xfa}, -- {0x12000e,0x10}, -- {0x22000b,0x3}, -- {0x22000c,0x6}, -- {0x22000d,0x3e}, -- {0x22000e,0x10}, -- {0x9000c,0x0}, -- {0x9000d,0x173}, -- {0x9000e,0x60}, -- {0x9000f,0x6110}, -- {0x90010,0x2152}, -- {0x90011,0xdfbd}, -- {0x90012,0x60}, -- {0x90013,0x6152}, -- {0x20010,0x5a}, -- {0x20011,0x3}, -- {0x120010,0x5a}, -- {0x120011,0x3}, -- {0x220010,0x5a}, -- {0x220011,0x3}, -- {0x40080,0xe0}, -- {0x40081,0x12}, -- {0x40082,0xe0}, -- {0x40083,0x12}, -- {0x40084,0xe0}, -- {0x40085,0x12}, -- {0x140080,0xe0}, -- {0x140081,0x12}, -- {0x140082,0xe0}, -- {0x140083,0x12}, -- {0x140084,0xe0}, -- {0x140085,0x12}, -- {0x240080,0xe0}, -- {0x240081,0x12}, -- {0x240082,0xe0}, -- {0x240083,0x12}, -- {0x240084,0xe0}, -- {0x240085,0x12}, -- {0x400fd,0xf}, -- {0x10011,0x1}, -- {0x10012,0x1}, -- {0x10013,0x180}, -- {0x10018,0x1}, -- {0x10002,0x6209}, -- {0x100b2,0x1}, -- {0x101b4,0x1}, -- {0x102b4,0x1}, -- {0x103b4,0x1}, -- {0x104b4,0x1}, -- {0x105b4,0x1}, -- {0x106b4,0x1}, -- {0x107b4,0x1}, -- {0x108b4,0x1}, -- {0x11011,0x1}, -- {0x11012,0x1}, -- {0x11013,0x180}, -- {0x11018,0x1}, -- {0x11002,0x6209}, -- {0x110b2,0x1}, -- {0x111b4,0x1}, -- {0x112b4,0x1}, -- {0x113b4,0x1}, -- {0x114b4,0x1}, -- {0x115b4,0x1}, -- {0x116b4,0x1}, -- {0x117b4,0x1}, -- {0x118b4,0x1}, -- {0x12011,0x1}, -- {0x12012,0x1}, -- {0x12013,0x180}, -- {0x12018,0x1}, -- {0x12002,0x6209}, -- {0x120b2,0x1}, -- {0x121b4,0x1}, -- {0x122b4,0x1}, -- {0x123b4,0x1}, -- {0x124b4,0x1}, -- {0x125b4,0x1}, -- {0x126b4,0x1}, -- {0x127b4,0x1}, -- {0x128b4,0x1}, -- {0x13011,0x1}, -- {0x13012,0x1}, -- {0x13013,0x180}, -- {0x13018,0x1}, -- {0x13002,0x6209}, -- {0x130b2,0x1}, -- {0x131b4,0x1}, -- {0x132b4,0x1}, -- {0x133b4,0x1}, -- {0x134b4,0x1}, -- {0x135b4,0x1}, -- {0x136b4,0x1}, -- {0x137b4,0x1}, -- {0x138b4,0x1}, -- {0x2003a,0x2}, -- {0xc0080,0x2}, -- {0xd0000, 0x1} --}; -- --static struct dram_fsp_msg ddr_dram_fsp_msg[] = { -- { -- /* P0 3000mts 1D */ -- .drate = 3000, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp0_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), -- }, -- { -- /* P1 400mts 1D */ -- .drate = 400, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp1_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), -- }, -- { -- /* P2 100mts 1D */ -- .drate = 100, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp2_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), -- }, -- { -- /* P0 3000mts 2D */ -- .drate = 3000, -- .fw_type = FW_2D_IMAGE, -- .fsp_cfg = ddr_fsp0_2d_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), -- }, --}; -- --/* ddr timing config params */ --struct dram_timing_info ucm_dram_timing_01061010 = { -- .ddrc_cfg = ddr_ddrc_cfg, -- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -- .ddrphy_cfg = ddr_ddrphy_cfg, -- .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -- .fsp_msg = ddr_dram_fsp_msg, -- .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), -- .ddrphy_pie = ddr_phy_pie, -- .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -- .fsp_table = { 3000, 400, 100, }, --}; -- -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c -similarity index 58% -rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c -rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c -index 5b091de47b..add39fb3f8 100644 ---- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c -+++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c -@@ -321,728 +321,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { - {0x2200ca,0x24}, - }; - --/* ddr phy trained csr */ --static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -- { 0x200b2, 0x0 }, -- { 0x1200b2, 0x0 }, -- { 0x2200b2, 0x0 }, -- { 0x200cb, 0x0 }, -- { 0x10043, 0x0 }, -- { 0x110043, 0x0 }, -- { 0x210043, 0x0 }, -- { 0x10143, 0x0 }, -- { 0x110143, 0x0 }, -- { 0x210143, 0x0 }, -- { 0x11043, 0x0 }, -- { 0x111043, 0x0 }, -- { 0x211043, 0x0 }, -- { 0x11143, 0x0 }, -- { 0x111143, 0x0 }, -- { 0x211143, 0x0 }, -- { 0x12043, 0x0 }, -- { 0x112043, 0x0 }, -- { 0x212043, 0x0 }, -- { 0x12143, 0x0 }, -- { 0x112143, 0x0 }, -- { 0x212143, 0x0 }, -- { 0x13043, 0x0 }, -- { 0x113043, 0x0 }, -- { 0x213043, 0x0 }, -- { 0x13143, 0x0 }, -- { 0x113143, 0x0 }, -- { 0x213143, 0x0 }, -- { 0x80, 0x0 }, -- { 0x100080, 0x0 }, -- { 0x200080, 0x0 }, -- { 0x1080, 0x0 }, -- { 0x101080, 0x0 }, -- { 0x201080, 0x0 }, -- { 0x2080, 0x0 }, -- { 0x102080, 0x0 }, -- { 0x202080, 0x0 }, -- { 0x3080, 0x0 }, -- { 0x103080, 0x0 }, -- { 0x203080, 0x0 }, -- { 0x4080, 0x0 }, -- { 0x104080, 0x0 }, -- { 0x204080, 0x0 }, -- { 0x5080, 0x0 }, -- { 0x105080, 0x0 }, -- { 0x205080, 0x0 }, -- { 0x6080, 0x0 }, -- { 0x106080, 0x0 }, -- { 0x206080, 0x0 }, -- { 0x7080, 0x0 }, -- { 0x107080, 0x0 }, -- { 0x207080, 0x0 }, -- { 0x8080, 0x0 }, -- { 0x108080, 0x0 }, -- { 0x208080, 0x0 }, -- { 0x9080, 0x0 }, -- { 0x109080, 0x0 }, -- { 0x209080, 0x0 }, -- { 0x10080, 0x0 }, -- { 0x110080, 0x0 }, -- { 0x210080, 0x0 }, -- { 0x10180, 0x0 }, -- { 0x110180, 0x0 }, -- { 0x210180, 0x0 }, -- { 0x11080, 0x0 }, -- { 0x111080, 0x0 }, -- { 0x211080, 0x0 }, -- { 0x11180, 0x0 }, -- { 0x111180, 0x0 }, -- { 0x211180, 0x0 }, -- { 0x12080, 0x0 }, -- { 0x112080, 0x0 }, -- { 0x212080, 0x0 }, -- { 0x12180, 0x0 }, -- { 0x112180, 0x0 }, -- { 0x212180, 0x0 }, -- { 0x13080, 0x0 }, -- { 0x113080, 0x0 }, -- { 0x213080, 0x0 }, -- { 0x13180, 0x0 }, -- { 0x113180, 0x0 }, -- { 0x213180, 0x0 }, -- { 0x10081, 0x0 }, -- { 0x110081, 0x0 }, -- { 0x210081, 0x0 }, -- { 0x10181, 0x0 }, -- { 0x110181, 0x0 }, -- { 0x210181, 0x0 }, -- { 0x11081, 0x0 }, -- { 0x111081, 0x0 }, -- { 0x211081, 0x0 }, -- { 0x11181, 0x0 }, -- { 0x111181, 0x0 }, -- { 0x211181, 0x0 }, -- { 0x12081, 0x0 }, -- { 0x112081, 0x0 }, -- { 0x212081, 0x0 }, -- { 0x12181, 0x0 }, -- { 0x112181, 0x0 }, -- { 0x212181, 0x0 }, -- { 0x13081, 0x0 }, -- { 0x113081, 0x0 }, -- { 0x213081, 0x0 }, -- { 0x13181, 0x0 }, -- { 0x113181, 0x0 }, -- { 0x213181, 0x0 }, -- { 0x100d0, 0x0 }, -- { 0x1100d0, 0x0 }, -- { 0x2100d0, 0x0 }, -- { 0x101d0, 0x0 }, -- { 0x1101d0, 0x0 }, -- { 0x2101d0, 0x0 }, -- { 0x110d0, 0x0 }, -- { 0x1110d0, 0x0 }, -- { 0x2110d0, 0x0 }, -- { 0x111d0, 0x0 }, -- { 0x1111d0, 0x0 }, -- { 0x2111d0, 0x0 }, -- { 0x120d0, 0x0 }, -- { 0x1120d0, 0x0 }, -- { 0x2120d0, 0x0 }, -- { 0x121d0, 0x0 }, -- { 0x1121d0, 0x0 }, -- { 0x2121d0, 0x0 }, -- { 0x130d0, 0x0 }, -- { 0x1130d0, 0x0 }, -- { 0x2130d0, 0x0 }, -- { 0x131d0, 0x0 }, -- { 0x1131d0, 0x0 }, -- { 0x2131d0, 0x0 }, -- { 0x100d1, 0x0 }, -- { 0x1100d1, 0x0 }, -- { 0x2100d1, 0x0 }, -- { 0x101d1, 0x0 }, -- { 0x1101d1, 0x0 }, -- { 0x2101d1, 0x0 }, -- { 0x110d1, 0x0 }, -- { 0x1110d1, 0x0 }, -- { 0x2110d1, 0x0 }, -- { 0x111d1, 0x0 }, -- { 0x1111d1, 0x0 }, -- { 0x2111d1, 0x0 }, -- { 0x120d1, 0x0 }, -- { 0x1120d1, 0x0 }, -- { 0x2120d1, 0x0 }, -- { 0x121d1, 0x0 }, -- { 0x1121d1, 0x0 }, -- { 0x2121d1, 0x0 }, -- { 0x130d1, 0x0 }, -- { 0x1130d1, 0x0 }, -- { 0x2130d1, 0x0 }, -- { 0x131d1, 0x0 }, -- { 0x1131d1, 0x0 }, -- { 0x2131d1, 0x0 }, -- { 0x10068, 0x0 }, -- { 0x10168, 0x0 }, -- { 0x10268, 0x0 }, -- { 0x10368, 0x0 }, -- { 0x10468, 0x0 }, -- { 0x10568, 0x0 }, -- { 0x10668, 0x0 }, -- { 0x10768, 0x0 }, -- { 0x10868, 0x0 }, -- { 0x11068, 0x0 }, -- { 0x11168, 0x0 }, -- { 0x11268, 0x0 }, -- { 0x11368, 0x0 }, -- { 0x11468, 0x0 }, -- { 0x11568, 0x0 }, -- { 0x11668, 0x0 }, -- { 0x11768, 0x0 }, -- { 0x11868, 0x0 }, -- { 0x12068, 0x0 }, -- { 0x12168, 0x0 }, -- { 0x12268, 0x0 }, -- { 0x12368, 0x0 }, -- { 0x12468, 0x0 }, -- { 0x12568, 0x0 }, -- { 0x12668, 0x0 }, -- { 0x12768, 0x0 }, -- { 0x12868, 0x0 }, -- { 0x13068, 0x0 }, -- { 0x13168, 0x0 }, -- { 0x13268, 0x0 }, -- { 0x13368, 0x0 }, -- { 0x13468, 0x0 }, -- { 0x13568, 0x0 }, -- { 0x13668, 0x0 }, -- { 0x13768, 0x0 }, -- { 0x13868, 0x0 }, -- { 0x10069, 0x0 }, -- { 0x10169, 0x0 }, -- { 0x10269, 0x0 }, -- { 0x10369, 0x0 }, -- { 0x10469, 0x0 }, -- { 0x10569, 0x0 }, -- { 0x10669, 0x0 }, -- { 0x10769, 0x0 }, -- { 0x10869, 0x0 }, -- { 0x11069, 0x0 }, -- { 0x11169, 0x0 }, -- { 0x11269, 0x0 }, -- { 0x11369, 0x0 }, -- { 0x11469, 0x0 }, -- { 0x11569, 0x0 }, -- { 0x11669, 0x0 }, -- { 0x11769, 0x0 }, -- { 0x11869, 0x0 }, -- { 0x12069, 0x0 }, -- { 0x12169, 0x0 }, -- { 0x12269, 0x0 }, -- { 0x12369, 0x0 }, -- { 0x12469, 0x0 }, -- { 0x12569, 0x0 }, -- { 0x12669, 0x0 }, -- { 0x12769, 0x0 }, -- { 0x12869, 0x0 }, -- { 0x13069, 0x0 }, -- { 0x13169, 0x0 }, -- { 0x13269, 0x0 }, -- { 0x13369, 0x0 }, -- { 0x13469, 0x0 }, -- { 0x13569, 0x0 }, -- { 0x13669, 0x0 }, -- { 0x13769, 0x0 }, -- { 0x13869, 0x0 }, -- { 0x1008c, 0x0 }, -- { 0x11008c, 0x0 }, -- { 0x21008c, 0x0 }, -- { 0x1018c, 0x0 }, -- { 0x11018c, 0x0 }, -- { 0x21018c, 0x0 }, -- { 0x1108c, 0x0 }, -- { 0x11108c, 0x0 }, -- { 0x21108c, 0x0 }, -- { 0x1118c, 0x0 }, -- { 0x11118c, 0x0 }, -- { 0x21118c, 0x0 }, -- { 0x1208c, 0x0 }, -- { 0x11208c, 0x0 }, -- { 0x21208c, 0x0 }, -- { 0x1218c, 0x0 }, -- { 0x11218c, 0x0 }, -- { 0x21218c, 0x0 }, -- { 0x1308c, 0x0 }, -- { 0x11308c, 0x0 }, -- { 0x21308c, 0x0 }, -- { 0x1318c, 0x0 }, -- { 0x11318c, 0x0 }, -- { 0x21318c, 0x0 }, -- { 0x1008d, 0x0 }, -- { 0x11008d, 0x0 }, -- { 0x21008d, 0x0 }, -- { 0x1018d, 0x0 }, -- { 0x11018d, 0x0 }, -- { 0x21018d, 0x0 }, -- { 0x1108d, 0x0 }, -- { 0x11108d, 0x0 }, -- { 0x21108d, 0x0 }, -- { 0x1118d, 0x0 }, -- { 0x11118d, 0x0 }, -- { 0x21118d, 0x0 }, -- { 0x1208d, 0x0 }, -- { 0x11208d, 0x0 }, -- { 0x21208d, 0x0 }, -- { 0x1218d, 0x0 }, -- { 0x11218d, 0x0 }, -- { 0x21218d, 0x0 }, -- { 0x1308d, 0x0 }, -- { 0x11308d, 0x0 }, -- { 0x21308d, 0x0 }, -- { 0x1318d, 0x0 }, -- { 0x11318d, 0x0 }, -- { 0x21318d, 0x0 }, -- { 0x100c0, 0x0 }, -- { 0x1100c0, 0x0 }, -- { 0x2100c0, 0x0 }, -- { 0x101c0, 0x0 }, -- { 0x1101c0, 0x0 }, -- { 0x2101c0, 0x0 }, -- { 0x102c0, 0x0 }, -- { 0x1102c0, 0x0 }, -- { 0x2102c0, 0x0 }, -- { 0x103c0, 0x0 }, -- { 0x1103c0, 0x0 }, -- { 0x2103c0, 0x0 }, -- { 0x104c0, 0x0 }, -- { 0x1104c0, 0x0 }, -- { 0x2104c0, 0x0 }, -- { 0x105c0, 0x0 }, -- { 0x1105c0, 0x0 }, -- { 0x2105c0, 0x0 }, -- { 0x106c0, 0x0 }, -- { 0x1106c0, 0x0 }, -- { 0x2106c0, 0x0 }, -- { 0x107c0, 0x0 }, -- { 0x1107c0, 0x0 }, -- { 0x2107c0, 0x0 }, -- { 0x108c0, 0x0 }, -- { 0x1108c0, 0x0 }, -- { 0x2108c0, 0x0 }, -- { 0x110c0, 0x0 }, -- { 0x1110c0, 0x0 }, -- { 0x2110c0, 0x0 }, -- { 0x111c0, 0x0 }, -- { 0x1111c0, 0x0 }, -- { 0x2111c0, 0x0 }, -- { 0x112c0, 0x0 }, -- { 0x1112c0, 0x0 }, -- { 0x2112c0, 0x0 }, -- { 0x113c0, 0x0 }, -- { 0x1113c0, 0x0 }, -- { 0x2113c0, 0x0 }, -- { 0x114c0, 0x0 }, -- { 0x1114c0, 0x0 }, -- { 0x2114c0, 0x0 }, -- { 0x115c0, 0x0 }, -- { 0x1115c0, 0x0 }, -- { 0x2115c0, 0x0 }, -- { 0x116c0, 0x0 }, -- { 0x1116c0, 0x0 }, -- { 0x2116c0, 0x0 }, -- { 0x117c0, 0x0 }, -- { 0x1117c0, 0x0 }, -- { 0x2117c0, 0x0 }, -- { 0x118c0, 0x0 }, -- { 0x1118c0, 0x0 }, -- { 0x2118c0, 0x0 }, -- { 0x120c0, 0x0 }, -- { 0x1120c0, 0x0 }, -- { 0x2120c0, 0x0 }, -- { 0x121c0, 0x0 }, -- { 0x1121c0, 0x0 }, -- { 0x2121c0, 0x0 }, -- { 0x122c0, 0x0 }, -- { 0x1122c0, 0x0 }, -- { 0x2122c0, 0x0 }, -- { 0x123c0, 0x0 }, -- { 0x1123c0, 0x0 }, -- { 0x2123c0, 0x0 }, -- { 0x124c0, 0x0 }, -- { 0x1124c0, 0x0 }, -- { 0x2124c0, 0x0 }, -- { 0x125c0, 0x0 }, -- { 0x1125c0, 0x0 }, -- { 0x2125c0, 0x0 }, -- { 0x126c0, 0x0 }, -- { 0x1126c0, 0x0 }, -- { 0x2126c0, 0x0 }, -- { 0x127c0, 0x0 }, -- { 0x1127c0, 0x0 }, -- { 0x2127c0, 0x0 }, -- { 0x128c0, 0x0 }, -- { 0x1128c0, 0x0 }, -- { 0x2128c0, 0x0 }, -- { 0x130c0, 0x0 }, -- { 0x1130c0, 0x0 }, -- { 0x2130c0, 0x0 }, -- { 0x131c0, 0x0 }, -- { 0x1131c0, 0x0 }, -- { 0x2131c0, 0x0 }, -- { 0x132c0, 0x0 }, -- { 0x1132c0, 0x0 }, -- { 0x2132c0, 0x0 }, -- { 0x133c0, 0x0 }, -- { 0x1133c0, 0x0 }, -- { 0x2133c0, 0x0 }, -- { 0x134c0, 0x0 }, -- { 0x1134c0, 0x0 }, -- { 0x2134c0, 0x0 }, -- { 0x135c0, 0x0 }, -- { 0x1135c0, 0x0 }, -- { 0x2135c0, 0x0 }, -- { 0x136c0, 0x0 }, -- { 0x1136c0, 0x0 }, -- { 0x2136c0, 0x0 }, -- { 0x137c0, 0x0 }, -- { 0x1137c0, 0x0 }, -- { 0x2137c0, 0x0 }, -- { 0x138c0, 0x0 }, -- { 0x1138c0, 0x0 }, -- { 0x2138c0, 0x0 }, -- { 0x100c1, 0x0 }, -- { 0x1100c1, 0x0 }, -- { 0x2100c1, 0x0 }, -- { 0x101c1, 0x0 }, -- { 0x1101c1, 0x0 }, -- { 0x2101c1, 0x0 }, -- { 0x102c1, 0x0 }, -- { 0x1102c1, 0x0 }, -- { 0x2102c1, 0x0 }, -- { 0x103c1, 0x0 }, -- { 0x1103c1, 0x0 }, -- { 0x2103c1, 0x0 }, -- { 0x104c1, 0x0 }, -- { 0x1104c1, 0x0 }, -- { 0x2104c1, 0x0 }, -- { 0x105c1, 0x0 }, -- { 0x1105c1, 0x0 }, -- { 0x2105c1, 0x0 }, -- { 0x106c1, 0x0 }, -- { 0x1106c1, 0x0 }, -- { 0x2106c1, 0x0 }, -- { 0x107c1, 0x0 }, -- { 0x1107c1, 0x0 }, -- { 0x2107c1, 0x0 }, -- { 0x108c1, 0x0 }, -- { 0x1108c1, 0x0 }, -- { 0x2108c1, 0x0 }, -- { 0x110c1, 0x0 }, -- { 0x1110c1, 0x0 }, -- { 0x2110c1, 0x0 }, -- { 0x111c1, 0x0 }, -- { 0x1111c1, 0x0 }, -- { 0x2111c1, 0x0 }, -- { 0x112c1, 0x0 }, -- { 0x1112c1, 0x0 }, -- { 0x2112c1, 0x0 }, -- { 0x113c1, 0x0 }, -- { 0x1113c1, 0x0 }, -- { 0x2113c1, 0x0 }, -- { 0x114c1, 0x0 }, -- { 0x1114c1, 0x0 }, -- { 0x2114c1, 0x0 }, -- { 0x115c1, 0x0 }, -- { 0x1115c1, 0x0 }, -- { 0x2115c1, 0x0 }, -- { 0x116c1, 0x0 }, -- { 0x1116c1, 0x0 }, -- { 0x2116c1, 0x0 }, -- { 0x117c1, 0x0 }, -- { 0x1117c1, 0x0 }, -- { 0x2117c1, 0x0 }, -- { 0x118c1, 0x0 }, -- { 0x1118c1, 0x0 }, -- { 0x2118c1, 0x0 }, -- { 0x120c1, 0x0 }, -- { 0x1120c1, 0x0 }, -- { 0x2120c1, 0x0 }, -- { 0x121c1, 0x0 }, -- { 0x1121c1, 0x0 }, -- { 0x2121c1, 0x0 }, -- { 0x122c1, 0x0 }, -- { 0x1122c1, 0x0 }, -- { 0x2122c1, 0x0 }, -- { 0x123c1, 0x0 }, -- { 0x1123c1, 0x0 }, -- { 0x2123c1, 0x0 }, -- { 0x124c1, 0x0 }, -- { 0x1124c1, 0x0 }, -- { 0x2124c1, 0x0 }, -- { 0x125c1, 0x0 }, -- { 0x1125c1, 0x0 }, -- { 0x2125c1, 0x0 }, -- { 0x126c1, 0x0 }, -- { 0x1126c1, 0x0 }, -- { 0x2126c1, 0x0 }, -- { 0x127c1, 0x0 }, -- { 0x1127c1, 0x0 }, -- { 0x2127c1, 0x0 }, -- { 0x128c1, 0x0 }, -- { 0x1128c1, 0x0 }, -- { 0x2128c1, 0x0 }, -- { 0x130c1, 0x0 }, -- { 0x1130c1, 0x0 }, -- { 0x2130c1, 0x0 }, -- { 0x131c1, 0x0 }, -- { 0x1131c1, 0x0 }, -- { 0x2131c1, 0x0 }, -- { 0x132c1, 0x0 }, -- { 0x1132c1, 0x0 }, -- { 0x2132c1, 0x0 }, -- { 0x133c1, 0x0 }, -- { 0x1133c1, 0x0 }, -- { 0x2133c1, 0x0 }, -- { 0x134c1, 0x0 }, -- { 0x1134c1, 0x0 }, -- { 0x2134c1, 0x0 }, -- { 0x135c1, 0x0 }, -- { 0x1135c1, 0x0 }, -- { 0x2135c1, 0x0 }, -- { 0x136c1, 0x0 }, -- { 0x1136c1, 0x0 }, -- { 0x2136c1, 0x0 }, -- { 0x137c1, 0x0 }, -- { 0x1137c1, 0x0 }, -- { 0x2137c1, 0x0 }, -- { 0x138c1, 0x0 }, -- { 0x1138c1, 0x0 }, -- { 0x2138c1, 0x0 }, -- { 0x10020, 0x0 }, -- { 0x110020, 0x0 }, -- { 0x210020, 0x0 }, -- { 0x11020, 0x0 }, -- { 0x111020, 0x0 }, -- { 0x211020, 0x0 }, -- { 0x12020, 0x0 }, -- { 0x112020, 0x0 }, -- { 0x212020, 0x0 }, -- { 0x13020, 0x0 }, -- { 0x113020, 0x0 }, -- { 0x213020, 0x0 }, -- { 0x20072, 0x0 }, -- { 0x20073, 0x0 }, -- { 0x20074, 0x0 }, -- { 0x100aa, 0x0 }, -- { 0x110aa, 0x0 }, -- { 0x120aa, 0x0 }, -- { 0x130aa, 0x0 }, -- { 0x20010, 0x0 }, -- { 0x120010, 0x0 }, -- { 0x220010, 0x0 }, -- { 0x20011, 0x0 }, -- { 0x120011, 0x0 }, -- { 0x220011, 0x0 }, -- { 0x100ae, 0x0 }, -- { 0x1100ae, 0x0 }, -- { 0x2100ae, 0x0 }, -- { 0x100af, 0x0 }, -- { 0x1100af, 0x0 }, -- { 0x2100af, 0x0 }, -- { 0x110ae, 0x0 }, -- { 0x1110ae, 0x0 }, -- { 0x2110ae, 0x0 }, -- { 0x110af, 0x0 }, -- { 0x1110af, 0x0 }, -- { 0x2110af, 0x0 }, -- { 0x120ae, 0x0 }, -- { 0x1120ae, 0x0 }, -- { 0x2120ae, 0x0 }, -- { 0x120af, 0x0 }, -- { 0x1120af, 0x0 }, -- { 0x2120af, 0x0 }, -- { 0x130ae, 0x0 }, -- { 0x1130ae, 0x0 }, -- { 0x2130ae, 0x0 }, -- { 0x130af, 0x0 }, -- { 0x1130af, 0x0 }, -- { 0x2130af, 0x0 }, -- { 0x20020, 0x0 }, -- { 0x120020, 0x0 }, -- { 0x220020, 0x0 }, -- { 0x100a0, 0x0 }, -- { 0x100a1, 0x0 }, -- { 0x100a2, 0x0 }, -- { 0x100a3, 0x0 }, -- { 0x100a4, 0x0 }, -- { 0x100a5, 0x0 }, -- { 0x100a6, 0x0 }, -- { 0x100a7, 0x0 }, -- { 0x110a0, 0x0 }, -- { 0x110a1, 0x0 }, -- { 0x110a2, 0x0 }, -- { 0x110a3, 0x0 }, -- { 0x110a4, 0x0 }, -- { 0x110a5, 0x0 }, -- { 0x110a6, 0x0 }, -- { 0x110a7, 0x0 }, -- { 0x120a0, 0x0 }, -- { 0x120a1, 0x0 }, -- { 0x120a2, 0x0 }, -- { 0x120a3, 0x0 }, -- { 0x120a4, 0x0 }, -- { 0x120a5, 0x0 }, -- { 0x120a6, 0x0 }, -- { 0x120a7, 0x0 }, -- { 0x130a0, 0x0 }, -- { 0x130a1, 0x0 }, -- { 0x130a2, 0x0 }, -- { 0x130a3, 0x0 }, -- { 0x130a4, 0x0 }, -- { 0x130a5, 0x0 }, -- { 0x130a6, 0x0 }, -- { 0x130a7, 0x0 }, -- { 0x2007c, 0x0 }, -- { 0x12007c, 0x0 }, -- { 0x22007c, 0x0 }, -- { 0x2007d, 0x0 }, -- { 0x12007d, 0x0 }, -- { 0x22007d, 0x0 }, -- { 0x400fd, 0x0 }, -- { 0x400c0, 0x0 }, -- { 0x90201, 0x0 }, -- { 0x190201, 0x0 }, -- { 0x290201, 0x0 }, -- { 0x90202, 0x0 }, -- { 0x190202, 0x0 }, -- { 0x290202, 0x0 }, -- { 0x90203, 0x0 }, -- { 0x190203, 0x0 }, -- { 0x290203, 0x0 }, -- { 0x90204, 0x0 }, -- { 0x190204, 0x0 }, -- { 0x290204, 0x0 }, -- { 0x90205, 0x0 }, -- { 0x190205, 0x0 }, -- { 0x290205, 0x0 }, -- { 0x90206, 0x0 }, -- { 0x190206, 0x0 }, -- { 0x290206, 0x0 }, -- { 0x90207, 0x0 }, -- { 0x190207, 0x0 }, -- { 0x290207, 0x0 }, -- { 0x90208, 0x0 }, -- { 0x190208, 0x0 }, -- { 0x290208, 0x0 }, -- { 0x10062, 0x0 }, -- { 0x10162, 0x0 }, -- { 0x10262, 0x0 }, -- { 0x10362, 0x0 }, -- { 0x10462, 0x0 }, -- { 0x10562, 0x0 }, -- { 0x10662, 0x0 }, -- { 0x10762, 0x0 }, -- { 0x10862, 0x0 }, -- { 0x11062, 0x0 }, -- { 0x11162, 0x0 }, -- { 0x11262, 0x0 }, -- { 0x11362, 0x0 }, -- { 0x11462, 0x0 }, -- { 0x11562, 0x0 }, -- { 0x11662, 0x0 }, -- { 0x11762, 0x0 }, -- { 0x11862, 0x0 }, -- { 0x12062, 0x0 }, -- { 0x12162, 0x0 }, -- { 0x12262, 0x0 }, -- { 0x12362, 0x0 }, -- { 0x12462, 0x0 }, -- { 0x12562, 0x0 }, -- { 0x12662, 0x0 }, -- { 0x12762, 0x0 }, -- { 0x12862, 0x0 }, -- { 0x13062, 0x0 }, -- { 0x13162, 0x0 }, -- { 0x13262, 0x0 }, -- { 0x13362, 0x0 }, -- { 0x13462, 0x0 }, -- { 0x13562, 0x0 }, -- { 0x13662, 0x0 }, -- { 0x13762, 0x0 }, -- { 0x13862, 0x0 }, -- { 0x20077, 0x0 }, -- { 0x10001, 0x0 }, -- { 0x11001, 0x0 }, -- { 0x12001, 0x0 }, -- { 0x13001, 0x0 }, -- { 0x10040, 0x0 }, -- { 0x10140, 0x0 }, -- { 0x10240, 0x0 }, -- { 0x10340, 0x0 }, -- { 0x10440, 0x0 }, -- { 0x10540, 0x0 }, -- { 0x10640, 0x0 }, -- { 0x10740, 0x0 }, -- { 0x10840, 0x0 }, -- { 0x10030, 0x0 }, -- { 0x10130, 0x0 }, -- { 0x10230, 0x0 }, -- { 0x10330, 0x0 }, -- { 0x10430, 0x0 }, -- { 0x10530, 0x0 }, -- { 0x10630, 0x0 }, -- { 0x10730, 0x0 }, -- { 0x10830, 0x0 }, -- { 0x11040, 0x0 }, -- { 0x11140, 0x0 }, -- { 0x11240, 0x0 }, -- { 0x11340, 0x0 }, -- { 0x11440, 0x0 }, -- { 0x11540, 0x0 }, -- { 0x11640, 0x0 }, -- { 0x11740, 0x0 }, -- { 0x11840, 0x0 }, -- { 0x11030, 0x0 }, -- { 0x11130, 0x0 }, -- { 0x11230, 0x0 }, -- { 0x11330, 0x0 }, -- { 0x11430, 0x0 }, -- { 0x11530, 0x0 }, -- { 0x11630, 0x0 }, -- { 0x11730, 0x0 }, -- { 0x11830, 0x0 }, -- { 0x12040, 0x0 }, -- { 0x12140, 0x0 }, -- { 0x12240, 0x0 }, -- { 0x12340, 0x0 }, -- { 0x12440, 0x0 }, -- { 0x12540, 0x0 }, -- { 0x12640, 0x0 }, -- { 0x12740, 0x0 }, -- { 0x12840, 0x0 }, -- { 0x12030, 0x0 }, -- { 0x12130, 0x0 }, -- { 0x12230, 0x0 }, -- { 0x12330, 0x0 }, -- { 0x12430, 0x0 }, -- { 0x12530, 0x0 }, -- { 0x12630, 0x0 }, -- { 0x12730, 0x0 }, -- { 0x12830, 0x0 }, -- { 0x13040, 0x0 }, -- { 0x13140, 0x0 }, -- { 0x13240, 0x0 }, -- { 0x13340, 0x0 }, -- { 0x13440, 0x0 }, -- { 0x13540, 0x0 }, -- { 0x13640, 0x0 }, -- { 0x13740, 0x0 }, -- { 0x13840, 0x0 }, -- { 0x13030, 0x0 }, -- { 0x13130, 0x0 }, -- { 0x13230, 0x0 }, -- { 0x13330, 0x0 }, -- { 0x13430, 0x0 }, -- { 0x13530, 0x0 }, -- { 0x13630, 0x0 }, -- { 0x13730, 0x0 }, -- { 0x13830, 0x0 }, --}; - /* P0 message block paremeter for training firmware */ - static struct dram_cfg_param ddr_fsp0_cfg[] = { - {0xd0000, 0x0}, -@@ -1840,8 +1118,6 @@ struct dram_timing_info ucm_dram_timing_05000010 = { - .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), - .fsp_msg = ddr_dram_fsp_msg, - .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), - .ddrphy_pie = ddr_phy_pie, - .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 2400, 400, 100, }, -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c -similarity index 58% -rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c -rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c -index 7473c96e8d..657900bf91 100644 ---- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c -+++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c -@@ -10,7 +10,114 @@ - #include - #include - --static struct dram_cfg_param ddr_ddrc_cfg[] = { -+static struct dram_cfg_param ddr_ddrc_cfg_ff000110[] = { -+ /** Initialize DDRC registers **/ -+ {0x3d400304,0x1}, -+ {0x3d400030,0x1}, -+ {0x3d400000,0xa3080020}, -+ {0x3d400020,0x223}, -+ {0x3d400024,0x3a980}, -+ {0x3d400064,0x5b00d2}, -+ {0x3d4000d0,0xc00305ba}, -+ {0x3d4000d4,0x940000}, -+ {0x3d4000dc,0xd4002d}, -+ {0x3d4000e0,0x310000}, -+ {0x3d4000e8,0x66004d}, -+ {0x3d4000ec,0x16004d}, -+ {0x3d400100,0x191e1920}, -+ {0x3d400104,0x60630}, -+ {0x3d40010c,0xb0b000}, -+ {0x3d400110,0xe04080e}, -+ {0x3d400114,0x2040c0c}, -+ {0x3d400118,0x1010007}, -+ {0x3d40011c,0x401}, -+ {0x3d400130,0x20600}, -+ {0x3d400134,0xc100002}, -+ {0x3d400138,0xd8}, -+ {0x3d400144,0x96004b}, -+ {0x3d400180,0x2ee0017}, -+ {0x3d400184,0x2605b8e}, -+ {0x3d400188,0x0}, -+ {0x3d400190,0x497820a}, -+ {0x3d400194,0x80303}, -+ {0x3d4001b4,0x170a}, -+ {0x3d4001a0,0xe0400018}, -+ {0x3d4001a4,0xdf00e4}, -+ {0x3d4001a8,0x80000000}, -+ {0x3d4001b0,0x11}, -+ {0x3d4001c0,0x1}, -+ {0x3d4001c4,0x0}, -+ {0x3d4000f4,0xc99}, -+ {0x3d400108,0x70e1617}, -+ {0x3d400200,0x17}, -+ {0x3d40020c,0x0}, -+ {0x3d400210,0x1f1f}, -+ {0x3d400204,0x80808}, -+ {0x3d400214,0x7070707}, -+ {0x3d400218,0x7070707}, -+ {0x3d400250,0x29001701}, -+ {0x3d400254,0x2c}, -+ {0x3d40025c,0x4000030}, -+ {0x3d400264,0x900093e7}, -+ {0x3d40026c,0x2005574}, -+ {0x3d400400,0x111}, -+ {0x3d400408,0x72ff}, -+ {0x3d400494,0x2100e07}, -+ {0x3d400498,0x620096}, -+ {0x3d40049c,0x1100e07}, -+ {0x3d4004a0,0xc8012c}, -+ {0x3d402020,0x21}, -+ {0x3d402024,0x7d00}, -+ {0x3d402050,0x20d040}, -+ {0x3d402064,0xc001c}, -+ {0x3d4020dc,0x840000}, -+ {0x3d4020e0,0x310000}, -+ {0x3d4020e8,0x66004d}, -+ {0x3d4020ec,0x16004d}, -+ {0x3d402100,0xa040305}, -+ {0x3d402104,0x30407}, -+ {0x3d402108,0x203060b}, -+ {0x3d40210c,0x505000}, -+ {0x3d402110,0x2040202}, -+ {0x3d402114,0x2030202}, -+ {0x3d402118,0x1010004}, -+ {0x3d40211c,0x301}, -+ {0x3d402130,0x20300}, -+ {0x3d402134,0xa100002}, -+ {0x3d402138,0x1d}, -+ {0x3d402144,0x14000a}, -+ {0x3d402180,0x640004}, -+ {0x3d402190,0x3818200}, -+ {0x3d402194,0x80303}, -+ {0x3d4021b4,0x100}, -+ {0x3d403020,0x21}, -+ {0x3d403024,0x1f40}, -+ {0x3d403050,0x20d040}, -+ {0x3d403064,0x30007}, -+ {0x3d4030dc,0x840000}, -+ {0x3d4030e0,0x310000}, -+ {0x3d4030e8,0x66004d}, -+ {0x3d4030ec,0x16004d}, -+ {0x3d403100,0xa010102}, -+ {0x3d403104,0x30404}, -+ {0x3d403108,0x203060b}, -+ {0x3d40310c,0x505000}, -+ {0x3d403110,0x2040202}, -+ {0x3d403114,0x2030202}, -+ {0x3d403118,0x1010004}, -+ {0x3d40311c,0x301}, -+ {0x3d403130,0x20300}, -+ {0x3d403134,0xa100002}, -+ {0x3d403138,0x8}, -+ {0x3d403144,0x50003}, -+ {0x3d403180,0x190004}, -+ {0x3d403190,0x3818200}, -+ {0x3d403194,0x80303}, -+ {0x3d4031b4,0x100}, -+ {0x3d400028,0x0}, -+}; -+ -+static struct dram_cfg_param ddr_ddrc_cfg_ff020008[] = { - /** Initialize DDRC registers **/ - {0x3d400304,0x1}, - {0x3d400030,0x1}, -@@ -117,6 +224,7 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = { - {0x3d400028,0x0}, - }; - -+ - /* PHY Initialize Configuration */ - static struct dram_cfg_param ddr_ddrphy_cfg[] = { - {0x100a0,0x0}, -@@ -321,728 +429,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { - {0x2200ca,0x24}, - }; - --/* ddr phy trained csr */ --static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -- { 0x200b2, 0x0 }, -- { 0x1200b2, 0x0 }, -- { 0x2200b2, 0x0 }, -- { 0x200cb, 0x0 }, -- { 0x10043, 0x0 }, -- { 0x110043, 0x0 }, -- { 0x210043, 0x0 }, -- { 0x10143, 0x0 }, -- { 0x110143, 0x0 }, -- { 0x210143, 0x0 }, -- { 0x11043, 0x0 }, -- { 0x111043, 0x0 }, -- { 0x211043, 0x0 }, -- { 0x11143, 0x0 }, -- { 0x111143, 0x0 }, -- { 0x211143, 0x0 }, -- { 0x12043, 0x0 }, -- { 0x112043, 0x0 }, -- { 0x212043, 0x0 }, -- { 0x12143, 0x0 }, -- { 0x112143, 0x0 }, -- { 0x212143, 0x0 }, -- { 0x13043, 0x0 }, -- { 0x113043, 0x0 }, -- { 0x213043, 0x0 }, -- { 0x13143, 0x0 }, -- { 0x113143, 0x0 }, -- { 0x213143, 0x0 }, -- { 0x80, 0x0 }, -- { 0x100080, 0x0 }, -- { 0x200080, 0x0 }, -- { 0x1080, 0x0 }, -- { 0x101080, 0x0 }, -- { 0x201080, 0x0 }, -- { 0x2080, 0x0 }, -- { 0x102080, 0x0 }, -- { 0x202080, 0x0 }, -- { 0x3080, 0x0 }, -- { 0x103080, 0x0 }, -- { 0x203080, 0x0 }, -- { 0x4080, 0x0 }, -- { 0x104080, 0x0 }, -- { 0x204080, 0x0 }, -- { 0x5080, 0x0 }, -- { 0x105080, 0x0 }, -- { 0x205080, 0x0 }, -- { 0x6080, 0x0 }, -- { 0x106080, 0x0 }, -- { 0x206080, 0x0 }, -- { 0x7080, 0x0 }, -- { 0x107080, 0x0 }, -- { 0x207080, 0x0 }, -- { 0x8080, 0x0 }, -- { 0x108080, 0x0 }, -- { 0x208080, 0x0 }, -- { 0x9080, 0x0 }, -- { 0x109080, 0x0 }, -- { 0x209080, 0x0 }, -- { 0x10080, 0x0 }, -- { 0x110080, 0x0 }, -- { 0x210080, 0x0 }, -- { 0x10180, 0x0 }, -- { 0x110180, 0x0 }, -- { 0x210180, 0x0 }, -- { 0x11080, 0x0 }, -- { 0x111080, 0x0 }, -- { 0x211080, 0x0 }, -- { 0x11180, 0x0 }, -- { 0x111180, 0x0 }, -- { 0x211180, 0x0 }, -- { 0x12080, 0x0 }, -- { 0x112080, 0x0 }, -- { 0x212080, 0x0 }, -- { 0x12180, 0x0 }, -- { 0x112180, 0x0 }, -- { 0x212180, 0x0 }, -- { 0x13080, 0x0 }, -- { 0x113080, 0x0 }, -- { 0x213080, 0x0 }, -- { 0x13180, 0x0 }, -- { 0x113180, 0x0 }, -- { 0x213180, 0x0 }, -- { 0x10081, 0x0 }, -- { 0x110081, 0x0 }, -- { 0x210081, 0x0 }, -- { 0x10181, 0x0 }, -- { 0x110181, 0x0 }, -- { 0x210181, 0x0 }, -- { 0x11081, 0x0 }, -- { 0x111081, 0x0 }, -- { 0x211081, 0x0 }, -- { 0x11181, 0x0 }, -- { 0x111181, 0x0 }, -- { 0x211181, 0x0 }, -- { 0x12081, 0x0 }, -- { 0x112081, 0x0 }, -- { 0x212081, 0x0 }, -- { 0x12181, 0x0 }, -- { 0x112181, 0x0 }, -- { 0x212181, 0x0 }, -- { 0x13081, 0x0 }, -- { 0x113081, 0x0 }, -- { 0x213081, 0x0 }, -- { 0x13181, 0x0 }, -- { 0x113181, 0x0 }, -- { 0x213181, 0x0 }, -- { 0x100d0, 0x0 }, -- { 0x1100d0, 0x0 }, -- { 0x2100d0, 0x0 }, -- { 0x101d0, 0x0 }, -- { 0x1101d0, 0x0 }, -- { 0x2101d0, 0x0 }, -- { 0x110d0, 0x0 }, -- { 0x1110d0, 0x0 }, -- { 0x2110d0, 0x0 }, -- { 0x111d0, 0x0 }, -- { 0x1111d0, 0x0 }, -- { 0x2111d0, 0x0 }, -- { 0x120d0, 0x0 }, -- { 0x1120d0, 0x0 }, -- { 0x2120d0, 0x0 }, -- { 0x121d0, 0x0 }, -- { 0x1121d0, 0x0 }, -- { 0x2121d0, 0x0 }, -- { 0x130d0, 0x0 }, -- { 0x1130d0, 0x0 }, -- { 0x2130d0, 0x0 }, -- { 0x131d0, 0x0 }, -- { 0x1131d0, 0x0 }, -- { 0x2131d0, 0x0 }, -- { 0x100d1, 0x0 }, -- { 0x1100d1, 0x0 }, -- { 0x2100d1, 0x0 }, -- { 0x101d1, 0x0 }, -- { 0x1101d1, 0x0 }, -- { 0x2101d1, 0x0 }, -- { 0x110d1, 0x0 }, -- { 0x1110d1, 0x0 }, -- { 0x2110d1, 0x0 }, -- { 0x111d1, 0x0 }, -- { 0x1111d1, 0x0 }, -- { 0x2111d1, 0x0 }, -- { 0x120d1, 0x0 }, -- { 0x1120d1, 0x0 }, -- { 0x2120d1, 0x0 }, -- { 0x121d1, 0x0 }, -- { 0x1121d1, 0x0 }, -- { 0x2121d1, 0x0 }, -- { 0x130d1, 0x0 }, -- { 0x1130d1, 0x0 }, -- { 0x2130d1, 0x0 }, -- { 0x131d1, 0x0 }, -- { 0x1131d1, 0x0 }, -- { 0x2131d1, 0x0 }, -- { 0x10068, 0x0 }, -- { 0x10168, 0x0 }, -- { 0x10268, 0x0 }, -- { 0x10368, 0x0 }, -- { 0x10468, 0x0 }, -- { 0x10568, 0x0 }, -- { 0x10668, 0x0 }, -- { 0x10768, 0x0 }, -- { 0x10868, 0x0 }, -- { 0x11068, 0x0 }, -- { 0x11168, 0x0 }, -- { 0x11268, 0x0 }, -- { 0x11368, 0x0 }, -- { 0x11468, 0x0 }, -- { 0x11568, 0x0 }, -- { 0x11668, 0x0 }, -- { 0x11768, 0x0 }, -- { 0x11868, 0x0 }, -- { 0x12068, 0x0 }, -- { 0x12168, 0x0 }, -- { 0x12268, 0x0 }, -- { 0x12368, 0x0 }, -- { 0x12468, 0x0 }, -- { 0x12568, 0x0 }, -- { 0x12668, 0x0 }, -- { 0x12768, 0x0 }, -- { 0x12868, 0x0 }, -- { 0x13068, 0x0 }, -- { 0x13168, 0x0 }, -- { 0x13268, 0x0 }, -- { 0x13368, 0x0 }, -- { 0x13468, 0x0 }, -- { 0x13568, 0x0 }, -- { 0x13668, 0x0 }, -- { 0x13768, 0x0 }, -- { 0x13868, 0x0 }, -- { 0x10069, 0x0 }, -- { 0x10169, 0x0 }, -- { 0x10269, 0x0 }, -- { 0x10369, 0x0 }, -- { 0x10469, 0x0 }, -- { 0x10569, 0x0 }, -- { 0x10669, 0x0 }, -- { 0x10769, 0x0 }, -- { 0x10869, 0x0 }, -- { 0x11069, 0x0 }, -- { 0x11169, 0x0 }, -- { 0x11269, 0x0 }, -- { 0x11369, 0x0 }, -- { 0x11469, 0x0 }, -- { 0x11569, 0x0 }, -- { 0x11669, 0x0 }, -- { 0x11769, 0x0 }, -- { 0x11869, 0x0 }, -- { 0x12069, 0x0 }, -- { 0x12169, 0x0 }, -- { 0x12269, 0x0 }, -- { 0x12369, 0x0 }, -- { 0x12469, 0x0 }, -- { 0x12569, 0x0 }, -- { 0x12669, 0x0 }, -- { 0x12769, 0x0 }, -- { 0x12869, 0x0 }, -- { 0x13069, 0x0 }, -- { 0x13169, 0x0 }, -- { 0x13269, 0x0 }, -- { 0x13369, 0x0 }, -- { 0x13469, 0x0 }, -- { 0x13569, 0x0 }, -- { 0x13669, 0x0 }, -- { 0x13769, 0x0 }, -- { 0x13869, 0x0 }, -- { 0x1008c, 0x0 }, -- { 0x11008c, 0x0 }, -- { 0x21008c, 0x0 }, -- { 0x1018c, 0x0 }, -- { 0x11018c, 0x0 }, -- { 0x21018c, 0x0 }, -- { 0x1108c, 0x0 }, -- { 0x11108c, 0x0 }, -- { 0x21108c, 0x0 }, -- { 0x1118c, 0x0 }, -- { 0x11118c, 0x0 }, -- { 0x21118c, 0x0 }, -- { 0x1208c, 0x0 }, -- { 0x11208c, 0x0 }, -- { 0x21208c, 0x0 }, -- { 0x1218c, 0x0 }, -- { 0x11218c, 0x0 }, -- { 0x21218c, 0x0 }, -- { 0x1308c, 0x0 }, -- { 0x11308c, 0x0 }, -- { 0x21308c, 0x0 }, -- { 0x1318c, 0x0 }, -- { 0x11318c, 0x0 }, -- { 0x21318c, 0x0 }, -- { 0x1008d, 0x0 }, -- { 0x11008d, 0x0 }, -- { 0x21008d, 0x0 }, -- { 0x1018d, 0x0 }, -- { 0x11018d, 0x0 }, -- { 0x21018d, 0x0 }, -- { 0x1108d, 0x0 }, -- { 0x11108d, 0x0 }, -- { 0x21108d, 0x0 }, -- { 0x1118d, 0x0 }, -- { 0x11118d, 0x0 }, -- { 0x21118d, 0x0 }, -- { 0x1208d, 0x0 }, -- { 0x11208d, 0x0 }, -- { 0x21208d, 0x0 }, -- { 0x1218d, 0x0 }, -- { 0x11218d, 0x0 }, -- { 0x21218d, 0x0 }, -- { 0x1308d, 0x0 }, -- { 0x11308d, 0x0 }, -- { 0x21308d, 0x0 }, -- { 0x1318d, 0x0 }, -- { 0x11318d, 0x0 }, -- { 0x21318d, 0x0 }, -- { 0x100c0, 0x0 }, -- { 0x1100c0, 0x0 }, -- { 0x2100c0, 0x0 }, -- { 0x101c0, 0x0 }, -- { 0x1101c0, 0x0 }, -- { 0x2101c0, 0x0 }, -- { 0x102c0, 0x0 }, -- { 0x1102c0, 0x0 }, -- { 0x2102c0, 0x0 }, -- { 0x103c0, 0x0 }, -- { 0x1103c0, 0x0 }, -- { 0x2103c0, 0x0 }, -- { 0x104c0, 0x0 }, -- { 0x1104c0, 0x0 }, -- { 0x2104c0, 0x0 }, -- { 0x105c0, 0x0 }, -- { 0x1105c0, 0x0 }, -- { 0x2105c0, 0x0 }, -- { 0x106c0, 0x0 }, -- { 0x1106c0, 0x0 }, -- { 0x2106c0, 0x0 }, -- { 0x107c0, 0x0 }, -- { 0x1107c0, 0x0 }, -- { 0x2107c0, 0x0 }, -- { 0x108c0, 0x0 }, -- { 0x1108c0, 0x0 }, -- { 0x2108c0, 0x0 }, -- { 0x110c0, 0x0 }, -- { 0x1110c0, 0x0 }, -- { 0x2110c0, 0x0 }, -- { 0x111c0, 0x0 }, -- { 0x1111c0, 0x0 }, -- { 0x2111c0, 0x0 }, -- { 0x112c0, 0x0 }, -- { 0x1112c0, 0x0 }, -- { 0x2112c0, 0x0 }, -- { 0x113c0, 0x0 }, -- { 0x1113c0, 0x0 }, -- { 0x2113c0, 0x0 }, -- { 0x114c0, 0x0 }, -- { 0x1114c0, 0x0 }, -- { 0x2114c0, 0x0 }, -- { 0x115c0, 0x0 }, -- { 0x1115c0, 0x0 }, -- { 0x2115c0, 0x0 }, -- { 0x116c0, 0x0 }, -- { 0x1116c0, 0x0 }, -- { 0x2116c0, 0x0 }, -- { 0x117c0, 0x0 }, -- { 0x1117c0, 0x0 }, -- { 0x2117c0, 0x0 }, -- { 0x118c0, 0x0 }, -- { 0x1118c0, 0x0 }, -- { 0x2118c0, 0x0 }, -- { 0x120c0, 0x0 }, -- { 0x1120c0, 0x0 }, -- { 0x2120c0, 0x0 }, -- { 0x121c0, 0x0 }, -- { 0x1121c0, 0x0 }, -- { 0x2121c0, 0x0 }, -- { 0x122c0, 0x0 }, -- { 0x1122c0, 0x0 }, -- { 0x2122c0, 0x0 }, -- { 0x123c0, 0x0 }, -- { 0x1123c0, 0x0 }, -- { 0x2123c0, 0x0 }, -- { 0x124c0, 0x0 }, -- { 0x1124c0, 0x0 }, -- { 0x2124c0, 0x0 }, -- { 0x125c0, 0x0 }, -- { 0x1125c0, 0x0 }, -- { 0x2125c0, 0x0 }, -- { 0x126c0, 0x0 }, -- { 0x1126c0, 0x0 }, -- { 0x2126c0, 0x0 }, -- { 0x127c0, 0x0 }, -- { 0x1127c0, 0x0 }, -- { 0x2127c0, 0x0 }, -- { 0x128c0, 0x0 }, -- { 0x1128c0, 0x0 }, -- { 0x2128c0, 0x0 }, -- { 0x130c0, 0x0 }, -- { 0x1130c0, 0x0 }, -- { 0x2130c0, 0x0 }, -- { 0x131c0, 0x0 }, -- { 0x1131c0, 0x0 }, -- { 0x2131c0, 0x0 }, -- { 0x132c0, 0x0 }, -- { 0x1132c0, 0x0 }, -- { 0x2132c0, 0x0 }, -- { 0x133c0, 0x0 }, -- { 0x1133c0, 0x0 }, -- { 0x2133c0, 0x0 }, -- { 0x134c0, 0x0 }, -- { 0x1134c0, 0x0 }, -- { 0x2134c0, 0x0 }, -- { 0x135c0, 0x0 }, -- { 0x1135c0, 0x0 }, -- { 0x2135c0, 0x0 }, -- { 0x136c0, 0x0 }, -- { 0x1136c0, 0x0 }, -- { 0x2136c0, 0x0 }, -- { 0x137c0, 0x0 }, -- { 0x1137c0, 0x0 }, -- { 0x2137c0, 0x0 }, -- { 0x138c0, 0x0 }, -- { 0x1138c0, 0x0 }, -- { 0x2138c0, 0x0 }, -- { 0x100c1, 0x0 }, -- { 0x1100c1, 0x0 }, -- { 0x2100c1, 0x0 }, -- { 0x101c1, 0x0 }, -- { 0x1101c1, 0x0 }, -- { 0x2101c1, 0x0 }, -- { 0x102c1, 0x0 }, -- { 0x1102c1, 0x0 }, -- { 0x2102c1, 0x0 }, -- { 0x103c1, 0x0 }, -- { 0x1103c1, 0x0 }, -- { 0x2103c1, 0x0 }, -- { 0x104c1, 0x0 }, -- { 0x1104c1, 0x0 }, -- { 0x2104c1, 0x0 }, -- { 0x105c1, 0x0 }, -- { 0x1105c1, 0x0 }, -- { 0x2105c1, 0x0 }, -- { 0x106c1, 0x0 }, -- { 0x1106c1, 0x0 }, -- { 0x2106c1, 0x0 }, -- { 0x107c1, 0x0 }, -- { 0x1107c1, 0x0 }, -- { 0x2107c1, 0x0 }, -- { 0x108c1, 0x0 }, -- { 0x1108c1, 0x0 }, -- { 0x2108c1, 0x0 }, -- { 0x110c1, 0x0 }, -- { 0x1110c1, 0x0 }, -- { 0x2110c1, 0x0 }, -- { 0x111c1, 0x0 }, -- { 0x1111c1, 0x0 }, -- { 0x2111c1, 0x0 }, -- { 0x112c1, 0x0 }, -- { 0x1112c1, 0x0 }, -- { 0x2112c1, 0x0 }, -- { 0x113c1, 0x0 }, -- { 0x1113c1, 0x0 }, -- { 0x2113c1, 0x0 }, -- { 0x114c1, 0x0 }, -- { 0x1114c1, 0x0 }, -- { 0x2114c1, 0x0 }, -- { 0x115c1, 0x0 }, -- { 0x1115c1, 0x0 }, -- { 0x2115c1, 0x0 }, -- { 0x116c1, 0x0 }, -- { 0x1116c1, 0x0 }, -- { 0x2116c1, 0x0 }, -- { 0x117c1, 0x0 }, -- { 0x1117c1, 0x0 }, -- { 0x2117c1, 0x0 }, -- { 0x118c1, 0x0 }, -- { 0x1118c1, 0x0 }, -- { 0x2118c1, 0x0 }, -- { 0x120c1, 0x0 }, -- { 0x1120c1, 0x0 }, -- { 0x2120c1, 0x0 }, -- { 0x121c1, 0x0 }, -- { 0x1121c1, 0x0 }, -- { 0x2121c1, 0x0 }, -- { 0x122c1, 0x0 }, -- { 0x1122c1, 0x0 }, -- { 0x2122c1, 0x0 }, -- { 0x123c1, 0x0 }, -- { 0x1123c1, 0x0 }, -- { 0x2123c1, 0x0 }, -- { 0x124c1, 0x0 }, -- { 0x1124c1, 0x0 }, -- { 0x2124c1, 0x0 }, -- { 0x125c1, 0x0 }, -- { 0x1125c1, 0x0 }, -- { 0x2125c1, 0x0 }, -- { 0x126c1, 0x0 }, -- { 0x1126c1, 0x0 }, -- { 0x2126c1, 0x0 }, -- { 0x127c1, 0x0 }, -- { 0x1127c1, 0x0 }, -- { 0x2127c1, 0x0 }, -- { 0x128c1, 0x0 }, -- { 0x1128c1, 0x0 }, -- { 0x2128c1, 0x0 }, -- { 0x130c1, 0x0 }, -- { 0x1130c1, 0x0 }, -- { 0x2130c1, 0x0 }, -- { 0x131c1, 0x0 }, -- { 0x1131c1, 0x0 }, -- { 0x2131c1, 0x0 }, -- { 0x132c1, 0x0 }, -- { 0x1132c1, 0x0 }, -- { 0x2132c1, 0x0 }, -- { 0x133c1, 0x0 }, -- { 0x1133c1, 0x0 }, -- { 0x2133c1, 0x0 }, -- { 0x134c1, 0x0 }, -- { 0x1134c1, 0x0 }, -- { 0x2134c1, 0x0 }, -- { 0x135c1, 0x0 }, -- { 0x1135c1, 0x0 }, -- { 0x2135c1, 0x0 }, -- { 0x136c1, 0x0 }, -- { 0x1136c1, 0x0 }, -- { 0x2136c1, 0x0 }, -- { 0x137c1, 0x0 }, -- { 0x1137c1, 0x0 }, -- { 0x2137c1, 0x0 }, -- { 0x138c1, 0x0 }, -- { 0x1138c1, 0x0 }, -- { 0x2138c1, 0x0 }, -- { 0x10020, 0x0 }, -- { 0x110020, 0x0 }, -- { 0x210020, 0x0 }, -- { 0x11020, 0x0 }, -- { 0x111020, 0x0 }, -- { 0x211020, 0x0 }, -- { 0x12020, 0x0 }, -- { 0x112020, 0x0 }, -- { 0x212020, 0x0 }, -- { 0x13020, 0x0 }, -- { 0x113020, 0x0 }, -- { 0x213020, 0x0 }, -- { 0x20072, 0x0 }, -- { 0x20073, 0x0 }, -- { 0x20074, 0x0 }, -- { 0x100aa, 0x0 }, -- { 0x110aa, 0x0 }, -- { 0x120aa, 0x0 }, -- { 0x130aa, 0x0 }, -- { 0x20010, 0x0 }, -- { 0x120010, 0x0 }, -- { 0x220010, 0x0 }, -- { 0x20011, 0x0 }, -- { 0x120011, 0x0 }, -- { 0x220011, 0x0 }, -- { 0x100ae, 0x0 }, -- { 0x1100ae, 0x0 }, -- { 0x2100ae, 0x0 }, -- { 0x100af, 0x0 }, -- { 0x1100af, 0x0 }, -- { 0x2100af, 0x0 }, -- { 0x110ae, 0x0 }, -- { 0x1110ae, 0x0 }, -- { 0x2110ae, 0x0 }, -- { 0x110af, 0x0 }, -- { 0x1110af, 0x0 }, -- { 0x2110af, 0x0 }, -- { 0x120ae, 0x0 }, -- { 0x1120ae, 0x0 }, -- { 0x2120ae, 0x0 }, -- { 0x120af, 0x0 }, -- { 0x1120af, 0x0 }, -- { 0x2120af, 0x0 }, -- { 0x130ae, 0x0 }, -- { 0x1130ae, 0x0 }, -- { 0x2130ae, 0x0 }, -- { 0x130af, 0x0 }, -- { 0x1130af, 0x0 }, -- { 0x2130af, 0x0 }, -- { 0x20020, 0x0 }, -- { 0x120020, 0x0 }, -- { 0x220020, 0x0 }, -- { 0x100a0, 0x0 }, -- { 0x100a1, 0x0 }, -- { 0x100a2, 0x0 }, -- { 0x100a3, 0x0 }, -- { 0x100a4, 0x0 }, -- { 0x100a5, 0x0 }, -- { 0x100a6, 0x0 }, -- { 0x100a7, 0x0 }, -- { 0x110a0, 0x0 }, -- { 0x110a1, 0x0 }, -- { 0x110a2, 0x0 }, -- { 0x110a3, 0x0 }, -- { 0x110a4, 0x0 }, -- { 0x110a5, 0x0 }, -- { 0x110a6, 0x0 }, -- { 0x110a7, 0x0 }, -- { 0x120a0, 0x0 }, -- { 0x120a1, 0x0 }, -- { 0x120a2, 0x0 }, -- { 0x120a3, 0x0 }, -- { 0x120a4, 0x0 }, -- { 0x120a5, 0x0 }, -- { 0x120a6, 0x0 }, -- { 0x120a7, 0x0 }, -- { 0x130a0, 0x0 }, -- { 0x130a1, 0x0 }, -- { 0x130a2, 0x0 }, -- { 0x130a3, 0x0 }, -- { 0x130a4, 0x0 }, -- { 0x130a5, 0x0 }, -- { 0x130a6, 0x0 }, -- { 0x130a7, 0x0 }, -- { 0x2007c, 0x0 }, -- { 0x12007c, 0x0 }, -- { 0x22007c, 0x0 }, -- { 0x2007d, 0x0 }, -- { 0x12007d, 0x0 }, -- { 0x22007d, 0x0 }, -- { 0x400fd, 0x0 }, -- { 0x400c0, 0x0 }, -- { 0x90201, 0x0 }, -- { 0x190201, 0x0 }, -- { 0x290201, 0x0 }, -- { 0x90202, 0x0 }, -- { 0x190202, 0x0 }, -- { 0x290202, 0x0 }, -- { 0x90203, 0x0 }, -- { 0x190203, 0x0 }, -- { 0x290203, 0x0 }, -- { 0x90204, 0x0 }, -- { 0x190204, 0x0 }, -- { 0x290204, 0x0 }, -- { 0x90205, 0x0 }, -- { 0x190205, 0x0 }, -- { 0x290205, 0x0 }, -- { 0x90206, 0x0 }, -- { 0x190206, 0x0 }, -- { 0x290206, 0x0 }, -- { 0x90207, 0x0 }, -- { 0x190207, 0x0 }, -- { 0x290207, 0x0 }, -- { 0x90208, 0x0 }, -- { 0x190208, 0x0 }, -- { 0x290208, 0x0 }, -- { 0x10062, 0x0 }, -- { 0x10162, 0x0 }, -- { 0x10262, 0x0 }, -- { 0x10362, 0x0 }, -- { 0x10462, 0x0 }, -- { 0x10562, 0x0 }, -- { 0x10662, 0x0 }, -- { 0x10762, 0x0 }, -- { 0x10862, 0x0 }, -- { 0x11062, 0x0 }, -- { 0x11162, 0x0 }, -- { 0x11262, 0x0 }, -- { 0x11362, 0x0 }, -- { 0x11462, 0x0 }, -- { 0x11562, 0x0 }, -- { 0x11662, 0x0 }, -- { 0x11762, 0x0 }, -- { 0x11862, 0x0 }, -- { 0x12062, 0x0 }, -- { 0x12162, 0x0 }, -- { 0x12262, 0x0 }, -- { 0x12362, 0x0 }, -- { 0x12462, 0x0 }, -- { 0x12562, 0x0 }, -- { 0x12662, 0x0 }, -- { 0x12762, 0x0 }, -- { 0x12862, 0x0 }, -- { 0x13062, 0x0 }, -- { 0x13162, 0x0 }, -- { 0x13262, 0x0 }, -- { 0x13362, 0x0 }, -- { 0x13462, 0x0 }, -- { 0x13562, 0x0 }, -- { 0x13662, 0x0 }, -- { 0x13762, 0x0 }, -- { 0x13862, 0x0 }, -- { 0x20077, 0x0 }, -- { 0x10001, 0x0 }, -- { 0x11001, 0x0 }, -- { 0x12001, 0x0 }, -- { 0x13001, 0x0 }, -- { 0x10040, 0x0 }, -- { 0x10140, 0x0 }, -- { 0x10240, 0x0 }, -- { 0x10340, 0x0 }, -- { 0x10440, 0x0 }, -- { 0x10540, 0x0 }, -- { 0x10640, 0x0 }, -- { 0x10740, 0x0 }, -- { 0x10840, 0x0 }, -- { 0x10030, 0x0 }, -- { 0x10130, 0x0 }, -- { 0x10230, 0x0 }, -- { 0x10330, 0x0 }, -- { 0x10430, 0x0 }, -- { 0x10530, 0x0 }, -- { 0x10630, 0x0 }, -- { 0x10730, 0x0 }, -- { 0x10830, 0x0 }, -- { 0x11040, 0x0 }, -- { 0x11140, 0x0 }, -- { 0x11240, 0x0 }, -- { 0x11340, 0x0 }, -- { 0x11440, 0x0 }, -- { 0x11540, 0x0 }, -- { 0x11640, 0x0 }, -- { 0x11740, 0x0 }, -- { 0x11840, 0x0 }, -- { 0x11030, 0x0 }, -- { 0x11130, 0x0 }, -- { 0x11230, 0x0 }, -- { 0x11330, 0x0 }, -- { 0x11430, 0x0 }, -- { 0x11530, 0x0 }, -- { 0x11630, 0x0 }, -- { 0x11730, 0x0 }, -- { 0x11830, 0x0 }, -- { 0x12040, 0x0 }, -- { 0x12140, 0x0 }, -- { 0x12240, 0x0 }, -- { 0x12340, 0x0 }, -- { 0x12440, 0x0 }, -- { 0x12540, 0x0 }, -- { 0x12640, 0x0 }, -- { 0x12740, 0x0 }, -- { 0x12840, 0x0 }, -- { 0x12030, 0x0 }, -- { 0x12130, 0x0 }, -- { 0x12230, 0x0 }, -- { 0x12330, 0x0 }, -- { 0x12430, 0x0 }, -- { 0x12530, 0x0 }, -- { 0x12630, 0x0 }, -- { 0x12730, 0x0 }, -- { 0x12830, 0x0 }, -- { 0x13040, 0x0 }, -- { 0x13140, 0x0 }, -- { 0x13240, 0x0 }, -- { 0x13340, 0x0 }, -- { 0x13440, 0x0 }, -- { 0x13540, 0x0 }, -- { 0x13640, 0x0 }, -- { 0x13740, 0x0 }, -- { 0x13840, 0x0 }, -- { 0x13030, 0x0 }, -- { 0x13130, 0x0 }, -- { 0x13230, 0x0 }, -- { 0x13330, 0x0 }, -- { 0x13430, 0x0 }, -- { 0x13530, 0x0 }, -- { 0x13630, 0x0 }, -- { 0x13730, 0x0 }, -- { 0x13830, 0x0 }, --}; - /* P0 message block paremeter for training firmware */ - static struct dram_cfg_param ddr_fsp0_cfg[] = { - {0xd0000, 0x0}, -@@ -1833,15 +1219,25 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { - }; - - /* ddr timing config params */ -+struct dram_timing_info ucm_dram_timing_ff000110 = { -+ .ddrc_cfg = ddr_ddrc_cfg_ff000110, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_ff000110), -+ .ddrphy_cfg = ddr_ddrphy_cfg, -+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -+ .fsp_msg = ddr_dram_fsp_msg, -+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -+ .ddrphy_pie = ddr_phy_pie, -+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -+ .fsp_table = { 3000, 400, 100, }, -+}; -+ - struct dram_timing_info ucm_dram_timing_ff020008 = { -- .ddrc_cfg = ddr_ddrc_cfg, -- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -+ .ddrc_cfg = ddr_ddrc_cfg_ff020008, -+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_ff020008), - .ddrphy_cfg = ddr_ddrphy_cfg, - .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), - .fsp_msg = ddr_dram_fsp_msg, - .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), - .ddrphy_pie = ddr_phy_pie, - .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3000, 400, 100, }, -diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c -deleted file mode 100644 -index 4401282800..0000000000 ---- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c -+++ /dev/null -@@ -1,1848 +0,0 @@ --/* -- * Copyright 2018 NXP -- * -- * SPDX-License-Identifier: GPL-2.0+ -- * -- * Generated code from MX8M_DDR_tool -- * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga -- */ -- --#include --#include -- --static struct dram_cfg_param ddr_ddrc_cfg[] = { -- /** Initialize DDRC registers **/ -- {0x3d400304,0x1}, -- {0x3d400030,0x1}, -- {0x3d400000,0xa3080020}, -- {0x3d400020,0x223}, -- {0x3d400024,0x3a980}, -- {0x3d400064,0x5b00d2}, -- {0x3d4000d0,0xc00305ba}, -- {0x3d4000d4,0x940000}, -- {0x3d4000dc,0xd4002d}, -- {0x3d4000e0,0x310000}, -- {0x3d4000e8,0x66004d}, -- {0x3d4000ec,0x16004d}, -- {0x3d400100,0x191e1920}, -- {0x3d400104,0x60630}, -- {0x3d40010c,0xb0b000}, -- {0x3d400110,0xe04080e}, -- {0x3d400114,0x2040c0c}, -- {0x3d400118,0x1010007}, -- {0x3d40011c,0x401}, -- {0x3d400130,0x20600}, -- {0x3d400134,0xc100002}, -- {0x3d400138,0xd8}, -- {0x3d400144,0x96004b}, -- {0x3d400180,0x2ee0017}, -- {0x3d400184,0x2605b8e}, -- {0x3d400188,0x0}, -- {0x3d400190,0x497820a}, -- {0x3d400194,0x80303}, -- {0x3d4001b4,0x170a}, -- {0x3d4001a0,0xe0400018}, -- {0x3d4001a4,0xdf00e4}, -- {0x3d4001a8,0x80000000}, -- {0x3d4001b0,0x11}, -- {0x3d4001c0,0x1}, -- {0x3d4001c4,0x0}, -- {0x3d4000f4,0xc99}, -- {0x3d400108,0x70e1617}, -- {0x3d400200,0x17}, -- {0x3d40020c,0x0}, -- {0x3d400210,0x1f1f}, -- {0x3d400204,0x80808}, -- {0x3d400214,0x7070707}, -- {0x3d400218,0x7070707}, -- {0x3d400250,0x29001701}, -- {0x3d400254,0x2c}, -- {0x3d40025c,0x4000030}, -- {0x3d400264,0x900093e7}, -- {0x3d40026c,0x2005574}, -- {0x3d400400,0x111}, -- {0x3d400408,0x72ff}, -- {0x3d400494,0x2100e07}, -- {0x3d400498,0x620096}, -- {0x3d40049c,0x1100e07}, -- {0x3d4004a0,0xc8012c}, -- {0x3d402020,0x21}, -- {0x3d402024,0x7d00}, -- {0x3d402050,0x20d040}, -- {0x3d402064,0xc001c}, -- {0x3d4020dc,0x840000}, -- {0x3d4020e0,0x310000}, -- {0x3d4020e8,0x66004d}, -- {0x3d4020ec,0x16004d}, -- {0x3d402100,0xa040305}, -- {0x3d402104,0x30407}, -- {0x3d402108,0x203060b}, -- {0x3d40210c,0x505000}, -- {0x3d402110,0x2040202}, -- {0x3d402114,0x2030202}, -- {0x3d402118,0x1010004}, -- {0x3d40211c,0x301}, -- {0x3d402130,0x20300}, -- {0x3d402134,0xa100002}, -- {0x3d402138,0x1d}, -- {0x3d402144,0x14000a}, -- {0x3d402180,0x640004}, -- {0x3d402190,0x3818200}, -- {0x3d402194,0x80303}, -- {0x3d4021b4,0x100}, -- {0x3d403020,0x21}, -- {0x3d403024,0x1f40}, -- {0x3d403050,0x20d040}, -- {0x3d403064,0x30007}, -- {0x3d4030dc,0x840000}, -- {0x3d4030e0,0x310000}, -- {0x3d4030e8,0x66004d}, -- {0x3d4030ec,0x16004d}, -- {0x3d403100,0xa010102}, -- {0x3d403104,0x30404}, -- {0x3d403108,0x203060b}, -- {0x3d40310c,0x505000}, -- {0x3d403110,0x2040202}, -- {0x3d403114,0x2030202}, -- {0x3d403118,0x1010004}, -- {0x3d40311c,0x301}, -- {0x3d403130,0x20300}, -- {0x3d403134,0xa100002}, -- {0x3d403138,0x8}, -- {0x3d403144,0x50003}, -- {0x3d403180,0x190004}, -- {0x3d403190,0x3818200}, -- {0x3d403194,0x80303}, -- {0x3d4031b4,0x100}, -- {0x3d400028,0x0}, --}; -- --/* PHY Initialize Configuration */ --static struct dram_cfg_param ddr_ddrphy_cfg[] = { -- {0x100a0,0x0}, -- {0x100a1,0x1}, -- {0x100a2,0x2}, -- {0x100a3,0x3}, -- {0x100a4,0x4}, -- {0x100a5,0x5}, -- {0x100a6,0x6}, -- {0x100a7,0x7}, -- {0x110a0,0x0}, -- {0x110a1,0x1}, -- {0x110a2,0x3}, -- {0x110a3,0x4}, -- {0x110a4,0x5}, -- {0x110a5,0x2}, -- {0x110a6,0x7}, -- {0x110a7,0x6}, -- {0x120a0,0x0}, -- {0x120a1,0x1}, -- {0x120a2,0x3}, -- {0x120a3,0x2}, -- {0x120a4,0x5}, -- {0x120a5,0x4}, -- {0x120a6,0x7}, -- {0x120a7,0x6}, -- {0x130a0,0x0}, -- {0x130a1,0x1}, -- {0x130a2,0x2}, -- {0x130a3,0x3}, -- {0x130a4,0x4}, -- {0x130a5,0x5}, -- {0x130a6,0x6}, -- {0x130a7,0x7}, -- {0x1005f,0x1ff}, -- {0x1015f,0x1ff}, -- {0x1105f,0x1ff}, -- {0x1115f,0x1ff}, -- {0x1205f,0x1ff}, -- {0x1215f,0x1ff}, -- {0x1305f,0x1ff}, -- {0x1315f,0x1ff}, -- {0x11005f,0x1ff}, -- {0x11015f,0x1ff}, -- {0x11105f,0x1ff}, -- {0x11115f,0x1ff}, -- {0x11205f,0x1ff}, -- {0x11215f,0x1ff}, -- {0x11305f,0x1ff}, -- {0x11315f,0x1ff}, -- {0x21005f,0x1ff}, -- {0x21015f,0x1ff}, -- {0x21105f,0x1ff}, -- {0x21115f,0x1ff}, -- {0x21205f,0x1ff}, -- {0x21215f,0x1ff}, -- {0x21305f,0x1ff}, -- {0x21315f,0x1ff}, -- {0x55,0x1ff}, -- {0x1055,0x1ff}, -- {0x2055,0x1ff}, -- {0x3055,0x1ff}, -- {0x4055,0x1ff}, -- {0x5055,0x1ff}, -- {0x6055,0x1ff}, -- {0x7055,0x1ff}, -- {0x8055,0x1ff}, -- {0x9055,0x1ff}, -- {0x200c5,0x19}, -- {0x1200c5,0x7}, -- {0x2200c5,0x7}, -- {0x2002e,0x2}, -- {0x12002e,0x2}, -- {0x22002e,0x2}, -- {0x90204,0x0}, -- {0x190204,0x0}, -- {0x290204,0x0}, -- {0x20024,0x1ab}, -- {0x2003a,0x0}, -- {0x120024,0x1ab}, -- {0x2003a,0x0}, -- {0x220024,0x1ab}, -- {0x2003a,0x0}, -- {0x20056,0x3}, -- {0x120056,0xa}, -- {0x220056,0xa}, -- {0x1004d,0xe00}, -- {0x1014d,0xe00}, -- {0x1104d,0xe00}, -- {0x1114d,0xe00}, -- {0x1204d,0xe00}, -- {0x1214d,0xe00}, -- {0x1304d,0xe00}, -- {0x1314d,0xe00}, -- {0x11004d,0xe00}, -- {0x11014d,0xe00}, -- {0x11104d,0xe00}, -- {0x11114d,0xe00}, -- {0x11204d,0xe00}, -- {0x11214d,0xe00}, -- {0x11304d,0xe00}, -- {0x11314d,0xe00}, -- {0x21004d,0xe00}, -- {0x21014d,0xe00}, -- {0x21104d,0xe00}, -- {0x21114d,0xe00}, -- {0x21204d,0xe00}, -- {0x21214d,0xe00}, -- {0x21304d,0xe00}, -- {0x21314d,0xe00}, -- {0x10049,0xeba}, -- {0x10149,0xeba}, -- {0x11049,0xeba}, -- {0x11149,0xeba}, -- {0x12049,0xeba}, -- {0x12149,0xeba}, -- {0x13049,0xeba}, -- {0x13149,0xeba}, -- {0x110049,0xeba}, -- {0x110149,0xeba}, -- {0x111049,0xeba}, -- {0x111149,0xeba}, -- {0x112049,0xeba}, -- {0x112149,0xeba}, -- {0x113049,0xeba}, -- {0x113149,0xeba}, -- {0x210049,0xeba}, -- {0x210149,0xeba}, -- {0x211049,0xeba}, -- {0x211149,0xeba}, -- {0x212049,0xeba}, -- {0x212149,0xeba}, -- {0x213049,0xeba}, -- {0x213149,0xeba}, -- {0x43,0x63}, -- {0x1043,0x63}, -- {0x2043,0x63}, -- {0x3043,0x63}, -- {0x4043,0x63}, -- {0x5043,0x63}, -- {0x6043,0x63}, -- {0x7043,0x63}, -- {0x8043,0x63}, -- {0x9043,0x63}, -- {0x20018,0x3}, -- {0x20075,0x4}, -- {0x20050,0x0}, -- {0x20008,0x2ee}, -- {0x120008,0x64}, -- {0x220008,0x19}, -- {0x20088,0x9}, -- {0x200b2,0xdc}, -- {0x10043,0x5a1}, -- {0x10143,0x5a1}, -- {0x11043,0x5a1}, -- {0x11143,0x5a1}, -- {0x12043,0x5a1}, -- {0x12143,0x5a1}, -- {0x13043,0x5a1}, -- {0x13143,0x5a1}, -- {0x1200b2,0xdc}, -- {0x110043,0x5a1}, -- {0x110143,0x5a1}, -- {0x111043,0x5a1}, -- {0x111143,0x5a1}, -- {0x112043,0x5a1}, -- {0x112143,0x5a1}, -- {0x113043,0x5a1}, -- {0x113143,0x5a1}, -- {0x2200b2,0xdc}, -- {0x210043,0x5a1}, -- {0x210143,0x5a1}, -- {0x211043,0x5a1}, -- {0x211143,0x5a1}, -- {0x212043,0x5a1}, -- {0x212143,0x5a1}, -- {0x213043,0x5a1}, -- {0x213143,0x5a1}, -- {0x200fa,0x1}, -- {0x1200fa,0x1}, -- {0x2200fa,0x1}, -- {0x20019,0x1}, -- {0x120019,0x1}, -- {0x220019,0x1}, -- {0x200f0,0x660}, -- {0x200f1,0x0}, -- {0x200f2,0x4444}, -- {0x200f3,0x8888}, -- {0x200f4,0x5665}, -- {0x200f5,0x0}, -- {0x200f6,0x0}, -- {0x200f7,0xf000}, -- {0x20025,0x0}, -- {0x2002d,0x0}, -- {0x12002d,0x0}, -- {0x22002d,0x0}, -- {0x200c7,0x21}, -- {0x1200c7,0x21}, -- {0x2200c7,0x21}, -- {0x200ca,0x24}, -- {0x1200ca,0x24}, -- {0x2200ca,0x24}, --}; -- --/* ddr phy trained csr */ --static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -- { 0x200b2, 0x0 }, -- { 0x1200b2, 0x0 }, -- { 0x2200b2, 0x0 }, -- { 0x200cb, 0x0 }, -- { 0x10043, 0x0 }, -- { 0x110043, 0x0 }, -- { 0x210043, 0x0 }, -- { 0x10143, 0x0 }, -- { 0x110143, 0x0 }, -- { 0x210143, 0x0 }, -- { 0x11043, 0x0 }, -- { 0x111043, 0x0 }, -- { 0x211043, 0x0 }, -- { 0x11143, 0x0 }, -- { 0x111143, 0x0 }, -- { 0x211143, 0x0 }, -- { 0x12043, 0x0 }, -- { 0x112043, 0x0 }, -- { 0x212043, 0x0 }, -- { 0x12143, 0x0 }, -- { 0x112143, 0x0 }, -- { 0x212143, 0x0 }, -- { 0x13043, 0x0 }, -- { 0x113043, 0x0 }, -- { 0x213043, 0x0 }, -- { 0x13143, 0x0 }, -- { 0x113143, 0x0 }, -- { 0x213143, 0x0 }, -- { 0x80, 0x0 }, -- { 0x100080, 0x0 }, -- { 0x200080, 0x0 }, -- { 0x1080, 0x0 }, -- { 0x101080, 0x0 }, -- { 0x201080, 0x0 }, -- { 0x2080, 0x0 }, -- { 0x102080, 0x0 }, -- { 0x202080, 0x0 }, -- { 0x3080, 0x0 }, -- { 0x103080, 0x0 }, -- { 0x203080, 0x0 }, -- { 0x4080, 0x0 }, -- { 0x104080, 0x0 }, -- { 0x204080, 0x0 }, -- { 0x5080, 0x0 }, -- { 0x105080, 0x0 }, -- { 0x205080, 0x0 }, -- { 0x6080, 0x0 }, -- { 0x106080, 0x0 }, -- { 0x206080, 0x0 }, -- { 0x7080, 0x0 }, -- { 0x107080, 0x0 }, -- { 0x207080, 0x0 }, -- { 0x8080, 0x0 }, -- { 0x108080, 0x0 }, -- { 0x208080, 0x0 }, -- { 0x9080, 0x0 }, -- { 0x109080, 0x0 }, -- { 0x209080, 0x0 }, -- { 0x10080, 0x0 }, -- { 0x110080, 0x0 }, -- { 0x210080, 0x0 }, -- { 0x10180, 0x0 }, -- { 0x110180, 0x0 }, -- { 0x210180, 0x0 }, -- { 0x11080, 0x0 }, -- { 0x111080, 0x0 }, -- { 0x211080, 0x0 }, -- { 0x11180, 0x0 }, -- { 0x111180, 0x0 }, -- { 0x211180, 0x0 }, -- { 0x12080, 0x0 }, -- { 0x112080, 0x0 }, -- { 0x212080, 0x0 }, -- { 0x12180, 0x0 }, -- { 0x112180, 0x0 }, -- { 0x212180, 0x0 }, -- { 0x13080, 0x0 }, -- { 0x113080, 0x0 }, -- { 0x213080, 0x0 }, -- { 0x13180, 0x0 }, -- { 0x113180, 0x0 }, -- { 0x213180, 0x0 }, -- { 0x10081, 0x0 }, -- { 0x110081, 0x0 }, -- { 0x210081, 0x0 }, -- { 0x10181, 0x0 }, -- { 0x110181, 0x0 }, -- { 0x210181, 0x0 }, -- { 0x11081, 0x0 }, -- { 0x111081, 0x0 }, -- { 0x211081, 0x0 }, -- { 0x11181, 0x0 }, -- { 0x111181, 0x0 }, -- { 0x211181, 0x0 }, -- { 0x12081, 0x0 }, -- { 0x112081, 0x0 }, -- { 0x212081, 0x0 }, -- { 0x12181, 0x0 }, -- { 0x112181, 0x0 }, -- { 0x212181, 0x0 }, -- { 0x13081, 0x0 }, -- { 0x113081, 0x0 }, -- { 0x213081, 0x0 }, -- { 0x13181, 0x0 }, -- { 0x113181, 0x0 }, -- { 0x213181, 0x0 }, -- { 0x100d0, 0x0 }, -- { 0x1100d0, 0x0 }, -- { 0x2100d0, 0x0 }, -- { 0x101d0, 0x0 }, -- { 0x1101d0, 0x0 }, -- { 0x2101d0, 0x0 }, -- { 0x110d0, 0x0 }, -- { 0x1110d0, 0x0 }, -- { 0x2110d0, 0x0 }, -- { 0x111d0, 0x0 }, -- { 0x1111d0, 0x0 }, -- { 0x2111d0, 0x0 }, -- { 0x120d0, 0x0 }, -- { 0x1120d0, 0x0 }, -- { 0x2120d0, 0x0 }, -- { 0x121d0, 0x0 }, -- { 0x1121d0, 0x0 }, -- { 0x2121d0, 0x0 }, -- { 0x130d0, 0x0 }, -- { 0x1130d0, 0x0 }, -- { 0x2130d0, 0x0 }, -- { 0x131d0, 0x0 }, -- { 0x1131d0, 0x0 }, -- { 0x2131d0, 0x0 }, -- { 0x100d1, 0x0 }, -- { 0x1100d1, 0x0 }, -- { 0x2100d1, 0x0 }, -- { 0x101d1, 0x0 }, -- { 0x1101d1, 0x0 }, -- { 0x2101d1, 0x0 }, -- { 0x110d1, 0x0 }, -- { 0x1110d1, 0x0 }, -- { 0x2110d1, 0x0 }, -- { 0x111d1, 0x0 }, -- { 0x1111d1, 0x0 }, -- { 0x2111d1, 0x0 }, -- { 0x120d1, 0x0 }, -- { 0x1120d1, 0x0 }, -- { 0x2120d1, 0x0 }, -- { 0x121d1, 0x0 }, -- { 0x1121d1, 0x0 }, -- { 0x2121d1, 0x0 }, -- { 0x130d1, 0x0 }, -- { 0x1130d1, 0x0 }, -- { 0x2130d1, 0x0 }, -- { 0x131d1, 0x0 }, -- { 0x1131d1, 0x0 }, -- { 0x2131d1, 0x0 }, -- { 0x10068, 0x0 }, -- { 0x10168, 0x0 }, -- { 0x10268, 0x0 }, -- { 0x10368, 0x0 }, -- { 0x10468, 0x0 }, -- { 0x10568, 0x0 }, -- { 0x10668, 0x0 }, -- { 0x10768, 0x0 }, -- { 0x10868, 0x0 }, -- { 0x11068, 0x0 }, -- { 0x11168, 0x0 }, -- { 0x11268, 0x0 }, -- { 0x11368, 0x0 }, -- { 0x11468, 0x0 }, -- { 0x11568, 0x0 }, -- { 0x11668, 0x0 }, -- { 0x11768, 0x0 }, -- { 0x11868, 0x0 }, -- { 0x12068, 0x0 }, -- { 0x12168, 0x0 }, -- { 0x12268, 0x0 }, -- { 0x12368, 0x0 }, -- { 0x12468, 0x0 }, -- { 0x12568, 0x0 }, -- { 0x12668, 0x0 }, -- { 0x12768, 0x0 }, -- { 0x12868, 0x0 }, -- { 0x13068, 0x0 }, -- { 0x13168, 0x0 }, -- { 0x13268, 0x0 }, -- { 0x13368, 0x0 }, -- { 0x13468, 0x0 }, -- { 0x13568, 0x0 }, -- { 0x13668, 0x0 }, -- { 0x13768, 0x0 }, -- { 0x13868, 0x0 }, -- { 0x10069, 0x0 }, -- { 0x10169, 0x0 }, -- { 0x10269, 0x0 }, -- { 0x10369, 0x0 }, -- { 0x10469, 0x0 }, -- { 0x10569, 0x0 }, -- { 0x10669, 0x0 }, -- { 0x10769, 0x0 }, -- { 0x10869, 0x0 }, -- { 0x11069, 0x0 }, -- { 0x11169, 0x0 }, -- { 0x11269, 0x0 }, -- { 0x11369, 0x0 }, -- { 0x11469, 0x0 }, -- { 0x11569, 0x0 }, -- { 0x11669, 0x0 }, -- { 0x11769, 0x0 }, -- { 0x11869, 0x0 }, -- { 0x12069, 0x0 }, -- { 0x12169, 0x0 }, -- { 0x12269, 0x0 }, -- { 0x12369, 0x0 }, -- { 0x12469, 0x0 }, -- { 0x12569, 0x0 }, -- { 0x12669, 0x0 }, -- { 0x12769, 0x0 }, -- { 0x12869, 0x0 }, -- { 0x13069, 0x0 }, -- { 0x13169, 0x0 }, -- { 0x13269, 0x0 }, -- { 0x13369, 0x0 }, -- { 0x13469, 0x0 }, -- { 0x13569, 0x0 }, -- { 0x13669, 0x0 }, -- { 0x13769, 0x0 }, -- { 0x13869, 0x0 }, -- { 0x1008c, 0x0 }, -- { 0x11008c, 0x0 }, -- { 0x21008c, 0x0 }, -- { 0x1018c, 0x0 }, -- { 0x11018c, 0x0 }, -- { 0x21018c, 0x0 }, -- { 0x1108c, 0x0 }, -- { 0x11108c, 0x0 }, -- { 0x21108c, 0x0 }, -- { 0x1118c, 0x0 }, -- { 0x11118c, 0x0 }, -- { 0x21118c, 0x0 }, -- { 0x1208c, 0x0 }, -- { 0x11208c, 0x0 }, -- { 0x21208c, 0x0 }, -- { 0x1218c, 0x0 }, -- { 0x11218c, 0x0 }, -- { 0x21218c, 0x0 }, -- { 0x1308c, 0x0 }, -- { 0x11308c, 0x0 }, -- { 0x21308c, 0x0 }, -- { 0x1318c, 0x0 }, -- { 0x11318c, 0x0 }, -- { 0x21318c, 0x0 }, -- { 0x1008d, 0x0 }, -- { 0x11008d, 0x0 }, -- { 0x21008d, 0x0 }, -- { 0x1018d, 0x0 }, -- { 0x11018d, 0x0 }, -- { 0x21018d, 0x0 }, -- { 0x1108d, 0x0 }, -- { 0x11108d, 0x0 }, -- { 0x21108d, 0x0 }, -- { 0x1118d, 0x0 }, -- { 0x11118d, 0x0 }, -- { 0x21118d, 0x0 }, -- { 0x1208d, 0x0 }, -- { 0x11208d, 0x0 }, -- { 0x21208d, 0x0 }, -- { 0x1218d, 0x0 }, -- { 0x11218d, 0x0 }, -- { 0x21218d, 0x0 }, -- { 0x1308d, 0x0 }, -- { 0x11308d, 0x0 }, -- { 0x21308d, 0x0 }, -- { 0x1318d, 0x0 }, -- { 0x11318d, 0x0 }, -- { 0x21318d, 0x0 }, -- { 0x100c0, 0x0 }, -- { 0x1100c0, 0x0 }, -- { 0x2100c0, 0x0 }, -- { 0x101c0, 0x0 }, -- { 0x1101c0, 0x0 }, -- { 0x2101c0, 0x0 }, -- { 0x102c0, 0x0 }, -- { 0x1102c0, 0x0 }, -- { 0x2102c0, 0x0 }, -- { 0x103c0, 0x0 }, -- { 0x1103c0, 0x0 }, -- { 0x2103c0, 0x0 }, -- { 0x104c0, 0x0 }, -- { 0x1104c0, 0x0 }, -- { 0x2104c0, 0x0 }, -- { 0x105c0, 0x0 }, -- { 0x1105c0, 0x0 }, -- { 0x2105c0, 0x0 }, -- { 0x106c0, 0x0 }, -- { 0x1106c0, 0x0 }, -- { 0x2106c0, 0x0 }, -- { 0x107c0, 0x0 }, -- { 0x1107c0, 0x0 }, -- { 0x2107c0, 0x0 }, -- { 0x108c0, 0x0 }, -- { 0x1108c0, 0x0 }, -- { 0x2108c0, 0x0 }, -- { 0x110c0, 0x0 }, -- { 0x1110c0, 0x0 }, -- { 0x2110c0, 0x0 }, -- { 0x111c0, 0x0 }, -- { 0x1111c0, 0x0 }, -- { 0x2111c0, 0x0 }, -- { 0x112c0, 0x0 }, -- { 0x1112c0, 0x0 }, -- { 0x2112c0, 0x0 }, -- { 0x113c0, 0x0 }, -- { 0x1113c0, 0x0 }, -- { 0x2113c0, 0x0 }, -- { 0x114c0, 0x0 }, -- { 0x1114c0, 0x0 }, -- { 0x2114c0, 0x0 }, -- { 0x115c0, 0x0 }, -- { 0x1115c0, 0x0 }, -- { 0x2115c0, 0x0 }, -- { 0x116c0, 0x0 }, -- { 0x1116c0, 0x0 }, -- { 0x2116c0, 0x0 }, -- { 0x117c0, 0x0 }, -- { 0x1117c0, 0x0 }, -- { 0x2117c0, 0x0 }, -- { 0x118c0, 0x0 }, -- { 0x1118c0, 0x0 }, -- { 0x2118c0, 0x0 }, -- { 0x120c0, 0x0 }, -- { 0x1120c0, 0x0 }, -- { 0x2120c0, 0x0 }, -- { 0x121c0, 0x0 }, -- { 0x1121c0, 0x0 }, -- { 0x2121c0, 0x0 }, -- { 0x122c0, 0x0 }, -- { 0x1122c0, 0x0 }, -- { 0x2122c0, 0x0 }, -- { 0x123c0, 0x0 }, -- { 0x1123c0, 0x0 }, -- { 0x2123c0, 0x0 }, -- { 0x124c0, 0x0 }, -- { 0x1124c0, 0x0 }, -- { 0x2124c0, 0x0 }, -- { 0x125c0, 0x0 }, -- { 0x1125c0, 0x0 }, -- { 0x2125c0, 0x0 }, -- { 0x126c0, 0x0 }, -- { 0x1126c0, 0x0 }, -- { 0x2126c0, 0x0 }, -- { 0x127c0, 0x0 }, -- { 0x1127c0, 0x0 }, -- { 0x2127c0, 0x0 }, -- { 0x128c0, 0x0 }, -- { 0x1128c0, 0x0 }, -- { 0x2128c0, 0x0 }, -- { 0x130c0, 0x0 }, -- { 0x1130c0, 0x0 }, -- { 0x2130c0, 0x0 }, -- { 0x131c0, 0x0 }, -- { 0x1131c0, 0x0 }, -- { 0x2131c0, 0x0 }, -- { 0x132c0, 0x0 }, -- { 0x1132c0, 0x0 }, -- { 0x2132c0, 0x0 }, -- { 0x133c0, 0x0 }, -- { 0x1133c0, 0x0 }, -- { 0x2133c0, 0x0 }, -- { 0x134c0, 0x0 }, -- { 0x1134c0, 0x0 }, -- { 0x2134c0, 0x0 }, -- { 0x135c0, 0x0 }, -- { 0x1135c0, 0x0 }, -- { 0x2135c0, 0x0 }, -- { 0x136c0, 0x0 }, -- { 0x1136c0, 0x0 }, -- { 0x2136c0, 0x0 }, -- { 0x137c0, 0x0 }, -- { 0x1137c0, 0x0 }, -- { 0x2137c0, 0x0 }, -- { 0x138c0, 0x0 }, -- { 0x1138c0, 0x0 }, -- { 0x2138c0, 0x0 }, -- { 0x100c1, 0x0 }, -- { 0x1100c1, 0x0 }, -- { 0x2100c1, 0x0 }, -- { 0x101c1, 0x0 }, -- { 0x1101c1, 0x0 }, -- { 0x2101c1, 0x0 }, -- { 0x102c1, 0x0 }, -- { 0x1102c1, 0x0 }, -- { 0x2102c1, 0x0 }, -- { 0x103c1, 0x0 }, -- { 0x1103c1, 0x0 }, -- { 0x2103c1, 0x0 }, -- { 0x104c1, 0x0 }, -- { 0x1104c1, 0x0 }, -- { 0x2104c1, 0x0 }, -- { 0x105c1, 0x0 }, -- { 0x1105c1, 0x0 }, -- { 0x2105c1, 0x0 }, -- { 0x106c1, 0x0 }, -- { 0x1106c1, 0x0 }, -- { 0x2106c1, 0x0 }, -- { 0x107c1, 0x0 }, -- { 0x1107c1, 0x0 }, -- { 0x2107c1, 0x0 }, -- { 0x108c1, 0x0 }, -- { 0x1108c1, 0x0 }, -- { 0x2108c1, 0x0 }, -- { 0x110c1, 0x0 }, -- { 0x1110c1, 0x0 }, -- { 0x2110c1, 0x0 }, -- { 0x111c1, 0x0 }, -- { 0x1111c1, 0x0 }, -- { 0x2111c1, 0x0 }, -- { 0x112c1, 0x0 }, -- { 0x1112c1, 0x0 }, -- { 0x2112c1, 0x0 }, -- { 0x113c1, 0x0 }, -- { 0x1113c1, 0x0 }, -- { 0x2113c1, 0x0 }, -- { 0x114c1, 0x0 }, -- { 0x1114c1, 0x0 }, -- { 0x2114c1, 0x0 }, -- { 0x115c1, 0x0 }, -- { 0x1115c1, 0x0 }, -- { 0x2115c1, 0x0 }, -- { 0x116c1, 0x0 }, -- { 0x1116c1, 0x0 }, -- { 0x2116c1, 0x0 }, -- { 0x117c1, 0x0 }, -- { 0x1117c1, 0x0 }, -- { 0x2117c1, 0x0 }, -- { 0x118c1, 0x0 }, -- { 0x1118c1, 0x0 }, -- { 0x2118c1, 0x0 }, -- { 0x120c1, 0x0 }, -- { 0x1120c1, 0x0 }, -- { 0x2120c1, 0x0 }, -- { 0x121c1, 0x0 }, -- { 0x1121c1, 0x0 }, -- { 0x2121c1, 0x0 }, -- { 0x122c1, 0x0 }, -- { 0x1122c1, 0x0 }, -- { 0x2122c1, 0x0 }, -- { 0x123c1, 0x0 }, -- { 0x1123c1, 0x0 }, -- { 0x2123c1, 0x0 }, -- { 0x124c1, 0x0 }, -- { 0x1124c1, 0x0 }, -- { 0x2124c1, 0x0 }, -- { 0x125c1, 0x0 }, -- { 0x1125c1, 0x0 }, -- { 0x2125c1, 0x0 }, -- { 0x126c1, 0x0 }, -- { 0x1126c1, 0x0 }, -- { 0x2126c1, 0x0 }, -- { 0x127c1, 0x0 }, -- { 0x1127c1, 0x0 }, -- { 0x2127c1, 0x0 }, -- { 0x128c1, 0x0 }, -- { 0x1128c1, 0x0 }, -- { 0x2128c1, 0x0 }, -- { 0x130c1, 0x0 }, -- { 0x1130c1, 0x0 }, -- { 0x2130c1, 0x0 }, -- { 0x131c1, 0x0 }, -- { 0x1131c1, 0x0 }, -- { 0x2131c1, 0x0 }, -- { 0x132c1, 0x0 }, -- { 0x1132c1, 0x0 }, -- { 0x2132c1, 0x0 }, -- { 0x133c1, 0x0 }, -- { 0x1133c1, 0x0 }, -- { 0x2133c1, 0x0 }, -- { 0x134c1, 0x0 }, -- { 0x1134c1, 0x0 }, -- { 0x2134c1, 0x0 }, -- { 0x135c1, 0x0 }, -- { 0x1135c1, 0x0 }, -- { 0x2135c1, 0x0 }, -- { 0x136c1, 0x0 }, -- { 0x1136c1, 0x0 }, -- { 0x2136c1, 0x0 }, -- { 0x137c1, 0x0 }, -- { 0x1137c1, 0x0 }, -- { 0x2137c1, 0x0 }, -- { 0x138c1, 0x0 }, -- { 0x1138c1, 0x0 }, -- { 0x2138c1, 0x0 }, -- { 0x10020, 0x0 }, -- { 0x110020, 0x0 }, -- { 0x210020, 0x0 }, -- { 0x11020, 0x0 }, -- { 0x111020, 0x0 }, -- { 0x211020, 0x0 }, -- { 0x12020, 0x0 }, -- { 0x112020, 0x0 }, -- { 0x212020, 0x0 }, -- { 0x13020, 0x0 }, -- { 0x113020, 0x0 }, -- { 0x213020, 0x0 }, -- { 0x20072, 0x0 }, -- { 0x20073, 0x0 }, -- { 0x20074, 0x0 }, -- { 0x100aa, 0x0 }, -- { 0x110aa, 0x0 }, -- { 0x120aa, 0x0 }, -- { 0x130aa, 0x0 }, -- { 0x20010, 0x0 }, -- { 0x120010, 0x0 }, -- { 0x220010, 0x0 }, -- { 0x20011, 0x0 }, -- { 0x120011, 0x0 }, -- { 0x220011, 0x0 }, -- { 0x100ae, 0x0 }, -- { 0x1100ae, 0x0 }, -- { 0x2100ae, 0x0 }, -- { 0x100af, 0x0 }, -- { 0x1100af, 0x0 }, -- { 0x2100af, 0x0 }, -- { 0x110ae, 0x0 }, -- { 0x1110ae, 0x0 }, -- { 0x2110ae, 0x0 }, -- { 0x110af, 0x0 }, -- { 0x1110af, 0x0 }, -- { 0x2110af, 0x0 }, -- { 0x120ae, 0x0 }, -- { 0x1120ae, 0x0 }, -- { 0x2120ae, 0x0 }, -- { 0x120af, 0x0 }, -- { 0x1120af, 0x0 }, -- { 0x2120af, 0x0 }, -- { 0x130ae, 0x0 }, -- { 0x1130ae, 0x0 }, -- { 0x2130ae, 0x0 }, -- { 0x130af, 0x0 }, -- { 0x1130af, 0x0 }, -- { 0x2130af, 0x0 }, -- { 0x20020, 0x0 }, -- { 0x120020, 0x0 }, -- { 0x220020, 0x0 }, -- { 0x100a0, 0x0 }, -- { 0x100a1, 0x0 }, -- { 0x100a2, 0x0 }, -- { 0x100a3, 0x0 }, -- { 0x100a4, 0x0 }, -- { 0x100a5, 0x0 }, -- { 0x100a6, 0x0 }, -- { 0x100a7, 0x0 }, -- { 0x110a0, 0x0 }, -- { 0x110a1, 0x0 }, -- { 0x110a2, 0x0 }, -- { 0x110a3, 0x0 }, -- { 0x110a4, 0x0 }, -- { 0x110a5, 0x0 }, -- { 0x110a6, 0x0 }, -- { 0x110a7, 0x0 }, -- { 0x120a0, 0x0 }, -- { 0x120a1, 0x0 }, -- { 0x120a2, 0x0 }, -- { 0x120a3, 0x0 }, -- { 0x120a4, 0x0 }, -- { 0x120a5, 0x0 }, -- { 0x120a6, 0x0 }, -- { 0x120a7, 0x0 }, -- { 0x130a0, 0x0 }, -- { 0x130a1, 0x0 }, -- { 0x130a2, 0x0 }, -- { 0x130a3, 0x0 }, -- { 0x130a4, 0x0 }, -- { 0x130a5, 0x0 }, -- { 0x130a6, 0x0 }, -- { 0x130a7, 0x0 }, -- { 0x2007c, 0x0 }, -- { 0x12007c, 0x0 }, -- { 0x22007c, 0x0 }, -- { 0x2007d, 0x0 }, -- { 0x12007d, 0x0 }, -- { 0x22007d, 0x0 }, -- { 0x400fd, 0x0 }, -- { 0x400c0, 0x0 }, -- { 0x90201, 0x0 }, -- { 0x190201, 0x0 }, -- { 0x290201, 0x0 }, -- { 0x90202, 0x0 }, -- { 0x190202, 0x0 }, -- { 0x290202, 0x0 }, -- { 0x90203, 0x0 }, -- { 0x190203, 0x0 }, -- { 0x290203, 0x0 }, -- { 0x90204, 0x0 }, -- { 0x190204, 0x0 }, -- { 0x290204, 0x0 }, -- { 0x90205, 0x0 }, -- { 0x190205, 0x0 }, -- { 0x290205, 0x0 }, -- { 0x90206, 0x0 }, -- { 0x190206, 0x0 }, -- { 0x290206, 0x0 }, -- { 0x90207, 0x0 }, -- { 0x190207, 0x0 }, -- { 0x290207, 0x0 }, -- { 0x90208, 0x0 }, -- { 0x190208, 0x0 }, -- { 0x290208, 0x0 }, -- { 0x10062, 0x0 }, -- { 0x10162, 0x0 }, -- { 0x10262, 0x0 }, -- { 0x10362, 0x0 }, -- { 0x10462, 0x0 }, -- { 0x10562, 0x0 }, -- { 0x10662, 0x0 }, -- { 0x10762, 0x0 }, -- { 0x10862, 0x0 }, -- { 0x11062, 0x0 }, -- { 0x11162, 0x0 }, -- { 0x11262, 0x0 }, -- { 0x11362, 0x0 }, -- { 0x11462, 0x0 }, -- { 0x11562, 0x0 }, -- { 0x11662, 0x0 }, -- { 0x11762, 0x0 }, -- { 0x11862, 0x0 }, -- { 0x12062, 0x0 }, -- { 0x12162, 0x0 }, -- { 0x12262, 0x0 }, -- { 0x12362, 0x0 }, -- { 0x12462, 0x0 }, -- { 0x12562, 0x0 }, -- { 0x12662, 0x0 }, -- { 0x12762, 0x0 }, -- { 0x12862, 0x0 }, -- { 0x13062, 0x0 }, -- { 0x13162, 0x0 }, -- { 0x13262, 0x0 }, -- { 0x13362, 0x0 }, -- { 0x13462, 0x0 }, -- { 0x13562, 0x0 }, -- { 0x13662, 0x0 }, -- { 0x13762, 0x0 }, -- { 0x13862, 0x0 }, -- { 0x20077, 0x0 }, -- { 0x10001, 0x0 }, -- { 0x11001, 0x0 }, -- { 0x12001, 0x0 }, -- { 0x13001, 0x0 }, -- { 0x10040, 0x0 }, -- { 0x10140, 0x0 }, -- { 0x10240, 0x0 }, -- { 0x10340, 0x0 }, -- { 0x10440, 0x0 }, -- { 0x10540, 0x0 }, -- { 0x10640, 0x0 }, -- { 0x10740, 0x0 }, -- { 0x10840, 0x0 }, -- { 0x10030, 0x0 }, -- { 0x10130, 0x0 }, -- { 0x10230, 0x0 }, -- { 0x10330, 0x0 }, -- { 0x10430, 0x0 }, -- { 0x10530, 0x0 }, -- { 0x10630, 0x0 }, -- { 0x10730, 0x0 }, -- { 0x10830, 0x0 }, -- { 0x11040, 0x0 }, -- { 0x11140, 0x0 }, -- { 0x11240, 0x0 }, -- { 0x11340, 0x0 }, -- { 0x11440, 0x0 }, -- { 0x11540, 0x0 }, -- { 0x11640, 0x0 }, -- { 0x11740, 0x0 }, -- { 0x11840, 0x0 }, -- { 0x11030, 0x0 }, -- { 0x11130, 0x0 }, -- { 0x11230, 0x0 }, -- { 0x11330, 0x0 }, -- { 0x11430, 0x0 }, -- { 0x11530, 0x0 }, -- { 0x11630, 0x0 }, -- { 0x11730, 0x0 }, -- { 0x11830, 0x0 }, -- { 0x12040, 0x0 }, -- { 0x12140, 0x0 }, -- { 0x12240, 0x0 }, -- { 0x12340, 0x0 }, -- { 0x12440, 0x0 }, -- { 0x12540, 0x0 }, -- { 0x12640, 0x0 }, -- { 0x12740, 0x0 }, -- { 0x12840, 0x0 }, -- { 0x12030, 0x0 }, -- { 0x12130, 0x0 }, -- { 0x12230, 0x0 }, -- { 0x12330, 0x0 }, -- { 0x12430, 0x0 }, -- { 0x12530, 0x0 }, -- { 0x12630, 0x0 }, -- { 0x12730, 0x0 }, -- { 0x12830, 0x0 }, -- { 0x13040, 0x0 }, -- { 0x13140, 0x0 }, -- { 0x13240, 0x0 }, -- { 0x13340, 0x0 }, -- { 0x13440, 0x0 }, -- { 0x13540, 0x0 }, -- { 0x13640, 0x0 }, -- { 0x13740, 0x0 }, -- { 0x13840, 0x0 }, -- { 0x13030, 0x0 }, -- { 0x13130, 0x0 }, -- { 0x13230, 0x0 }, -- { 0x13330, 0x0 }, -- { 0x13430, 0x0 }, -- { 0x13530, 0x0 }, -- { 0x13630, 0x0 }, -- { 0x13730, 0x0 }, -- { 0x13830, 0x0 }, --}; --/* P0 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp0_cfg[] = { -- {0xd0000, 0x0}, -- {0x54003,0xbb8}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x131f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x310}, -- {0x54019,0x2dd4}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x2dd4}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x3}, -- {0x54032,0xd400}, -- {0x54033,0x312d}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0xd400}, -- {0x54039,0x312d}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P1 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp1_cfg[] = { -- {0xd0000, 0x0}, -- {0x54002,0x101}, -- {0x54003,0x190}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x121f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x310}, -- {0x54019,0x84}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x84}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x3}, -- {0x54032,0x8400}, -- {0x54033,0x3100}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0x8400}, -- {0x54039,0x3100}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P2 message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp2_cfg[] = { -- {0xd0000, 0x0}, -- {0x54002,0x102}, -- {0x54003,0x64}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x121f}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400d,0x100}, -- {0x54012,0x310}, -- {0x54019,0x84}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x84}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x3}, -- {0x54032,0x8400}, -- {0x54033,0x3100}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0x8400}, -- {0x54039,0x3100}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- {0xd0000, 0x1}, --}; -- -- --/* P0 2D message block paremeter for training firmware */ --static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { -- {0xd0000, 0x0}, -- {0x54003,0xbb8}, -- {0x54004,0x2}, -- {0x54005,0x2228}, -- {0x54006,0x11}, -- {0x54008,0x61}, -- {0x54009,0xc8}, -- {0x5400b,0x2}, -- {0x5400f,0x100}, -- {0x54010,0x1f7f}, -- {0x54012,0x310}, -- {0x54019,0x2dd4}, -- {0x5401a,0x31}, -- {0x5401b,0x4d66}, -- {0x5401c,0x4d00}, -- {0x5401e,0x16}, -- {0x5401f,0x2dd4}, -- {0x54020,0x31}, -- {0x54021,0x4d66}, -- {0x54022,0x4d00}, -- {0x54024,0x16}, -- {0x5402b,0x1000}, -- {0x5402c,0x3}, -- {0x54032,0xd400}, -- {0x54033,0x312d}, -- {0x54034,0x6600}, -- {0x54035,0x4d}, -- {0x54036,0x4d}, -- {0x54037,0x1600}, -- {0x54038,0xd400}, -- {0x54039,0x312d}, -- {0x5403a,0x6600}, -- {0x5403b,0x4d}, -- {0x5403c,0x4d}, -- {0x5403d,0x1600}, -- { 0xd0000, 0x1 }, --}; -- --/* DRAM PHY init engine image */ --static struct dram_cfg_param ddr_phy_pie[] = { -- {0xd0000, 0x0}, -- {0x90000,0x10}, -- {0x90001,0x400}, -- {0x90002,0x10e}, -- {0x90003,0x0}, -- {0x90004,0x0}, -- {0x90005,0x8}, -- {0x90029,0xb}, -- {0x9002a,0x480}, -- {0x9002b,0x109}, -- {0x9002c,0x8}, -- {0x9002d,0x448}, -- {0x9002e,0x139}, -- {0x9002f,0x8}, -- {0x90030,0x478}, -- {0x90031,0x109}, -- {0x90032,0x0}, -- {0x90033,0xe8}, -- {0x90034,0x109}, -- {0x90035,0x2}, -- {0x90036,0x10}, -- {0x90037,0x139}, -- {0x90038,0xf}, -- {0x90039,0x7c0}, -- {0x9003a,0x139}, -- {0x9003b,0x44}, -- {0x9003c,0x630}, -- {0x9003d,0x159}, -- {0x9003e,0x14f}, -- {0x9003f,0x630}, -- {0x90040,0x159}, -- {0x90041,0x47}, -- {0x90042,0x630}, -- {0x90043,0x149}, -- {0x90044,0x4f}, -- {0x90045,0x630}, -- {0x90046,0x179}, -- {0x90047,0x8}, -- {0x90048,0xe0}, -- {0x90049,0x109}, -- {0x9004a,0x0}, -- {0x9004b,0x7c8}, -- {0x9004c,0x109}, -- {0x9004d,0x0}, -- {0x9004e,0x1}, -- {0x9004f,0x8}, -- {0x90050,0x0}, -- {0x90051,0x45a}, -- {0x90052,0x9}, -- {0x90053,0x0}, -- {0x90054,0x448}, -- {0x90055,0x109}, -- {0x90056,0x40}, -- {0x90057,0x630}, -- {0x90058,0x179}, -- {0x90059,0x1}, -- {0x9005a,0x618}, -- {0x9005b,0x109}, -- {0x9005c,0x40c0}, -- {0x9005d,0x630}, -- {0x9005e,0x149}, -- {0x9005f,0x8}, -- {0x90060,0x4}, -- {0x90061,0x48}, -- {0x90062,0x4040}, -- {0x90063,0x630}, -- {0x90064,0x149}, -- {0x90065,0x0}, -- {0x90066,0x4}, -- {0x90067,0x48}, -- {0x90068,0x40}, -- {0x90069,0x630}, -- {0x9006a,0x149}, -- {0x9006b,0x10}, -- {0x9006c,0x4}, -- {0x9006d,0x18}, -- {0x9006e,0x0}, -- {0x9006f,0x4}, -- {0x90070,0x78}, -- {0x90071,0x549}, -- {0x90072,0x630}, -- {0x90073,0x159}, -- {0x90074,0xd49}, -- {0x90075,0x630}, -- {0x90076,0x159}, -- {0x90077,0x94a}, -- {0x90078,0x630}, -- {0x90079,0x159}, -- {0x9007a,0x441}, -- {0x9007b,0x630}, -- {0x9007c,0x149}, -- {0x9007d,0x42}, -- {0x9007e,0x630}, -- {0x9007f,0x149}, -- {0x90080,0x1}, -- {0x90081,0x630}, -- {0x90082,0x149}, -- {0x90083,0x0}, -- {0x90084,0xe0}, -- {0x90085,0x109}, -- {0x90086,0xa}, -- {0x90087,0x10}, -- {0x90088,0x109}, -- {0x90089,0x9}, -- {0x9008a,0x3c0}, -- {0x9008b,0x149}, -- {0x9008c,0x9}, -- {0x9008d,0x3c0}, -- {0x9008e,0x159}, -- {0x9008f,0x18}, -- {0x90090,0x10}, -- {0x90091,0x109}, -- {0x90092,0x0}, -- {0x90093,0x3c0}, -- {0x90094,0x109}, -- {0x90095,0x18}, -- {0x90096,0x4}, -- {0x90097,0x48}, -- {0x90098,0x18}, -- {0x90099,0x4}, -- {0x9009a,0x58}, -- {0x9009b,0xa}, -- {0x9009c,0x10}, -- {0x9009d,0x109}, -- {0x9009e,0x2}, -- {0x9009f,0x10}, -- {0x900a0,0x109}, -- {0x900a1,0x5}, -- {0x900a2,0x7c0}, -- {0x900a3,0x109}, -- {0x900a4,0x10}, -- {0x900a5,0x10}, -- {0x900a6,0x109}, -- {0x40000,0x811}, -- {0x40020,0x880}, -- {0x40040,0x0}, -- {0x40060,0x0}, -- {0x40001,0x4008}, -- {0x40021,0x83}, -- {0x40041,0x4f}, -- {0x40061,0x0}, -- {0x40002,0x4040}, -- {0x40022,0x83}, -- {0x40042,0x51}, -- {0x40062,0x0}, -- {0x40003,0x811}, -- {0x40023,0x880}, -- {0x40043,0x0}, -- {0x40063,0x0}, -- {0x40004,0x720}, -- {0x40024,0xf}, -- {0x40044,0x1740}, -- {0x40064,0x0}, -- {0x40005,0x16}, -- {0x40025,0x83}, -- {0x40045,0x4b}, -- {0x40065,0x0}, -- {0x40006,0x716}, -- {0x40026,0xf}, -- {0x40046,0x2001}, -- {0x40066,0x0}, -- {0x40007,0x716}, -- {0x40027,0xf}, -- {0x40047,0x2800}, -- {0x40067,0x0}, -- {0x40008,0x716}, -- {0x40028,0xf}, -- {0x40048,0xf00}, -- {0x40068,0x0}, -- {0x40009,0x720}, -- {0x40029,0xf}, -- {0x40049,0x1400}, -- {0x40069,0x0}, -- {0x4000a,0xe08}, -- {0x4002a,0xc15}, -- {0x4004a,0x0}, -- {0x4006a,0x0}, -- {0x4000b,0x623}, -- {0x4002b,0x15}, -- {0x4004b,0x0}, -- {0x4006b,0x0}, -- {0x4000c,0x4028}, -- {0x4002c,0x80}, -- {0x4004c,0x0}, -- {0x4006c,0x0}, -- {0x4000d,0xe08}, -- {0x4002d,0xc1a}, -- {0x4004d,0x0}, -- {0x4006d,0x0}, -- {0x4000e,0x623}, -- {0x4002e,0x1a}, -- {0x4004e,0x0}, -- {0x4006e,0x0}, -- {0x4000f,0x4040}, -- {0x4002f,0x80}, -- {0x4004f,0x0}, -- {0x4006f,0x0}, -- {0x40010,0x2604}, -- {0x40030,0x15}, -- {0x40050,0x0}, -- {0x40070,0x0}, -- {0x40011,0x708}, -- {0x40031,0x5}, -- {0x40051,0x0}, -- {0x40071,0x2002}, -- {0x40012,0x8}, -- {0x40032,0x80}, -- {0x40052,0x0}, -- {0x40072,0x0}, -- {0x40013,0x2604}, -- {0x40033,0x1a}, -- {0x40053,0x0}, -- {0x40073,0x0}, -- {0x40014,0x708}, -- {0x40034,0xa}, -- {0x40054,0x0}, -- {0x40074,0x2002}, -- {0x40015,0x4040}, -- {0x40035,0x80}, -- {0x40055,0x0}, -- {0x40075,0x0}, -- {0x40016,0x60a}, -- {0x40036,0x15}, -- {0x40056,0x1200}, -- {0x40076,0x0}, -- {0x40017,0x61a}, -- {0x40037,0x15}, -- {0x40057,0x1300}, -- {0x40077,0x0}, -- {0x40018,0x60a}, -- {0x40038,0x1a}, -- {0x40058,0x1200}, -- {0x40078,0x0}, -- {0x40019,0x642}, -- {0x40039,0x1a}, -- {0x40059,0x1300}, -- {0x40079,0x0}, -- {0x4001a,0x4808}, -- {0x4003a,0x880}, -- {0x4005a,0x0}, -- {0x4007a,0x0}, -- {0x900a7,0x0}, -- {0x900a8,0x790}, -- {0x900a9,0x11a}, -- {0x900aa,0x8}, -- {0x900ab,0x7aa}, -- {0x900ac,0x2a}, -- {0x900ad,0x10}, -- {0x900ae,0x7b2}, -- {0x900af,0x2a}, -- {0x900b0,0x0}, -- {0x900b1,0x7c8}, -- {0x900b2,0x109}, -- {0x900b3,0x10}, -- {0x900b4,0x2a8}, -- {0x900b5,0x129}, -- {0x900b6,0x8}, -- {0x900b7,0x370}, -- {0x900b8,0x129}, -- {0x900b9,0xa}, -- {0x900ba,0x3c8}, -- {0x900bb,0x1a9}, -- {0x900bc,0xc}, -- {0x900bd,0x408}, -- {0x900be,0x199}, -- {0x900bf,0x14}, -- {0x900c0,0x790}, -- {0x900c1,0x11a}, -- {0x900c2,0x8}, -- {0x900c3,0x4}, -- {0x900c4,0x18}, -- {0x900c5,0xe}, -- {0x900c6,0x408}, -- {0x900c7,0x199}, -- {0x900c8,0x8}, -- {0x900c9,0x8568}, -- {0x900ca,0x108}, -- {0x900cb,0x18}, -- {0x900cc,0x790}, -- {0x900cd,0x16a}, -- {0x900ce,0x8}, -- {0x900cf,0x1d8}, -- {0x900d0,0x169}, -- {0x900d1,0x10}, -- {0x900d2,0x8558}, -- {0x900d3,0x168}, -- {0x900d4,0x70}, -- {0x900d5,0x788}, -- {0x900d6,0x16a}, -- {0x900d7,0x1ff8}, -- {0x900d8,0x85a8}, -- {0x900d9,0x1e8}, -- {0x900da,0x50}, -- {0x900db,0x798}, -- {0x900dc,0x16a}, -- {0x900dd,0x60}, -- {0x900de,0x7a0}, -- {0x900df,0x16a}, -- {0x900e0,0x8}, -- {0x900e1,0x8310}, -- {0x900e2,0x168}, -- {0x900e3,0x8}, -- {0x900e4,0xa310}, -- {0x900e5,0x168}, -- {0x900e6,0xa}, -- {0x900e7,0x408}, -- {0x900e8,0x169}, -- {0x900e9,0x6e}, -- {0x900ea,0x0}, -- {0x900eb,0x68}, -- {0x900ec,0x0}, -- {0x900ed,0x408}, -- {0x900ee,0x169}, -- {0x900ef,0x0}, -- {0x900f0,0x8310}, -- {0x900f1,0x168}, -- {0x900f2,0x0}, -- {0x900f3,0xa310}, -- {0x900f4,0x168}, -- {0x900f5,0x1ff8}, -- {0x900f6,0x85a8}, -- {0x900f7,0x1e8}, -- {0x900f8,0x68}, -- {0x900f9,0x798}, -- {0x900fa,0x16a}, -- {0x900fb,0x78}, -- {0x900fc,0x7a0}, -- {0x900fd,0x16a}, -- {0x900fe,0x68}, -- {0x900ff,0x790}, -- {0x90100,0x16a}, -- {0x90101,0x8}, -- {0x90102,0x8b10}, -- {0x90103,0x168}, -- {0x90104,0x8}, -- {0x90105,0xab10}, -- {0x90106,0x168}, -- {0x90107,0xa}, -- {0x90108,0x408}, -- {0x90109,0x169}, -- {0x9010a,0x58}, -- {0x9010b,0x0}, -- {0x9010c,0x68}, -- {0x9010d,0x0}, -- {0x9010e,0x408}, -- {0x9010f,0x169}, -- {0x90110,0x0}, -- {0x90111,0x8b10}, -- {0x90112,0x168}, -- {0x90113,0x0}, -- {0x90114,0xab10}, -- {0x90115,0x168}, -- {0x90116,0x0}, -- {0x90117,0x1d8}, -- {0x90118,0x169}, -- {0x90119,0x80}, -- {0x9011a,0x790}, -- {0x9011b,0x16a}, -- {0x9011c,0x18}, -- {0x9011d,0x7aa}, -- {0x9011e,0x6a}, -- {0x9011f,0xa}, -- {0x90120,0x0}, -- {0x90121,0x1e9}, -- {0x90122,0x8}, -- {0x90123,0x8080}, -- {0x90124,0x108}, -- {0x90125,0xf}, -- {0x90126,0x408}, -- {0x90127,0x169}, -- {0x90128,0xc}, -- {0x90129,0x0}, -- {0x9012a,0x68}, -- {0x9012b,0x9}, -- {0x9012c,0x0}, -- {0x9012d,0x1a9}, -- {0x9012e,0x0}, -- {0x9012f,0x408}, -- {0x90130,0x169}, -- {0x90131,0x0}, -- {0x90132,0x8080}, -- {0x90133,0x108}, -- {0x90134,0x8}, -- {0x90135,0x7aa}, -- {0x90136,0x6a}, -- {0x90137,0x0}, -- {0x90138,0x8568}, -- {0x90139,0x108}, -- {0x9013a,0xb7}, -- {0x9013b,0x790}, -- {0x9013c,0x16a}, -- {0x9013d,0x1f}, -- {0x9013e,0x0}, -- {0x9013f,0x68}, -- {0x90140,0x8}, -- {0x90141,0x8558}, -- {0x90142,0x168}, -- {0x90143,0xf}, -- {0x90144,0x408}, -- {0x90145,0x169}, -- {0x90146,0xc}, -- {0x90147,0x0}, -- {0x90148,0x68}, -- {0x90149,0x0}, -- {0x9014a,0x408}, -- {0x9014b,0x169}, -- {0x9014c,0x0}, -- {0x9014d,0x8558}, -- {0x9014e,0x168}, -- {0x9014f,0x8}, -- {0x90150,0x3c8}, -- {0x90151,0x1a9}, -- {0x90152,0x3}, -- {0x90153,0x370}, -- {0x90154,0x129}, -- {0x90155,0x20}, -- {0x90156,0x2aa}, -- {0x90157,0x9}, -- {0x90158,0x0}, -- {0x90159,0x400}, -- {0x9015a,0x10e}, -- {0x9015b,0x8}, -- {0x9015c,0xe8}, -- {0x9015d,0x109}, -- {0x9015e,0x0}, -- {0x9015f,0x8140}, -- {0x90160,0x10c}, -- {0x90161,0x10}, -- {0x90162,0x8138}, -- {0x90163,0x10c}, -- {0x90164,0x8}, -- {0x90165,0x7c8}, -- {0x90166,0x101}, -- {0x90167,0x8}, -- {0x90168,0x0}, -- {0x90169,0x8}, -- {0x9016a,0x8}, -- {0x9016b,0x448}, -- {0x9016c,0x109}, -- {0x9016d,0xf}, -- {0x9016e,0x7c0}, -- {0x9016f,0x109}, -- {0x90170,0x0}, -- {0x90171,0xe8}, -- {0x90172,0x109}, -- {0x90173,0x47}, -- {0x90174,0x630}, -- {0x90175,0x109}, -- {0x90176,0x8}, -- {0x90177,0x618}, -- {0x90178,0x109}, -- {0x90179,0x8}, -- {0x9017a,0xe0}, -- {0x9017b,0x109}, -- {0x9017c,0x0}, -- {0x9017d,0x7c8}, -- {0x9017e,0x109}, -- {0x9017f,0x8}, -- {0x90180,0x8140}, -- {0x90181,0x10c}, -- {0x90182,0x0}, -- {0x90183,0x1}, -- {0x90184,0x8}, -- {0x90185,0x8}, -- {0x90186,0x4}, -- {0x90187,0x8}, -- {0x90188,0x8}, -- {0x90189,0x7c8}, -- {0x9018a,0x101}, -- {0x90006,0x0}, -- {0x90007,0x0}, -- {0x90008,0x8}, -- {0x90009,0x0}, -- {0x9000a,0x0}, -- {0x9000b,0x0}, -- {0xd00e7,0x400}, -- {0x90017,0x0}, -- {0x9001f,0x2a}, -- {0x90026,0x6a}, -- {0x400d0,0x0}, -- {0x400d1,0x101}, -- {0x400d2,0x105}, -- {0x400d3,0x107}, -- {0x400d4,0x10f}, -- {0x400d5,0x202}, -- {0x400d6,0x20a}, -- {0x400d7,0x20b}, -- {0x2003a,0x2}, -- {0x2000b,0x5d}, -- {0x2000c,0xbb}, -- {0x2000d,0x753}, -- {0x2000e,0x2c}, -- {0x12000b,0xc}, -- {0x12000c,0x19}, -- {0x12000d,0xfa}, -- {0x12000e,0x10}, -- {0x22000b,0x3}, -- {0x22000c,0x6}, -- {0x22000d,0x3e}, -- {0x22000e,0x10}, -- {0x9000c,0x0}, -- {0x9000d,0x173}, -- {0x9000e,0x60}, -- {0x9000f,0x6110}, -- {0x90010,0x2152}, -- {0x90011,0xdfbd}, -- {0x90012,0x60}, -- {0x90013,0x6152}, -- {0x20010,0x5a}, -- {0x20011,0x3}, -- {0x120010,0x5a}, -- {0x120011,0x3}, -- {0x220010,0x5a}, -- {0x220011,0x3}, -- {0x40080,0xe0}, -- {0x40081,0x12}, -- {0x40082,0xe0}, -- {0x40083,0x12}, -- {0x40084,0xe0}, -- {0x40085,0x12}, -- {0x140080,0xe0}, -- {0x140081,0x12}, -- {0x140082,0xe0}, -- {0x140083,0x12}, -- {0x140084,0xe0}, -- {0x140085,0x12}, -- {0x240080,0xe0}, -- {0x240081,0x12}, -- {0x240082,0xe0}, -- {0x240083,0x12}, -- {0x240084,0xe0}, -- {0x240085,0x12}, -- {0x400fd,0xf}, -- {0x10011,0x1}, -- {0x10012,0x1}, -- {0x10013,0x180}, -- {0x10018,0x1}, -- {0x10002,0x6209}, -- {0x100b2,0x1}, -- {0x101b4,0x1}, -- {0x102b4,0x1}, -- {0x103b4,0x1}, -- {0x104b4,0x1}, -- {0x105b4,0x1}, -- {0x106b4,0x1}, -- {0x107b4,0x1}, -- {0x108b4,0x1}, -- {0x11011,0x1}, -- {0x11012,0x1}, -- {0x11013,0x180}, -- {0x11018,0x1}, -- {0x11002,0x6209}, -- {0x110b2,0x1}, -- {0x111b4,0x1}, -- {0x112b4,0x1}, -- {0x113b4,0x1}, -- {0x114b4,0x1}, -- {0x115b4,0x1}, -- {0x116b4,0x1}, -- {0x117b4,0x1}, -- {0x118b4,0x1}, -- {0x12011,0x1}, -- {0x12012,0x1}, -- {0x12013,0x180}, -- {0x12018,0x1}, -- {0x12002,0x6209}, -- {0x120b2,0x1}, -- {0x121b4,0x1}, -- {0x122b4,0x1}, -- {0x123b4,0x1}, -- {0x124b4,0x1}, -- {0x125b4,0x1}, -- {0x126b4,0x1}, -- {0x127b4,0x1}, -- {0x128b4,0x1}, -- {0x13011,0x1}, -- {0x13012,0x1}, -- {0x13013,0x180}, -- {0x13018,0x1}, -- {0x13002,0x6209}, -- {0x130b2,0x1}, -- {0x131b4,0x1}, -- {0x132b4,0x1}, -- {0x133b4,0x1}, -- {0x134b4,0x1}, -- {0x135b4,0x1}, -- {0x136b4,0x1}, -- {0x137b4,0x1}, -- {0x138b4,0x1}, -- {0x2003a,0x2}, -- {0xc0080,0x2}, -- {0xd0000, 0x1} --}; -- --static struct dram_fsp_msg ddr_dram_fsp_msg[] = { -- { -- /* P0 3000mts 1D */ -- .drate = 3000, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp0_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), -- }, -- { -- /* P1 400mts 1D */ -- .drate = 400, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp1_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), -- }, -- { -- /* P2 100mts 1D */ -- .drate = 100, -- .fw_type = FW_1D_IMAGE, -- .fsp_cfg = ddr_fsp2_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), -- }, -- { -- /* P0 3000mts 2D */ -- .drate = 3000, -- .fw_type = FW_2D_IMAGE, -- .fsp_cfg = ddr_fsp0_2d_cfg, -- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), -- }, --}; -- --/* ddr timing config params */ --struct dram_timing_info ucm_dram_timing_ff000110 = { -- .ddrc_cfg = ddr_ddrc_cfg, -- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), -- .ddrphy_cfg = ddr_ddrphy_cfg, -- .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), -- .fsp_msg = ddr_dram_fsp_msg, -- .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), -- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, -- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), -- .ddrphy_pie = ddr_phy_pie, -- .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), -- .fsp_table = { 3000, 400, 100, }, --}; --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0100-spl-Add-SDP-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0100-spl-Add-SDP-support.patch deleted file mode 100644 index b0ba6ab..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0100-spl-Add-SDP-support.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 49f257680b38cffdb2cb7cb99ace271328d4e366 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Sun, 17 Oct 2021 21:23:39 +0300 -Subject: [PATCH 100/100] spl: Add SDP support - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/spl/spl.c | 16 ++++++++++++++++ - configs/cl-imx8m-mini_defconfig | 11 +++++++++-- - include/configs/cpl-imx8m-mini.h | 4 ++-- - 3 files changed, 27 insertions(+), 4 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c -index 7786f6616a..04a31da5e7 100644 ---- a/board/compulab/plat/imx8mm/spl/spl.c -+++ b/board/compulab/plat/imx8mm/spl/spl.c -@@ -20,10 +20,23 @@ - #include - #include - #include -+#include - #include "ddr/ddr.h" - - DECLARE_GLOBAL_DATA_PTR; - -+static int _board_phy_mode=USB_INIT_HOST; -+ -+int board_usb_phy_mode(int port) -+{ -+ return _board_phy_mode; -+} -+ -+static void board_soft_otg(void) -+{ -+ _board_phy_mode=USB_INIT_DEVICE; -+} -+ - int spl_board_boot_device(enum boot_device boot_dev_spl) - { - switch (boot_dev_spl) { -@@ -33,6 +46,9 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) - case SD3_BOOT: - case MMC3_BOOT: - return BOOT_DEVICE_MMC2; -+ case USB_BOOT: -+ board_soft_otg(); -+ return BOOT_DEVICE_BOARD; - default: - return BOOT_DEVICE_NONE; - } -diff --git a/configs/cl-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig -index b54110b42f..88c1a8e1bc 100644 ---- a/configs/cl-imx8m-mini_defconfig -+++ b/configs/cl-imx8m-mini_defconfig -@@ -25,6 +25,9 @@ CONFIG_BOARD_EARLY_INIT_F=y - CONFIG_SPL_BOARD_INIT=y - CONFIG_SPL_SEPARATE_BSS=y - CONFIG_SPL_POWER_SUPPORT=y -+CONFIG_SPL_USB_HOST_SUPPORT=y -+CONFIG_SPL_USB_GADGET=y -+CONFIG_SPL_USB_SDP_SUPPORT=y - CONFIG_HUSH_PARSER=y - CONFIG_SYS_PROMPT="u-boot=> " - # CONFIG_BOOTM_NETBSD is not set -@@ -46,7 +49,6 @@ CONFIG_CMD_EXT2=y - CONFIG_CMD_EXT4=y - CONFIG_CMD_FAT=y - CONFIG_CMD_FS_GENERIC=y --CONFIG_EFI_PARTITION=y - CONFIG_OF_CONTROL=y - CONFIG_ENV_IS_IN_MMC=y - CONFIG_SYS_RELOC_GD_ENV_ADDR=y -@@ -55,6 +57,10 @@ CONFIG_REGMAP=y - CONFIG_SYSCON=y - CONFIG_CLK_COMPOSITE_CCF=y - CONFIG_CLK_IMX8MM=y -+CONFIG_USB_FUNCTION_FASTBOOT=y -+CONFIG_FASTBOOT_BUF_ADDR=0x42800000 -+CONFIG_FASTBOOT_BUF_SIZE=0x40000000 -+CONFIG_FASTBOOT_FLASH=y - CONFIG_MXC_GPIO=y - CONFIG_DM_PCA953X=y - CONFIG_DM_I2C=y -@@ -86,7 +92,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 - CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 - CONFIG_CI_UDC=y - CONFIG_SDP_LOADADDR=0x40400000 --CONFIG_USB_GADGET_DOWNLOAD=y -+# CONFIG_DM_USB_GADGET is not set -+CONFIG_USB_FUNCTION_SDP=y - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX88179=y - CONFIG_DM_VIDEO=y -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -index a65d86e253..9ef84842d0 100644 ---- a/include/configs/cpl-imx8m-mini.h -+++ b/include/configs/cpl-imx8m-mini.h -@@ -94,8 +94,8 @@ - "\0" \ - "initrd_addr=0x43800000\0" \ - "initrd_high=0xffffffff\0" \ -- "emmc_dev=1\0" \ -- "sd_dev=0\0" \ -+ "emmc_dev=2\0" \ -+ "sd_dev=1\0" \ - "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ - "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ - "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch deleted file mode 100644 index 1663d96..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 1402a42529e24b7f8a2524fe2b2db22ed2ba784f Mon Sep 17 00:00:00 2001 -From: Valentin Raevsky -Date: Mon, 20 Dec 2021 18:46:24 +0200 -Subject: [PATCH 101/126] compulab: imx8mm: Add binman support - -Signed-off-by: Valentin Raevsky ---- - arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi | 147 +++++++++++++++++++++ - arch/arm/dts/cpl-imx8m-mini.dtsi | 1 + - arch/arm/mach-imx/Makefile | 13 +- - arch/arm/mach-imx/imx8m/Kconfig | 3 + - board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg | 9 ++ - configs/cl-imx8m-mini_defconfig | 4 +- - 6 files changed, 169 insertions(+), 8 deletions(-) - create mode 100644 arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi - create mode 100644 board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg - -diff --git a/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi b/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi -new file mode 100644 -index 0000000000..63bb7a7d72 ---- /dev/null -+++ b/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi -@@ -0,0 +1,147 @@ -+/* -+ * Copyright 2021 CompuLab -+ */ -+ -+/ { -+ binman: binman { -+ multiple-images; -+ }; -+ -+ firmware { -+ optee { -+ compatible = "linaro,optee-tz"; -+ method = "smc"; -+ }; -+ }; -+}; -+ -+&binman { -+ u-boot-spl-ddr { -+ filename = "u-boot-spl-ddr.bin"; -+ pad-byte = <0xff>; -+ align-size = <4>; -+ align = <4>; -+ -+ u-boot-spl { -+ align-end = <4>; -+ }; -+ -+ blob_1: blob-ext@1 { -+ filename = "lpddr4_pmu_train_1d_imem.bin"; -+ size = <0x8000>; -+ }; -+ -+ blob_2: blob-ext@2 { -+ filename = "lpddr4_pmu_train_1d_dmem.bin"; -+ size = <0x4000>; -+ }; -+ -+ blob_3: blob-ext@3 { -+ filename = "lpddr4_pmu_train_2d_imem.bin"; -+ size = <0x8000>; -+ }; -+ -+ blob_4: blob-ext@4 { -+ filename = "lpddr4_pmu_train_2d_dmem.bin"; -+ size = <0x4000>; -+ }; -+ }; -+ -+ flash { -+ filename = "spl.bin"; -+ -+ mkimage { -+ args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; -+ -+ blob { -+ filename = "u-boot-spl-ddr.bin"; -+ }; -+ }; -+ }; -+ -+ itb { -+ filename = "u-boot.itb"; -+ -+ fit { -+ description = "Configuration to load ATF before U-Boot"; -+ #address-cells = <1>; -+ fit,external-offset = ; -+ -+ images { -+ uboot { -+ description = "U-Boot (64-bit)"; -+ type = "standalone"; -+ arch = "arm64"; -+ compression = "none"; -+ load = ; -+ -+ uboot_blob: blob-ext { -+ filename = "u-boot-nodtb.bin"; -+ }; -+ }; -+ -+ atf { -+ description = "ARM Trusted Firmware"; -+ type = "firmware"; -+ arch = "arm64"; -+ compression = "none"; -+ load = <0x920000>; -+ entry = <0x920000>; -+ -+ atf_blob: blob-ext { -+ filename = "bl31.bin"; -+ }; -+ }; -+ -+ tee { -+ description = "TEE firmware"; -+ type = "firmware"; -+ arch = "arm64"; -+ compression = "none"; -+ load = <0x56000000>; -+ entry = <0x56000000>; -+ -+ tee_blob: blob-ext { -+ filename = "tee.bin"; -+ }; -+ }; -+ -+ fdt { -+ description = "NAME"; -+ type = "flat_dt"; -+ compression = "none"; -+ -+ uboot_fdt_blob: blob-ext { -+ filename = "u-boot.dtb"; -+ }; -+ }; -+ }; -+ -+ configurations { -+ default = "conf"; -+ -+ conf { -+ description = "NAME"; -+ firmware = "uboot"; -+ loadables = "atf", "tee"; -+ fdt = "fdt"; -+ }; -+ }; -+ }; -+ }; -+ -+ imx-boot { -+ filename = "flash.bin"; -+ pad-byte = <0x00>; -+ -+ spl: blob-ext@1 { -+ filename = "spl.bin"; -+ offset = <0x0>; -+ }; -+ -+ uboot: blob-ext@2 { -+ filename = "u-boot.itb"; -+ offset = <0x57c00>; -+ }; -+ }; -+}; -diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi -index 98cdae0d22..921b657f95 100644 ---- a/arch/arm/dts/cpl-imx8m-mini.dtsi -+++ b/arch/arm/dts/cpl-imx8m-mini.dtsi -@@ -14,6 +14,7 @@ - - #include - #include "imx8mm.dtsi" -+#include "cpl-imx8m-mini-u-boot.dtsi" - - / { - chosen { -diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile -index 6ba353360b..a068b5aedf 100644 ---- a/arch/arm/mach-imx/Makefile -+++ b/arch/arm/mach-imx/Makefile -@@ -131,8 +131,7 @@ endif - DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi) - else ifeq ($(CONFIG_ARCH_IMX8M), y) - IMAGE_TYPE := imx8mimage --IMX8M_DEPFILES := $(srctree)/tools/imx8m_image.sh --DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG);if [ -f spl/u-boot-spl.cfgout ]; then $(IMX8M_DEPFILES) spl/u-boot-spl.cfgout 0; echo $$?; fi) -+DEPFILE_EXISTS := 0 - else - IMAGE_TYPE := imximage - DEPFILE_EXISTS := 0 -@@ -207,16 +206,18 @@ endif - - ifdef CONFIG_ARM64 - ifeq ($(CONFIG_ARCH_IMX8M), y) --SPL: -+ -+SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE - - MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout \ - -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE) - flash.bin: MKIMAGEOUTPUT = flash.log - -+spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE -+ $(Q)mkdir -p $(dir $@) -+ $(call if_changed_dep,cpp_cfg) -+ - spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE --ifeq ($(DEPFILE_EXISTS),0) -- $(IMX8M_DEPFILES) spl/u-boot-spl.cfgout 1 --endif - - flash.bin: spl/u-boot-spl-ddr.bin u-boot.itb FORCE - $(call if_changed,mkimage) -diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig -index eac80a9989..08f5c5f039 100644 ---- a/arch/arm/mach-imx/imx8m/Kconfig -+++ b/arch/arm/mach-imx/imx8m/Kconfig -@@ -263,18 +263,21 @@ config TARGET_PHYCORE_IMX8MP - config TARGET_UCM_IMX8M_MINI - bool "CompuLab ucm-imx8m-mini" - select IMX8MM -+ select BINMAN - select SUPPORT_SPL - select IMX8M_LPDDR4 - - config TARGET_MCM_IMX8M_MINI - bool "CompuLab mcm-imx8m-mini" - select IMX8MM -+ select BINMAN - select SUPPORT_SPL - select IMX8M_LPDDR4 - - config TARGET_IOT_GATE_IMX8 - bool "CompuLab iot-gate-imx8" - select IMX8MM -+ select BINMAN - select SUPPORT_SPL - select IMX8M_LPDDR4 - -diff --git a/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg b/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg -new file mode 100644 -index 0000000000..b89092a559 ---- /dev/null -+++ b/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg -@@ -0,0 +1,9 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright 2021 NXP -+ */ -+ -+#define __ASSEMBLY__ -+ -+BOOT_FROM sd -+LOADER mkimage.flash.mkimage 0x7E1000 -diff --git a/configs/cl-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig -index 88c1a8e1bc..465522740b 100644 ---- a/configs/cl-imx8m-mini_defconfig -+++ b/configs/cl-imx8m-mini_defconfig -@@ -15,9 +15,9 @@ CONFIG_SPL_TEXT_BASE=0x7E1000 - CONFIG_FIT=y - CONFIG_FIT_EXTERNAL_OFFSET=0x3000 - CONFIG_SPL_LOAD_FIT=y --CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" -+# CONFIG_USE_SPL_FIT_GENERATOR is not set - CONFIG_OF_SYSTEM_SETUP=y --CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" -+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg" - CONFIG_CONSOLE_MUX=y - CONFIG_BOARD_LATE_INIT=y - CONFIG_ARCH_MISC_INIT=y --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0101-spl-Enable-Samsung-4G-DRAM-0x01061010.patch b/recipes-bsp/u-boot/compulab/imx8mm/0101-spl-Enable-Samsung-4G-DRAM-0x01061010.patch deleted file mode 100644 index c2ec204..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0101-spl-Enable-Samsung-4G-DRAM-0x01061010.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 7f12a188f4808bd304cf38709051f1117edb53da Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Mon, 1 Nov 2021 22:06:18 +0200 -Subject: [PATCH 101/101] spl: Enable Samsung 4G DRAM 0x01061010 - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/ddr/ddr.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index a53fb30b41..5411819154 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -76,7 +76,8 @@ static const struct lpddr4_desc lpddr4_array[] = { - #else - { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_05000010}, - #endif -- { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, -+ { .name = "Samsung", .id = 0x01061010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, -+ { .name = "Samsung", .id = 0x01061010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0102-Enable-DDR-Alliance-1G-0x01050008.patch b/recipes-bsp/u-boot/compulab/imx8mm/0102-Enable-DDR-Alliance-1G-0x01050008.patch deleted file mode 100644 index 0099a60..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0102-Enable-DDR-Alliance-1G-0x01050008.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 6f78aa20d88c0b3d34307806398b7ecebde3dbf1 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 3 Nov 2021 23:49:18 +0200 -Subject: [PATCH 102/102] Enable DDR Alliance 1G 0x01050008 - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/ddr/ddr.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 2b2ecb85df..46ff15bf3e 100644 ---- a/board/compulab/plat/imx8mm/ddr/ddr.c -+++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -80,6 +80,7 @@ static const struct lpddr4_desc lpddr4_array[] = { - { .name = "Samsung", .id = 0x01061010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, -+ { .name = "Alliance", .id = 0x52000008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, - { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, - { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, --- -2.17.1 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0103-make-Add-wrapper-for-compound-config.patch b/recipes-bsp/u-boot/compulab/imx8mm/0103-make-Add-wrapper-for-compound-config.patch deleted file mode 100644 index a51902d..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0103-make-Add-wrapper-for-compound-config.patch +++ /dev/null @@ -1,26 +0,0 @@ -From cbfd55c8467cbd289b510eae889f89757d4229f0 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Wed, 22 Dec 2021 16:58:13 +0200 -Subject: [PATCH 103/103] make: Add wrapper for compound config - -Signed-off-by: Kirill Kapranov ---- - defconfig.mk | 6 ++++++ - 1 file changed, 6 insertions(+) - create mode 100644 defconfig.mk - -diff --git a/defconfig.mk b/defconfig.mk -new file mode 100644 -index 0000000000..e164ba2655 ---- /dev/null -+++ b/defconfig.mk -@@ -0,0 +1,6 @@ -+.DEFAULT: compound_defconfig -+compound_defconfig: -+ scripts/kconfig/merge_config.sh -O configs/ -m configs/cl-imx8m-mini_defconfig configs/${MACHINE}.config -+ mv configs/.config configs/${MACHINE}_defconfig -+ $(MAKE) -f Makefile ${MACHINE}_defconfig -+ --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0104-net-Enable-phy-Realtek-RTL8211E.patch b/recipes-bsp/u-boot/compulab/imx8mm/0104-net-Enable-phy-Realtek-RTL8211E.patch deleted file mode 100644 index 860e598..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0104-net-Enable-phy-Realtek-RTL8211E.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 3571fbae5cba75df92f1ec2c1f1011949ca82ab7 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Tue, 1 Feb 2022 23:25:01 +0200 -Subject: [PATCH 104/105] net: Enable phy Realtek RTL8211E - -Developed the infrastructure for further enablement of an ethernet phy. Phy's -ID is read directly from the phy to distinguish vendor/model and apply an -appropriate tuning. - -TBD: support of multiple phys on single bus shall be added. - -Signed-off-by: Kirill Kapranov ---- - board/compulab/plat/imx8mm/board/board.c | 105 ++++++++++++++++++++++++++++--- - include/configs/cpl-imx8m-mini.h | 2 +- - 2 files changed, 97 insertions(+), 10 deletions(-) - -diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c -index 3ce1659c61..e6b41ea5e5 100644 ---- a/board/compulab/plat/imx8mm/board/board.c -+++ b/board/compulab/plat/imx8mm/board/board.c -@@ -3,7 +3,6 @@ - * - * SPDX-License-Identifier: GPL-2.0+ - */ -- - #include - #include - #include -@@ -34,11 +33,14 @@ - #include "ddr/ddr.h" - #include "common/eeprom.h" - #include "common/rtc.h" -+#include -+#include - - DECLARE_GLOBAL_DATA_PTR; - - static int env_dev = -1; - static int env_part= -1; -+static int fec_phyaddr = -1; - - #ifdef CONFIG_BOARD_POSTCLK_INIT - int board_postclk_init(void) -@@ -151,10 +153,23 @@ static int fdt_set_env_addr(void *blob) - return 0; - } - -+#define FDT_PHYADDR "/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0" -+#define FLIP_32B(val) (((val>>24)&0xff) | ((val<<8)&0xff0000) | ((val>>8)&0xff00) | ((val<<24)&0xff000000)) -+static int fdt_set_fec_phy_addr(void *blob) -+{ -+ if(0 > fec_phyaddr) -+ return -EINVAL; -+ -+ u32 val = FLIP_32B(fec_phyaddr); -+ return fdt_find_and_setprop -+ (blob, FDT_PHYADDR, "reg", (const void*)&val, sizeof(val), 0); -+} -+ - int ft_board_setup(void *blob, struct bd_info *bd) - { - fdt_set_env_addr(blob); - fdt_set_sn(blob); -+ fdt_set_fec_phy_addr(blob); - return 0; - } - #endif -@@ -218,16 +233,88 @@ static int setup_fec(void) - return set_clk_enet(ENET_125MHZ); - } - -+/* These are specifc ID, purposed to distiguish between PHY vendors. -+These values are not equal to real vendors' OUI (half of MAC address) */ -+#define OUI_PHY_ATHEROS 0x1374 -+#define OUI_PHY_REALTEK 0x0732 -+ - int board_phy_config(struct phy_device *phydev) - { -- /* enable rgmii rxc skew and phy mode select to RGMII copper */ -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -- -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -+ int phyid1, phyid2; -+ unsigned int model, rev, oui; -+ unsigned int reg; -+ -+ phyid1 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID1); -+ if(0 > phyid1) { -+ printf("%s: PHYID1 registry read fail %i\n", __func__, phyid1); -+ return phyid1; -+ } -+ -+ phyid2 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID2); -+ if(0 > phyid2) { -+ printf("%s: PHYID2 registry read fail %i\n", __func__, phyid2); -+ return phyid2; -+ } -+ -+ reg = phyid2 | phyid1 << 16; -+ if(0xffff == reg) { -+ printf("%s: There is no device @%i\n", __func__, phydev->addr); -+ return -ENODEV; -+ } -+ -+ rev = reg & 0xf; -+ reg >>= 4; -+ model = reg & 0x3f; -+ reg >>=6; -+ oui = reg; -+ debug("%s: PHY @0x%x OUI 0x%06x model 0x%x rev 0x%x\n", -+ __func__, phydev->addr, oui, model, rev); -+ -+ switch (oui) { -+ case OUI_PHY_ATHEROS: -+ /* enable rgmii rxc skew and phy mode select to RGMII copper */ -+ printf("phy: AR803x@%x\t", phydev->addr); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); -+ break; -+ case OUI_PHY_REALTEK: -+ printf("phy: RTL8211E@%x\t", phydev->addr); -+ /** RTL8211E-VB-CG - add TX and RX delay */ -+ unsigned short val; -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x07); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0xa4); -+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1c); -+ val |= (0x1 << 13) | (0x1 << 12) | (0x1 << 11); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1c, val); -+ /*LEDs:*/ -+ /* set to extension page */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0007); -+ /* extension Page44 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x002c); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1c, 0x0430);//LCR -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1a, 0x0010);//LACR -+ /* To disable EEE LED mode (blinking .4s/2s) */ -+ /* extension Page5 */ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0005); -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x05, 0x8b82);//magic const -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x06, 0x052b);//magic const -+ -+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x00);// Back to Page0 -+ -+ break; -+ default: -+ printf("%s: ERROR: unknown PHY @0x%x OUI 0x%06x model 0x%x rev 0x%x\n", -+ __func__, phydev->addr, oui, model, rev); -+ return -ENOSYS; -+ } -+ -+ fec_phyaddr = phydev->addr; - - if (phydev->drv->config) - phydev->drv->config(phydev); -diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h -index 9ef84842d0..4dd7142cbd 100644 ---- a/include/configs/cpl-imx8m-mini.h -+++ b/include/configs/cpl-imx8m-mini.h -@@ -74,7 +74,7 @@ - #define CONFIG_ETHPRIME "FEC" - - #define CONFIG_FEC_XCV_TYPE RGMII --#define CONFIG_FEC_MXC_PHYADDR 0 -+#define CONFIG_FEC_MXC_PHYADDR -1 //Auto search of PHY on MII - #define FEC_QUIRK_ENET_MAC - - #define CONFIG_PHY_GIGE --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0105-LOCALVERSION-2.2.1-1.1.1.patch b/recipes-bsp/u-boot/compulab/imx8mm/0105-LOCALVERSION-2.2.1-1.1.1.patch deleted file mode 100644 index 3c423eb..0000000 --- a/recipes-bsp/u-boot/compulab/imx8mm/0105-LOCALVERSION-2.2.1-1.1.1.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 9ec3f941e83d2ea0d7bca961da5320f4df16ab88 Mon Sep 17 00:00:00 2001 -From: Kirill Kapranov -Date: Fri, 4 Feb 2022 00:35:47 +0200 -Subject: [PATCH 105/105] LOCALVERSION 2.2.1/1.1.1 - -Signed-off-by: Kirill Kapranov ---- - configs/mcm-imx8m-mini.config | 2 +- - configs/ucm-imx8m-mini.config | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configs/mcm-imx8m-mini.config b/configs/mcm-imx8m-mini.config -index 472d4637e3..0aa9304b3f 100644 ---- a/configs/mcm-imx8m-mini.config -+++ b/configs/mcm-imx8m-mini.config -@@ -1,4 +1,4 @@ --CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.1" -+CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.1.1" - CONFIG_TARGET_MCM_IMX8M_MINI=y - CONFIG_DEFAULT_DTB="mcm-imx8m-mini.dtb" - CONFIG_DEFAULT_FDT_FILE="mcm-imx8m-mini.dtb" -diff --git a/configs/ucm-imx8m-mini.config b/configs/ucm-imx8m-mini.config -index 41d00fe549..d411c1cfee 100644 ---- a/configs/ucm-imx8m-mini.config -+++ b/configs/ucm-imx8m-mini.config -@@ -1,4 +1,4 @@ --CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.1" -+CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.2.1" - CONFIG_TARGET_UCM_IMX8M_MINI=y - CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" - CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" --- -2.11.0 - diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0127-eth-phy-Turn-off-clk-125M.patch b/recipes-bsp/u-boot/compulab/imx8mm/0127-eth-phy-Turn-off-clk-125M.patch new file mode 100644 index 0000000..7d6e937 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0127-eth-phy-Turn-off-clk-125M.patch @@ -0,0 +1,28 @@ +From 7822776c0a79bac27cfb1eb7cb292faa17c65539 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 14 Feb 2023 16:43:38 +0200 +Subject: [PATCH 127/127] eth:phy: Turn off clk 125M + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/board/board.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 8dd0dc28f5..d65421240c 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -301,6 +301,10 @@ int board_phy_config(struct phy_device *phydev) + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x00);// Back to Page0 + ++ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x10); ++ val |= 0x10; ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x10, val);// Turn off the PHY CLK 125 MHz ++ + break; + default: + printf("%s: ERROR: unknown PHY @0x%x OUI 0x%06x model 0x%x rev 0x%x\n", +-- +2.17.1 +