diff --git a/Documentation/imx_boot_image_build.md b/Documentation/imx_boot_image_build.md index 8bda273..5fa6310 100644 --- a/Documentation/imx_boot_image_build.md +++ b/Documentation/imx_boot_image_build.md @@ -2,129 +2,125 @@ Supported machines: -* `mcm-imxi8-mini` -* `ucm-imxi8-mini` -* `iot-gate-imx8` +* `IOT-GATE-iMX8` Define a `MACHINE` environment variable for the target product: |Machine|Command Line| |---|---| -|mcm-imx8m-mini|export MACHINE=mcm-imx8m-mini -|ucm-imx8m-mini|export MACHINE=ucm-imx8m-mini -|iot-gate-imx8|export MACHINE=iot-gate-imx8 +|ucm-imx8m-mini|export MACHINE=iot-gate-imx8 Define the following environment variables: |Description|Command Line| |---|---| -|NXP u-boot release|export NXP_UBOOT_RELEASE=lf-5.10.35-2.0.0| -|NXP ATF release|export NXP_ATF_RELEASE=lf-5.10.35-2.0.0| -|NXP mkimage release|export NXP_MKIMAGE_RELEASE=lf-5.10.35-2.0.0| -|NXP firmware name|export NXP_FIRMWARE=firmware-imx-8.12.bin| -|CompuLab branch name|export CPL_BRANCH=rel_imx_5.10.35_2.0.0-stable| - +|NXP firmware name|export NXP_FIRMWARE=firmware-imx-8.14.bin| +|CompuLab release|export CPL_RELEASE=${MACHINE}_r3.1| +|CompuLab branch name|export CPL_BRANCH=lf-5.10.72-2.2.0_${MACHINE}| +|ATF revision|export ATF=lf-5.10.72-2.2.0| +|OPTEE revision|export OPTEE=lf-5.10.72-2.2.0| +|U-Boot revision|export UBOOT=lf-5.10.72-2.2.0| ## Prerequisites It is up to developer to setup arm64 build environment: -* Download and install the [GNU tool chain](https://github.com/compulab-yokneam/meta-bsp-imx8mm/blob/rel_imx_5.10.35_2.0.0-experiment/Documentation/toolchain.md) - +* Download the [ARM tool chain](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads/9-2-2019-12) +* Set environment variables: +
+export ARCH=arm64
+export CROSS_COMPILE=/opt/gcc-arm-9.2-2019.12-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-
+
* Create a folder to organize the files:
-mkdir imx8mm
-cd imx8mm
-export SRC_ROOT=$(pwd)
+mkdir -p imx8mm/{sources,results}
+export SRC_ROOT=$(readlink -f imx8mm/sources)
+export RESULTS=$(readlink -f imx8mm/results)
+cd ${SRC_ROOT}
 
* Download CompuLab BSP
-git clone -b ${CPL_BRANCH} https://github.com/compulab-yokneam/meta-bsp-imx8mm.git
+git clone -b ${CPL_RELEASE} https://github.com/compulab-yokneam/meta-bsp-imx8mm.git
 export LAYER_DIR=$(pwd)/meta-bsp-imx8mm
 
-## Mkimage setup -* Download the mkimage: -
-git clone https://source.codeaurora.org/external/imx/imx-mkimage.git
-git -C imx-mkimage checkout ${NXP_MKIMAGE_RELEASE}
-
- -## Arm Trusted Firmware (ATF) setup -* Download the ATF: -
-git clone https://source.codeaurora.org/external/imx/imx-atf.git
-git -C imx-atf checkout ${NXP_ATF_RELEASE}
-git -C imx-atf am ${LAYER_DIR}/recipes-bsp/imx-atf/compulab/imx8mm/*.patch
-
-* Make bl31.bin -
-make -C imx-atf PLAT=imx8mm bl31
-cp -v imx-atf/build/imx8mm/release/bl31.bin ${SRC_ROOT}/imx-mkimage/iMX8M/
-
- -## Firmware iMX setup +## Build Procedure +### Firmware iMX setup * Download the firmware-imx file:
 wget http://www.freescale.com/lgfiles/NMG/MAD/YOCTO/${NXP_FIRMWARE}
 bash -x ${NXP_FIRMWARE} --auto-accept
-cp -v $(find firmware* | awk '/train|hdmi_imx8|dp_imx8/' ORS=" ") ${SRC_ROOT}/imx-mkimage/iMX8M/
+cp -v $(find firmware* | awk '/train|hdmi_imx8|dp_imx8/' ORS=" ") ${RESULTS}
 
-## U-Boot -* Download the U-Boot source and apply CompuLab BSP patches: +### Arm Trusted Firmware (ATF) setup +* Download the ATF:
-git clone https://source.codeaurora.org/external/imx/uboot-imx.git
-git -C uboot-imx checkout ${NXP_UBOOT_RELEASE}
-git -C uboot-imx am ${LAYER_DIR}/recipes-bsp/u-boot/compulab/imx8mm/*.patch
+git clone https://source.codeaurora.org/external/imx/imx-atf.git
+git -C imx-atf checkout ${ATF} -b ${CPL_BRANCH}
 
- -* Compile U-Boot: +* Apply patches if applicable:
-make -C uboot-imx -f defconfig.mk
-make -C uboot-imx
+[[ -d ${LAYER_DIR}/recipes-bsp/imx-atf/compulab/imx8mm ]] && { \
+git -C imx-atf am ${LAYER_DIR}/recipes-bsp/imx-atf/compulab/imx8mm/*.patch
+}
 
+* Make bl31.bin -* Copy files to the mkimage directory: +|Mode |Command +|---|---| +|optee build|make -j 16 -C imx-atf PLAT=imx8mm BUILD_BASE=build PLAT=imx8mm IMX_BOOT_UART_BASE=0x30880000 BL32_BASE=0x56000000 BL32_SIZE=0x2000000 SPD=opteed bl31 +|non-optee build|make -j 16 -C imx-atf PLAT=imx8mm BUILD_BASE=build PLAT=imx8mm IMX_BOOT_UART_BASE=0x30880000 BL32_BASE=0x56000000 BL32_SIZE=0x2000000 bl31 + +* Ceate a symlink in the ${RESULTS} folder:
-cp -v $(find uboot-imx | awk -v v=${MACHINE} '(/u-boot-spl.bin$|u-boot.bin$|u-boot-nodtb.bin$|tools\/mkimage$/)||($0~v".dtb$")' ORS=" ") ${SRC_ROOT}/imx-mkimage/iMX8M/
+ln -s $(readlink -f imx-atf/build/imx8mm/release/bl31.bin) ${RESULTS}/
 
- -## Compiling the **flash.bin** imx-boot image: -* Unset these variables: +### U-Boot +* Download the U-Boot source and apply CompuLab BSP patches:
-unset ARCH CROSS_COMPILE
+git clone https://source.codeaurora.org/external/imx/uboot-imx.git
+git -C uboot-imx checkout ${UBOOT} -b ${CPL_BRANCH}
+git -C uboot-imx am ${LAYER_DIR}/recipes-bsp/u-boot/compulab/imx8mm/*.patch
 
-* Issue: +* Restore `ARCH` environment variables:
-cd ${SRC_ROOT}/imx-mkimage/iMX8M
-sed "s/\(^dtbs = \).*/\1${MACHINE}.dtb/;s/\(mkimage\)_uboot/\1/" soc.mak > Makefile
-make clean
-make flash_evk SOC=iMX8MM
+export ARCH=arm64
+
+* Compile U-Boot flash.bin: +
+make -j 16 -C uboot-imx O=${RESULTS} -f defconfig.mk
+make -j 16 -C uboot-imx O=${RESULTS}
 
## Flashing -`dd if=flash.bin of=/dev/ bs=1K seek=33 status=progress` +
+dd if=${RESULTS}/flash.bin of=/dev/ bs=1K seek=33 status=progress
+
diff --git a/Documentation/imx_boot_image_hab_build.md b/Documentation/imx_boot_image_hab_build.md new file mode 100644 index 0000000..cdf5ede --- /dev/null +++ b/Documentation/imx_boot_image_hab_build.md @@ -0,0 +1,156 @@ +# Building Boot Firmware for CompuLab's i.MX8M Mini products with Mkimage + +Supported machines: + +* `IOT-GATE-iMX8` + +Define a `MACHINE` environment variable for the target product: + +|Machine|Command Line| +|---|---| +|ucm-imx8m-mini|export MACHINE=iot-gate-imx8 + +Define the following environment variables: + +|Description|Command Line| +|---|---| +|NXP firmware name|export NXP_FIRMWARE=firmware-imx-8.14.bin| +|CompuLab release|export CPL_RELEASE=${MACHINE}_r3.0| +|CompuLab branch name|export CPL_BRANCH=lf-5.10.72-2.2.0_${MACHINE}| +|Mkimage revision|export MKIMG=lf-5.10.72-2.2.0| +|ATF revision|export ATF=lf-5.10.72-2.2.0| +|OPTEE revision|export OPTEE=lf-5.10.72-2.2.0| +|U-Boot revision|export UBOOT=lf-5.10.72-2.2.0| + +## Prerequisites +It is up to developer to setup arm64 build environment: +* Download the [ARM tool chain](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads/9-2-2019-12) +* Set environment variables: +
+export ARCH=arm64
+export CROSS_COMPILE=/opt/gcc-arm-9.2-2019.12-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-
+
+* Create a folder to organize the files: +
+mkdir -p imx8mm
+export SRC_ROOT=$(readlink -f imx8mm)
+cd ${SRC_ROOT}
+
+ +* Download CompuLab BSP +
+git clone -b ${CPL_RELEASE} https://github.com/compulab-yokneam/meta-bsp-imx8mm.git
+export LAYER_DIR=$(pwd)/meta-bsp-imx8mm
+
+ +## Build Procedure +### Mkimage setup +* Download the mkimage: +
+git clone https://source.codeaurora.org/external/imx/imx-mkimage.git
+git -C imx-mkimage checkout ${MKIMG}
+export RESULTS=${SRC_ROOT}/imx-mkimage/iMX8M
+
+ +### Firmware iMX setup +* Download the firmware-imx file: +
+wget http://www.freescale.com/lgfiles/NMG/MAD/YOCTO/${NXP_FIRMWARE}
+bash -x ${NXP_FIRMWARE} --auto-accept
+cp -v $(find firmware* | awk '/train|hdmi_imx8|dp_imx8/' ORS=" ") ${RESULTS}
+
+ +### Arm Trusted Firmware (ATF) setup +* Download the ATF: +
+git clone https://source.codeaurora.org/external/imx/imx-atf.git
+git -C imx-atf checkout ${ATF} -b ${CPL_BRANCH}
+
+* Apply patches if applicable: +
+[[ -d ${LAYER_DIR}/recipes-bsp/imx-atf/compulab/imx8mm ]] && { \
+git -C imx-atf am ${LAYER_DIR}/recipes-bsp/imx-atf/compulab/imx8mm/*.patch
+}
+
+* Make bl31.bin + +|Mode |Command +|---|---| +|optee build|make -j 16 -C imx-atf PLAT=imx8mm BUILD_BASE=build PLAT=imx8mm IMX_BOOT_UART_BASE=0x30880000 BL32_BASE=0x56000000 BL32_SIZE=0x2000000 SPD=opteed bl31 +|non-optee build|make -j 16 -C imx-atf PLAT=imx8mm BUILD_BASE=build PLAT=imx8mm IMX_BOOT_UART_BASE=0x30880000 BL32_BASE=0x56000000 BL32_SIZE=0x2000000 bl31 + +* Ceate a symlink in the ${RESULTS} folder: +
+ln -s $(readlink -f imx-atf/build/imx8mm/release/bl31.bin) ${RESULTS}/
+
+ +### OP-TEE Setup + +| Skip this for a non-optee build | +| --- | + +* Download the OP-TEE: +
+git clone https://source.codeaurora.org/external/imx/imx-optee-os
+git -C imx-optee-os checkout ${OPTEE} -b ${CPL_BRANCH}
+
+* Apply patches if applicable: +
+[[ -d ${LAYER_DIR}/recipes-security/optee-imx/compulab/imx8mm ]] && { \
+git -C imx-optee-os am ${LAYER_DIR}/recipes-security/optee-imx/compulab/imx8mm/*.patch
+}
+
+* Set environment variables: +
+export ARCH=arm
+export CROSS_COMPILE64=${CROSS_COMPILE}
+
+* Make tee.bin +
+make -j 16 -C imx-optee-os PLATFORM=imx PLATFORM_FLAVOR=mx8mm_cl_iot_gate
+ln -s $(readlink -f imx-optee-os/out/arm-plat-imx/core/tee-raw.bin) ${RESULTS}/tee.bin
+
+ +### U-Boot +* Download the U-Boot source and apply CompuLab BSP patches: +
+git clone https://source.codeaurora.org/external/imx/uboot-imx.git
+git -C uboot-imx checkout ${UBOOT} -b ${CPL_BRANCH}
+git -C uboot-imx am ${LAYER_DIR}/recipes-bsp/u-boot/compulab/imx8mm/*.patch
+
+* Restore `ARCH` environment variables: +
+export ARCH=arm64
+
+* Compile U-Boot flash.bin: +
+make -j 16 -C uboot-imx -f defconfig.mk
+make -j 16 -C uboot-imx
+
+* Copy files to the results directory +
+cp -v $(find uboot-imx | awk -v v=${MACHINE} '(/u-boot-spl.bin$|u-boot.bin$|u-boot-nodtb.bin$|tools\/mkimage$/)||($0~v".dtb$")' ORS=" ") ${RESULTS}
+
+### Compiling the flash.bin imx-boot image +* Unset these variables: +
+unset ARCH CROSS_COMPILE
+
+Issue: +
+cd ${RESULTS}
+sed "s/\(^dtbs \).*/\1= ${MACHINE}.dtb/;s/\(mkimage\)_uboot/\1/;s/\(^TEE_LOAD_ADDR \).*/\1= 0x56000000/g" soc.mak > Makefile
+make clean
+make flash_evk SOC=iMX8MM
+
+Issue the following commands to generate log files for the HAB signing operation: +
+make SOC=iMX8MM flash_evk 2>&1 | tee flash_evk.log
+make SOC=iMX8MM print_fit_hab 2>&1 | tee print_fit_hab.log
+
+## Flashing +
+echo 0 > /sys/class/block/mmcblk2boot0/force_ro
+dd if=flash.bin of=/dev/mmcblk2boot0 bs=1K seek=33 status=progress
+echo 1 > /sys/class/block/mmcblk2boot0/force_ro
+
diff --git a/Documentation/linux_kernel_build.md b/Documentation/linux_kernel_build.md index d5dd89c..7ad4fa3 100644 --- a/Documentation/linux_kernel_build.md +++ b/Documentation/linux_kernel_build.md @@ -2,26 +2,24 @@ Supported machines: -* `mcm-imx8m-mini` -* `ucm-imx8m-mini` +* `iot-gate-imx8` Define a `MACHINE` environment variable for the target product: |Machine|Command Line| |---|---| -|mcm-imx8m-mini|export MACHINE=mcm-imx8m-mini -|ucm-imx8m-mini|export MACHINE=ucm-imx8m-mini +|iot-gate-imx8|export MACHINE=iot-gate-imx8 Define the following environment variables: |Description|Command Line| |---|---| -|NXP release name|export NXP_RELEASE=lf-5.10.35-2.0.0| -|CompuLab branch name|export CPL_BRANCH=rel_imx_5.10.35_2.0.0-stable| +|NXP release name|export NXP_RELEASE=lf-5.10.y| +|CompuLab branch name|export CPL_BRANCH=iot-gate-imx8_r3.0| ## Prerequisites It is up to developer to setup arm64 build environment: -* Download the [GNU tool chain](https://github.com/compulab-yokneam/meta-bsp-imx8mm/blob/rel_imx_5.4.70_2.3.0-stable/Documentation/toolchain.md) +* Download the [GNU tool chain](https://github.com/compulab-yokneam/meta-bsp-imx8mm/blob/iot-gate-imx8_r3.0/Documentation/toolchain.md) * Create a folder to organize the files:
 mkdir imx8mm
@@ -35,13 +33,13 @@ export PATCHES=$(pwd)/meta-bsp-imx8mm/recipes-kernel/linux/compulab/imx8mm
 
 ## CompuLab Linux Kernel setup
 
-git clone https://source.codeaurora.org/external/imx/linux-imx.git
-git -C linux-imx checkout -b linux-compulab ${NXP_RELEASE}
+git clone -b ${NXP_RELEASE} --single-branch https://source.codeaurora.org/external/imx/linux-imx.git
+git -C linux-imx checkout -b linux-compulab 
 git -C linux-imx am ${PATCHES}/*.patch
 
## Compile the Kernel
-make -C linux-imx cl-imx8m-mini_defconfig ${MACHINE}.config
+make -C linux-imx ${MACHINE}_defconfig
 make -C linux-imx
 
diff --git a/Documentation/toolchain.md b/Documentation/toolchain.md index d164f00..8a22af1 100644 --- a/Documentation/toolchain.md +++ b/Documentation/toolchain.md @@ -14,6 +14,6 @@ sudo tar -C /opt -xf gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu.tar.xz * Set environment variables:
 export ARCH=arm64
-export CROSS_COMPILE=/opt/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/bin/aarch64-linux-gnu-
+export CROSS_COMPILE=/opt/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-
 
diff --git a/README.md b/README.md index 42741b0..ab214b6 100644 --- a/README.md +++ b/README.md @@ -1,43 +1,14 @@ -# Quick Start Guide +# Developer snapshot +# Please do not try this at home -Supported CompuLab machines: -* `mcm-imx8m-mini` -* `ucm-imx8m-mini` +export COMPULAB_MACHINE=ucm-imx8m-mini +export LREPO=imx_5.15.32-2.0.0-compulab.xml +export CLB_RELEASE=rel_imx_5.15.32-2.0.0-experimental -# 1 Setup environment -## 1.1 Prepare NXP BSP -``` -repo init -u git://source.codeaurora.org/external/imx/imx-manifest.git -b imx-linux-hardknott -m imx-5.10.35-2.0.0.xml -``` -## 1.2 Download CompuLab meta layer -``` -wget --directory-prefix .repo/manifests https://raw.githubusercontent.com/compulab-yokneam/meta-bsp-imx8mm/rel_imx_5.10.35_2.0.0-stable/scripts/imx-5.10.35_2.0.0_compulab.xml -``` -## 1.3 Get entire BSP tree -``` -repo init -m imx-5.10.35_2.0.0_compulab.xml +repo init -u git://source.codeaurora.org/external/imx/imx-manifest.git -b imx-linux-kirkstone -m imx-5.15.32-2.0.0.xml + +mkdir -p .repo/local_manifests +wget --directory-prefix .repo/local_manifests https://raw.githubusercontent.com/compulab-yokneam/meta-bsp-imx8mm/${CLB_RELEASE}/scripts/${LREPO} repo sync -``` -# 2 Build -## 2.1 Define COMPULAB_MACHINE environment variable -|Machine|Command Line| -|---|---| -|mcm-imx8m-mini|```export COMPULAB_MACHINE=mcm-imx8m-mini``` -|ucm-imx8m-mini|```export COMPULAB_MACHINE=ucm-imx8m-mini``` -## 2.2 Run CompuLab Linux Yocto Project setup -|NOTE|Refer to the [NXP Readme](https://source.codeaurora.org/external/imx/meta-imx/tree/README?h=hardknott-5.10.35-2.0.0) for details about how to select a correct backend & distro.| -|---|---| -``` -MACHINE=${COMPULAB_MACHINE} DISTRO=fsl-imx-xwayland source compulab-setup-env -b build -``` -## 2.3 Build image -``` -bitbake -k compulab-ucm-imx8m-mini -``` - -# 3 Precompiled images -|Machine|Image| -|---|---| -|ucm-imx8m-mini|[compulab-ucm-imx8m-mini-ucm-imx8m-mini-YYYYMMDDhhmmss.rootfs.wic.bz2](https://drive.google.com/file/d/1PLSpK6_F1oTnSQqcTwHmpUboF7tbKLAv/view?usp=sharing) diff --git a/conf/layer.conf b/conf/layer.conf index 7a037fd..73dab1f 100644 --- a/conf/layer.conf +++ b/conf/layer.conf @@ -9,15 +9,16 @@ BBFILE_COLLECTIONS += "compulab-bsp-imx8mm" BBFILE_PATTERN_compulab-bsp-imx8mm := "^${LAYERDIR}/" BBFILE_PRIORITY_compulab-bsp-imx8mm = "9" +BBMASK += "meta-compulab/recipes-bsp" BBMASK += "meta-compulab/recipes-xfce" BBMASK += "meta-compulab/recipes-kernel" BBMASK += "meta-compulab/recipes-graphics" BBMASK += ".*boundary.*" CORE_IMAGE_EXTRA_INSTALL += " kernel-modules " -CORE_IMAGE_EXTRA_INSTALL += "${@bb.utils.contains('DISTRO_CODENAME', 'dunfell', 'firmware-imx-sdma-imx7d', 'firmware-imx-sdma', d)}" +CORE_IMAGE_EXTRA_INSTALL += " firmware-imx-sdma-imx7d " HOSTTOOLS += " git-lfs " HOSTTOOLS += " bison " -LAYERSERIES_COMPAT_compulab-bsp-imx8mm = "sumo thud warrior zeus dunfell hardknott" +LAYERSERIES_COMPAT_compulab-bsp-imx8mm = "kirkstone" diff --git a/conf/machine/compulab-imx8mm.inc b/conf/machine/compulab-imx8mm.inc index 5a96f88..e626b72 100644 --- a/conf/machine/compulab-imx8mm.inc +++ b/conf/machine/compulab-imx8mm.inc @@ -1,12 +1,15 @@ -MACHINEOVERRIDES =. "mx8:mx8m:mx8mm:" +MACHINEOVERRIDES =. "imx-boot-container:mx8:mx8m:mx8mm:compulab-mx8mm:" SOC_DEFAULT_WKS_FILE = "imx-imx-boot-bootpart.wks.in" require conf/machine/include/imx-base.inc -require conf/machine/include/tune-cortexa53.inc +require conf/machine/include/arm/armv8a/tune-cortexa53.inc MACHINE_FEATURES += " pci wifi bluetooth " +IMX_DEFAULT_BOOTLOADER:use-mainline-bsp = "u-boot-compulab" +IMX_DEFAULT_BOOTLOADER:use-nxp-bsp = "u-boot-compulab" + SPL_BINARY = "spl/u-boot-spl.bin" # Set DDR FIRMWARE @@ -27,24 +30,36 @@ UBOOT_SUFFIX = "bin" UBOOT_MAKE_TARGET = "" IMX_BOOT_SEEK = "33" +MACHINE_FIRMWARE:append = " firmware-cypress linux-firmware-ax200" + +MACHINE_FIRMWARE:remove = "linux-firmware-ath10k" + +DEFAULTTUNE:mx8mm-nxp-bsp = "aarch64" + +# PLATFORM_FLAVOR = "mx8mmevk" +# PLATFORM_FLAVOR:ucm-imx8m-mini = "mx8mmevk" +# PLATFORM_FLAVOR:mcm-imx8m-mini = "mx8mmevk" +# PLATFORM_FLAVOR:iot-gate-imx8 = "mx8mmevk" +# Optee parameters OPTEE_BIN_EXT = "8mm" +OPTEE_PLATFORM_FLAVOR = "mx8mm_cl_iot_gate" +PLATFORM_FLAVOR:iot-gate-imx8 = "${OPTEE_PLATFORM_FLAVOR}" +PLATFORM_FLAVOR:mcm-imx8m-mini = "${OPTEE_PLATFORM_FLAVOR}" +PLATFORM_FLAVOR:ucm-imx8m-mini = "${OPTEE_PLATFORM_FLAVOR}" +TEE_LOAD_ADDR = "0x56000000" -MACHINE_FIRMWARE_append = " firmware-cypress linux-firmware-ax200" - -MACHINE_FIRMWARE_remove = "linux-firmware-ath10k" - -DEFAULTTUNE_mx8mm = "aarch64" - -PLATFORM_FLAVOR = "mx8mmevk" -PLATFORM_FLAVOR_ucm-imx8m-mini = "mx8mmevk" -PLATFORM_FLAVOR_mcm-imx8m-mini = "mx8mmevk" -PLATFORM_FLAVOR_iot-gate-imx8 = "mx8mmevk" ATF_MACHINE_NAME = "bl31-imx8mm.bin" PLATFORM = "imx8mm" SOC_TARGET = "iMX8MM" +IMX_BOOT_SOC_TARGET = "iMX8MM" -IMAGE_INSTALL_append = " \ +IMAGE_INSTALL:append = " \ kernel-image \ kernel-modules \ kernel-devicetree \ " + +PREFERRED_PROVIDER_virtual/kernel:compulab-mx8mm = "linux-compulab" +PREFERRED_PROVIDER_virtual/bootloader:compulab-mx8mm = "u-boot-compulab" +PREFERRED_PROVIDER_linux-imx-mfgtool:compulab-mx8mm = "linux-compulab-mfgtool" +PREFERRED_PROVIDER_linux-compulab-mfgtool:compulab-mx8mm = "linux-compulab-mfgtool" diff --git a/conf/machine/iot-gate-imx8.conf b/conf/machine/iot-gate-imx8.conf index c6958f5..c501102 100644 --- a/conf/machine/iot-gate-imx8.conf +++ b/conf/machine/iot-gate-imx8.conf @@ -9,6 +9,11 @@ require compulab-imx8mm.inc KERNEL_DEVICETREE = "compulab/ucm-imx8m-mini.dtb " KERNEL_DEVICETREE += "compulab/sb-iotgimx8.dtb " KERNEL_DEVICETREE += "compulab/sb-iotgimx8-can.dtb " +KERNEL_DEVICETREE += "compulab/sb-iotgimx8-ied.dtb " +KERNEL_DEVICETREE += "compulab/sb-iotgimx8-ied-m4.dtb " +KERNEL_DEVICETREE += "compulab/sb-iotgimx8-poed.dtb " +KERNEL_DEVICETREE += "compulab/sb-iotgimx8-poedv2.dtb " +KERNEL_DEVICETREE += "compulab/sb-iotgimx8-ied-wakeup.dtb " UBOOT_CONFIG ??= "sd" UBOOT_CONFIG[sd] = "iot-gate-imx8_defconfig,sdcard" @@ -16,3 +21,15 @@ UBOOT_CONFIG[mfgtool] = "iot-gate-imx8_defconfig" # Set u-boot DTB UBOOT_DTB_NAME = "iot-gate-imx8.dtb" + +# Prefered components +# PREFERRED_PROVIDER_virtual/kernel_mx8mm = "linux-compulab" +# PREFERRED_PROVIDER_virtual/bootloader_mx8mm = "u-boot-compulab" + +# Block recipes +BBMASK += "meta-compulab/recipes-bsp/u-boot" + +# Optee parameters +OPTEE_PLATFORM_FLAVOR = "mx8mm_cl_iot_gate" +PLATFORM_FLAVOR:iot-gate-imx8 = "${OPTEE_PLATFORM_FLAVOR}" +TEE_LOAD_ADDR = "0x56000000" diff --git a/conf/machine/ucm-imx8m-mini.conf b/conf/machine/ucm-imx8m-mini.conf index d0df5dc..b1e3d1f 100644 --- a/conf/machine/ucm-imx8m-mini.conf +++ b/conf/machine/ucm-imx8m-mini.conf @@ -17,5 +17,5 @@ UBOOT_CONFIG[mfgtool] = "ucm-imx8m-mini_defconfig" # Set u-boot DTB UBOOT_DTB_NAME = "ucm-imx8m-mini.dtb" -CL_RELEASE = '2.2.1' +CL_RELEASE = '2.2' IMAGE_LINK_NAME = "${MACHINE}" diff --git a/recipes-bsp/brcm-patchram/brcm-patchram.bb b/recipes-bsp/brcm-patchram/brcm-patchram.bb index 30d6ab8..fa39c37 100644 --- a/recipes-bsp/brcm-patchram/brcm-patchram.bb +++ b/recipes-bsp/brcm-patchram/brcm-patchram.bb @@ -19,7 +19,7 @@ SRC_URI = "git://chromium.googlesource.com/chromiumos/third_party/broadcom;proto FILES_${PN} = "/usr/bin/*" -do_install_append() { +do_install:append() { install -d ${D}/usr/bin install -m 755 brcm_patchram_plus ${D}/usr/bin } diff --git a/recipes-bsp/bt-start/bt-start_%.bbappend b/recipes-bsp/bt-start/bt-start_%.bbappend deleted file mode 100644 index 1f215fb..0000000 --- a/recipes-bsp/bt-start/bt-start_%.bbappend +++ /dev/null @@ -1,7 +0,0 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/files:" - -SRC_URI_append = " \ - file://bt-start \ -" - -RDEPENDS_${PN} = "bash brcm-patchram firmware-imx-brcm" diff --git a/recipes-bsp/firmware-imx/firmware-imx_%.bbappend b/recipes-bsp/firmware-imx/firmware-imx_%.bbappend index d0f8164..8b3fea3 100644 --- a/recipes-bsp/firmware-imx/firmware-imx_%.bbappend +++ b/recipes-bsp/firmware-imx/firmware-imx_%.bbappend @@ -1,13 +1,13 @@ BB_STRICT_CHECKSUM = "0" -SRC_URI_append += " \ +SRC_URI:append = " \ https://github.com/compulab-yokneam/bin/raw/master/rootfs/lib/firmware/brcm/480-0081.tar.bz2;protocol=https;md5sum=c6a3119dec228a6fb65642be931ee6aa;sha256sum=e5755109f263a70738f59869704351a15c846a9a3963236ba9742eb4e0e67052 \ " -do_install_append () { +do_install:append () { cp -rfv ${WORKDIR}/lib/firmware/brcm ${D}${base_libdir}/firmware/ } -FILES_${PN}-brcm += "${base_libdir}/firmware/brcm" +FILES:${PN}-brcm += "${base_libdir}/firmware/brcm" PACKAGES =+ "${PN}-brcm" COMPATIBLE_MACHINE_ucm-imx8m-mini = "ucm-imx8m-mini" diff --git a/recipes-bsp/imx-atf/compulab/imx8mm.inc b/recipes-bsp/imx-atf/compulab/imx8mm.inc index eed0ef6..6450355 100644 --- a/recipes-bsp/imx-atf/compulab/imx8mm.inc +++ b/recipes-bsp/imx-atf/compulab/imx8mm.inc @@ -1,6 +1,4 @@ -SRC_URI_append = " \ - file://0001-imx8mm-Set-IMX_BOOT_UART_BASE-for-CompuLab-boards.patch \ - file://0002-imx8mm-Assign-RDC_PDAP_UART4-to-D0.patch \ - file://0003-imx8mm-Set-BL2_BASE-to-the-upper-egde-of-the-1G.patch \ - file://0004-imx8mm-RDC-Remove-UART1-D0-restrictions.patch \ +SRC_URI:append = " \ + file://0001-imx8mm-Assign-RDC_PDAP_UART4-to-D0.patch \ + file://0002-iot-gate-imx8-RDC-Remove-UART2-D0-restrictions.patch \ " diff --git a/recipes-bsp/imx-atf/compulab/imx8mm/0001-imx8mm-Assign-RDC_PDAP_UART4-to-D0.patch b/recipes-bsp/imx-atf/compulab/imx8mm/0001-imx8mm-Assign-RDC_PDAP_UART4-to-D0.patch new file mode 100644 index 0000000..f5ed889 --- /dev/null +++ b/recipes-bsp/imx-atf/compulab/imx8mm/0001-imx8mm-Assign-RDC_PDAP_UART4-to-D0.patch @@ -0,0 +1,26 @@ +From 48afff4126103326193042622273e036f3396d2c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 8 Jul 2020 11:34:20 +0300 +Subject: [PATCH 1/2] imx8mm: Assign RDC_PDAP_UART4 to D0 + +Signed-off-by: Valentin Raevsky +--- + plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +index f63b9fcad..a89c7f941 100644 +--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c ++++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +@@ -58,7 +58,7 @@ static const struct imx_rdc_cfg rdc[] = { + RDC_MDAn(RDC_MDA_M4, DID1), + + /* peripherals domain permission */ +- RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W), ++ RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), + RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), + RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W), + +-- +2.11.0 + diff --git a/recipes-bsp/imx-atf/compulab/imx8mm/0002-iot-gate-imx8-RDC-Remove-UART2-D0-restrictions.patch b/recipes-bsp/imx-atf/compulab/imx8mm/0002-iot-gate-imx8-RDC-Remove-UART2-D0-restrictions.patch new file mode 100644 index 0000000..4fdf4aa --- /dev/null +++ b/recipes-bsp/imx-atf/compulab/imx8mm/0002-iot-gate-imx8-RDC-Remove-UART2-D0-restrictions.patch @@ -0,0 +1,25 @@ +From 3d785a514a3c9251c9db6b4f575153311a848a6c Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 4 May 2022 11:03:18 +0300 +Subject: [PATCH 2/2] iot-gate-imx8: RDC: Remove UART2 D0 restrictions + +Signed-off-by: Uri Mashiach +--- + plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +index a89c7f941..c7bfd3f9e 100644 +--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c ++++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +@@ -59,7 +59,6 @@ static const struct imx_rdc_cfg rdc[] = { + + /* peripherals domain permission */ + RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W), +- RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W), + RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W), + + /* memory region */ +-- +2.11.0 + diff --git a/recipes-bsp/imx-atf/imx-atf_2.%.bbappend b/recipes-bsp/imx-atf/imx-atf_2.%.bbappend new file mode 100644 index 0000000..6e48e89 --- /dev/null +++ b/recipes-bsp/imx-atf/imx-atf_2.%.bbappend @@ -0,0 +1,11 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/compulab/imx8mm:" + +require compulab/imx8mm.inc + +ATF_PLATFORM = "imx8mm" + +EXTRA_OEMAKE += "\ + IMX_BOOT_UART_BASE=0x30880000 \ + BL32_BASE=${TEE_LOAD_ADDR} \ + BL32_SIZE=0x2000000 \ +" diff --git a/recipes-bsp/imx-atf/imx-atf_2.4.bbappend b/recipes-bsp/imx-atf/imx-atf_2.4.bbappend index 0b765ec..0f1f5ef 100644 --- a/recipes-bsp/imx-atf/imx-atf_2.4.bbappend +++ b/recipes-bsp/imx-atf/imx-atf_2.4.bbappend @@ -1,3 +1,3 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/compulab/imx8mm:" +FILESEXTRAPATHS:prepend := "${THISDIR}/compulab/imx8mm:" include compulab/imx8mm.inc diff --git a/recipes-bsp/imx-mkimage/imx-boot_%.bbappend b/recipes-bsp/imx-mkimage/imx-boot_%.bbappend index 06c0e1c..c6c56c9 100644 --- a/recipes-bsp/imx-mkimage/imx-boot_%.bbappend +++ b/recipes-bsp/imx-mkimage/imx-boot_%.bbappend @@ -1,12 +1,12 @@ do_compile_preppend () { make_file=${S}/iMX8M/soc.mak if [ -e ${make_file} ]; then - sed -i "s/dtbs = .*dtb/dtbs = ${UBOOT_DTB_NAME}/g" ${make_file} - sed -i "s/\(^TEE_LOAD_ADDR \).*/\1= 0x7e000000/g" ${make_file} + sed -i "s/\(^dtbs \).*/\1= ${UBOOT_DTB_NAME}/g" ${make_file} + sed -i "s/\(^TEE_LOAD_ADDR \).*/\1= 0x56000000/g" ${make_file} fi } -do_install_append () { +do_install:append () { ln -fs ${BOOT_CONFIG_MACHINE}-${target} ${D}/boot/imx-boot } diff --git a/recipes-bsp/recipes-images/base-files_%.bbappend b/recipes-bsp/recipes-images/base-files_%.bbappend index a5173c3..4bf33e2 100644 --- a/recipes-bsp/recipes-images/base-files_%.bbappend +++ b/recipes-bsp/recipes-images/base-files_%.bbappend @@ -1,7 +1,7 @@ DESCRIPTION = "CompuLab release info." LICENSE = "MIT" -do_install_append() { +do_install:append() { for i in issue issue.net; do sed -e "/^Compulab Release/d" -i ${D}/etc/$i sed -e " 1 i $(date +"Compulab Release ${MACHINE} ${CL_RELEASE} %d %b %Y based on")" -i ${D}/etc/$i diff --git a/recipes-bsp/recipes-images/compulab-ucm-imx8m-mini.bb b/recipes-bsp/recipes-images/compulab-ucm-imx8m-mini.bb index 98c4446..f4e0850 100644 --- a/recipes-bsp/recipes-images/compulab-ucm-imx8m-mini.bb +++ b/recipes-bsp/recipes-images/compulab-ucm-imx8m-mini.bb @@ -3,4 +3,4 @@ LICENSE = "MIT" export IMAGE_LINK_NAME="${MACHINE}" -require dynamic-layers/qt5-layer/recipes-fsl/images/fsl-image-qt5-validation-imx.bb +#require dynamic-layers/qt6-layer/recipes-fsl/images/imx-image-full.bb diff --git a/recipes-bsp/u-boot-scr/u-boot-script.bbappend b/recipes-bsp/u-boot-scr/u-boot-script.bbappend index cb0c221..5b822df 100644 --- a/recipes-bsp/u-boot-scr/u-boot-script.bbappend +++ b/recipes-bsp/u-boot-scr/u-boot-script.bbappend @@ -1,6 +1,6 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" -do_compile_prepend() { +do_compile:prepend() { BOOTLOADER=$(basename $(ls ${WORKDIR}/recipe-sysroot/boot/imx-boot-* | head -1)) sed -i "s|##BOOTLOADER##|${BOOTLOADER}|" ${WORKDIR}/boot.script } diff --git a/recipes-bsp/u-boot/compulab/imx8mm.inc b/recipes-bsp/u-boot/compulab/imx8mm.inc index adc4db4..1a624d3 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm.inc +++ b/recipes-bsp/u-boot/compulab/imx8mm.inc @@ -1,4 +1,5 @@ -SRC_URI_append = " \ + +SRC_URI:append = " \ file://0001-ucm-imx8m-mini-Add-basic-support.patch \ file://0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch \ file://0003-ucm-imx8m-mini-Fix-KConfig-warning.patch \ @@ -50,58 +51,81 @@ SRC_URI_append = " \ file://0049-mcm-imx8m-mini-dts-Enable-usbotg2-in-host-mode.patch \ file://0050-mcm-imx8m-mini-config-Remove-unused-stuff.patch \ file://0051-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch \ - file://0052-imx8m-soc-Don-t-reduce-the-memory-amount-by-the-opte.patch \ - file://0053-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch \ - file://0054-mcm-imx8m-mini-Refactor-spl-code.patch \ - file://0055-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch \ - file://0056-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch \ - file://0057-cpl-imx8m-mini-Refactor-.h-configs.patch \ - file://0058-cpl-imx8m-mini-Refactor-.dts.patch \ - file://0059-iot-gate-imx8-Add-basic-support.patch \ - file://0060-mcm-imx8m-mini-config-Update-env-size-offest.patch \ - file://0061-imx8m-mini-env-config-Update-size-offset-value.patch \ - file://0062-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch \ - file://0063-imx8-eeprom-Remove-duplicated-code.patch \ - file://0064-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch \ - file://0065-imx8m-mini-Refactor-the-usdhc2.patch \ - file://0066-mcm-imx8m-mini-reset-Refactor-the-reset.patch \ - file://0067-imx8m-mini-ddr-Change-the-memory-presets-order.patch \ - file://0068-imx8m-mini-env-Fix-getopt_long-parameters-string.patch \ - file://0069-ucm-imx8m-mini-Fix-reset.patch \ - file://0070-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch \ - file://0071-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch \ - file://0072-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch \ - file://0073-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch \ - file://0074-Add-ddr_init-return-handling.patch \ - file://0075-spl-Enable-Kingston-DRAM-support.patch \ - file://0076-Add-show_suite-function.patch \ - file://0077-Clean-debug-printout.patch \ - file://0078-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch \ - file://0079-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch \ - file://0080-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch \ - file://0081-Enable-env-address-export-via-FDT.patch \ - file://0082-fw_utils-Enable-actual-env-address-readout.patch \ - file://0083-SPL-Disable-fake-memsize-report.patch \ - file://0084-fdt-Add-export-SoM-data-via-FDT.patch \ - file://0085-board-minor-cleaninig.patch \ - file://0086-rtc-Disable-bus-when-powered-from-battery.patch \ - file://0087-fdt-Add-export-of-base-board-data-via-FDT.patch \ - file://0088-spl-ddr-Enable-DDR-ID-0x1060008.patch \ - file://0089-drivers-video-Add-startek-ili9881c-panel-driver.patch \ - file://0090-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch \ - file://0091-cm-imx8m-mini-config-Enable-startek-ili9881c.patch \ - file://0092-Migration-to-5.10.35.patch \ - file://0093-Fix-enable_cache.patch \ - file://0094-Fix-mmc_autodetect.patch \ - file://0095-config-Enable-video.patch \ - file://0096-readout-some-cleannig.patch \ - file://0097-mmc-Fix-mmc_switch-workflow-issue.patch \ - file://0098-defconfig-Break-down-to-common-and-specific-parts.patch \ - file://0099-spl-lpddr-training-size-optimisation.patch \ - file://0100-spl-Add-SDP-support.patch \ - file://0101-spl-Enable-Samsung-4G-DRAM-0x01061010.patch \ - file://0102-Enable-DDR-Alliance-1G-0x01050008.patch \ - file://0103-make-Add-wrapper-for-compound-config.patch \ - file://0104-net-Enable-phy-Realtek-RTL8211E.patch \ - file://0105-LOCALVERSION-2.2.1-1.1.1.patch \ + file://0052-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch \ + file://0053-mcm-imx8m-mini-Refactor-spl-code.patch \ + file://0054-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch \ + file://0055-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch \ + file://0056-cpl-imx8m-mini-Refactor-.h-configs.patch \ + file://0057-cpl-imx8m-mini-Refactor-.dts.patch \ + file://0058-iot-gate-imx8-Add-basic-support.patch \ + file://0059-mcm-imx8m-mini-config-Update-env-size-offest.patch \ + file://0060-imx8m-mini-env-config-Update-size-offset-value.patch \ + file://0061-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch \ + file://0062-imx8-eeprom-Remove-duplicated-code.patch \ + file://0063-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch \ + file://0064-imx8m-mini-Refactor-the-usdhc2.patch \ + file://0065-mcm-imx8m-mini-reset-Refactor-the-reset.patch \ + file://0066-imx8m-mini-ddr-Change-the-memory-presets-order.patch \ + file://0067-imx8m-mini-env-Fix-getopt_long-parameters-string.patch \ + file://0068-ucm-imx8m-mini-Fix-reset.patch \ + file://0069-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch \ + file://0070-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch \ + file://0071-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch \ + file://0072-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch \ + file://0073-Add-ddr_init-return-handling.patch \ + file://0074-spl-Enable-Kingston-DRAM-support.patch \ + file://0075-Add-show_suite-function.patch \ + file://0076-Clean-debug-printout.patch \ + file://0077-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch \ + file://0078-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch \ + file://0079-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch \ + file://0080-Enable-env-address-export-via-FDT.patch \ + file://0081-fw_utils-Enable-actual-env-address-readout.patch \ + file://0082-SPL-Disable-fake-memsize-report.patch \ + file://0083-fdt-Add-export-SoM-data-via-FDT.patch \ + file://0084-board-minor-cleaninig.patch \ + file://0085-rtc-Disable-bus-when-powered-from-battery.patch \ + file://0086-fdt-Add-export-of-base-board-data-via-FDT.patch \ + file://0087-spl-ddr-Enable-DDR-ID-0x1060008.patch \ + file://0088-drivers-video-Add-startek-ili9881c-panel-driver.patch \ + file://0089-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch \ + file://0090-cm-imx8m-mini-config-Enable-startek-ili9881c.patch \ + file://0091-Migration-to-5.10.35.patch \ + file://0092-Fix-mmc_autodetect.patch \ + file://0093-config-Enable-video.patch \ + file://0094-mmc-Fix-mmc_switch-workflow-issue.patch \ + file://0095-defconfig-Break-down-to-common-and-specific-parts.patch \ + file://0096-spl-lpddr-training-size-optimisation.patch \ + file://0097-spl-Add-SDP-support.patch \ + file://0098-spl-Enable-Samsung-4G-DRAM-0x01061010.patch \ + file://0099-Enable-DDR-Alliance-1G-0x01050008.patch \ + file://0100-make-Add-wrapper-for-compound-config.patch \ + file://0102-defconfig-Enable-EFI_LOADER.patch \ + file://0103-core-Add-EPFNOSUPPORT-handeler.patch \ + file://0104-cpl-imx8m-mini-dts-remove-unrelevant-sections.patch \ + file://0105-iot-gate-imx8-remove-driver-reset-functions.patch \ + file://0106-iot-gate-imx8-dts-set-MMC1-voltage-to-1.8V.patch \ + file://0107-iot-gate-imx8-usb-VBUS-enable-fix.patch \ + file://0108-imx8mm-enable-global-functions-implementation-in-sub.patch \ + file://0109-iot-gate-imx8-RS485-232-selection.patch \ + file://0110-iot-gate-imx8-add-extension-board-support.patch \ + file://0111-iot-gate-imx8-update-boot-sequence.patch \ + file://0112-iot-gate-imx8-prevent-network-interfaces-rename.patch \ + file://0113-iot-gate-imx8-update-prompt.patch \ + file://0114-imx8mm-enable-prompt-update-in-sub-projects.patch \ + file://0115-iot-gate-imx8-hide-temperature-message.patch \ + file://0116-iot-gate-imx8-fix-UART1-mode-GPIO.patch \ + file://0117-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch \ + file://0118-iot-gate-imx8-add-support-for-the-IE-POE-extension-b.patch \ + file://0119-iot-gate-imx8-update-support-for-the-IE-TPM-module.patch \ + file://0120-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch \ + file://0121-iot-gate-imx8-add-support-for-the-POEv2-module.patch \ + file://0122-iot-gate-imx8-enable-USB-to-Ethernet-driver-SMSC-LAN.patch \ + file://0123-cmd-eeprom-fix-disregarding-of-the-i2c_bus-parameter.patch \ + file://0124-Enable-SoC-info-export-via-fdt.patch \ + file://0125-imx8mm-net-enable-phy-Realtek-RTL8211E.patch \ + file://0126-iot-gate-imx8-release-2020.04-iot-gate-imx8-3.0.patch \ " + +# For U-Boot build outside of Yocto +# file://0101-compulab-imx8mm-Add-binman-support.patch diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0001-ucm-imx8m-mini-Add-basic-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0001-ucm-imx8m-mini-Add-basic-support.patch index 23a14ce..1e372f2 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0001-ucm-imx8m-mini-Add-basic-support.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0001-ucm-imx8m-mini-Add-basic-support.patch @@ -1,34 +1,34 @@ -From 22c3acad098a8c75bd8791eb1ae0e370c0b2984a Mon Sep 17 00:00:00 2001 +From a79e947a2a87a687a2cd9fb6e43e3c5d8d29b262 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 18 Jul 2021 23:23:16 +0300 -Subject: [PATCH 01/91] ucm-imx8m-mini: Add basic support +Subject: [PATCH 001/126] ucm-imx8m-mini: Add basic support Signed-off-by: Kirill Kapranov --- - arch/arm/dts/Makefile | 2 + - arch/arm/dts/ucm-imx8m-mini.dts | 452 ++++ - arch/arm/mach-imx/imx8m/Kconfig | 8 + - board/compulab/common/Makefile | 1 + - board/compulab/common/eeprom.c | 4 +- - board/compulab/common/mmc.c | 50 + - board/compulab/common/pfuze.c | 174 ++ - board/compulab/common/pfuze.h | 19 + - board/compulab/common/pfuze_dm.c | 89 + - board/compulab/common/tcpc.h | 454 ++++ - board/compulab/ucm-imx8m-mini/Kconfig | 30 + - board/compulab/ucm-imx8m-mini/Makefile | 16 + - board/compulab/ucm-imx8m-mini/ddr/Makefile | 11 + - board/compulab/ucm-imx8m-mini/ddr/ddr.h | 59 + - board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 255 +++ - .../ucm-imx8m-mini/ddr/ddrphy_train.c | 1044 +++++++++ - board/compulab/ucm-imx8m-mini/ddr/helper.c | 103 + - .../ddr/wait_ddrphy_training_complete.c | 103 + - board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 1980 +++++++++++++++++ - board/compulab/ucm-imx8m-mini/spl.c | 258 +++ - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 734 ++++++ - configs/ucm-imx8m-mini_defconfig | 56 + - include/configs/ucm-imx8m-mini.h | 361 +++ - 23 files changed, 6261 insertions(+), 2 deletions(-) + arch/arm/dts/Makefile | 2 + + arch/arm/dts/ucm-imx8m-mini.dts | 452 +++++ + arch/arm/mach-imx/imx8m/Kconfig | 8 + + board/compulab/common/Makefile | 1 + + board/compulab/common/eeprom.c | 4 +- + board/compulab/common/mmc.c | 51 + + board/compulab/common/pfuze.c | 174 ++ + board/compulab/common/pfuze.h | 19 + + board/compulab/common/pfuze_dm.c | 89 + + board/compulab/common/tcpc.h | 454 +++++ + board/compulab/ucm-imx8m-mini/Kconfig | 30 + + board/compulab/ucm-imx8m-mini/Makefile | 16 + + board/compulab/ucm-imx8m-mini/ddr/Makefile | 11 + + board/compulab/ucm-imx8m-mini/ddr/ddr.h | 59 + + board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 255 +++ + board/compulab/ucm-imx8m-mini/ddr/ddrphy_train.c | 1044 +++++++++++ + board/compulab/ucm-imx8m-mini/ddr/helper.c | 103 + + .../ddr/wait_ddrphy_training_complete.c | 103 + + board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 1980 ++++++++++++++++++++ + board/compulab/ucm-imx8m-mini/spl.c | 258 +++ + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 734 ++++++++ + configs/ucm-imx8m-mini_defconfig | 56 + + include/configs/ucm-imx8m-mini.h | 361 ++++ + 23 files changed, 6262 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/ucm-imx8m-mini.dts create mode 100644 board/compulab/common/mmc.c create mode 100644 board/compulab/common/pfuze.c @@ -50,10 +50,10 @@ Signed-off-by: Kirill Kapranov create mode 100644 include/configs/ucm-imx8m-mini.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index aa0c6a75c3..2b81a2bc62 100644 +index 24a387fb60..c31d483784 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -890,6 +890,8 @@ dtb-$(CONFIG_RCAR_GEN2) += \ +@@ -898,6 +898,8 @@ dtb-$(CONFIG_RCAR_GEN2) += \ r8a7794-alt-u-boot.dtb \ r8a7794-silk-u-boot.dtb @@ -521,10 +521,10 @@ index 0000000000..112345b6a3 + status = "disabled"; +}; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig -index 9e5b6d7ffa..d4c41ba1aa 100644 +index 245b085499..4930b9bee6 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig -@@ -201,6 +201,13 @@ config TARGET_PHYCORE_IMX8MP +@@ -259,6 +259,13 @@ config TARGET_PHYCORE_IMX8MP select IMX8MP select SUPPORT_SPL select IMX8M_LPDDR4 @@ -538,7 +538,7 @@ index 9e5b6d7ffa..d4c41ba1aa 100644 endchoice source "board/freescale/imx8mq_evk/Kconfig" -@@ -217,5 +224,6 @@ source "board/beacon/imx8mm/Kconfig" +@@ -276,5 +283,6 @@ source "board/beacon/imx8mm/Kconfig" source "board/beacon/imx8mn/Kconfig" source "board/phytec/phycore_imx8mm/Kconfig" source "board/phytec/phycore_imx8mp/Kconfig" @@ -582,10 +582,10 @@ index 5206cf5c0a..e23dd68437 100644 uint offset; diff --git a/board/compulab/common/mmc.c b/board/compulab/common/mmc.c new file mode 100644 -index 0000000000..9fc3e68728 +index 0000000000..52b15ab5f3 --- /dev/null +++ b/board/compulab/common/mmc.c -@@ -0,0 +1,50 @@ +@@ -0,0 +1,51 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP @@ -598,6 +598,7 @@ index 0000000000..9fc3e68728 +#include +#include +#include ++#include + +static int check_mmc_autodetect(void) +{ @@ -6485,5 +6486,5 @@ index 0000000000..1605ab7281 +#endif +#endif -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch b/recipes-bsp/u-boot/compulab/imx8mm/0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch index 7aaad50..18536e1 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0002-ucm-imx8m-mini-update-CPU-model-printed-parameters.patch @@ -1,7 +1,7 @@ -From fd167e54036b16013eecd9504fa392734f725fb0 Mon Sep 17 00:00:00 2001 +From aa605296da62f4b44932c7d8eedbc95518352cec Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 26 May 2020 20:55:00 +0300 -Subject: [PATCH 02/91] ucm-imx8m-mini: update CPU/model printed parameters +Subject: [PATCH 002/126] ucm-imx8m-mini: update CPU/model printed parameters Update the startup messages of the CPU and model parameters @@ -24,5 +24,5 @@ index 112345b6a3..899899c1c6 100644 chosen { -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0003-ucm-imx8m-mini-Fix-KConfig-warning.patch b/recipes-bsp/u-boot/compulab/imx8mm/0003-ucm-imx8m-mini-Fix-KConfig-warning.patch index c2abe07..f029ae0 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0003-ucm-imx8m-mini-Fix-KConfig-warning.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0003-ucm-imx8m-mini-Fix-KConfig-warning.patch @@ -1,7 +1,7 @@ -From 5dabb2f3f0d1814c111ff4c6edd2a88360b88948 Mon Sep 17 00:00:00 2001 +From 665396af251f6eec00d0ece435f120a75ea3e621 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Wed, 13 Feb 2019 08:56:03 +0200 -Subject: [PATCH 03/91] ucm-imx8m-mini: Fix KConfig warning +Subject: [PATCH 003/126] ucm-imx8m-mini: Fix KConfig warning The following compilation warning is generated: choice value used outside its choice group @@ -84,5 +84,5 @@ index 6d9cccdbcb..34f7683d2d 100644 ddr_init(); #endif -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0004-ucm-imx8m-mini-enable-status-LED.patch b/recipes-bsp/u-boot/compulab/imx8mm/0004-ucm-imx8m-mini-enable-status-LED.patch index 64c019a..fc8c400 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0004-ucm-imx8m-mini-enable-status-LED.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0004-ucm-imx8m-mini-enable-status-LED.patch @@ -1,7 +1,7 @@ -From 4c4365f284eee7ed73c65dd3f1cb9fbfa65ef095 Mon Sep 17 00:00:00 2001 +From c826389773619e592df6ccc852cb636b61d935d0 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Wed, 13 Feb 2019 15:04:59 +0200 -Subject: [PATCH 04/91] ucm-imx8m-mini: enable status LED +Subject: [PATCH 004/126] ucm-imx8m-mini: enable status LED Use the status LED feature to turn on the status LED. @@ -35,5 +35,5 @@ index 2212e76acb..36cfe1b2e1 100644 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0005-eeprom-layout-remove-buf-from-the-eeprom_field-struc.patch b/recipes-bsp/u-boot/compulab/imx8mm/0005-eeprom-layout-remove-buf-from-the-eeprom_field-struc.patch index 9c3de8f..12da21c 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0005-eeprom-layout-remove-buf-from-the-eeprom_field-struc.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0005-eeprom-layout-remove-buf-from-the-eeprom_field-struc.patch @@ -1,7 +1,7 @@ -From 20aa60bc1225baa35bcc2660351d2a1359fd49ad Mon Sep 17 00:00:00 2001 +From fcdfa92492c4104cfd01ed1fe9ac77b8fd204b1d Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Mon, 18 Sep 2017 19:49:32 +0300 -Subject: [PATCH 05/91] eeprom: layout: remove buf from the eeprom_field +Subject: [PATCH 005/126] eeprom: layout: remove buf from the eeprom_field structure The layout structure contains a pointer to a buffer that contain the @@ -17,10 +17,10 @@ pointer parameter to the field functions. Signed-off-by: Uri Mashiach --- - board/compulab/common/eeprom.c | 150 +++++++++++++++++---------------- - common/eeprom/eeprom_field.c | 73 ++++++++++------ - common/eeprom/eeprom_layout.c | 21 ++--- - include/eeprom_field.h | 31 ++++--- + board/compulab/common/eeprom.c | 150 +++++++++++++++++++++-------------------- + common/eeprom/eeprom_field.c | 73 ++++++++++++-------- + common/eeprom/eeprom_layout.c | 21 +++--- + include/eeprom_field.h | 31 +++++---- 4 files changed, 149 insertions(+), 126 deletions(-) diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c @@ -603,5 +603,5 @@ index 05c0d14592..a13ca566af 100644 #endif -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0006-eeprom-layout-add-field-functions-read.patch b/recipes-bsp/u-boot/compulab/imx8mm/0006-eeprom-layout-add-field-functions-read.patch index b5e85f3..ba20446 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0006-eeprom-layout-add-field-functions-read.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0006-eeprom-layout-add-field-functions-read.patch @@ -1,7 +1,7 @@ -From ebfbf0ddfda20d3191ee5b0a1d7341cd68465b72 Mon Sep 17 00:00:00 2001 +From cbdfb5f0fea713cc69de29e75a05b36ce50b6931 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Tue, 19 Sep 2017 10:07:26 +0300 -Subject: [PATCH 06/91] eeprom: layout: add field functions read +Subject: [PATCH 006/126] eeprom: layout: add field functions read Read option is missing in the EEPROM layout feature @@ -11,9 +11,9 @@ provided buffer without manipulation. Signed-off-by: Uri Mashiach --- - board/compulab/common/eeprom.c | 91 +++++++++++++++++----------------- - common/eeprom/eeprom_field.c | 22 ++++++++ - common/eeprom/eeprom_layout.c | 37 ++++++++++++++ + board/compulab/common/eeprom.c | 91 +++++++++++++++++++++--------------------- + common/eeprom/eeprom_field.c | 22 ++++++++++ + common/eeprom/eeprom_layout.c | 37 +++++++++++++++++ include/eeprom_field.h | 4 ++ include/eeprom_layout.h | 2 + 5 files changed, 111 insertions(+), 45 deletions(-) @@ -146,11 +146,10 @@ diff --git a/common/eeprom/eeprom_field.c b/common/eeprom/eeprom_field.c index 38827f1180..e588b0943f 100644 --- a/common/eeprom/eeprom_field.c +++ b/common/eeprom/eeprom_field.c -@@ -129,6 +129,28 @@ int eeprom_field_update_bin(struct eeprom_field *field, uchar *fbuf, - return __eeprom_field_update_bin(field, fbuf, value, false); +@@ -130,6 +130,28 @@ int eeprom_field_update_bin(struct eeprom_field *field, uchar *fbuf, } -+/** + /** + * eeprom_field_read_bin() - Read field data in binary form + * + * @field: an initialized field @@ -172,18 +171,18 @@ index 38827f1180..e588b0943f 100644 + return 0; +} + - /** ++/** * eeprom_field_update_reserved() - Update reserved field with new data in * binary form + * diff --git a/common/eeprom/eeprom_layout.c b/common/eeprom/eeprom_layout.c index 1fab8e4dca..cc6dd39e01 100644 --- a/common/eeprom/eeprom_layout.c +++ b/common/eeprom/eeprom_layout.c -@@ -95,6 +95,42 @@ static int eeprom_layout_update_field(struct eeprom_layout *layout, - return -1; +@@ -96,6 +96,42 @@ static int eeprom_layout_update_field(struct eeprom_layout *layout, } -+/* + /* + * eeprom_layout_read_field() - read a single field from the layout data + * @layout: A pointer to an existing struct layout. + * @field_name: The name of the field to update. @@ -219,9 +218,10 @@ index 1fab8e4dca..cc6dd39e01 100644 + return -1; +} + - /* ++/* * eeprom_layout_setup() - setup layout struct with the layout data and * metadata as dictated by layout_version + * @layout: A pointer to an existing struct layout. @@ -116,4 +152,5 @@ void eeprom_layout_setup(struct eeprom_layout *layout, unsigned char *buf, layout->data_size = buf_size; layout->print = eeprom_layout_print; @@ -262,5 +262,5 @@ index 730d963ab9..50e8ec1085 100644 void eeprom_layout_setup(struct eeprom_layout *layout, unsigned char *buf, -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0007-compulab-eeprom-layout-add-read-serial-function.patch b/recipes-bsp/u-boot/compulab/imx8mm/0007-compulab-eeprom-layout-add-read-serial-function.patch index 6bfa6db..fea70e8 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0007-compulab-eeprom-layout-add-read-serial-function.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0007-compulab-eeprom-layout-add-read-serial-function.patch @@ -1,16 +1,16 @@ -From c4e09d71adf13ae781ed295c0667b5ce0a3a2b60 Mon Sep 17 00:00:00 2001 +From 42ee0d104b1ecc275269d401cfaad103863cc1e9 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Tue, 19 Sep 2017 10:47:25 +0300 -Subject: [PATCH 07/91] compulab: eeprom: layout: add read serial function +Subject: [PATCH 007/126] compulab: eeprom: layout: add read serial function The function conver the CompuLab serial number format to tag_serialnr structure. Signed-off-by: Uri Mashiach --- - board/compulab/common/eeprom.c | 67 ++++++++++++++++++++++++++-------- - common/eeprom/eeprom_field.c | 21 +++++++++++ - include/eeprom_field.h | 2 + + board/compulab/common/eeprom.c | 67 ++++++++++++++++++++++++++++++++---------- + common/eeprom/eeprom_field.c | 21 +++++++++++++ + include/eeprom_field.h | 2 ++ 3 files changed, 75 insertions(+), 15 deletions(-) diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c @@ -191,11 +191,10 @@ diff --git a/common/eeprom/eeprom_field.c b/common/eeprom/eeprom_field.c index e588b0943f..814dc4eb7a 100644 --- a/common/eeprom/eeprom_field.c +++ b/common/eeprom/eeprom_field.c -@@ -203,6 +203,27 @@ int eeprom_field_update_bin_rev(struct eeprom_field *field, uchar *fbuf, - return __eeprom_field_update_bin(field, fbuf, value, true); +@@ -204,6 +204,27 @@ int eeprom_field_update_bin_rev(struct eeprom_field *field, uchar *fbuf, } -+/** + /** + * eeprom_field_read_rev() - Read reversed binary data + * + * @field: an initialized field @@ -216,9 +215,10 @@ index e588b0943f..814dc4eb7a 100644 + return 0; +} + - /** ++/** * eeprom_field_print_mac_addr() - print a field which contains a mac address * + * Treat the field data as simple binary data, and print it formatted as a MAC diff --git a/include/eeprom_field.h b/include/eeprom_field.h index 6b6cd37229..311c49401a 100644 --- a/include/eeprom_field.h @@ -233,5 +233,5 @@ index 6b6cd37229..311c49401a 100644 void eeprom_field_print_mac(const struct eeprom_field *field, uchar *fbuf); int eeprom_field_update_mac(struct eeprom_field *field, uchar *fbuf, -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0008-compulab-integrate-DM_I2C-in-EEPROM-driver.patch b/recipes-bsp/u-boot/compulab/imx8mm/0008-compulab-integrate-DM_I2C-in-EEPROM-driver.patch index 782f045..29c7c4b 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0008-compulab-integrate-DM_I2C-in-EEPROM-driver.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0008-compulab-integrate-DM_I2C-in-EEPROM-driver.patch @@ -1,7 +1,7 @@ -From 6ae3d093dda3585c0f82f8f044ae7fe542ad8e49 Mon Sep 17 00:00:00 2001 +From e7068f16b334d6c518401e30013074a0f88b1ab9 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 26 May 2020 21:17:29 +0300 -Subject: [PATCH 08/91] compulab: integrate DM_I2C in EEPROM driver +Subject: [PATCH 008/126] compulab: integrate DM_I2C in EEPROM driver CompuLab's EEPROM driver is enabled only for CONFIG_SYS_I2C. Update the enabling condition of the driver to CONFIG_SYS_I2C or @@ -41,5 +41,5 @@ index a9c0203b81..2628d4ab86 100644 u32 cl_eeprom_get_board_rev(uint eeprom_bus); int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0009-ucm-imx8m-mini-add-support-for-eeprom-layout-comands.patch b/recipes-bsp/u-boot/compulab/imx8mm/0009-ucm-imx8m-mini-add-support-for-eeprom-layout-comands.patch index be092d0..8155c1f 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0009-ucm-imx8m-mini-add-support-for-eeprom-layout-comands.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0009-ucm-imx8m-mini-add-support-for-eeprom-layout-comands.patch @@ -1,7 +1,7 @@ -From a97a2cf1a2667ab13ecce0bc7c362c7b49008bf7 Mon Sep 17 00:00:00 2001 +From 41e820e4b705ab5400c78eb0e3ec4f1fc1a9bbc2 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Tue, 19 Feb 2019 18:48:29 +0200 -Subject: [PATCH 09/91] ucm-imx8m-mini: add support for eeprom layout comands +Subject: [PATCH 009/126] ucm-imx8m-mini: add support for eeprom layout comands Add support for EEPROM and EEPROM layout commands for the UCM-iMX8M-Mini. @@ -54,5 +54,5 @@ index 1605ab7281..f464ed822b 100644 #ifndef CONFIG_SPL_BUILD #define CONFIG_CMD_USB -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0010-mx8m-mini-set-Ethernet-MAC-address-environment.patch b/recipes-bsp/u-boot/compulab/imx8mm/0010-mx8m-mini-set-Ethernet-MAC-address-environment.patch index 62d73cd..32f07c0 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0010-mx8m-mini-set-Ethernet-MAC-address-environment.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0010-mx8m-mini-set-Ethernet-MAC-address-environment.patch @@ -1,7 +1,7 @@ -From 22c1aa3dd9a65033682e1bec93dad9f20a8d9ed5 Mon Sep 17 00:00:00 2001 +From 9da7a67ead6515dbead3bb5ebba3337711508982 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Tue, 19 Feb 2019 21:46:54 +0200 -Subject: [PATCH 10/91] mx8m-mini: set Ethernet MAC address environment +Subject: [PATCH 010/126] mx8m-mini: set Ethernet MAC address environment If the environment variable "ethaddr" is empty: * Read the MAC address from the EEPROM. @@ -9,7 +9,7 @@ If the environment variable "ethaddr" is empty: Signed-off-by: Uri Mashiach --- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 37 +++++++++++++++++++ + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 37 ++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c @@ -86,5 +86,5 @@ index ef5d1ffa55..80d9a5b8bd 100644 } -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0011-ucm-imx8m-mini-config-Remove-unused-stuff.patch b/recipes-bsp/u-boot/compulab/imx8mm/0011-ucm-imx8m-mini-config-Remove-unused-stuff.patch index 7eb4195..f9031c8 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0011-ucm-imx8m-mini-config-Remove-unused-stuff.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0011-ucm-imx8m-mini-config-Remove-unused-stuff.patch @@ -1,11 +1,11 @@ -From faf90f560f89ba9ebc0f418f15e9d170deba617d Mon Sep 17 00:00:00 2001 +From 9247cadb067e9dc9b05851dedde17942d1bf7b34 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 20 Feb 2019 08:21:05 +0200 -Subject: [PATCH 11/91] ucm-imx8m-mini: config: Remove unused stuff +Subject: [PATCH 011/126] ucm-imx8m-mini: config: Remove unused stuff Signed-off-by: Valentin Raevsky --- - include/configs/ucm-imx8m-mini.h | 53 -------------------------------- + include/configs/ucm-imx8m-mini.h | 53 ---------------------------------------- 1 file changed, 53 deletions(-) diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h @@ -81,5 +81,5 @@ index f464ed822b..214dad40ed 100644 #define CONFIG_MXC_OCOTP -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0012-ucm-imx8m-mini-Enable-uart4-for-bluetooth.patch b/recipes-bsp/u-boot/compulab/imx8mm/0012-ucm-imx8m-mini-Enable-uart4-for-bluetooth.patch index eb9f24b..bca704a 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0012-ucm-imx8m-mini-Enable-uart4-for-bluetooth.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0012-ucm-imx8m-mini-Enable-uart4-for-bluetooth.patch @@ -1,7 +1,7 @@ -From 039d1bfdc99917232adcc642e082af7a576b28f2 Mon Sep 17 00:00:00 2001 +From 266c4024565e18cf4b3aa0bc41fe37a01f8d8c08 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Thu, 7 Mar 2019 14:17:42 +0200 -Subject: [PATCH 12/91] ucm-imx8m-mini: Enable uart4 for bluetooth +Subject: [PATCH 012/126] ucm-imx8m-mini: Enable uart4 for bluetooth Signed-off-by: Valentin Raevsky --- @@ -62,5 +62,5 @@ index 899899c1c6..003cc857df 100644 pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0013-ucm-imx8m-mini-ddr-Validate-new-setting.patch b/recipes-bsp/u-boot/compulab/imx8mm/0013-ucm-imx8m-mini-ddr-Validate-new-setting.patch index cb4fbfe..02444d3 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0013-ucm-imx8m-mini-ddr-Validate-new-setting.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0013-ucm-imx8m-mini-ddr-Validate-new-setting.patch @@ -1,12 +1,12 @@ -From 191feb9ba6cd656f2f8c8c56749e204ca5aab4f6 Mon Sep 17 00:00:00 2001 +From 6bcfe6007bc66837010335c9048fc593677f68a2 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Tue, 26 Mar 2019 10:36:45 +0200 -Subject: [PATCH 13/91] ucm-imx8m-mini: ddr: Validate new setting +Subject: [PATCH 013/126] ucm-imx8m-mini: ddr: Validate new setting Signed-off-by: Valentin Raevsky --- - board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 23 +++-- - .../ucm-imx8m-mini/ddr/ddrphy_train.c | 96 +++++++++---------- + board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 23 +++--- + board/compulab/ucm-imx8m-mini/ddr/ddrphy_train.c | 96 ++++++++++++------------ 2 files changed, 62 insertions(+), 57 deletions(-) diff --git a/board/compulab/ucm-imx8m-mini/ddr/ddr_init.c b/board/compulab/ucm-imx8m-mini/ddr/ddr_init.c @@ -324,5 +324,5 @@ index 8116069dfb..e4577e0a21 100644 +} \ No newline at end of file -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0014-ucm-imx8m-mini-defconfig-Disable-CONFIG_NXP_TMU.patch b/recipes-bsp/u-boot/compulab/imx8mm/0014-ucm-imx8m-mini-defconfig-Disable-CONFIG_NXP_TMU.patch index 7864f1c..7c40592 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0014-ucm-imx8m-mini-defconfig-Disable-CONFIG_NXP_TMU.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0014-ucm-imx8m-mini-defconfig-Disable-CONFIG_NXP_TMU.patch @@ -1,7 +1,7 @@ -From 25d672480dabfc27a2bc746dd75e6a30d8e117cc Mon Sep 17 00:00:00 2001 +From 76a3fdd109d7326b5ba48fb92752a6a188e2fda4 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 27 Mar 2019 13:28:51 +0200 -Subject: [PATCH 14/91] ucm-imx8m-mini: defconfig: Disable CONFIG_NXP_TMU +Subject: [PATCH 014/126] ucm-imx8m-mini: defconfig: Disable CONFIG_NXP_TMU Signed-off-by: Valentin Raevsky --- @@ -21,5 +21,5 @@ index b4a9975b33..75531acb20 100644 CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0015-ucm-imx8m-mini-config-Update-h-file.patch b/recipes-bsp/u-boot/compulab/imx8mm/0015-ucm-imx8m-mini-config-Update-h-file.patch index 3dadfa7..fcaded5 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0015-ucm-imx8m-mini-config-Update-h-file.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0015-ucm-imx8m-mini-config-Update-h-file.patch @@ -1,7 +1,7 @@ -From bcba8667218c69dc9ed5a8894094dc0ab38966c4 Mon Sep 17 00:00:00 2001 +From 45fae1b2de5c218f33a822aedd8b58dfa74cc0f4 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Mon, 22 Apr 2019 12:06:29 +0300 -Subject: [PATCH 15/91] ucm-imx8m-mini: config : Update h-file +Subject: [PATCH 015/126] ucm-imx8m-mini: config : Update h-file 1) Add a missing include 2) Remove duplications @@ -46,5 +46,5 @@ index 214dad40ed..046dc243bc 100644 #define CONFIG_CMD_USB_MASS_STORAGE -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0016-ucm-imx8m-mini-spl-Refacoring-ddr_init-call.patch b/recipes-bsp/u-boot/compulab/imx8mm/0016-ucm-imx8m-mini-spl-Refacoring-ddr_init-call.patch index 766fc7c..4871af0 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0016-ucm-imx8m-mini-spl-Refacoring-ddr_init-call.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0016-ucm-imx8m-mini-spl-Refacoring-ddr_init-call.patch @@ -1,7 +1,7 @@ -From e3456703938fdcc1f25c8a845fa1f392c02b27e9 Mon Sep 17 00:00:00 2001 +From 37c1b745004b455d8ad69c5e2da65fa77e39868f Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Sun, 21 Apr 2019 22:17:20 +0300 -Subject: [PATCH 16/91] ucm-imx8m-mini: spl: Refacoring ddr_init() call +Subject: [PATCH 016/126] ucm-imx8m-mini: spl: Refacoring ddr_init() call Signed-off-by: Valentin Raevsky --- @@ -43,5 +43,5 @@ index 34f7683d2d..833183597a 100644 #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0017-ucm-imx8m-mini-Kconfig-Refacoring-ddr-init-config-op.patch b/recipes-bsp/u-boot/compulab/imx8mm/0017-ucm-imx8m-mini-Kconfig-Refacoring-ddr-init-config-op.patch index 92a1969..5a285ea 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0017-ucm-imx8m-mini-Kconfig-Refacoring-ddr-init-config-op.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0017-ucm-imx8m-mini-Kconfig-Refacoring-ddr-init-config-op.patch @@ -1,7 +1,7 @@ -From a07c6130c9cba79e78f333e17529bee57cad61bb Mon Sep 17 00:00:00 2001 +From e0b70a34cfa94ec5399b71f680e4b4dd63b1b379 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Sun, 21 Apr 2019 22:19:27 +0300 -Subject: [PATCH 17/91] ucm-imx8m-mini: Kconfig: Refacoring ddr init config +Subject: [PATCH 017/126] ucm-imx8m-mini: Kconfig: Refacoring ddr init config option Signed-off-by: Valentin Raevsky @@ -32,5 +32,5 @@ index 1da11b2046..e6b334134f 100644 imx8mm_val board configuration approach -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0018-ucm-imx8m-mini-Makefile-Refacoring-ddr-init-build-op.patch b/recipes-bsp/u-boot/compulab/imx8mm/0018-ucm-imx8m-mini-Makefile-Refacoring-ddr-init-build-op.patch index fc4d334..a0dcfdd 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0018-ucm-imx8m-mini-Makefile-Refacoring-ddr-init-build-op.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0018-ucm-imx8m-mini-Makefile-Refacoring-ddr-init-build-op.patch @@ -1,7 +1,7 @@ -From b11be4155cda9dac8afd1fecfab3dc00370f4e3a Mon Sep 17 00:00:00 2001 +From 0001734a9f497a9287fbd1ca9f92d5b30e3cf9e4 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 26 May 2020 21:33:48 +0300 -Subject: [PATCH 18/91] ucm-imx8m-mini: Makefile: Refacoring ddr init build +Subject: [PATCH 018/126] ucm-imx8m-mini: Makefile: Refacoring ddr init build option Signed-off-by: Valentin Raevsky @@ -26,5 +26,5 @@ index b092c281ab..02d3393232 100644 +obj-$(CONFIG_UCM_IMX8M_LPDDR4_VAL) += ddr/ endif -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0019-ucm-imx8m-mini-lpddr4_timing-Add-ucm-imx8m-mini-supp.patch b/recipes-bsp/u-boot/compulab/imx8mm/0019-ucm-imx8m-mini-lpddr4_timing-Add-ucm-imx8m-mini-supp.patch index 2962beb..9a25f6f 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0019-ucm-imx8m-mini-lpddr4_timing-Add-ucm-imx8m-mini-supp.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0019-ucm-imx8m-mini-lpddr4_timing-Add-ucm-imx8m-mini-supp.patch @@ -1,12 +1,12 @@ -From e811ab1437eb7dae3a27027612be3a70a1495481 Mon Sep 17 00:00:00 2001 +From 2ccda2a6956bfaa460fd871a5ba95ccb17ac5b6a Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 24 Apr 2019 13:55:44 +0300 -Subject: [PATCH 19/91] ucm-imx8m-mini: lpddr4_timing: Add ucm-imx8m-mini +Subject: [PATCH 019/126] ucm-imx8m-mini: lpddr4_timing: Add ucm-imx8m-mini support Signed-off-by: Valentin Raevsky --- - board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 39 +++++++++++-------- + board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 39 +++++++++++++++------------ 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/board/compulab/ucm-imx8m-mini/lpddr4_timing.c b/board/compulab/ucm-imx8m-mini/lpddr4_timing.c @@ -102,5 +102,5 @@ index 9c80caea8b..dfd68ea9d8 100644 .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg), .ddrphy_cfg = lpddr4_ddrphy_cfg, -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0020-ucm-imx8m-mini-config-Enable-the-new-LPDDR4-config.patch b/recipes-bsp/u-boot/compulab/imx8mm/0020-ucm-imx8m-mini-config-Enable-the-new-LPDDR4-config.patch index bb5982b..4ea3ae6 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0020-ucm-imx8m-mini-config-Enable-the-new-LPDDR4-config.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0020-ucm-imx8m-mini-config-Enable-the-new-LPDDR4-config.patch @@ -1,7 +1,7 @@ -From 61856dfbba647d1dc7ace4d0e20b6c2dd70356c5 Mon Sep 17 00:00:00 2001 +From 58e467d2a44188a047116e1945a45c4fdecc0c5a Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 1 May 2019 13:48:53 +0300 -Subject: [PATCH 20/91] ucm-imx8m-mini: config: Enable the new LPDDR4 config +Subject: [PATCH 020/126] ucm-imx8m-mini: config: Enable the new LPDDR4 config Signed-off-by: Valentin Raevsky --- @@ -21,5 +21,5 @@ index 75531acb20..d45e7894e8 100644 CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" CONFIG_FIT=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0021-ucm-imx8m-mini-Move-FS-support-to-defconfig.patch b/recipes-bsp/u-boot/compulab/imx8mm/0021-ucm-imx8m-mini-Move-FS-support-to-defconfig.patch index 6e59f0d..b6326fc 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0021-ucm-imx8m-mini-Move-FS-support-to-defconfig.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0021-ucm-imx8m-mini-Move-FS-support-to-defconfig.patch @@ -1,7 +1,7 @@ -From 4a41b9cfee034c1cf37639a02226bc4168a20bc6 Mon Sep 17 00:00:00 2001 +From e58e45b88859f214573df2d15eb727e4369ea6bc Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Tue, 30 Apr 2019 11:32:58 +0300 -Subject: [PATCH 21/91] ucm-imx8m-mini: Move FS support to defconfig +Subject: [PATCH 021/126] ucm-imx8m-mini: Move FS support to defconfig Signed-off-by: Valentin Raevsky --- @@ -49,5 +49,5 @@ index 046dc243bc..8b55fd61e9 100644 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0022-ucm-imx8m-mini-config-CONFIG_IMX_OPTEE-y.patch b/recipes-bsp/u-boot/compulab/imx8mm/0022-ucm-imx8m-mini-config-CONFIG_IMX_OPTEE-y.patch index 68710fa..b825215 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0022-ucm-imx8m-mini-config-CONFIG_IMX_OPTEE-y.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0022-ucm-imx8m-mini-config-CONFIG_IMX_OPTEE-y.patch @@ -1,7 +1,7 @@ -From c5c284852f47909de25675a70a98f41057aec3bb Mon Sep 17 00:00:00 2001 +From 5309c7bfb05e76e83d0091ba0a192961bda6f992 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 1 May 2019 21:48:56 +0300 -Subject: [PATCH 22/91] ucm-imx8m-mini: config: CONFIG_IMX_OPTEE=y +Subject: [PATCH 022/126] ucm-imx8m-mini: config: CONFIG_IMX_OPTEE=y Signed-off-by: Valentin Raevsky --- @@ -21,5 +21,5 @@ index 3bce614aab..d457d263c4 100644 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0023-set-extended-temperature-range.patch b/recipes-bsp/u-boot/compulab/imx8mm/0023-set-extended-temperature-range.patch index 75f82b0..797f71a 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0023-set-extended-temperature-range.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0023-set-extended-temperature-range.patch @@ -1,7 +1,7 @@ -From 9c604bbf23b9951a1e312f7ebaf8891d740047c6 Mon Sep 17 00:00:00 2001 +From a807f865492b22a83840252dde454899265dfbe2 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 3 May 2019 23:00:08 +0300 -Subject: [PATCH 23/91] set extended temperature range +Subject: [PATCH 023/126] set extended temperature range Signed-off-by: Kirill Kapranov --- @@ -24,5 +24,5 @@ index 003cc857df..2e68d13e87 100644 + temperature = <115000>; +}; -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0024-spl-Update-memory-init-code.patch b/recipes-bsp/u-boot/compulab/imx8mm/0024-spl-Update-memory-init-code.patch index 6e04c7c..f571625 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0024-spl-Update-memory-init-code.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0024-spl-Update-memory-init-code.patch @@ -1,46 +1,43 @@ -From 387201dc09e0b2d314be267faf81b16a520d5df2 Mon Sep 17 00:00:00 2001 +From 9054a7839f163d1fd158ce6b887b3e1f6e91de20 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov -Date: Mon, 19 Jul 2021 00:12:30 +0300 -Subject: [PATCH 24/91] spl: Update memory init code +Date: Wed, 8 Dec 2021 12:10:21 +0200 +Subject: [PATCH 024/126] spl: Update memory init code -This patch comprise of all the changes of DDR ID interpretation code up to -migration the code to plat directory +This patch comprise of all the changes of DDR ID interpretation code up +to migration the code to plat directory Signed-off-by: Kirill Kapranov --- - arch/arm/dts/ucm-imx8m-mini.dts | 4 +- - arch/arm/include/asm/arch-imx8m/imx8m_ddr.h | 8 + - arch/arm/lib/bootm.c | 2 + - arch/arm/lib/cache-cp15.c | 5 +- - arch/arm/mach-imx/imx8m/soc.c | 6 +- - arch/arm/mach-imx/misc.c | 2 + - board/compulab/plat/imx8mm/Makefile | 2 + - board/compulab/plat/imx8mm/ddr/Makefile | 5 + - board/compulab/plat/imx8mm/ddr/ddr.c | 207 ++ - board/compulab/plat/imx8mm/ddr/ddr.h | 17 + - .../plat/imx8mm/ddr/lpddr4_timing_01050008.c | 1849 +++++++++++++++ - .../plat/imx8mm/ddr/lpddr4_timing_01061010.c | 1849 +++++++++++++++ - .../plat/imx8mm/ddr/lpddr4_timing_ff000110.c | 1848 +++++++++++++++ - .../plat/imx8mm/ddr/lpddr4_timing_ff020008.c | 1848 +++++++++++++++ - board/compulab/plat/imx8mm/eeprom/Makefile | 6 + - board/compulab/plat/imx8mm/eeprom/eeprom.c | 192 ++ - board/compulab/plat/imx8mm/eeprom/eeprom.h | 30 + - .../compulab/plat/imx8mm/eeprom/eeprom_spl.c | 147 ++ - board/compulab/ucm-imx8m-mini/Kconfig | 27 +- - board/compulab/ucm-imx8m-mini/Makefile | 5 +- - board/compulab/ucm-imx8m-mini/ddr/Makefile | 11 - - board/compulab/ucm-imx8m-mini/ddr/ddr.h | 59 - - board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 260 --- - .../ucm-imx8m-mini/ddr/ddrphy_train.c | 1044 --------- - board/compulab/ucm-imx8m-mini/ddr/helper.c | 103 - - .../ddr/wait_ddrphy_training_complete.c | 103 - - board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 1985 ----------------- - board/compulab/ucm-imx8m-mini/spl.c | 16 +- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 110 +- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 12 + - configs/ucm-imx8m-mini_defconfig | 3 +- - include/configs/ucm-imx8m-mini.h | 14 +- - 32 files changed, 8168 insertions(+), 3611 deletions(-) + arch/arm/dts/ucm-imx8m-mini.dts | 4 +- + arch/arm/include/asm/arch-imx8m/imx8m_ddr.h | 8 + + arch/arm/mach-imx/misc.c | 2 + + board/compulab/plat/imx8mm/Makefile | 2 + + board/compulab/plat/imx8mm/ddr/Makefile | 5 + + board/compulab/plat/imx8mm/ddr/ddr.c | 208 ++ + board/compulab/plat/imx8mm/ddr/ddr.h | 17 + + .../plat/imx8mm/ddr/lpddr4_timing_01050008.c | 1848 ++++++++++++++++++ + .../plat/imx8mm/ddr/lpddr4_timing_01061010.c | 1848 ++++++++++++++++++ + .../plat/imx8mm/ddr/lpddr4_timing_ff000110.c | 1848 ++++++++++++++++++ + .../plat/imx8mm/ddr/lpddr4_timing_ff020008.c | 1848 ++++++++++++++++++ + board/compulab/plat/imx8mm/eeprom/Makefile | 5 + + board/compulab/plat/imx8mm/eeprom/eeprom.c | 192 ++ + board/compulab/plat/imx8mm/eeprom/eeprom.h | 30 + + board/compulab/plat/imx8mm/eeprom/eeprom_spl.c | 147 ++ + board/compulab/ucm-imx8m-mini/Kconfig | 25 +- + board/compulab/ucm-imx8m-mini/Makefile | 5 +- + board/compulab/ucm-imx8m-mini/ddr/Makefile | 11 - + board/compulab/ucm-imx8m-mini/ddr/ddr.h | 59 - + board/compulab/ucm-imx8m-mini/ddr/ddr_init.c | 260 --- + board/compulab/ucm-imx8m-mini/ddr/ddrphy_train.c | 1044 ---------- + board/compulab/ucm-imx8m-mini/ddr/helper.c | 103 - + .../ddr/wait_ddrphy_training_complete.c | 103 - + board/compulab/ucm-imx8m-mini/lpddr4_timing.c | 1985 -------------------- + board/compulab/ucm-imx8m-mini/spl.c | 15 +- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 110 +- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 12 + + configs/ucm-imx8m-mini_defconfig | 3 +- + include/configs/ucm-imx8m-mini.h | 14 +- + 29 files changed, 8156 insertions(+), 3605 deletions(-) create mode 100644 arch/arm/include/asm/arch-imx8m/imx8m_ddr.h create mode 100644 board/compulab/plat/imx8mm/Makefile create mode 100644 board/compulab/plat/imx8mm/ddr/Makefile @@ -92,67 +89,6 @@ index 0000000000..7a59b30d87 +#include + +#endif /* __IMX8M_DDR_H___ */ -diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c -index b3988ae7e3..e1bd628507 100644 ---- a/arch/arm/lib/bootm.c -+++ b/arch/arm/lib/bootm.c -@@ -154,6 +154,8 @@ static void setup_memory_tags(struct bd_info *bd) - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { -+ if(!bd->bi_dram[i].size) -+ continue; - params->hdr.tag = ATAG_MEM; - params->hdr.size = tag_size (tag_mem32); - -diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c -index b6d966e319..3212ea47f3 100644 ---- a/arch/arm/lib/cache-cp15.c -+++ b/arch/arm/lib/cache-cp15.c -@@ -116,8 +116,11 @@ __weak void dram_bank_mmu_setup(int bank) - for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; - i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + - (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT); -- i++) -+ i++) { -+ if(!bd->bi_dram[bank].size) -+ continue; - set_section_dcache(i, DCACHE_DEFAULT_OPTION); -+ } - } - - /* to activate the MMU we need to set up virtual memory: use 1M areas */ -diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c -index 95c23b0df4..d1c76eb102 100644 ---- a/arch/arm/mach-imx/imx8m/soc.c -+++ b/arch/arm/mach-imx/imx8m/soc.c -@@ -222,7 +222,7 @@ __weak int board_phys_sdram_size(phys_size_t *size) - return 0; - } - --int dram_init(void) -+__weak int dram_init(void) - { - unsigned int entry = imx8m_find_dram_entry_in_mem_map(); - phys_size_t sdram_size; -@@ -248,7 +248,7 @@ int dram_init(void) - return 0; - } - --int dram_init_banksize(void) -+__weak int dram_init_banksize(void) - { - int bank = 0; - int ret; -@@ -290,7 +290,7 @@ int dram_init_banksize(void) - return 0; - } - --phys_size_t get_effective_memsize(void) -+__weak phys_size_t get_effective_memsize(void) - { - /* return the first bank as effective memory */ - if (rom_pointer[1]) diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c index 9f53cc2168..5f001926aa 100644 --- a/arch/arm/mach-imx/misc.c @@ -176,22 +112,23 @@ index 0000000000..04b9b2e8f8 +obj-y += eeprom/ diff --git a/board/compulab/plat/imx8mm/ddr/Makefile b/board/compulab/plat/imx8mm/ddr/Makefile new file mode 100644 -index 0000000000..bf8a968277 +index 0000000000..47c48dbae2 --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/Makefile @@ -0,0 +1,5 @@ -+obj-y += ddr.o -+obj-y += lpddr4_timing_ff020008.o -+obj-y += lpddr4_timing_ff000110.o -+obj-y += lpddr4_timing_01061010.o -+obj-y += lpddr4_timing_01050008.o +++obj-y += ddr.o +++obj-y += lpddr4_timing_ff020008.o +++obj-y += lpddr4_timing_ff000110.o +++obj-y += lpddr4_timing_01061010.o +++obj-y += lpddr4_timing_01050008.o diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c new file mode 100644 -index 0000000000..7392fcdfaa +index 0000000000..3c6b6ff489 --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -0,0 +1,207 @@ +@@ -0,0 +1,208 @@ +#include ++#include +#include +#include +#include @@ -423,10 +360,10 @@ index 0000000000..a66e8ec3c4 +#endif diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c new file mode 100644 -index 0000000000..54c3922de5 +index 0000000000..f8e867695d --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c -@@ -0,0 +1,1849 @@ +@@ -0,0 +1,1848 @@ +/* + * Copyright 2018 NXP + * @@ -752,158 +689,158 @@ index 0000000000..54c3922de5 + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, ++ { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, ++ { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, ++ { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, ++ { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, ++ { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, ++ { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, ++ { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, ++ { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, ++ { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, ++ { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, ++ { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, ++ { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, ++ { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, ++ { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, ++ { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, ++ { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, ++ { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, ++ { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, ++ { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, ++ { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, ++ { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, ++ { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, ++ { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, ++ { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, ++ { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, ++ { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, ++ { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, ++ { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, ++ { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, ++ { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, ++ { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, ++ { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, ++ { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, ++ { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, ++ { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, ++ { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, ++ { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, ++ { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, ++ { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, ++ { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, ++ { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, ++ { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, ++ { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, ++ { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, ++ { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, ++ { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, ++ { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, ++ { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, ++ { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, -+ { 0x131d1, 0x0 }, ++ { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, @@ -981,320 +918,320 @@ index 0000000000..54c3922de5 + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, -+ { 0x1018c, 0x0 }, ++ { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, -+ { 0x1108c, 0x0 }, ++ { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, -+ { 0x1118c, 0x0 }, ++ { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, -+ { 0x1208c, 0x0 }, ++ { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, -+ { 0x1218c, 0x0 }, ++ { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, -+ { 0x1308c, 0x0 }, ++ { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, -+ { 0x1318c, 0x0 }, -+ { 0x11318c, 0x0 }, ++ { 0x1318c, 0x0 }, ++ { 0x11318c, 0x0 } + { 0x21318c, 0x0 }, -+ { 0x1008d, 0x0 }, ++ { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, -+ { 0x1018d, 0x0 }, ++ { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, -+ { 0x1108d, 0x0 }, ++ { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, -+ { 0x1118d, 0x0 }, ++ { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, -+ { 0x1208d, 0x0 }, ++ { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, -+ { 0x1218d, 0x0 }, ++ { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, -+ { 0x1308d, 0x0 }, ++ { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, -+ { 0x1318d, 0x0 }, ++ { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, -+ { 0x100c0, 0x0 }, ++ { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, -+ { 0x101c0, 0x0 }, ++ { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, -+ { 0x102c0, 0x0 }, ++ { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, -+ { 0x103c0, 0x0 }, ++ { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, -+ { 0x104c0, 0x0 }, ++ { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, -+ { 0x105c0, 0x0 }, ++ { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, -+ { 0x106c0, 0x0 }, ++ { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, -+ { 0x107c0, 0x0 }, ++ { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, -+ { 0x108c0, 0x0 }, ++ { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, -+ { 0x110c0, 0x0 }, ++ { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, -+ { 0x111c0, 0x0 }, ++ { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, -+ { 0x112c0, 0x0 }, ++ { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, -+ { 0x113c0, 0x0 }, ++ { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, -+ { 0x114c0, 0x0 }, ++ { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, -+ { 0x115c0, 0x0 }, ++ { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, -+ { 0x116c0, 0x0 }, ++ { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, -+ { 0x117c0, 0x0 }, ++ { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, -+ { 0x118c0, 0x0 }, ++ { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, -+ { 0x120c0, 0x0 }, ++ { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, -+ { 0x121c0, 0x0 }, ++ { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, -+ { 0x122c0, 0x0 }, ++ { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, -+ { 0x123c0, 0x0 }, ++ { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, -+ { 0x124c0, 0x0 }, ++ { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, -+ { 0x125c0, 0x0 }, ++ { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, -+ { 0x126c0, 0x0 }, ++ { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, -+ { 0x127c0, 0x0 }, ++ { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, -+ { 0x128c0, 0x0 }, ++ { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, -+ { 0x130c0, 0x0 }, ++ { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, -+ { 0x131c0, 0x0 }, ++ { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, -+ { 0x132c0, 0x0 }, ++ { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, -+ { 0x133c0, 0x0 }, ++ { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, -+ { 0x134c0, 0x0 }, ++ { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, -+ { 0x135c0, 0x0 }, ++ { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, -+ { 0x136c0, 0x0 }, ++ { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, -+ { 0x137c0, 0x0 }, ++ { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, -+ { 0x138c0, 0x0 }, ++ { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, -+ { 0x100c1, 0x0 }, ++ { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, -+ { 0x101c1, 0x0 }, ++ { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, -+ { 0x102c1, 0x0 }, ++ { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, -+ { 0x103c1, 0x0 }, ++ { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, -+ { 0x104c1, 0x0 }, ++ { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, -+ { 0x105c1, 0x0 }, ++ { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, -+ { 0x106c1, 0x0 }, ++ { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, -+ { 0x107c1, 0x0 }, ++ { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, -+ { 0x108c1, 0x0 }, ++ { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, -+ { 0x110c1, 0x0 }, ++ { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, -+ { 0x111c1, 0x0 }, ++ { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, -+ { 0x112c1, 0x0 }, ++ { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, -+ { 0x113c1, 0x0 }, ++ { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, -+ { 0x114c1, 0x0 }, ++ { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, -+ { 0x115c1, 0x0 }, ++ { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, -+ { 0x116c1, 0x0 }, ++ { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, -+ { 0x117c1, 0x0 }, ++ { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, -+ { 0x118c1, 0x0 }, ++ { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, -+ { 0x120c1, 0x0 }, ++ { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, -+ { 0x121c1, 0x0 }, ++ { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, -+ { 0x122c1, 0x0 }, ++ { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, -+ { 0x123c1, 0x0 }, ++ { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, -+ { 0x124c1, 0x0 }, ++ { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, -+ { 0x125c1, 0x0 }, ++ { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, -+ { 0x126c1, 0x0 }, ++ { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, -+ { 0x127c1, 0x0 }, ++ { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, -+ { 0x128c1, 0x0 }, ++ { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, -+ { 0x130c1, 0x0 }, ++ { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, -+ { 0x131c1, 0x0 }, ++ { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, -+ { 0x132c1, 0x0 }, ++ { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, -+ { 0x133c1, 0x0 }, ++ { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, -+ { 0x134c1, 0x0 }, ++ { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, -+ { 0x135c1, 0x0 }, ++ { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, -+ { 0x136c1, 0x0 }, ++ { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, -+ { 0x137c1, 0x0 }, ++ { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, -+ { 0x138c1, 0x0 }, ++ { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, -+ { 0x10020, 0x0 }, ++ { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, -+ { 0x11020, 0x0 }, ++ { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, -+ { 0x12020, 0x0 }, ++ { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, -+ { 0x13020, 0x0 }, ++ { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, -+ { 0x20072, 0x0 }, -+ { 0x20073, 0x0 }, -+ { 0x20074, 0x0 }, -+ { 0x100aa, 0x0 }, -+ { 0x110aa, 0x0 }, -+ { 0x120aa, 0x0 }, -+ { 0x130aa, 0x0 }, -+ { 0x20010, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, -+ { 0x20011, 0x0 }, ++ { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, ++ { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, ++ { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, ++ { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, ++ { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, ++ { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, ++ { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, ++ { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, ++ { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, ++ { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, ++ { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, @@ -1322,57 +1259,57 @@ index 0000000000..54c3922de5 + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, ++ { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, ++ { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, ++ { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, ++ { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, ++ { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, ++ { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, ++ { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, ++ { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, @@ -2275,13 +2212,12 @@ index 0000000000..54c3922de5 + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100, }, +}; -+ diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c new file mode 100644 -index 0000000000..ef7085d909 +index 0000000000..5609f5dcde --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c -@@ -0,0 +1,1849 @@ +@@ -0,0 +1,1848 @@ +/* + * Copyright 2018 NXP + * @@ -2607,158 +2543,158 @@ index 0000000000..ef7085d909 + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, ++ { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, ++ { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, ++ { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, ++ { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, ++ { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, ++ { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, ++ { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, ++ { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, ++ { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, ++ { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, ++ { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, ++ { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, ++ { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, ++ { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, ++ { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, ++ { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, ++ { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, ++ { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, ++ { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, ++ { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, ++ { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, ++ { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, ++ { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, ++ { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, ++ { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, ++ { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, ++ { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, ++ { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, ++ { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, ++ { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, ++ { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, ++ { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, ++ { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, ++ { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, ++ { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, ++ { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, ++ { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, ++ { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, ++ { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, ++ { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, ++ { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, ++ { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, ++ { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, ++ { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, ++ { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, ++ { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, ++ { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, ++ { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, ++ { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, -+ { 0x131d1, 0x0 }, ++ { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, @@ -2836,320 +2772,320 @@ index 0000000000..ef7085d909 + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, -+ { 0x1018c, 0x0 }, ++ { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, -+ { 0x1108c, 0x0 }, ++ { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, -+ { 0x1118c, 0x0 }, ++ { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, -+ { 0x1208c, 0x0 }, ++ { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, -+ { 0x1218c, 0x0 }, ++ { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, -+ { 0x1308c, 0x0 }, ++ { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, -+ { 0x1318c, 0x0 }, ++ { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, -+ { 0x1008d, 0x0 }, ++ { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, -+ { 0x1018d, 0x0 }, ++ { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, -+ { 0x1108d, 0x0 }, ++ { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, -+ { 0x1118d, 0x0 }, ++ { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, -+ { 0x1208d, 0x0 }, ++ { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, -+ { 0x1218d, 0x0 }, ++ { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, -+ { 0x1308d, 0x0 }, ++ { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, -+ { 0x1318d, 0x0 }, ++ { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, -+ { 0x100c0, 0x0 }, ++ { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, -+ { 0x101c0, 0x0 }, ++ { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, -+ { 0x102c0, 0x0 }, ++ { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, -+ { 0x103c0, 0x0 }, ++ { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, -+ { 0x104c0, 0x0 }, ++ { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, -+ { 0x105c0, 0x0 }, ++ { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, -+ { 0x106c0, 0x0 }, ++ { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, -+ { 0x107c0, 0x0 }, ++ { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, -+ { 0x108c0, 0x0 }, ++ { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, -+ { 0x110c0, 0x0 }, ++ { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, -+ { 0x111c0, 0x0 }, ++ { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, -+ { 0x112c0, 0x0 }, ++ { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, -+ { 0x113c0, 0x0 }, ++ { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, -+ { 0x114c0, 0x0 }, ++ { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, -+ { 0x115c0, 0x0 }, ++ { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, -+ { 0x116c0, 0x0 }, ++ { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, -+ { 0x117c0, 0x0 }, ++ { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, -+ { 0x118c0, 0x0 }, ++ { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, -+ { 0x120c0, 0x0 }, ++ { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, -+ { 0x121c0, 0x0 }, ++ { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, -+ { 0x122c0, 0x0 }, ++ { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, -+ { 0x123c0, 0x0 }, ++ { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, -+ { 0x124c0, 0x0 }, ++ { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, -+ { 0x125c0, 0x0 }, ++ { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, -+ { 0x126c0, 0x0 }, ++ { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, -+ { 0x127c0, 0x0 }, ++ { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, -+ { 0x128c0, 0x0 }, ++ { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, -+ { 0x130c0, 0x0 }, ++ { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, -+ { 0x131c0, 0x0 }, ++ { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, -+ { 0x132c0, 0x0 }, ++ { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, -+ { 0x133c0, 0x0 }, ++ { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, -+ { 0x134c0, 0x0 }, ++ { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, -+ { 0x135c0, 0x0 }, ++ { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, -+ { 0x136c0, 0x0 }, ++ { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, -+ { 0x137c0, 0x0 }, ++ { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, -+ { 0x138c0, 0x0 }, ++ { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, -+ { 0x100c1, 0x0 }, ++ { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, -+ { 0x101c1, 0x0 }, ++ { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, -+ { 0x102c1, 0x0 }, ++ { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, -+ { 0x103c1, 0x0 }, ++ { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, -+ { 0x104c1, 0x0 }, ++ { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, -+ { 0x105c1, 0x0 }, ++ { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, -+ { 0x106c1, 0x0 }, ++ { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, -+ { 0x107c1, 0x0 }, ++ { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, -+ { 0x108c1, 0x0 }, ++ { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, -+ { 0x110c1, 0x0 }, ++ { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, -+ { 0x111c1, 0x0 }, ++ { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, -+ { 0x112c1, 0x0 }, ++ { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, -+ { 0x113c1, 0x0 }, ++ { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, -+ { 0x114c1, 0x0 }, ++ { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, -+ { 0x115c1, 0x0 }, ++ { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, -+ { 0x116c1, 0x0 }, ++ { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, -+ { 0x117c1, 0x0 }, ++ { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, -+ { 0x118c1, 0x0 }, ++ { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, -+ { 0x120c1, 0x0 }, ++ { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, -+ { 0x121c1, 0x0 }, ++ { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, -+ { 0x122c1, 0x0 }, ++ { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, -+ { 0x123c1, 0x0 }, ++ { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, -+ { 0x124c1, 0x0 }, ++ { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, -+ { 0x125c1, 0x0 }, ++ { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, -+ { 0x126c1, 0x0 }, ++ { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, -+ { 0x127c1, 0x0 }, ++ { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, -+ { 0x128c1, 0x0 }, ++ { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, -+ { 0x130c1, 0x0 }, ++ { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, -+ { 0x131c1, 0x0 }, ++ { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, -+ { 0x132c1, 0x0 }, ++ { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, -+ { 0x133c1, 0x0 }, ++ { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, -+ { 0x134c1, 0x0 }, ++ { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, -+ { 0x135c1, 0x0 }, ++ { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, -+ { 0x136c1, 0x0 }, ++ { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, -+ { 0x137c1, 0x0 }, ++ { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, -+ { 0x138c1, 0x0 }, ++ { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, -+ { 0x10020, 0x0 }, ++ { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, -+ { 0x11020, 0x0 }, ++ { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, -+ { 0x12020, 0x0 }, ++ { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, -+ { 0x13020, 0x0 }, ++ { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, -+ { 0x20072, 0x0 }, -+ { 0x20073, 0x0 }, -+ { 0x20074, 0x0 }, -+ { 0x100aa, 0x0 }, -+ { 0x110aa, 0x0 }, -+ { 0x120aa, 0x0 }, -+ { 0x130aa, 0x0 }, -+ { 0x20010, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, -+ { 0x20011, 0x0 }, ++ { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, ++ { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, ++ { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, ++ { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, ++ { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, ++ { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, ++ { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, ++ { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, ++ { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, ++ { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, ++ { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, @@ -3177,57 +3113,57 @@ index 0000000000..ef7085d909 + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, ++ { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, ++ { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, ++ { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, ++ { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, ++ { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, ++ { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, ++ { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, ++ { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, @@ -4130,10 +4066,9 @@ index 0000000000..ef7085d909 + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100, }, +}; -+ diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c new file mode 100644 -index 0000000000..4401282800 +index 0000000000..a210a3e972 --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c @@ -0,0 +1,1848 @@ @@ -4462,158 +4397,158 @@ index 0000000000..4401282800 + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, ++ { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, ++ { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, ++ { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, ++ { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, ++ { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, ++ { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, ++ { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, ++ { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, ++ { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, ++ { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, ++ { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, ++ { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, ++ { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, ++ { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, ++ { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, ++ { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, ++ { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, ++ { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, ++ { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, ++ { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, ++ { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, ++ { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, ++ { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, ++ { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, ++ { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, ++ { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, ++ { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, ++ { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, ++ { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, ++ { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, ++ { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, ++ { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, ++ { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, ++ { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, ++ { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, ++ { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, ++ { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, ++ { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, ++ { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, ++ { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, ++ { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, ++ { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, ++ { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, ++ { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, ++ { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, ++ { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, ++ { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, ++ { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, ++ { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, -+ { 0x131d1, 0x0 }, ++ { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, @@ -4691,320 +4626,320 @@ index 0000000000..4401282800 + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, -+ { 0x1018c, 0x0 }, ++ { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, -+ { 0x1108c, 0x0 }, ++ { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, -+ { 0x1118c, 0x0 }, ++ { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, -+ { 0x1208c, 0x0 }, ++ { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, -+ { 0x1218c, 0x0 }, ++ { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, -+ { 0x1308c, 0x0 }, ++ { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, -+ { 0x1318c, 0x0 }, ++ { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, -+ { 0x1008d, 0x0 }, ++ { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, -+ { 0x1018d, 0x0 }, ++ { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, -+ { 0x1108d, 0x0 }, ++ { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, -+ { 0x1118d, 0x0 }, ++ { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, -+ { 0x1208d, 0x0 }, ++ { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, -+ { 0x1218d, 0x0 }, ++ { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, -+ { 0x1308d, 0x0 }, ++ { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, -+ { 0x1318d, 0x0 }, ++ { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, -+ { 0x100c0, 0x0 }, ++ { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, -+ { 0x101c0, 0x0 }, ++ { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, -+ { 0x102c0, 0x0 }, ++ { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, -+ { 0x103c0, 0x0 }, ++ { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, -+ { 0x104c0, 0x0 }, ++ { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, -+ { 0x105c0, 0x0 }, ++ { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, -+ { 0x106c0, 0x0 }, ++ { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, -+ { 0x107c0, 0x0 }, ++ { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, -+ { 0x108c0, 0x0 }, ++ { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, -+ { 0x110c0, 0x0 }, ++ { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, -+ { 0x111c0, 0x0 }, ++ { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, -+ { 0x112c0, 0x0 }, ++ { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, -+ { 0x113c0, 0x0 }, ++ { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, -+ { 0x114c0, 0x0 }, ++ { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, -+ { 0x115c0, 0x0 }, ++ { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, -+ { 0x116c0, 0x0 }, ++ { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, -+ { 0x117c0, 0x0 }, ++ { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, -+ { 0x118c0, 0x0 }, ++ { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, -+ { 0x120c0, 0x0 }, ++ { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, -+ { 0x121c0, 0x0 }, ++ { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, -+ { 0x122c0, 0x0 }, ++ { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, -+ { 0x123c0, 0x0 }, ++ { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, -+ { 0x124c0, 0x0 }, ++ { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, -+ { 0x125c0, 0x0 }, ++ { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, -+ { 0x126c0, 0x0 }, ++ { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, -+ { 0x127c0, 0x0 }, ++ { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, -+ { 0x128c0, 0x0 }, ++ { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, -+ { 0x130c0, 0x0 }, ++ { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, -+ { 0x131c0, 0x0 }, ++ { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, -+ { 0x132c0, 0x0 }, ++ { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, -+ { 0x133c0, 0x0 }, ++ { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, -+ { 0x134c0, 0x0 }, ++ { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, -+ { 0x135c0, 0x0 }, ++ { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, -+ { 0x136c0, 0x0 }, ++ { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, -+ { 0x137c0, 0x0 }, ++ { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, -+ { 0x138c0, 0x0 }, ++ { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, -+ { 0x100c1, 0x0 }, ++ { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, -+ { 0x101c1, 0x0 }, ++ { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, -+ { 0x102c1, 0x0 }, ++ { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, -+ { 0x103c1, 0x0 }, ++ { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, -+ { 0x104c1, 0x0 }, ++ { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, -+ { 0x105c1, 0x0 }, ++ { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, -+ { 0x106c1, 0x0 }, ++ { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, -+ { 0x107c1, 0x0 }, ++ { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, -+ { 0x108c1, 0x0 }, ++ { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, -+ { 0x110c1, 0x0 }, ++ { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, -+ { 0x111c1, 0x0 }, ++ { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, -+ { 0x112c1, 0x0 }, ++ { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, -+ { 0x113c1, 0x0 }, ++ { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, -+ { 0x114c1, 0x0 }, ++ { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, -+ { 0x115c1, 0x0 }, ++ { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, -+ { 0x116c1, 0x0 }, ++ { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, -+ { 0x117c1, 0x0 }, ++ { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, -+ { 0x118c1, 0x0 }, ++ { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, -+ { 0x120c1, 0x0 }, ++ { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, -+ { 0x121c1, 0x0 }, ++ { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, -+ { 0x122c1, 0x0 }, ++ { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, -+ { 0x123c1, 0x0 }, ++ { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, -+ { 0x124c1, 0x0 }, ++ { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, -+ { 0x125c1, 0x0 }, ++ { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, -+ { 0x126c1, 0x0 }, ++ { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, -+ { 0x127c1, 0x0 }, ++ { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, -+ { 0x128c1, 0x0 }, ++ { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, -+ { 0x130c1, 0x0 }, ++ { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, -+ { 0x131c1, 0x0 }, ++ { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, -+ { 0x132c1, 0x0 }, ++ { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, -+ { 0x133c1, 0x0 }, ++ { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, -+ { 0x134c1, 0x0 }, ++ { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, -+ { 0x135c1, 0x0 }, ++ { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, -+ { 0x136c1, 0x0 }, ++ { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, -+ { 0x137c1, 0x0 }, ++ { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, -+ { 0x138c1, 0x0 }, ++ { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, -+ { 0x10020, 0x0 }, ++ { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, -+ { 0x11020, 0x0 }, ++ { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, -+ { 0x12020, 0x0 }, ++ { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, -+ { 0x13020, 0x0 }, ++ { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, -+ { 0x20072, 0x0 }, -+ { 0x20073, 0x0 }, -+ { 0x20074, 0x0 }, -+ { 0x100aa, 0x0 }, -+ { 0x110aa, 0x0 }, -+ { 0x120aa, 0x0 }, -+ { 0x130aa, 0x0 }, -+ { 0x20010, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, -+ { 0x20011, 0x0 }, ++ { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, ++ { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, ++ { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, ++ { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, ++ { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, ++ { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, ++ { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, ++ { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, ++ { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, ++ { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, ++ { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, @@ -5032,57 +4967,57 @@ index 0000000000..4401282800 + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, ++ { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, ++ { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, ++ { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, ++ { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, ++ { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, ++ { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, ++ { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, ++ { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, @@ -5987,7 +5922,7 @@ index 0000000000..4401282800 +}; diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c new file mode 100644 -index 0000000000..7473c96e8d +index 0000000000..d57d19d155 --- /dev/null +++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c @@ -0,0 +1,1848 @@ @@ -6316,158 +6251,158 @@ index 0000000000..7473c96e8d + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { -+ { 0x200b2, 0x0 }, ++ { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, -+ { 0x200cb, 0x0 }, -+ { 0x10043, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, -+ { 0x10143, 0x0 }, ++ { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, -+ { 0x11043, 0x0 }, ++ { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, -+ { 0x11143, 0x0 }, ++ { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, -+ { 0x12043, 0x0 }, ++ { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, -+ { 0x12143, 0x0 }, ++ { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, -+ { 0x13043, 0x0 }, ++ { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, -+ { 0x13143, 0x0 }, ++ { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, -+ { 0x80, 0x0 }, ++ { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, -+ { 0x1080, 0x0 }, ++ { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, -+ { 0x2080, 0x0 }, ++ { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, -+ { 0x3080, 0x0 }, ++ { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, -+ { 0x4080, 0x0 }, ++ { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, -+ { 0x5080, 0x0 }, ++ { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, -+ { 0x6080, 0x0 }, ++ { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, -+ { 0x7080, 0x0 }, ++ { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, -+ { 0x8080, 0x0 }, ++ { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, -+ { 0x9080, 0x0 }, ++ { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, -+ { 0x10080, 0x0 }, ++ { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, -+ { 0x10180, 0x0 }, ++ { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, -+ { 0x11080, 0x0 }, ++ { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, -+ { 0x11180, 0x0 }, ++ { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, -+ { 0x12080, 0x0 }, ++ { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, -+ { 0x12180, 0x0 }, ++ { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, -+ { 0x13080, 0x0 }, ++ { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, -+ { 0x13180, 0x0 }, ++ { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, -+ { 0x10081, 0x0 }, ++ { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, -+ { 0x10181, 0x0 }, ++ { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, -+ { 0x11081, 0x0 }, ++ { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, -+ { 0x11181, 0x0 }, ++ { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, -+ { 0x12081, 0x0 }, ++ { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, -+ { 0x12181, 0x0 }, ++ { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, -+ { 0x13081, 0x0 }, ++ { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, -+ { 0x13181, 0x0 }, ++ { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, -+ { 0x100d0, 0x0 }, ++ { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, -+ { 0x101d0, 0x0 }, ++ { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, -+ { 0x110d0, 0x0 }, ++ { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, -+ { 0x111d0, 0x0 }, ++ { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, -+ { 0x120d0, 0x0 }, ++ { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, -+ { 0x121d0, 0x0 }, ++ { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, -+ { 0x130d0, 0x0 }, ++ { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, -+ { 0x131d0, 0x0 }, ++ { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, -+ { 0x100d1, 0x0 }, ++ { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, -+ { 0x101d1, 0x0 }, ++ { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, -+ { 0x110d1, 0x0 }, ++ { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, -+ { 0x111d1, 0x0 }, ++ { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, -+ { 0x120d1, 0x0 }, ++ { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, -+ { 0x121d1, 0x0 }, ++ { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, -+ { 0x130d1, 0x0 }, ++ { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, -+ { 0x131d1, 0x0 }, ++ { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, @@ -6545,320 +6480,320 @@ index 0000000000..7473c96e8d + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, -+ { 0x1018c, 0x0 }, ++ { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, -+ { 0x1108c, 0x0 }, ++ { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, -+ { 0x1118c, 0x0 }, ++ { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, -+ { 0x1208c, 0x0 }, ++ { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, -+ { 0x1218c, 0x0 }, ++ { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, -+ { 0x1308c, 0x0 }, ++ { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, -+ { 0x1318c, 0x0 }, ++ { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, -+ { 0x1008d, 0x0 }, ++ { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, -+ { 0x1018d, 0x0 }, ++ { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, -+ { 0x1108d, 0x0 }, ++ { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, -+ { 0x1118d, 0x0 }, ++ { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, -+ { 0x1208d, 0x0 }, ++ { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, -+ { 0x1218d, 0x0 }, ++ { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, -+ { 0x1308d, 0x0 }, ++ { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, -+ { 0x1318d, 0x0 }, ++ { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, -+ { 0x100c0, 0x0 }, ++ { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, -+ { 0x101c0, 0x0 }, ++ { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, -+ { 0x102c0, 0x0 }, ++ { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, -+ { 0x103c0, 0x0 }, ++ { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, -+ { 0x104c0, 0x0 }, ++ { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, -+ { 0x105c0, 0x0 }, ++ { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, -+ { 0x106c0, 0x0 }, ++ { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, -+ { 0x107c0, 0x0 }, ++ { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, -+ { 0x108c0, 0x0 }, ++ { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, -+ { 0x110c0, 0x0 }, ++ { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, -+ { 0x111c0, 0x0 }, ++ { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, -+ { 0x112c0, 0x0 }, ++ { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, -+ { 0x113c0, 0x0 }, ++ { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, -+ { 0x114c0, 0x0 }, ++ { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, -+ { 0x115c0, 0x0 }, ++ { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, -+ { 0x116c0, 0x0 }, ++ { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, -+ { 0x117c0, 0x0 }, ++ { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, -+ { 0x118c0, 0x0 }, ++ { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, -+ { 0x120c0, 0x0 }, ++ { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, -+ { 0x121c0, 0x0 }, ++ { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, -+ { 0x122c0, 0x0 }, ++ { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, -+ { 0x123c0, 0x0 }, ++ { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, -+ { 0x124c0, 0x0 }, ++ { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, -+ { 0x125c0, 0x0 }, ++ { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, -+ { 0x126c0, 0x0 }, ++ { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, -+ { 0x127c0, 0x0 }, ++ { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, -+ { 0x128c0, 0x0 }, ++ { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, -+ { 0x130c0, 0x0 }, ++ { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, -+ { 0x131c0, 0x0 }, ++ { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, -+ { 0x132c0, 0x0 }, ++ { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, -+ { 0x133c0, 0x0 }, ++ { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, -+ { 0x134c0, 0x0 }, ++ { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, -+ { 0x135c0, 0x0 }, ++ { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, -+ { 0x136c0, 0x0 }, ++ { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, -+ { 0x137c0, 0x0 }, ++ { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, -+ { 0x138c0, 0x0 }, ++ { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, -+ { 0x100c1, 0x0 }, ++ { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, -+ { 0x101c1, 0x0 }, ++ { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, -+ { 0x102c1, 0x0 }, ++ { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, -+ { 0x103c1, 0x0 }, ++ { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, -+ { 0x104c1, 0x0 }, ++ { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, -+ { 0x105c1, 0x0 }, ++ { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, -+ { 0x106c1, 0x0 }, ++ { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, -+ { 0x107c1, 0x0 }, ++ { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, -+ { 0x108c1, 0x0 }, ++ { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, -+ { 0x110c1, 0x0 }, ++ { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, -+ { 0x111c1, 0x0 }, ++ { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, -+ { 0x112c1, 0x0 }, ++ { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, -+ { 0x113c1, 0x0 }, ++ { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, -+ { 0x114c1, 0x0 }, ++ { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, -+ { 0x115c1, 0x0 }, ++ { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, -+ { 0x116c1, 0x0 }, ++ { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, -+ { 0x117c1, 0x0 }, ++ { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, -+ { 0x118c1, 0x0 }, ++ { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, -+ { 0x120c1, 0x0 }, ++ { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, -+ { 0x121c1, 0x0 }, ++ { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, -+ { 0x122c1, 0x0 }, ++ { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, -+ { 0x123c1, 0x0 }, ++ { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, -+ { 0x124c1, 0x0 }, ++ { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, -+ { 0x125c1, 0x0 }, ++ { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, -+ { 0x126c1, 0x0 }, ++ { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, -+ { 0x127c1, 0x0 }, ++ { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, -+ { 0x128c1, 0x0 }, ++ { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, -+ { 0x130c1, 0x0 }, ++ { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, -+ { 0x131c1, 0x0 }, ++ { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, -+ { 0x132c1, 0x0 }, ++ { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, -+ { 0x133c1, 0x0 }, ++ { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, -+ { 0x134c1, 0x0 }, ++ { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, -+ { 0x135c1, 0x0 }, ++ { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, -+ { 0x136c1, 0x0 }, ++ { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, -+ { 0x137c1, 0x0 }, ++ { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, -+ { 0x138c1, 0x0 }, ++ { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, -+ { 0x10020, 0x0 }, ++ { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, -+ { 0x11020, 0x0 }, ++ { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, -+ { 0x12020, 0x0 }, ++ { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, -+ { 0x13020, 0x0 }, ++ { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, -+ { 0x20072, 0x0 }, -+ { 0x20073, 0x0 }, -+ { 0x20074, 0x0 }, -+ { 0x100aa, 0x0 }, -+ { 0x110aa, 0x0 }, -+ { 0x120aa, 0x0 }, -+ { 0x130aa, 0x0 }, -+ { 0x20010, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, -+ { 0x20011, 0x0 }, ++ { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, -+ { 0x100ae, 0x0 }, ++ { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, -+ { 0x100af, 0x0 }, ++ { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, -+ { 0x110ae, 0x0 }, ++ { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, -+ { 0x110af, 0x0 }, ++ { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, -+ { 0x120ae, 0x0 }, ++ { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, -+ { 0x120af, 0x0 }, ++ { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, -+ { 0x130ae, 0x0 }, ++ { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, -+ { 0x130af, 0x0 }, ++ { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, -+ { 0x20020, 0x0 }, ++ { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, -+ { 0x100a0, 0x0 }, ++ { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, @@ -6886,57 +6821,57 @@ index 0000000000..7473c96e8d + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, -+ { 0x130a4, 0x0 }, -+ { 0x130a5, 0x0 }, -+ { 0x130a6, 0x0 }, -+ { 0x130a7, 0x0 }, -+ { 0x2007c, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, -+ { 0x2007d, 0x0 }, ++ { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, -+ { 0x400fd, 0x0 }, -+ { 0x400c0, 0x0 }, -+ { 0x90201, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, -+ { 0x90202, 0x0 }, ++ { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, -+ { 0x90203, 0x0 }, ++ { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, -+ { 0x90204, 0x0 }, ++ { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, -+ { 0x90205, 0x0 }, ++ { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, -+ { 0x90206, 0x0 }, ++ { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, -+ { 0x90207, 0x0 }, ++ { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, -+ { 0x90208, 0x0 }, ++ { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, -+ { 0x10062, 0x0 }, -+ { 0x10162, 0x0 }, -+ { 0x10262, 0x0 }, -+ { 0x10362, 0x0 }, -+ { 0x10462, 0x0 }, -+ { 0x10562, 0x0 }, -+ { 0x10662, 0x0 }, -+ { 0x10762, 0x0 }, -+ { 0x10862, 0x0 }, -+ { 0x11062, 0x0 }, -+ { 0x11162, 0x0 }, -+ { 0x11262, 0x0 }, -+ { 0x11362, 0x0 }, -+ { 0x11462, 0x0 }, -+ { 0x11562, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, @@ -7841,16 +7776,15 @@ index 0000000000..7473c96e8d +}; diff --git a/board/compulab/plat/imx8mm/eeprom/Makefile b/board/compulab/plat/imx8mm/eeprom/Makefile new file mode 100644 -index 0000000000..6e61b4a414 +index 0000000000..9ec4d29dc1 --- /dev/null +++ b/board/compulab/plat/imx8mm/eeprom/Makefile -@@ -0,0 +1,6 @@ +@@ -0,0 +1,5 @@ +ifdef CONFIG_SPL_BUILD +obj-y += eeprom_spl.o +else +obj-y += eeprom.o +endif -+ diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom.c b/board/compulab/plat/imx8mm/eeprom/eeprom.c new file mode 100644 index 0000000000..fd1fa49e21 @@ -8239,7 +8173,7 @@ index 0000000000..09a04fda92 + return board_osize; +}; diff --git a/board/compulab/ucm-imx8m-mini/Kconfig b/board/compulab/ucm-imx8m-mini/Kconfig -index e6b334134f..d687db7686 100644 +index e6b334134f..d93df9063c 100644 --- a/board/compulab/ucm-imx8m-mini/Kconfig +++ b/board/compulab/ucm-imx8m-mini/Kconfig @@ -10,24 +10,25 @@ config SYS_CONFIG_NAME @@ -8270,8 +8204,7 @@ index e6b334134f..d687db7686 100644 +config RAM_2G + bool "RAM_2G" help -- imx8mm_val board configuration approach -+ This option configures 2G RAM only + imx8mm_val board configuration approach -endchoice +config RAM_4G @@ -11906,14 +11839,13 @@ index dfd68ea9d8..0000000000 - .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), -}; diff --git a/board/compulab/ucm-imx8m-mini/spl.c b/board/compulab/ucm-imx8m-mini/spl.c -index 833183597a..aed967cce0 100644 +index 833183597a..61ac039ff3 100644 --- a/board/compulab/ucm-imx8m-mini/spl.c +++ b/board/compulab/ucm-imx8m-mini/spl.c -@@ -19,26 +19,12 @@ - #include +@@ -20,25 +20,12 @@ #include #include -- + -#ifdef CONFIG_UCM_IMX8M_LPDDR4 #include -static void __dram_init(void) { @@ -12150,5 +12082,5 @@ index 8b55fd61e9..7bbd0e73f9 100644 #define CONFIG_BAUDRATE 115200 -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0025-dts-Enable-USB-OTG-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0025-dts-Enable-USB-OTG-support.patch index aeec469..c19640b 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0025-dts-Enable-USB-OTG-support.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0025-dts-Enable-USB-OTG-support.patch @@ -1,7 +1,7 @@ -From d4ff862d15542ac90847b63ac784dd2bc19c5e09 Mon Sep 17 00:00:00 2001 +From f6f8bfbfaa80842b1ecd7d1b3ce44b6404034468 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 31 Aug 2019 20:18:05 +0300 -Subject: [PATCH 25/91] dts: Enable USB OTG support +Subject: [PATCH 025/126] dts: Enable USB OTG support Enable USB OTG support, necessary for USB load and UMS. @@ -25,5 +25,5 @@ index 6e59d1101c..c93cf1ac7a 100644 &usbotg2 { -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0026-env-Change-boot-sequence.patch b/recipes-bsp/u-boot/compulab/imx8mm/0026-env-Change-boot-sequence.patch index badebf9..f676d12 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0026-env-Change-boot-sequence.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0026-env-Change-boot-sequence.patch @@ -1,7 +1,7 @@ -From 17c8e369aaf449e624c40eda88e184856c5e3875 Mon Sep 17 00:00:00 2001 +From 56cc0e465092c676b1f5d1401454bad06e316277 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 31 Aug 2019 20:20:34 +0300 -Subject: [PATCH 26/91] env: Change boot sequence +Subject: [PATCH 026/126] env: Change boot sequence Boot commands have been refactored to make them uniform and simplify a boot sequence edition. @@ -12,7 +12,7 @@ if not, a pair of files Image + default DTB. Signed-off-by: Kirill Kapranov --- - include/configs/ucm-imx8m-mini.h | 55 ++++++++++++++++---------------- + include/configs/ucm-imx8m-mini.h | 55 ++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h @@ -99,5 +99,5 @@ index 7bbd0e73f9..e9e3b2cb1c 100644 /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0027-Enable-usb-ethernet-dongle-asix-88179.patch b/recipes-bsp/u-boot/compulab/imx8mm/0027-Enable-usb-ethernet-dongle-asix-88179.patch index 215f26f..db50085 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0027-Enable-usb-ethernet-dongle-asix-88179.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0027-Enable-usb-ethernet-dongle-asix-88179.patch @@ -1,7 +1,7 @@ -From bdcd65e611083d56423826a4e4e0e99722cbffee Mon Sep 17 00:00:00 2001 +From b366281614785327ce65a2d0b000c2d187198b66 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 10 Sep 2019 20:49:44 +0300 -Subject: [PATCH 27/91] Enable usb ethernet dongle asix-88179 +Subject: [PATCH 027/126] Enable usb ethernet dongle asix-88179 Enable the dongle. In order to use it issue: usb start @@ -26,5 +26,5 @@ index 8dbf544e86..3d750f7fe1 100644 CONFIG_PINCTRL_IMX8M=y CONFIG_DM_REGULATOR=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0028-ucm-ims8m-mini-dts-wp-enable.patch b/recipes-bsp/u-boot/compulab/imx8mm/0028-ucm-ims8m-mini-dts-wp-enable.patch index 751b3f3..333e599 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0028-ucm-ims8m-mini-dts-wp-enable.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0028-ucm-ims8m-mini-dts-wp-enable.patch @@ -1,7 +1,7 @@ -From 4b0fb07d9a1a69d4e47426aef870880128ba0ad4 Mon Sep 17 00:00:00 2001 +From 59f78def6097a2a24793ae3f92aae9bdc88af39b Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Wed, 1 Apr 2020 14:52:21 +0300 -Subject: [PATCH 28/91] ucm-ims8m-mini: dts: wp enable +Subject: [PATCH 028/126] ucm-ims8m-mini: dts: wp enable Write protection enables for uSD card (the device usdhc2). @@ -31,5 +31,5 @@ index c93cf1ac7a..3d8be3a09a 100644 vmmc-supply = <®_usdhc2_vmmc>; status = "okay"; -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0029-SPL-Enable-bus-I2C2.patch b/recipes-bsp/u-boot/compulab/imx8mm/0029-SPL-Enable-bus-I2C2.patch index af37d1d..1dc4dbd 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0029-SPL-Enable-bus-I2C2.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0029-SPL-Enable-bus-I2C2.patch @@ -1,7 +1,7 @@ -From 57d7bed9f9a28495b776238d200040708b8b6f21 Mon Sep 17 00:00:00 2001 +From 84e74f109aab8f75430d60e67acbc10a3f95988b Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 5 Apr 2020 17:19:21 +0300 -Subject: [PATCH 29/91] SPL: Enable bus I2C2 +Subject: [PATCH 029/126] SPL: Enable bus I2C2 Enable the bus i2c1 (I2C2 in a schematic drawing) on SPL stage. @@ -66,5 +66,5 @@ index e9e3b2cb1c..2400afe7ab 100644 #define CONFIG_CMD_READ #define CONFIG_SERIAL_TAG -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0030-SPL-Adjust-voltage-for-correct-DDR-initialisation.patch b/recipes-bsp/u-boot/compulab/imx8mm/0030-SPL-Adjust-voltage-for-correct-DDR-initialisation.patch index 7787db7..f73c09b 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0030-SPL-Adjust-voltage-for-correct-DDR-initialisation.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0030-SPL-Adjust-voltage-for-correct-DDR-initialisation.patch @@ -1,7 +1,7 @@ -From f64251dfd83b627c24e1de2d74ecfcf2a4db206c Mon Sep 17 00:00:00 2001 +From 584687f751c256836235d5b4321dbf2f427af6b3 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 5 Apr 2020 17:36:34 +0300 -Subject: [PATCH 30/91] SPL: Adjust voltage for correct DDR initialisation +Subject: [PATCH 030/126] SPL: Adjust voltage for correct DDR initialisation The voltage values, that PMIC BD71847 produces, differ from required and need to be adjusted before a memory training procedure. @@ -15,10 +15,10 @@ Signed-off-by: Kirill Kapranov 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/board/compulab/ucm-imx8m-mini/spl.c b/board/compulab/ucm-imx8m-mini/spl.c -index aed967cce0..febd27c93e 100644 +index 61ac039ff3..2231cc1f6f 100644 --- a/board/compulab/ucm-imx8m-mini/spl.c +++ b/board/compulab/ucm-imx8m-mini/spl.c -@@ -174,8 +174,14 @@ int power_init_board(void) +@@ -175,8 +175,14 @@ int power_init_board(void) /* unlock the PMIC regs */ pmic_reg_write(p, BD71837_REGLOCK, 0x1); @@ -36,5 +36,5 @@ index aed967cce0..febd27c93e 100644 /* lock the PMIC regs */ pmic_reg_write(p, BD71837_REGLOCK, 0x11); -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0031-Enable-env-import-export-commands.patch b/recipes-bsp/u-boot/compulab/imx8mm/0031-Enable-env-import-export-commands.patch index 5f4f252..3f4b93e 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0031-Enable-env-import-export-commands.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0031-Enable-env-import-export-commands.patch @@ -1,7 +1,7 @@ -From a31a3902562fcc8b38183bd6ccd25cd9d333e0fb Mon Sep 17 00:00:00 2001 +From bf2f4b36ada27bf72a642f2e55ac39d5cfd9edaa Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 17 Apr 2020 20:38:46 +0300 -Subject: [PATCH 31/91] Enable env import/export commands +Subject: [PATCH 031/126] Enable env import/export commands Signed-off-by: Kirill Kapranov --- @@ -22,5 +22,5 @@ index 2400afe7ab..dfd7d9980f 100644 #undef CONFIG_CMD_CRC32 -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0032-env-Add-env_mmcdev-variable-handling.patch b/recipes-bsp/u-boot/compulab/imx8mm/0032-env-Add-env_mmcdev-variable-handling.patch index e1f3926..48f8152 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0032-env-Add-env_mmcdev-variable-handling.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0032-env-Add-env_mmcdev-variable-handling.patch @@ -1,7 +1,7 @@ -From d5e945141af4b6656d741caa0c3a7840b3c7204f Mon Sep 17 00:00:00 2001 +From 486ddc5f04efb9755d8b8ea07b9067ff35b21ed3 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 18 Apr 2020 19:17:47 +0300 -Subject: [PATCH 32/91] env: Add env_mmcdev variable handling +Subject: [PATCH 032/126] env: Add env_mmcdev variable handling Handle the variable env_mmcdev the following way: If the variable is set to an unsigned value, an actual environment is to be @@ -34,5 +34,5 @@ index 97331e55d9..fca256439b 100644 int mmc_map_to_kernel_blk(int devno) -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0033-Trivial-cleaning.patch b/recipes-bsp/u-boot/compulab/imx8mm/0033-Trivial-cleaning.patch index b72aabe..6ca53cb 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0033-Trivial-cleaning.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0033-Trivial-cleaning.patch @@ -1,40 +1,31 @@ -From 1787abeea8fbcb9e284f5b2d4a4ba06bef8c2251 Mon Sep 17 00:00:00 2001 +From e2f68b309bbba5efba12713b4732bbdcc23d809c Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 19 Jul 2021 00:22:59 +0300 -Subject: [PATCH 33/91] Trivial cleaning +Subject: [PATCH 033/126] Trivial cleaning Signed-off-by: Kirill Kapranov --- - arch/arm/dts/Makefile | 4 ++-- + arch/arm/dts/Makefile | 2 ++ board/compulab/common/Makefile | 4 +++- board/compulab/common/common.c | 3 ++- board/compulab/common/common.h | 3 ++- board/compulab/common/eeprom.h | 3 ++- board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 2 +- - 6 files changed, 12 insertions(+), 7 deletions(-) + 6 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 2b81a2bc62..6238d142af 100644 +index c31d483784..9781d3451c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -880,6 +880,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ - dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ +@@ -888,6 +888,8 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ imxrt1020-evk.dtb + dtb-$(CONFIG_ARCH_IMX8ULP) += imx8ulp-evk.dtb imx8ulp-evk-i3c.dtb +dtb-$(CONFIG_TARGET_UCM_IMX8M_MINI) += ucm-imx8m-mini.dtb + dtb-$(CONFIG_RCAR_GEN2) += \ r8a7790-lager-u-boot.dtb \ r8a7790-stout-u-boot.dtb \ -@@ -890,8 +892,6 @@ dtb-$(CONFIG_RCAR_GEN2) += \ - r8a7794-alt-u-boot.dtb \ - r8a7794-silk-u-boot.dtb - --dtb-$(CONFIG_TARGET_UCM_IMX8M_MINI) += ucm-imx8m-mini.dtb -- - dtb-$(CONFIG_RCAR_GEN3) += \ - r8a774a1-beacon-rzg2m-kit.dtb \ - r8a774b1-beacon-rzg2n-kit.dtb \ diff --git a/board/compulab/common/Makefile b/board/compulab/common/Makefile index 500858035f..0a26fdb426 100644 --- a/board/compulab/common/Makefile @@ -111,5 +102,5 @@ index fca256439b..cf3cefb30d 100644 switch (value) { case 4096: -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0034-Migration-to-rel_imx_5.4.3.patch b/recipes-bsp/u-boot/compulab/imx8mm/0034-Migration-to-rel_imx_5.4.3.patch index fc29153..949db8e 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0034-Migration-to-rel_imx_5.4.3.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0034-Migration-to-rel_imx_5.4.3.patch @@ -1,45 +1,17 @@ -From 7d4680efc8133c631955c64518c6966505317644 Mon Sep 17 00:00:00 2001 +From 42104f3ba72deafdec230b2f0d82ba3741ab25fa Mon Sep 17 00:00:00 2001 From: Kirill Kapranov -Date: Mon, 19 Jul 2021 00:26:38 +0300 -Subject: [PATCH 34/91] Migration to rel_imx_5.4.3 +Date: Wed, 8 Dec 2021 14:56:15 +0200 +Subject: [PATCH 034/126] Migration to rel_imx_5.4.3 Signed-off-by: Kirill Kapranov --- - arch/arm/lib/bootm.c | 2 +- - arch/arm/lib/cache-cp15.c | 2 +- arch/arm/mach-imx/misc.c | 2 -- board/compulab/ucm-imx8m-mini/spl.c | 13 +++++++------ - board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 11 ++++++----- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 10 ++++++---- configs/ucm-imx8m-mini_defconfig | 7 ++++++- include/configs/ucm-imx8m-mini.h | 5 +++-- - 7 files changed, 24 insertions(+), 18 deletions(-) + 5 files changed, 22 insertions(+), 15 deletions(-) -diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c -index e1bd628507..e4021e1025 100644 ---- a/arch/arm/lib/bootm.c -+++ b/arch/arm/lib/bootm.c -@@ -154,7 +154,7 @@ static void setup_memory_tags(struct bd_info *bd) - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { -- if(!bd->bi_dram[i].size) -+ if (!gd->bd->bi_dram[i].size) - continue; - params->hdr.tag = ATAG_MEM; - params->hdr.size = tag_size (tag_mem32); -diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c -index 3212ea47f3..f6a9108fb9 100644 ---- a/arch/arm/lib/cache-cp15.c -+++ b/arch/arm/lib/cache-cp15.c -@@ -117,7 +117,7 @@ __weak void dram_bank_mmu_setup(int bank) - i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + - (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT); - i++) { -- if(!bd->bi_dram[bank].size) -+ if(!bd->bi_dram[bank].size) - continue; - set_section_dcache(i, DCACHE_DEFAULT_OPTION); - } diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c index 5f001926aa..9f53cc2168 100644 --- a/arch/arm/mach-imx/misc.c @@ -54,19 +26,19 @@ index 5f001926aa..9f53cc2168 100644 gd->bd->bi_dram[bank].size; if (sp >= bank_end) diff --git a/board/compulab/ucm-imx8m-mini/spl.c b/board/compulab/ucm-imx8m-mini/spl.c -index febd27c93e..316e8100fc 100644 +index 2231cc1f6f..fa1943477e 100644 --- a/board/compulab/ucm-imx8m-mini/spl.c +++ b/board/compulab/ucm-imx8m-mini/spl.c -@@ -19,7 +19,7 @@ - #include +@@ -20,7 +20,7 @@ #include #include + -#include +#include #include "ddr/ddr.h" #include "ucm-imx8m-mini.h" -@@ -99,6 +99,7 @@ int board_mmc_init(bd_t *bis) +@@ -100,6 +100,7 @@ int board_mmc_init(bd_t *bis) for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { case 0: @@ -74,7 +46,7 @@ index febd27c93e..316e8100fc 100644 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -@@ -108,6 +109,7 @@ int board_mmc_init(bd_t *bis) +@@ -109,6 +110,7 @@ int board_mmc_init(bd_t *bis) gpio_direction_output(USDHC2_PWR_GPIO, 1); break; case 1: @@ -82,7 +54,7 @@ index febd27c93e..316e8100fc 100644 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); imx_iomux_v3_setup_multiple_pads( usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); -@@ -217,10 +219,12 @@ int board_fit_config_name_match(const char *name) +@@ -218,10 +220,12 @@ int board_fit_config_name_match(const char *name) void board_init_f(ulong dummy) { int ret; @@ -97,7 +69,7 @@ index febd27c93e..316e8100fc 100644 arch_cpu_init(); board_early_init_f(); -@@ -229,9 +233,6 @@ void board_init_f(ulong dummy) +@@ -230,9 +234,6 @@ void board_init_f(ulong dummy) preloader_console_init(); @@ -108,7 +80,7 @@ index febd27c93e..316e8100fc 100644 if (ret) { debug("spl_init() failed: %d\n", ret); diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -index cf3cefb30d..fa06db9ec6 100644 +index cf3cefb30d..f262acf414 100644 --- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c @@ -139,6 +139,8 @@ int board_early_init_f(void) @@ -120,11 +92,10 @@ index cf3cefb30d..fa06db9ec6 100644 return 0; } -@@ -149,11 +151,10 @@ int board_postclk_init(void) - return 0; +@@ -150,10 +152,10 @@ int board_postclk_init(void) } #endif -- + -static phys_size_t imx8_ddr_size(void) +int board_phys_sdram_size(phys_size_t *size) { @@ -134,7 +105,7 @@ index cf3cefb30d..fa06db9ec6 100644 switch (value) { case 4096: -@@ -165,12 +166,12 @@ static phys_size_t imx8_ddr_size(void) +@@ -165,12 +167,12 @@ static phys_size_t imx8_ddr_size(void) case 768: case 512: case 256: @@ -150,7 +121,7 @@ index cf3cefb30d..fa06db9ec6 100644 /* Get the top of usable RAM */ ulong board_get_usable_ram_top(ulong total_size) diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index 2955b2f907..c57d88fa59 100644 +index 2955b2f907..a90b813a3d 100644 --- a/configs/ucm-imx8m-mini_defconfig +++ b/configs/ucm-imx8m-mini_defconfig @@ -1,3 +1,4 @@ @@ -158,13 +129,14 @@ index 2955b2f907..c57d88fa59 100644 CONFIG_ARM=y CONFIG_ARCH_IMX8M=y CONFIG_SYS_TEXT_BASE=0x40200000 -@@ -8,10 +9,12 @@ CONFIG_IMX_OPTEE=y +@@ -7,11 +8,13 @@ CONFIG_SPL_MMC_SUPPORT=y + CONFIG_IMX_OPTEE=y CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" CONFIG_FIT=y - CONFIG_SPL_LOAD_FIT=y --CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000" +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,SPL_TEXT_BASE=0x7E1000" + CONFIG_SPL_LOAD_FIT=y +-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000" CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y @@ -207,5 +179,5 @@ index dfd7d9980f..30caaca5a1 100644 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0035-Fix-storages-numeration-order.patch b/recipes-bsp/u-boot/compulab/imx8mm/0035-Fix-storages-numeration-order.patch index c6f62ff..f3ac190 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0035-Fix-storages-numeration-order.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0035-Fix-storages-numeration-order.patch @@ -1,7 +1,7 @@ -From fa158dafefdcb52d8e10e8d6711fe90b759df091 Mon Sep 17 00:00:00 2001 +From 3d914d55d3fa43b8ca1f1d16473cf33e5917061c Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 16 Jun 2020 15:45:22 +0300 -Subject: [PATCH 35/91] Fix storages numeration order +Subject: [PATCH 035/126] Fix storages numeration order Make u-boot enumerate storages in the same order as previous versions (2018.03) @@ -36,5 +36,5 @@ index 3d8be3a09a..b191e87755 100644 compatible = "regulator-fixed"; regulator-name = "VSD_3V3"; -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0036-Fix-memory-size-initialisation.patch b/recipes-bsp/u-boot/compulab/imx8mm/0036-Fix-memory-size-initialisation.patch index 6d83a62..ffe9eed 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0036-Fix-memory-size-initialisation.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0036-Fix-memory-size-initialisation.patch @@ -1,21 +1,21 @@ -From a5bb9ce368427a85ca72db9c512b9d9705126e7a Mon Sep 17 00:00:00 2001 +From dc542fe009df582db1a167902f72164de920fbcf Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 19 Jul 2021 00:58:48 +0300 -Subject: [PATCH 36/91] Fix memory size initialisation +Subject: [PATCH 036/126] Fix memory size initialisation Signed-off-by: Kirill Kapranov --- - board/compulab/plat/imx8mm/ddr/ddr.c | 15 +----- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 48 +++++++++++-------- - .../compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 6 +++ - configs/ucm-imx8m-mini_defconfig | 2 +- - 4 files changed, 35 insertions(+), 36 deletions(-) + board/compulab/plat/imx8mm/ddr/ddr.c | 15 +------- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 47 ++++++++++++++------------ + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 6 ++++ + configs/ucm-imx8m-mini_defconfig | 2 +- + 4 files changed, 34 insertions(+), 36 deletions(-) diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c -index 7392fcdfaa..137a0b9f32 100644 +index 3c6b6ff489..1340475bef 100644 --- a/board/compulab/plat/imx8mm/ddr/ddr.c +++ b/board/compulab/plat/imx8mm/ddr/ddr.c -@@ -13,6 +13,7 @@ +@@ -14,6 +14,7 @@ #include #include #include "ddr.h" @@ -23,7 +23,7 @@ index 7392fcdfaa..137a0b9f32 100644 /* Forward declarations */ u32 cl_eeprom_get_ddrinfo(void); -@@ -59,20 +60,6 @@ struct lpddr4_desc { +@@ -60,20 +61,6 @@ struct lpddr4_desc { char *desc[4]; }; @@ -45,11 +45,11 @@ index 7392fcdfaa..137a0b9f32 100644 static const struct lpddr4_desc lpddr4_array[] = { { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, //Only the first timing entry is in use diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -index fa06db9ec6..0ffbbf3615 100644 +index f262acf414..8694201633 100644 --- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c -@@ -153,25 +153,21 @@ int board_postclk_init(void) - #endif +@@ -154,25 +154,21 @@ int board_postclk_init(void) + int board_phys_sdram_size(phys_size_t *size) { - unsigned long value = readl(TCM_DATA_CFG); @@ -89,15 +89,7 @@ index fa06db9ec6..0ffbbf3615 100644 } /* Get the top of usable RAM */ ulong board_get_usable_ram_top(ulong total_size) -@@ -188,6 +184,7 @@ int dram_init(void) - phys_size_t sdram_size; - int ret; - ret = board_phys_sdram_size(&sdram_size); -+ printf("%s: size %llu\n", __func__, sdram_size); - if (ret) - return ret; - -@@ -219,21 +216,30 @@ int dram_init_banksize(void) +@@ -220,21 +216,30 @@ int dram_init_banksize(void) } gd->bd->bi_dram[bank].start = PHYS_SDRAM; @@ -147,7 +139,7 @@ index be698941da..c3380cb5ef 100644 #endif diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig -index c57d88fa59..f42597b5c7 100644 +index a90b813a3d..3eb63bf1e6 100644 --- a/configs/ucm-imx8m-mini_defconfig +++ b/configs/ucm-imx8m-mini_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x40200000 @@ -158,7 +150,7 @@ index c57d88fa59..f42597b5c7 100644 +# CONFIG_IMX_OPTEE is not set CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" CONFIG_FIT=y - CONFIG_SPL_LOAD_FIT=y + CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0037-env-Add-to-kernel-command-line-rw-rootwait.patch b/recipes-bsp/u-boot/compulab/imx8mm/0037-env-Add-to-kernel-command-line-rw-rootwait.patch index 8b4506c..6ba164c 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0037-env-Add-to-kernel-command-line-rw-rootwait.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0037-env-Add-to-kernel-command-line-rw-rootwait.patch @@ -1,7 +1,7 @@ -From 912eada83c4e27cd5dca3fea9f1787b22c55ae25 Mon Sep 17 00:00:00 2001 +From 85923035d03ac133385f8d296d9722ed3375157d Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 21 Jun 2020 22:08:06 +0300 -Subject: [PATCH 37/91] env: Add to kernel command line rw rootwait +Subject: [PATCH 037/126] env: Add to kernel command line rw rootwait Signed-off-by: Kirill Kapranov --- @@ -28,5 +28,5 @@ index 30caaca5a1..e3e91c7f72 100644 "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0038-Move-environment-from-4M-to-17k-address.patch b/recipes-bsp/u-boot/compulab/imx8mm/0038-Move-environment-from-4M-to-17k-address.patch index 2fa68af..b6ca433 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0038-Move-environment-from-4M-to-17k-address.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0038-Move-environment-from-4M-to-17k-address.patch @@ -1,7 +1,7 @@ -From 6801a7a1c65cb87d00c72f1ee7f4074bd651eadf Mon Sep 17 00:00:00 2001 +From a93fbb4d91247528a8033cdaa6f99e8d3ca3efd7 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 29 Jun 2020 18:15:26 +0300 -Subject: [PATCH 38/91] Move environment from 4M to 17k address +Subject: [PATCH 038/126] Move environment from 4M to 17k address Change starting address of environment data on eMMC form (64 * 64k) to (34 * 512) in order to avoid possible conflicts with the first partition. @@ -25,5 +25,5 @@ index e3e91c7f72..ad4e7997b1 100644 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0039-compulab-eeprom-Add-DM-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0039-compulab-eeprom-Add-DM-support.patch index db75e2a..1d7ac3c 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0039-compulab-eeprom-Add-DM-support.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0039-compulab-eeprom-Add-DM-support.patch @@ -1,11 +1,11 @@ -From eeec1e62d5133600bb5006f6dcc4feba2475cfce Mon Sep 17 00:00:00 2001 +From 745b74f41e51ff2c7590c6df9a3f2a94f884c2b4 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 08:03:28 +0300 -Subject: [PATCH 39/91] compulab: eeprom: Add DM support +Subject: [PATCH 039/126] compulab: eeprom: Add DM support Signed-off-by: Valentin Raevsky --- - board/compulab/common/eeprom.c | 42 +++++++++++++++++++++++++++++----- + board/compulab/common/eeprom.c | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c @@ -77,5 +77,5 @@ index cc91f8a195..defd9b6446 100644 return res; } -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0040-mcm-imx8m-mini-Add-basic-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0040-mcm-imx8m-mini-Add-basic-support.patch index 2bf0250..baece72 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0040-mcm-imx8m-mini-Add-basic-support.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0040-mcm-imx8m-mini-Add-basic-support.patch @@ -1,20 +1,20 @@ -From 8e4f334ab1c365dc0ba1d0ef8d0b31ac6caed9ad Mon Sep 17 00:00:00 2001 +From ab1153a5f4319338446cbdbea8398dd5ff387706 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 19 Jul 2021 01:01:11 +0300 -Subject: [PATCH 40/91] mcm-imx8m-mini: Add basic support +Subject: [PATCH 040/126] mcm-imx8m-mini: Add basic support Signed-off-by: Kirill Kapranov --- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/mcm-imx8m-mini.dts | 476 ++++++++++++++++++ - arch/arm/mach-imx/imx8m/Kconfig | 7 + - board/compulab/mcm-imx8m-mini/Kconfig | 17 + - board/compulab/mcm-imx8m-mini/Makefile | 14 + - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 352 +++++++++++++ - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.h | 19 + - board/compulab/mcm-imx8m-mini/spl.c | 265 ++++++++++ - configs/mcm-imx8m-mini_defconfig | 67 +++ - include/configs/mcm-imx8m-mini.h | 308 ++++++++++++ + arch/arm/dts/Makefile | 1 + + arch/arm/dts/mcm-imx8m-mini.dts | 476 +++++++++++++++++++++++++ + arch/arm/mach-imx/imx8m/Kconfig | 7 + + board/compulab/mcm-imx8m-mini/Kconfig | 17 + + board/compulab/mcm-imx8m-mini/Makefile | 14 + + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 352 ++++++++++++++++++ + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h | 19 + + board/compulab/mcm-imx8m-mini/spl.c | 265 ++++++++++++++ + configs/mcm-imx8m-mini_defconfig | 67 ++++ + include/configs/mcm-imx8m-mini.h | 308 ++++++++++++++++ 10 files changed, 1526 insertions(+) create mode 100644 arch/arm/dts/mcm-imx8m-mini.dts create mode 100644 board/compulab/mcm-imx8m-mini/Kconfig @@ -26,11 +26,11 @@ Signed-off-by: Kirill Kapranov create mode 100644 include/configs/mcm-imx8m-mini.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 6238d142af..5dacac3b5a 100644 +index 9781d3451c..c6b54163d0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -881,6 +881,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ - imxrt1020-evk.dtb +@@ -889,6 +889,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ + dtb-$(CONFIG_ARCH_IMX8ULP) += imx8ulp-evk.dtb imx8ulp-evk-i3c.dtb dtb-$(CONFIG_TARGET_UCM_IMX8M_MINI) += ucm-imx8m-mini.dtb +dtb-$(CONFIG_TARGET_MCM_IMX8M_MINI) += mcm-imx8m-mini.dtb @@ -520,10 +520,10 @@ index 0000000000..2c3723a42c + temperature = <115000>; +}; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig -index d4c41ba1aa..13e93cf0f1 100644 +index 4930b9bee6..a38ec31d25 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig -@@ -208,6 +208,12 @@ config TARGET_UCM_IMX8M_MINI +@@ -266,6 +266,12 @@ config TARGET_UCM_IMX8M_MINI select SUPPORT_SPL select IMX8M_LPDDR4 @@ -536,7 +536,7 @@ index d4c41ba1aa..13e93cf0f1 100644 endchoice source "board/freescale/imx8mq_evk/Kconfig" -@@ -225,5 +231,6 @@ source "board/beacon/imx8mn/Kconfig" +@@ -284,5 +290,6 @@ source "board/beacon/imx8mn/Kconfig" source "board/phytec/phycore_imx8mm/Kconfig" source "board/phytec/phycore_imx8mp/Kconfig" source "board/compulab/ucm-imx8m-mini/Kconfig" @@ -1628,5 +1628,5 @@ index 0000000000..f5ab2f101b +#endif +#endif -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0041-mcm-imx8m-mini-env-config-Set-the-machine-values.patch b/recipes-bsp/u-boot/compulab/imx8mm/0041-mcm-imx8m-mini-env-config-Set-the-machine-values.patch index cb02f02..4f38917 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0041-mcm-imx8m-mini-env-config-Set-the-machine-values.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0041-mcm-imx8m-mini-env-config-Set-the-machine-values.patch @@ -1,7 +1,7 @@ -From 84e001d6c6fe84c54f2029641860300f7941fb5a Mon Sep 17 00:00:00 2001 +From 7696c21869712bd70a49f6d43142437d3f5199e5 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 08:07:55 +0300 -Subject: [PATCH 41/91] mcm-imx8m-mini: env: config: Set the machine values +Subject: [PATCH 041/126] mcm-imx8m-mini: env: config: Set the machine values Signed-off-by: Valentin Raevsky --- @@ -50,5 +50,5 @@ index 053895a2c0..3222fd715c 100644 +/dev/mmcblk2boot0 0x1000 0x4000 +#/dev/mmcblk1 0x1000 0x4000 -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0042-mcm-imx8m-mini-env-Add-an-option-to-print-the-machin.patch b/recipes-bsp/u-boot/compulab/imx8mm/0042-mcm-imx8m-mini-env-Add-an-option-to-print-the-machin.patch index a1e625d..4599d3a 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0042-mcm-imx8m-mini-env-Add-an-option-to-print-the-machin.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0042-mcm-imx8m-mini-env-Add-an-option-to-print-the-machin.patch @@ -1,8 +1,8 @@ -From daa08d163bc71d8ac1e1347574729be7563f009f Mon Sep 17 00:00:00 2001 +From 754cce3320e6c237684530a6611cd8ad78cda536 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 08:10:42 +0300 -Subject: [PATCH 42/91] mcm-imx8m-mini: env: Add an option to print the machine - env devices +Subject: [PATCH 042/126] mcm-imx8m-mini: env: Add an option to print the + machine env devices Signed-off-by: Valentin Raevsky --- @@ -51,5 +51,5 @@ index 1d193bd437..ebd18b40ba 100644 /* ignore unknown options */ break; -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0043-mcm-imx8m-mini-Set-EXTRAVERSION.patch b/recipes-bsp/u-boot/compulab/imx8mm/0043-mcm-imx8m-mini-Set-EXTRAVERSION.patch index a56f939..16be5f7 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0043-mcm-imx8m-mini-Set-EXTRAVERSION.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0043-mcm-imx8m-mini-Set-EXTRAVERSION.patch @@ -1,7 +1,7 @@ -From 7328ca230f8f8af35734a42a30554860e2f36240 Mon Sep 17 00:00:00 2001 +From e321143aaa0fd2913f731b5cf45d6ae08f11c31e Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 19 Jul 2021 01:02:48 +0300 -Subject: [PATCH 43/91] mcm-imx8m-mini: Set EXTRAVERSION +Subject: [PATCH 043/126] mcm-imx8m-mini: Set EXTRAVERSION Signed-off-by: Kirill Kapranov --- @@ -22,5 +22,5 @@ index 0451f445f6..22d2230a6f 100644 # *DOCUMENTATION* -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0044-mcm-imx8m-mini-config-Update-defconfig.patch b/recipes-bsp/u-boot/compulab/imx8mm/0044-mcm-imx8m-mini-config-Update-defconfig.patch index a04705b..dd6e0be 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0044-mcm-imx8m-mini-config-Update-defconfig.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0044-mcm-imx8m-mini-config-Update-defconfig.patch @@ -1,11 +1,11 @@ -From 19bf71a555e5ab75f5157d39b2420cce43060133 Mon Sep 17 00:00:00 2001 +From 4e8e749b50ff87ce206d6446c02ff035b11e64f4 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 17:13:00 +0300 -Subject: [PATCH 44/91] mcm-imx8m-mini: config: Update defconfig +Subject: [PATCH 044/126] mcm-imx8m-mini: config: Update defconfig Signed-off-by: Valentin Raevsky --- - configs/mcm-imx8m-mini_defconfig | 46 +++++++++++++++++++++++++++++--- + configs/mcm-imx8m-mini_defconfig | 46 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 3 deletions(-) diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig @@ -119,5 +119,5 @@ index 80350afa7c..ce1cfb834a 100644 +CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0045-mcm-imx8m-mini-config-Update-.h-config.patch b/recipes-bsp/u-boot/compulab/imx8mm/0045-mcm-imx8m-mini-config-Update-.h-config.patch index 2690289..1640db5 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0045-mcm-imx8m-mini-config-Update-.h-config.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0045-mcm-imx8m-mini-config-Update-.h-config.patch @@ -1,11 +1,11 @@ -From 020bfa6700660bd1c77c0282f88b288b5b058a3d Mon Sep 17 00:00:00 2001 +From cf8a47603118237f8b77790c71d4c78a926aac3c Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 17:13:29 +0300 -Subject: [PATCH 45/91] mcm-imx8m-mini: config: Update .h config +Subject: [PATCH 045/126] mcm-imx8m-mini: config: Update .h config Signed-off-by: Valentin Raevsky --- - include/configs/mcm-imx8m-mini.h | 48 ++++++-------------------------- + include/configs/mcm-imx8m-mini.h | 48 ++++++++-------------------------------- 1 file changed, 9 insertions(+), 39 deletions(-) diff --git a/include/configs/mcm-imx8m-mini.h b/include/configs/mcm-imx8m-mini.h @@ -145,5 +145,5 @@ index f5ab2f101b..dd0448efca 100644 #define CONFIG_OF_BOARD_SETUP -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0046-mcm-imx8m-mini-spl-Update-the-board-spl.patch b/recipes-bsp/u-boot/compulab/imx8mm/0046-mcm-imx8m-mini-spl-Update-the-board-spl.patch index beb4257..ed5d0e1 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0046-mcm-imx8m-mini-spl-Update-the-board-spl.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0046-mcm-imx8m-mini-spl-Update-the-board-spl.patch @@ -1,7 +1,7 @@ -From 161d9b8fcae9a58c5096574b7b815b9ad0f74d79 Mon Sep 17 00:00:00 2001 +From a2b63373c7d1f8e01405a0bb08a75ccd53607c71 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Wed, 8 Jul 2020 17:28:54 +0300 -Subject: [PATCH 46/91] mcm-imx8m-mini: spl: Update the board spl +Subject: [PATCH 046/126] mcm-imx8m-mini: spl: Update the board spl Signed-off-by: Valentin Raevsky --- @@ -54,5 +54,5 @@ index 7038a8e073..f59bac4cb9 100644 + return 0; +} -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0047-mcm-imx8m-mini-Fix-dram_init_banksize-logics.patch b/recipes-bsp/u-boot/compulab/imx8mm/0047-mcm-imx8m-mini-Fix-dram_init_banksize-logics.patch index 18e9cc7..f51c268 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0047-mcm-imx8m-mini-Fix-dram_init_banksize-logics.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0047-mcm-imx8m-mini-Fix-dram_init_banksize-logics.patch @@ -1,7 +1,7 @@ -From 6ccb6f0a01d67e13ece4ddc6ec61f2ff69c0adff Mon Sep 17 00:00:00 2001 +From 3e43aa79f734982246d68cc6837601144d64ec72 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Thu, 9 Jul 2020 12:35:27 +0300 -Subject: [PATCH 47/91] mcm-imx8m-mini: Fix dram_init_banksize() logics +Subject: [PATCH 047/126] mcm-imx8m-mini: Fix dram_init_banksize() logics Signed-off-by: Valentin Raevsky --- @@ -32,5 +32,5 @@ index 1ec3ecbde7..9ece28b318 100644 bank_1_size - gd->bd->bi_dram[bank].start; } -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0048-mcm-imx8m-mini-Add-board_usb_init-and-board_usb_clea.patch b/recipes-bsp/u-boot/compulab/imx8mm/0048-mcm-imx8m-mini-Add-board_usb_init-and-board_usb_clea.patch index 63b4684..048d047 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0048-mcm-imx8m-mini-Add-board_usb_init-and-board_usb_clea.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0048-mcm-imx8m-mini-Add-board_usb_init-and-board_usb_clea.patch @@ -1,7 +1,7 @@ -From cbd85748102a4e9fb1251ff4313fd210de70a202 Mon Sep 17 00:00:00 2001 +From 9b7dbbb4c200496a6cca3ee42bfa85d8f6649f7c Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Thu, 9 Jul 2020 22:58:39 +0300 -Subject: [PATCH 48/91] mcm-imx8m-mini: Add board_usb_init() and +Subject: [PATCH 048/126] mcm-imx8m-mini: Add board_usb_init() and board_usb_cleanup() Enable power on/off usb power in U-Boot. @@ -40,5 +40,5 @@ index 9ece28b318..6cea3b38cd 100644 { -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0049-mcm-imx8m-mini-dts-Enable-usbotg2-in-host-mode.patch b/recipes-bsp/u-boot/compulab/imx8mm/0049-mcm-imx8m-mini-dts-Enable-usbotg2-in-host-mode.patch index 4cd9abf..5d5d606 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0049-mcm-imx8m-mini-dts-Enable-usbotg2-in-host-mode.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0049-mcm-imx8m-mini-dts-Enable-usbotg2-in-host-mode.patch @@ -1,7 +1,7 @@ -From 80f1aafd56528a0405f8409d5c3337fbc1212e43 Mon Sep 17 00:00:00 2001 +From 4d8f74402acb4986f1db484b55d15c80de2f4acd Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Thu, 9 Jul 2020 23:00:55 +0300 -Subject: [PATCH 49/91] mcm-imx8m-mini: dts: Enable usbotg2 in host mode +Subject: [PATCH 049/126] mcm-imx8m-mini: dts: Enable usbotg2 in host mode Make the ubsotg2 work in U-Boot in host mode. @@ -25,5 +25,5 @@ index 2c3723a42c..85f4c46dd7 100644 &cpu_alert0 { -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0050-mcm-imx8m-mini-config-Remove-unused-stuff.patch b/recipes-bsp/u-boot/compulab/imx8mm/0050-mcm-imx8m-mini-config-Remove-unused-stuff.patch index 362ec72..15f5199 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0050-mcm-imx8m-mini-config-Remove-unused-stuff.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0050-mcm-imx8m-mini-config-Remove-unused-stuff.patch @@ -1,7 +1,7 @@ -From 6a6a9bb555195a8f40ee1426c7c6bdc3878b8cf2 Mon Sep 17 00:00:00 2001 +From ae8974e8a232e587112442a63be38b64b1675533 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Thu, 9 Jul 2020 23:02:57 +0300 -Subject: [PATCH 50/91] mcm-imx8m-mini: config: Remove unused stuff +Subject: [PATCH 050/126] mcm-imx8m-mini: config: Remove unused stuff Signed-off-by: Valentin Raevsky --- @@ -41,5 +41,5 @@ index ce1cfb834a..92cdad293d 100644 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0051-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch b/recipes-bsp/u-boot/compulab/imx8mm/0051-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch index 3d7c946..1f68cd8 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm/0051-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch +++ b/recipes-bsp/u-boot/compulab/imx8mm/0051-mcm-imx8m-mini-Remove-dram_init_banksize-and-get_eff.patch @@ -1,12 +1,12 @@ -From 579a5ba04f8d70af5262e3d1abb6f2b615d289c8 Mon Sep 17 00:00:00 2001 +From bddd7484de0069acb92d6421dfcd1fc16bd346f4 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Mon, 13 Jul 2020 10:55:06 +0300 -Subject: [PATCH 51/91] mcm-imx8m-mini: Remove dram_init_banksize() and +Subject: [PATCH 051/126] mcm-imx8m-mini: Remove dram_init_banksize() and get_effective_memsize() Signed-off-by: Valentin Raevsky --- - .../compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 76 ------------------- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 76 -------------------------- 1 file changed, 76 deletions(-) diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c @@ -97,5 +97,5 @@ index 6cea3b38cd..7cfed94479 100644 int ft_board_setup(void *blob, bd_t *bd) { -- -2.17.1 +2.11.0 diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0052-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch b/recipes-bsp/u-boot/compulab/imx8mm/0052-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch new file mode 100644 index 0000000..b5735c7 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0052-mcm-imx8m-mini-Move-tcm-to-plat-imx8mm.patch @@ -0,0 +1,101 @@ +From 4fc2bc6314ba1ee0e2c3073bd3bc5c3e33887213 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 01:06:57 +0300 +Subject: [PATCH 052/126] mcm-imx8m-mini: Move tcm to plat/imx8mm + +Signed-off-by: Kirill Kapranov +--- + board/compulab/mcm-imx8m-mini/Makefile | 3 ++- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 2 +- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h | 19 ------------------- + board/compulab/mcm-imx8m-mini/spl.c | 1 - + board/compulab/plat/imx8mm/ddr/ddr.h | 9 +++++++++ + 5 files changed, 12 insertions(+), 22 deletions(-) + delete mode 100644 board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h + +diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile +index b926ed9cf9..8ade3b58c5 100644 +--- a/board/compulab/mcm-imx8m-mini/Makefile ++++ b/board/compulab/mcm-imx8m-mini/Makefile +@@ -6,8 +6,9 @@ + + obj-y += mcm-imx8m-mini.o + +-ifdef CONFIG_SPL_BUILD + ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ ++ifdef CONFIG_SPL_BUILD + obj-y += spl.o + endif + +diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +index 7cfed94479..20f322223c 100644 +--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c ++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +@@ -27,7 +27,7 @@ + #include + #include + #include +-#include "mcm-imx8m-mini.h" ++#include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; + +diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h +deleted file mode 100644 +index fc59756161..0000000000 +--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.h ++++ /dev/null +@@ -1,19 +0,0 @@ +-/* +- * Copyright 2017 NXP +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#ifndef __MCM_IMX8M_MINI__ +-#define __MCM_IMX8M_MINI__ +- +-#define TCM_DATA_CFG 0x7e0000 +- +-struct lpddr4_tcm_desc { +- unsigned int size; +- unsigned int sign; +- unsigned int index; +- unsigned int count; +-}; +- +-#endif +diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c +index f59bac4cb9..3f6cb65102 100644 +--- a/board/compulab/mcm-imx8m-mini/spl.c ++++ b/board/compulab/mcm-imx8m-mini/spl.c +@@ -21,7 +21,6 @@ + #include + #include + #include "ddr/ddr.h" +-#include "mcm-imx8m-mini.h" + + DECLARE_GLOBAL_DATA_PTR; + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.h b/board/compulab/plat/imx8mm/ddr/ddr.h +index a66e8ec3c4..4d2a238439 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.h ++++ b/board/compulab/plat/imx8mm/ddr/ddr.h +@@ -14,4 +14,13 @@ extern struct dram_timing_info ucm_dram_timing_01050008; + + void spl_dram_init(void); + ++#define TCM_DATA_CFG 0x7e0000 ++ ++struct lpddr4_tcm_desc { ++ unsigned int size; ++ unsigned int sign; ++ unsigned int index; ++ unsigned int count; ++}; ++ + #endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Refactor-spl-code.patch b/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Refactor-spl-code.patch new file mode 100644 index 0000000..3fc5f5a --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0053-mcm-imx8m-mini-Refactor-spl-code.patch @@ -0,0 +1,702 @@ +From fbeb9ec1d92ce8968914308df8ab54d6288ce86e Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 15 Jul 2020 07:58:17 +0300 +Subject: [PATCH 053/126] mcm-imx8m-mini: Refactor spl code + +Signed-off-by: Valentin Raevsky +--- + board/compulab/mcm-imx8m-mini/Makefile | 4 +- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 27 --- + board/compulab/mcm-imx8m-mini/spl.c | 265 +---------------------- + board/compulab/plat/imx8mm/Makefile | 1 + + board/compulab/plat/imx8mm/spl/Makefile | 7 + + board/compulab/plat/imx8mm/spl/common.c | 33 +++ + board/compulab/plat/imx8mm/spl/spl.c | 280 +++++++++++++++++++++++++ + 7 files changed, 325 insertions(+), 292 deletions(-) + create mode 100644 board/compulab/plat/imx8mm/spl/Makefile + create mode 100644 board/compulab/plat/imx8mm/spl/common.c + create mode 100644 board/compulab/plat/imx8mm/spl/spl.c + +diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile +index 8ade3b58c5..9ce2875d6e 100644 +--- a/board/compulab/mcm-imx8m-mini/Makefile ++++ b/board/compulab/mcm-imx8m-mini/Makefile +@@ -4,12 +4,12 @@ + # SPDX-License-Identifier: GPL-2.0+ + # + +-obj-y += mcm-imx8m-mini.o +- + ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o ++else ++obj-y += mcm-imx8m-mini.o + endif + + obj-y += ../plat/imx8mm/ +diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +index 20f322223c..d01b8f8767 100644 +--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c ++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +@@ -31,33 +31,6 @@ + + DECLARE_GLOBAL_DATA_PTR; + +-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) +-#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) +- +-static iomux_v3_cfg_t const uart_pads[] = { +- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +-}; +- +-static iomux_v3_cfg_t const wdog_pads[] = { +- IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), +-}; +- +-int board_early_init_f(void) +-{ +- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; +- +- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); +- +- set_wdog_reset(wdog); +- +- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); +- +- init_uart_clk(2); +- +- return 0; +-} +- + #ifdef CONFIG_BOARD_POSTCLK_INIT + int board_postclk_init(void) + { +diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c +index 3f6cb65102..d6ece8ef3e 100644 +--- a/board/compulab/mcm-imx8m-mini/spl.c ++++ b/board/compulab/mcm-imx8m-mini/spl.c +@@ -1,270 +1,9 @@ +-/* +- * Copyright 2020 CompuLab Ltd. +- */ +- +-#include +-#include +-#include +-#include + #include + #include +-#include + #include ++#include + #include +-#include +-#include +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include "ddr/ddr.h" +- +-DECLARE_GLOBAL_DATA_PTR; +- +-int spl_board_boot_device(enum boot_device boot_dev_spl) +-{ +- switch (boot_dev_spl) { +- case SD2_BOOT: +- case MMC2_BOOT: +- return BOOT_DEVICE_MMC1; +- case SD3_BOOT: +- case MMC3_BOOT: +- return BOOT_DEVICE_MMC2; +- default: +- return BOOT_DEVICE_NONE; +- } +-} +- +-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) +-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +-struct i2c_pads_info i2c_pad_info1 = { +- .scl = { +- .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, +- .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, +- .gp = IMX_GPIO_NR(5, 16), +- }, +- .sda = { +- .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, +- .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, +- .gp = IMX_GPIO_NR(5, 17), +- }, +-}; +- +-#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) +-#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) +- +-#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ +- PAD_CTL_FSEL2) +-#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) +- +-static iomux_v3_cfg_t const usdhc3_pads[] = { +- IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +-}; +- +-static iomux_v3_cfg_t const usdhc2_pads[] = { +- IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), +-}; +- +-/* +- * The evk board uses DAT3 to detect CD card plugin, +- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. +- */ +-static iomux_v3_cfg_t const usdhc2_cd_pad = +- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); +- +-static iomux_v3_cfg_t const usdhc2_dat3_pad = +- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | +- MUX_PAD_CTRL(USDHC_PAD_CTRL); +- +- +-static struct fsl_esdhc_cfg usdhc_cfg[2] = { +- {USDHC2_BASE_ADDR, 0, 4}, +- {USDHC3_BASE_ADDR, 0, 8}, +-}; +- +-int board_mmc_init(bd_t *bis) +-{ +- int i, ret; +- /* +- * According to the board_mmc_init() the following map is done: +- * (U-Boot device node) (Physical Port) +- * mmc0 USDHC1 +- * mmc1 USDHC2 +- */ +- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { +- switch (i) { +- case 0: +- init_clk_usdhc(1); +- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); +- imx_iomux_v3_setup_multiple_pads( +- usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); +- gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); +- gpio_direction_output(USDHC2_PWR_GPIO, 0); +- udelay(500); +- gpio_direction_output(USDHC2_PWR_GPIO, 1); +- break; +- case 1: +- init_clk_usdhc(2); +- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); +- imx_iomux_v3_setup_multiple_pads( +- usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); +- break; +- default: +- printf("Warning: you configured more USDHC controllers" +- "(%d) than supported by the board\n", i + 1); +- return -EINVAL; +- } +- +- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); +- if (ret) +- return ret; +- } +- +- return 0; +-} +- +-int board_mmc_getcd(struct mmc *mmc) +-{ +- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; +- int ret = 0; +- +- switch (cfg->esdhc_base) { +- case USDHC3_BASE_ADDR: +- ret = 1; +- break; +- case USDHC2_BASE_ADDR: +- imx_iomux_v3_setup_pad(usdhc2_cd_pad); +- gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); +- gpio_direction_input(USDHC2_CD_GPIO); +- +- /* +- * Since it is the DAT3 pin, this pin is pulled to +- * low voltage if no card +- */ +- ret = gpio_get_value(USDHC2_CD_GPIO); +- +- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); +- return ret; +- } +- +- return 1; +-} +- +-#ifdef CONFIG_POWER +-#define I2C_PMIC 1 +-int power_init_board(void) +-{ +- struct pmic *p; +- int ret; +- +- ret = power_bd71837_init(I2C_PMIC); +- if (ret) +- printf("power init failed"); +- +- p = pmic_get("BD71837"); +- pmic_probe(p); +- +- +- /* decrease RESET key long push time from the default 10s to 10ms */ +- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); +- +- /* unlock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x1); +- +- /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ +- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); +- +- /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ +- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); +- +- /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ +- pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); +- +- /* lock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x11); +- +- return 0; +-} +-#else +-int power_init_board(void) { return 0; } +-#endif +- +-void spl_board_init(void) +-{ +-#ifndef CONFIG_SPL_USB_SDP_SUPPORT +- /* Serial download mode */ +- if (is_usb_boot()) { +- puts("Back to ROM, SDP\n"); +- restore_boot_params(); +- } +-#endif +- puts("Normal Boot\n"); +-} +- +-#ifdef CONFIG_SPL_LOAD_FIT +-int board_fit_config_name_match(const char *name) +-{ +- /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); +- +- return 0; +-} +-#endif +- +-void board_init_f(ulong dummy) +-{ +- int ret; +- /* Clear the BSS. */ +- memset(__bss_start, 0, __bss_end - __bss_start); +- +- arch_cpu_init(); +- +- board_early_init_f(); +- +- timer_init(); +- +- preloader_console_init(); +- +- ret = spl_init(); +- if (ret) { +- debug("spl_init() failed: %d\n", ret); +- hang(); +- } +- +- enable_tzc380(); +- +- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +- +- power_init_board(); +- /* DDR initialization */ +- spl_dram_init(); +- +- board_init_r(NULL, 0); +-} +- +-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +-{ +- puts ("resetting ...\n"); +- +- reset_cpu(WDOG1_BASE_ADDR); + ++int spl_board_private_init(void) { + return 0; + } +diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile +index 04b9b2e8f8..2f68e0523e 100644 +--- a/board/compulab/plat/imx8mm/Makefile ++++ b/board/compulab/plat/imx8mm/Makefile +@@ -1,2 +1,3 @@ + obj-y += ddr/ + obj-y += eeprom/ ++obj-y += spl/ +diff --git a/board/compulab/plat/imx8mm/spl/Makefile b/board/compulab/plat/imx8mm/spl/Makefile +new file mode 100644 +index 0000000000..a3a9acaa6e +--- /dev/null ++++ b/board/compulab/plat/imx8mm/spl/Makefile +@@ -0,0 +1,7 @@ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ ++obj-y += common.o ++ ++ifdef CONFIG_SPL_BUILD ++obj-y += spl.o ++endif +diff --git a/board/compulab/plat/imx8mm/spl/common.c b/board/compulab/plat/imx8mm/spl/common.c +new file mode 100644 +index 0000000000..5f1d1e5b97 +--- /dev/null ++++ b/board/compulab/plat/imx8mm/spl/common.c +@@ -0,0 +1,33 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) ++#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) ++ ++static iomux_v3_cfg_t const uart_pads[] = { ++ IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), ++ IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), ++}; ++ ++static iomux_v3_cfg_t const wdog_pads[] = { ++ IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), ++}; ++ ++int board_early_init_f(void) ++{ ++ struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; ++ ++ imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); ++ ++ set_wdog_reset(wdog); ++ ++ imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); ++ ++ init_uart_clk(2); ++ ++ return 0; ++} ++ +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +new file mode 100644 +index 0000000000..50aa6bea3f +--- /dev/null ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -0,0 +1,280 @@ ++/* ++ * Copyright 2020 CompuLab Ltd. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "ddr/ddr.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++int spl_board_boot_device(enum boot_device boot_dev_spl) ++{ ++ switch (boot_dev_spl) { ++ case SD2_BOOT: ++ case MMC2_BOOT: ++ return BOOT_DEVICE_MMC1; ++ case SD3_BOOT: ++ case MMC3_BOOT: ++ return BOOT_DEVICE_MMC2; ++ default: ++ return BOOT_DEVICE_NONE; ++ } ++} ++ ++#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) ++#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) ++struct i2c_pads_info i2c_pad_info1 = { ++ .scl = { ++ .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, ++ .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, ++ .gp = IMX_GPIO_NR(5, 16), ++ }, ++ .sda = { ++ .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, ++ .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, ++ .gp = IMX_GPIO_NR(5, 17), ++ }, ++}; ++ ++#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) ++#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) ++ ++#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ ++ PAD_CTL_FSEL2) ++#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) ++ ++static iomux_v3_cfg_t const usdhc3_pads[] = { ++ IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++}; ++ ++static iomux_v3_cfg_t const usdhc2_pads[] = { ++ IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), ++}; ++ ++/* ++ * The evk board uses DAT3 to detect CD card plugin, ++ * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. ++ */ ++static iomux_v3_cfg_t const usdhc2_cd_pad = ++ IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); ++ ++static iomux_v3_cfg_t const usdhc2_dat3_pad = ++ IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | ++ MUX_PAD_CTRL(USDHC_PAD_CTRL); ++ ++ ++static struct fsl_esdhc_cfg usdhc_cfg[2] = { ++ {USDHC2_BASE_ADDR, 0, 4}, ++ {USDHC3_BASE_ADDR, 0, 8}, ++}; ++ ++int board_mmc_init(bd_t *bis) ++{ ++ int i, ret; ++ /* ++ * According to the board_mmc_init() the following map is done: ++ * (U-Boot device node) (Physical Port) ++ * mmc0 USDHC1 ++ * mmc1 USDHC2 ++ */ ++ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { ++ switch (i) { ++ case 0: ++ init_clk_usdhc(1); ++ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); ++ imx_iomux_v3_setup_multiple_pads( ++ usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); ++ gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); ++ gpio_direction_output(USDHC2_PWR_GPIO, 0); ++ udelay(500); ++ gpio_direction_output(USDHC2_PWR_GPIO, 1); ++ break; ++ case 1: ++ init_clk_usdhc(2); ++ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); ++ imx_iomux_v3_setup_multiple_pads( ++ usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); ++ break; ++ default: ++ printf("Warning: you configured more USDHC controllers" ++ "(%d) than supported by the board\n", i + 1); ++ return -EINVAL; ++ } ++ ++ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++int board_mmc_getcd(struct mmc *mmc) ++{ ++ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; ++ int ret = 0; ++ ++ switch (cfg->esdhc_base) { ++ case USDHC3_BASE_ADDR: ++ ret = 1; ++ break; ++ case USDHC2_BASE_ADDR: ++ imx_iomux_v3_setup_pad(usdhc2_cd_pad); ++ gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); ++ gpio_direction_input(USDHC2_CD_GPIO); ++ ++ /* ++ * Since it is the DAT3 pin, this pin is pulled to ++ * low voltage if no card ++ */ ++ ret = gpio_get_value(USDHC2_CD_GPIO); ++ ++ imx_iomux_v3_setup_pad(usdhc2_dat3_pad); ++ return ret; ++ } ++ ++ return 1; ++} ++ ++#ifdef CONFIG_POWER ++#define I2C_PMIC 1 ++int power_init_board(void) ++{ ++ struct pmic *p; ++ int ret; ++ ++ ret = power_bd71837_init(I2C_PMIC); ++ if (ret) ++ printf("power init failed"); ++ ++ p = pmic_get("BD71837"); ++ pmic_probe(p); ++ ++ ++ /* decrease RESET key long push time from the default 10s to 10ms */ ++ pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); ++ ++ /* unlock the PMIC regs */ ++ pmic_reg_write(p, BD71837_REGLOCK, 0x1); ++ ++ /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ ++ pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); ++ ++ /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ ++ pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); ++ ++ /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ ++ pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); ++ ++ /* lock the PMIC regs */ ++ pmic_reg_write(p, BD71837_REGLOCK, 0x11); ++ ++ return 0; ++} ++#else ++int power_init_board(void) { return 0; } ++#endif ++ ++__weak int spl_board_private_init(void) { ++ return 0; ++} ++ ++void spl_board_init(void) ++{ ++#ifndef CONFIG_SPL_USB_SDP_SUPPORT ++ /* Serial download mode */ ++ if (is_usb_boot()) { ++ puts("Back to ROM, SDP\n"); ++ restore_boot_params(); ++ } ++#endif ++ if (spl_board_private_init()) { ++ debug("spl_board_private_init() failed\n"); ++ hang(); ++ } ++ puts("Normal Boot\n"); ++} ++ ++#ifdef CONFIG_SPL_LOAD_FIT ++int board_fit_config_name_match(const char *name) ++{ ++ /* Just empty function now - can't decide what to choose */ ++ debug("%s: %s\n", __func__, name); ++ ++ return 0; ++} ++#endif ++ ++void board_init_f(ulong dummy) ++{ ++ int ret; ++ /* Clear the BSS. */ ++ memset(__bss_start, 0, __bss_end - __bss_start); ++ ++ arch_cpu_init(); ++ ++ board_early_init_f(); ++ ++ timer_init(); ++ ++ preloader_console_init(); ++ ++ ret = spl_init(); ++ if (ret) { ++ debug("spl_init() failed: %d\n", ret); ++ hang(); ++ } ++ ++ enable_tzc380(); ++ ++ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); ++ ++ power_init_board(); ++ /* DDR initialization */ ++ spl_dram_init(); ++ ++ board_init_r(NULL, 0); ++} ++ ++int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ++{ ++ puts ("resetting ...\n"); ++ ++ reset_cpu(WDOG1_BASE_ADDR); ++ ++ return 0; ++} +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0054-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch b/recipes-bsp/u-boot/compulab/imx8mm/0054-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch new file mode 100644 index 0000000..7b5b2eb --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0054-ucm-imx8m-mini-Refactor-the-code-for-2020.04.patch @@ -0,0 +1,1541 @@ +From eeda73834ac6847a69ebffaac493a10e88a8ee4b Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 01:13:04 +0300 +Subject: [PATCH 054/126] ucm-imx8m-mini: Refactor the code for 2020.04 + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/ucm-imx8m-mini.dts | 30 +- + board/compulab/ucm-imx8m-mini/Kconfig | 25 +- + board/compulab/ucm-imx8m-mini/Makefile | 5 +- + board/compulab/ucm-imx8m-mini/spl.c | 249 +-------- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 692 ++----------------------- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h | 18 - + configs/ucm-imx8m-mini_defconfig | 88 ++-- + include/configs/ucm-imx8m-mini.h | 76 +-- + 8 files changed, 127 insertions(+), 1056 deletions(-) + delete mode 100644 board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h + +diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts +index b191e87755..f2794e74e9 100644 +--- a/arch/arm/dts/ucm-imx8m-mini.dts ++++ b/arch/arm/dts/ucm-imx8m-mini.dts +@@ -14,8 +14,8 @@ + + /dts-v1/; + +-#include "fsl-imx8mm.dtsi" +- ++#include ++#include "imx8mm.dtsi" + + / { + model = "CompuLab UCM-iMX8M-Mini board"; +@@ -26,12 +26,6 @@ + stdout-patch = &uart3; + }; + +- aliases { +- mmc0 = &usdhc2; +- mmc1 = &usdhc3; +- /delete-property/ mmc2; +- }; +- + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; +@@ -43,17 +37,6 @@ + off-on-delay-us = <12000>; + }; + +- uart4: serial@30a60000 { +- compatible = "fsl,imx8mq-uart", +- "fsl,imx6q-uart", "fsl,imx21-uart"; +- reg = <0x0 0x30a60000 0x0 0x10000>; +- interrupts = ; +- interrupt-parent = <&gpc>; +- clocks = <&clk IMX8MM_CLK_UART4_ROOT>, +- <&clk IMX8MM_CLK_UART4_ROOT>; +- clock-names = "ipg", "per"; +- status = "disabled"; +- }; + }; + + &iomuxc { +@@ -443,12 +426,6 @@ + status = "okay"; + }; + +-&uart4 { /* console */ +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; +- status = "okay"; +-}; +- + &usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; +@@ -488,7 +465,8 @@ + }; + + &usbotg2 { +- status = "disabled"; ++ dr_mode = "host"; ++ status = "okay"; + }; + + &cpu_alert0 { +diff --git a/board/compulab/ucm-imx8m-mini/Kconfig b/board/compulab/ucm-imx8m-mini/Kconfig +index d93df9063c..ed4f21608a 100644 +--- a/board/compulab/ucm-imx8m-mini/Kconfig ++++ b/board/compulab/ucm-imx8m-mini/Kconfig +@@ -9,26 +9,9 @@ config SYS_VENDOR + config SYS_CONFIG_NAME + default "ucm-imx8m-mini" + +-choice +- prompt "RAM Volume select" +- default RAM_2G +- help +- This option configures 2G RAM only ++config DEFAULT_DTB ++ string "U-Boot Default Device Tree File" ++ depends on TARGET_UCM_IMX8M_MINI ++ default "sbc-ucm-imx8m-mini.dtb" + +-config RAM_1G +- bool "RAM_1G" +- help +- This option configures 1G RAM only +- +-config RAM_2G +- bool "RAM_2G" +- help +- imx8mm_val board configuration approach +- +-config RAM_4G +- bool "RAM_4G" +- help +- This option configures 4G RAM only +- +-endchoice + endif +diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile +index f30d5e645a..dbde2116cd 100644 +--- a/board/compulab/ucm-imx8m-mini/Makefile ++++ b/board/compulab/ucm-imx8m-mini/Makefile +@@ -4,11 +4,12 @@ + # SPDX-License-Identifier: GPL-2.0+ + # + +-obj-y += ucm-imx8m-mini.o ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ + + ifdef CONFIG_SPL_BUILD +-ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ + obj-y += spl.o ++else ++obj-y += ucm-imx8m-mini.o + endif + + obj-y += ../plat/imx8mm/ +diff --git a/board/compulab/ucm-imx8m-mini/spl.c b/board/compulab/ucm-imx8m-mini/spl.c +index fa1943477e..b73f8ade6d 100644 +--- a/board/compulab/ucm-imx8m-mini/spl.c ++++ b/board/compulab/ucm-imx8m-mini/spl.c +@@ -1,252 +1,9 @@ +-/* +- * Copyright 2018 NXP +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#include +-#include +-#include +-#include + #include + #include + #include +-#include +-#include +-#include + #include +-#include +-#include +-#include +-#include +- +-#include +-#include "ddr/ddr.h" +-#include "ucm-imx8m-mini.h" +- +-DECLARE_GLOBAL_DATA_PTR; +- +-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) +-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +-struct i2c_pads_info i2c_pad_info1 = { +- .scl = { +- .i2c_mode = IMX8MM_PAD_I2C2_SCL_I2C2_SCL | PC, +- .gpio_mode = IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 | PC, +- .gp = IMX_GPIO_NR(5, 16), +- }, +- .sda = { +- .i2c_mode = IMX8MM_PAD_I2C2_SDA_I2C2_SDA | PC, +- .gpio_mode = IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 | PC, +- .gp = IMX_GPIO_NR(5, 17), +- }, +-}; +- +-#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) +-#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) +- +-#define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ +- PAD_CTL_FSEL2) +-#define USDHC_GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE1) +- +-static iomux_v3_cfg_t const usdhc3_pads[] = { +- IMX8MM_PAD_NAND_WE_B_USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_WP_B_USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +-}; +- +-static iomux_v3_cfg_t const usdhc2_pads[] = { +- IMX8MM_PAD_SD2_CLK_USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_CMD_USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +- IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), +-}; +- +-/* +- * The evk board uses DAT3 to detect CD card plugin, +- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. +- */ +-static iomux_v3_cfg_t const usdhc2_cd_pad = +- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); +- +-static iomux_v3_cfg_t const usdhc2_dat3_pad = +- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | +- MUX_PAD_CTRL(USDHC_PAD_CTRL); +- +- +-static struct fsl_esdhc_cfg usdhc_cfg[2] = { +- {USDHC2_BASE_ADDR, 0, 4}, +- {USDHC3_BASE_ADDR, 0, 8}, +-}; +- +-int board_mmc_init(bd_t *bis) +-{ +- int i, ret; +- /* +- * According to the board_mmc_init() the following map is done: +- * (U-Boot device node) (Physical Port) +- * mmc0 USDHC1 +- * mmc1 USDHC2 +- */ +- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { +- switch (i) { +- case 0: +- init_clk_usdhc(1); +- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); +- imx_iomux_v3_setup_multiple_pads( +- usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); +- gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); +- gpio_direction_output(USDHC2_PWR_GPIO, 0); +- udelay(500); +- gpio_direction_output(USDHC2_PWR_GPIO, 1); +- break; +- case 1: +- init_clk_usdhc(2); +- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); +- imx_iomux_v3_setup_multiple_pads( +- usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); +- break; +- default: +- printf("Warning: you configured more USDHC controllers" +- "(%d) than supported by the board\n", i + 1); +- return -EINVAL; +- } +- +- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); +- if (ret) +- return ret; +- } +- +- return 0; +-} +- +-int board_mmc_getcd(struct mmc *mmc) +-{ +- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; +- int ret = 0; +- +- switch (cfg->esdhc_base) { +- case USDHC3_BASE_ADDR: +- ret = 1; +- break; +- case USDHC2_BASE_ADDR: +- imx_iomux_v3_setup_pad(usdhc2_cd_pad); +- gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); +- gpio_direction_input(USDHC2_CD_GPIO); +- +- /* +- * Since it is the DAT3 pin, this pin is pulled to +- * low voltage if no card +- */ +- ret = gpio_get_value(USDHC2_CD_GPIO); +- +- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); +- return ret; +- } +- +- return 1; +-} +- +-#ifdef CONFIG_POWER +-#define I2C_PMIC 1 +-int power_init_board(void) +-{ +- struct pmic *p; +- int ret; +- +- ret = power_bd71837_init(I2C_PMIC); +- if (ret) +- printf("power init failed"); +- +- p = pmic_get("BD71837"); +- pmic_probe(p); +- +- +- /* decrease RESET key long push time from the default 10s to 10ms */ +- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); +- +- /* unlock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x1); +- +- /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ +- /*pmic_reg_write(p, BD71837_BUCK2_VOLT_RUN, 0x0f);*/ +- +- /* increase VDD_SOC to 0.85V for 3Ghz DDR */ +- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); +- +- /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ +- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); +- +- /* lock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x11); +- +- return 0; +-} +-#else +-int power_init_board(void) { return 0; } +-#endif +- +-void spl_board_init(void) +-{ +-#ifndef CONFIG_SPL_USB_SDP_SUPPORT +- /* Serial download mode */ +- if (is_usb_boot()) { +- puts("Back to ROM, SDP\n"); +- restore_boot_params(); +- } +-#endif +- puts("Normal Boot\n"); +-} +- +-#ifdef CONFIG_SPL_LOAD_FIT +-int board_fit_config_name_match(const char *name) +-{ +- /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); +- ++#include ++ ++int spl_board_private_init(void) { + return 0; + } +-#endif +- +-void board_init_f(ulong dummy) +-{ +- int ret; +- /* Clear the BSS. */ +- memset(__bss_start, 0, __bss_end - __bss_start); +- +- /* Clear global data +- memset((void *)gd, 0, sizeof(gd_t)); +- */ +- arch_cpu_init(); +- +- board_early_init_f(); +- +- timer_init(); +- +- preloader_console_init(); +- +- ret = spl_init(); +- if (ret) { +- debug("spl_init() failed: %d\n", ret); +- hang(); +- } +- +- enable_tzc380(); +- +- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +- +- power_init_board(); +- /* DDR initialization */ +- spl_dram_init(); +- +- board_init_r(NULL, 0); +-} +diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +index 8694201633..cfb4831a80 100644 +--- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c ++++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +@@ -1,5 +1,5 @@ + /* +- * Copyright 2018 NXP ++ * Copyright 2020 CompuLab + * + * SPDX-License-Identifier: GPL-2.0+ + */ +@@ -23,127 +23,14 @@ + #include + #include + #include +-#include "../common/tcpc.h" + #include "../common/eeprom.h" + #include +-#include +-#include +-#include ++#include + #include +-#include "ucm-imx8m-mini.h" ++#include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; + +-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) +-#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) +- +-static iomux_v3_cfg_t const uart_pads[] = { +- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +-}; +- +-static iomux_v3_cfg_t const wdog_pads[] = { +- IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), +-}; +- +-#ifdef CONFIG_FSL_FSPI +-#define QSPI_PAD_CTRL (PAD_CTL_DSE2 | PAD_CTL_HYS) +-static iomux_v3_cfg_t const qspi_pads[] = { +- IMX8MM_PAD_NAND_ALE_QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL | PAD_CTL_PE | PAD_CTL_PUE), +- IMX8MM_PAD_NAND_CE0_B_QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL), +- +- IMX8MM_PAD_NAND_DATA00_QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA01_QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA02_QSPI_A_DATA2 | MUX_PAD_CTRL(QSPI_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA03_QSPI_A_DATA3 | MUX_PAD_CTRL(QSPI_PAD_CTRL), +-}; +- +-int board_qspi_init(void) +-{ +- imx_iomux_v3_setup_multiple_pads(qspi_pads, ARRAY_SIZE(qspi_pads)); +- +- set_clk_qspi(); +- +- return 0; +-} +-#endif +- +-#ifdef CONFIG_MXC_SPI +-#define SPI_PAD_CTRL (PAD_CTL_DSE2 | PAD_CTL_HYS) +-static iomux_v3_cfg_t const ecspi1_pads[] = { +- IMX8MM_PAD_ECSPI1_SCLK_ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI1_MOSI_ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI1_MISO_ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI1_SS0_GPIO5_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL), +-}; +- +-static iomux_v3_cfg_t const ecspi2_pads[] = { +- IMX8MM_PAD_ECSPI2_SCLK_ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI2_MOSI_ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI2_MISO_ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), +- IMX8MM_PAD_ECSPI2_SS0_GPIO5_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), +-}; +- +-static void setup_spi(void) +-{ +- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); +- imx_iomux_v3_setup_multiple_pads(ecspi2_pads, ARRAY_SIZE(ecspi2_pads)); +- gpio_request(IMX_GPIO_NR(5, 9), "ECSPI1 CS"); +- gpio_request(IMX_GPIO_NR(5, 13), "ECSPI2 CS"); +-} +- +-int board_spi_cs_gpio(unsigned bus, unsigned cs) +-{ +- if (bus == 0) +- return IMX_GPIO_NR(5, 9); +- else +- return IMX_GPIO_NR(5, 13); +-} +-#endif +- +-#ifdef CONFIG_NAND_MXS +-#define NAND_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL2 | PAD_CTL_HYS) +-#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL2 | PAD_CTL_PUE) +-static iomux_v3_cfg_t const gpmi_pads[] = { +- IMX8MM_PAD_NAND_ALE_RAWNAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_CE0_B_RAWNAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_CLE_RAWNAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA00_RAWNAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA01_RAWNAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA02_RAWNAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA03_RAWNAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA04_RAWNAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA05_RAWNAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA06_RAWNAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_DATA07_RAWNAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_RE_B_RAWNAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_READY_B_RAWNAND_READY_B | MUX_PAD_CTRL(NAND_PAD_READY0_CTRL), +- IMX8MM_PAD_NAND_WE_B_RAWNAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL), +- IMX8MM_PAD_NAND_WP_B_RAWNAND_WP_B | MUX_PAD_CTRL(NAND_PAD_CTRL), +-}; +- +-static void setup_gpmi_nand(void) +-{ +- imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); +- mxs_dma_init(); +-} +-#endif +- +-int board_early_init_f(void) +-{ +- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; +- +- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); +- +- set_wdog_reset(wdog); +- +- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); +- +- init_uart_clk(2); +- +- return 0; +-} +- + #ifdef CONFIG_BOARD_POSTCLK_INIT + int board_postclk_init(void) + { +@@ -194,81 +81,6 @@ int dram_init(void) + return 0; + } + +-int dram_init_banksize(void) +-{ +- int bank = 0; +- int ret; +- phys_size_t total_size, bank_1_size, bank_2_size; +- +- ret = board_phys_sdram_size(&total_size); +- if (ret) +- return ret; +- +- switch (total_size) { +- case 4 * (1L << 30): +- bank_1_size = 3 * (1L << 30); +- bank_2_size = 1 * (1L << 30); +- break; +- default: +- bank_1_size = total_size; +- bank_2_size = 0; +- break; +- } +- +- gd->bd->bi_dram[bank].start = PHYS_SDRAM; +- gd->bd->bi_dram[bank].size = bank_1_size; +- +- if (rom_pointer[1]) { +- phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; +- phys_size_t optee_size = (size_t)rom_pointer[1]; +- +- if ((optee_start + optee_size) < (PHYS_SDRAM + bank_1_size)) { +- +- gd->bd->bi_dram[bank].size = optee_start - +- gd->bd->bi_dram[bank].start; +- +- if ( ++bank >= CONFIG_NR_DRAM_BANKS) { +- puts("CONFIG_NR_DRAM_BANKS is not enough\n"); +- return -1; +- } +- +- gd->bd->bi_dram[bank].start = optee_start; +- gd->bd->bi_dram[bank].size = PHYS_SDRAM + +- bank_1_size - gd->bd->bi_dram[bank].start; +- } +- else { +- printf("%s: There is no room to allocate TEE 0x%16.16llx @ 0x%16.16llx\n", +- __func__, optee_size, optee_start); +- } +- } else { +- gd->bd->bi_dram[bank].size = bank_1_size; +- } +- +- if(bank_2_size) { +- if ( ++bank >= CONFIG_NR_DRAM_BANKS) { +- puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n"); +- return -1; +- } +- gd->bd->bi_dram[bank].start = PHYS_SDRAM_2; +- gd->bd->bi_dram[bank].size = bank_2_size; +- } +- return 0; +-} +- +-phys_size_t get_effective_memsize(void) +-{ +- /* return the first bank as effective memory */ +- if (rom_pointer[1]) +- return ((phys_addr_t)rom_pointer[0] - PHYS_SDRAM); +- +- switch(gd->ram_size) { +- case 4 * (1L<<30): +- return 3 * (1L<<30); +- default: +- return gd->ram_size; +- } +-} +- + #ifdef CONFIG_OF_BOARD_SETUP + int ft_board_setup(void *blob, bd_t *bd) + { +@@ -316,7 +128,7 @@ static int setup_mac_address(void) + return -1; + + ret = eth_env_set_enetaddr("ethaddr", enetaddr); +- if (!ret) ++ if (ret) + return -1; + + return 0; +@@ -352,522 +164,88 @@ int board_phy_config(struct phy_device *phydev) + } + #endif + +-#ifdef CONFIG_USB_TCPC +-struct tcpc_port port1; +-struct tcpc_port port2; +- +-static int setup_pd_switch(uint8_t i2c_bus, uint8_t addr) +-{ +- struct udevice *bus; +- struct udevice *i2c_dev = NULL; +- int ret; +- uint8_t valb; +- +- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); +- if (ret) { +- printf("%s: Can't find bus\n", __func__); +- return -EINVAL; +- } +- +- ret = dm_i2c_probe(bus, addr, 0, &i2c_dev); +- if (ret) { +- printf("%s: Can't find device id=0x%x\n", +- __func__, addr); +- return -ENODEV; +- } +- +- ret = dm_i2c_read(i2c_dev, 0xB, &valb, 1); +- if (ret) { +- printf("%s dm_i2c_read failed, err %d\n", __func__, ret); +- return -EIO; +- } +- valb |= 0x4; /* Set DB_EXIT to exit dead battery mode */ +- ret = dm_i2c_write(i2c_dev, 0xB, (const uint8_t *)&valb, 1); +- if (ret) { +- printf("%s dm_i2c_write failed, err %d\n", __func__, ret); +- return -EIO; +- } +- +- /* Set OVP threshold to 23V */ +- valb = 0x6; +- ret = dm_i2c_write(i2c_dev, 0x8, (const uint8_t *)&valb, 1); +- if (ret) { +- printf("%s dm_i2c_write failed, err %d\n", __func__, ret); +- return -EIO; +- } +- +- return 0; +-} +- +-int pd_switch_snk_enable(struct tcpc_port *port) +-{ +- if (port == &port1) { +- debug("Setup pd switch on port 1\n"); +- return setup_pd_switch(1, 0x72); +- } else if (port == &port2) { +- debug("Setup pd switch on port 2\n"); +- return setup_pd_switch(1, 0x73); +- } else +- return -EINVAL; +-} +- +-struct tcpc_port_config port1_config = { +- .i2c_bus = 1, /*i2c2*/ +- .addr = 0x50, +- .port_type = TYPEC_PORT_UFP, +- .max_snk_mv = 5000, +- .max_snk_ma = 3000, +- .max_snk_mw = 40000, +- .op_snk_mv = 9000, +- .switch_setup_func = &pd_switch_snk_enable, +-}; +- +-struct tcpc_port_config port2_config = { +- .i2c_bus = 1, /*i2c2*/ +- .addr = 0x52, +- .port_type = TYPEC_PORT_UFP, +- .max_snk_mv = 5000, +- .max_snk_ma = 3000, +- .max_snk_mw = 40000, +- .op_snk_mv = 9000, +- .switch_setup_func = &pd_switch_snk_enable, +-}; +- +-static int setup_typec(void) +-{ +- int ret; +- +- debug("tcpc_init port 2\n"); +- ret = tcpc_init(&port2, port2_config, NULL); +- if (ret) { +- printf("%s: tcpc port2 init failed, err=%d\n", +- __func__, ret); +- } else if (tcpc_pd_sink_check_charging(&port2)) { +- /* Disable PD for USB1, since USB2 has priority */ +- port1_config.disable_pd = true; +- printf("Power supply on USB2\n"); +- } +- +- debug("tcpc_init port 1\n"); +- ret = tcpc_init(&port1, port1_config, NULL); +- if (ret) { +- printf("%s: tcpc port1 init failed, err=%d\n", +- __func__, ret); +- } else { +- if (!port1_config.disable_pd) +- printf("Power supply on USB1\n"); +- return ret; +- } +- +- return ret; +-} +- + int board_usb_init(int index, enum usb_init_type init) + { +- int ret = 0; +- struct tcpc_port *port_ptr; +- + debug("board_usb_init %d, type %d\n", index, init); + +- if (index == 0) +- port_ptr = &port1; +- else +- port_ptr = &port2; +- + imx8m_usb_power(index, true); + +- if (init == USB_INIT_HOST) +- tcpc_setup_dfp_mode(port_ptr); +- else +- tcpc_setup_ufp_mode(port_ptr); +- +- return ret; ++ return 0; + } + + int board_usb_cleanup(int index, enum usb_init_type init) + { +- int ret = 0; +- + debug("board_usb_cleanup %d, type %d\n", index, init); + +- if (init == USB_INIT_HOST) { +- if (index == 0) +- ret = tcpc_disable_src_vbus(&port1); +- else +- ret = tcpc_disable_src_vbus(&port2); +- } +- + imx8m_usb_power(index, false); +- return ret; +-} + +-int board_ehci_usb_phy_mode(struct udevice *dev) +-{ +- int ret = 0; +- enum typec_cc_polarity pol; +- enum typec_cc_state state; +- struct tcpc_port *port_ptr; +- +- if (dev->seq == 0) +- port_ptr = &port1; +- else +- port_ptr = &port2; +- +- tcpc_setup_ufp_mode(port_ptr); +- +- ret = tcpc_get_cc_status(port_ptr, &pol, &state); +- if (!ret) { +- if (state == TYPEC_STATE_SRC_RD_RA || state == TYPEC_STATE_SRC_RD) +- return USB_INIT_HOST; +- } +- +- return USB_INIT_DEVICE; ++ return 0; + } +- +-#endif +- + int board_init(void) + { + +-#ifdef CONFIG_USB_TCPC +- setup_typec(); +-#endif +- +-#ifdef CONFIG_MXC_SPI +- setup_spi(); +-#endif +- + #ifdef CONFIG_FEC_MXC + setup_fec(); + #endif +- +-#ifdef CONFIG_FSL_FSPI +- board_qspi_init(); +-#endif +- +-#ifdef CONFIG_NAND_MXS +- setup_gpmi_nand(); /* SPL will call the board_early_init_f */ +-#endif + return 0; + } + + int board_mmc_get_env_dev(int devno) + { +- const ulong user_env_devno = env_get_hex("env_mmcdev", ULONG_MAX); ++ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); + if (user_env_devno != ULONG_MAX) { +- printf("User Environment DevNo is set: Save environmet on MMC(%lu)\n", user_env_devno); ++ printf("User Environment dev# is (%lu)\n", user_env_devno); + return (int)user_env_devno; + } +- else { +- return devno - 1; +- } ++ return devno; + } + +-int mmc_map_to_kernel_blk(int devno) ++static int _mmc_get_env_part(void) + { +- return devno + 1; +-} +- +-#ifdef CONFIG_VIDEO_MXS +- +-#define ADV7535_MAIN 0x3d +-#define ADV7535_DSI_CEC 0x3c +- +-static const struct sec_mipi_dsim_plat_data imx8mm_mipi_dsim_plat_data = { +- .version = 0x1060200, +- .max_data_lanes = 4, +- .max_data_rate = 1500000000ULL, +- .reg_base = MIPI_DSI_BASE_ADDR, +- .gpr_base = CSI_BASE_ADDR + 0x8000, +-}; +- +-static int adv7535_i2c_reg_write(struct udevice *dev, uint addr, uint mask, uint data) +-{ +- uint8_t valb; +- int err; +- +- if (mask != 0xff) { +- err = dm_i2c_read(dev, addr, &valb, 1); +- if (err) +- return err; +- +- valb &= ~mask; +- valb |= data; +- } else { +- valb = data; ++ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); ++ if (user_env_part != ULONG_MAX) { ++ printf("User Environment part# is (%lu)\n", user_env_part); ++ return (int)user_env_part; + } +- +- err = dm_i2c_write(dev, addr, &valb, 1); +- return err; ++ return CONFIG_SYS_MMC_ENV_PART; + } + +-static int adv7535_i2c_reg_read(struct udevice *dev, uint8_t addr, uint8_t *data) ++uint mmc_get_env_part(struct mmc *mmc) + { +- uint8_t valb; +- int err; ++ if (mmc->part_support) ++ return _mmc_get_env_part(); + +- err = dm_i2c_read(dev, addr, &valb, 1); +- if (err) +- return err; +- +- *data = (int)valb; + return 0; + } + +-static void adv7535_init(void) +-{ +- struct udevice *bus, *main_dev, *cec_dev; +- int i2c_bus = 1; +- int ret; +- uint8_t val; +- +- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); +- if (ret) { +- printf("%s: No bus %d\n", __func__, i2c_bus); +- return; +- } +- +- ret = dm_i2c_probe(bus, ADV7535_MAIN, 0, &main_dev); +- if (ret) { +- printf("%s: Can't find device id=0x%x, on bus %d\n", +- __func__, ADV7535_MAIN, i2c_bus); +- return; +- } +- +- ret = dm_i2c_probe(bus, ADV7535_DSI_CEC, 0, &cec_dev); +- if (ret) { +- printf("%s: Can't find device id=0x%x, on bus %d\n", +- __func__, ADV7535_MAIN, i2c_bus); +- return; +- } +- +- adv7535_i2c_reg_read(main_dev, 0x00, &val); +- debug("Chip revision: 0x%x (expected: 0x14)\n", val); +- adv7535_i2c_reg_read(cec_dev, 0x00, &val); +- debug("Chip ID MSB: 0x%x (expected: 0x75)\n", val); +- adv7535_i2c_reg_read(cec_dev, 0x01, &val); +- debug("Chip ID LSB: 0x%x (expected: 0x33)\n", val); +- +- /* Power */ +- adv7535_i2c_reg_write(main_dev, 0x41, 0xff, 0x10); +- /* Initialisation (Fixed) Registers */ +- adv7535_i2c_reg_write(main_dev, 0x16, 0xff, 0x20); +- adv7535_i2c_reg_write(main_dev, 0x9A, 0xff, 0xE0); +- adv7535_i2c_reg_write(main_dev, 0xBA, 0xff, 0x70); +- adv7535_i2c_reg_write(main_dev, 0xDE, 0xff, 0x82); +- adv7535_i2c_reg_write(main_dev, 0xE4, 0xff, 0x40); +- adv7535_i2c_reg_write(main_dev, 0xE5, 0xff, 0x80); +- adv7535_i2c_reg_write(cec_dev, 0x15, 0xff, 0xD0); +- adv7535_i2c_reg_write(cec_dev, 0x17, 0xff, 0xD0); +- adv7535_i2c_reg_write(cec_dev, 0x24, 0xff, 0x20); +- adv7535_i2c_reg_write(cec_dev, 0x57, 0xff, 0x11); +- /* 4 x DSI Lanes */ +- adv7535_i2c_reg_write(cec_dev, 0x1C, 0xff, 0x40); +- +- /* DSI Pixel Clock Divider */ +- adv7535_i2c_reg_write(cec_dev, 0x16, 0xff, 0x18); +- +- /* Enable Internal Timing Generator */ +- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); +- /* 1920 x 1080p 60Hz */ +- adv7535_i2c_reg_write(cec_dev, 0x28, 0xff, 0x89); /* total width */ +- adv7535_i2c_reg_write(cec_dev, 0x29, 0xff, 0x80); /* total width */ +- adv7535_i2c_reg_write(cec_dev, 0x2A, 0xff, 0x02); /* hsync */ +- adv7535_i2c_reg_write(cec_dev, 0x2B, 0xff, 0xC0); /* hsync */ +- adv7535_i2c_reg_write(cec_dev, 0x2C, 0xff, 0x05); /* hfp */ +- adv7535_i2c_reg_write(cec_dev, 0x2D, 0xff, 0x80); /* hfp */ +- adv7535_i2c_reg_write(cec_dev, 0x2E, 0xff, 0x09); /* hbp */ +- adv7535_i2c_reg_write(cec_dev, 0x2F, 0xff, 0x40); /* hbp */ +- +- adv7535_i2c_reg_write(cec_dev, 0x30, 0xff, 0x46); /* total height */ +- adv7535_i2c_reg_write(cec_dev, 0x31, 0xff, 0x50); /* total height */ +- adv7535_i2c_reg_write(cec_dev, 0x32, 0xff, 0x00); /* vsync */ +- adv7535_i2c_reg_write(cec_dev, 0x33, 0xff, 0x50); /* vsync */ +- adv7535_i2c_reg_write(cec_dev, 0x34, 0xff, 0x00); /* vfp */ +- adv7535_i2c_reg_write(cec_dev, 0x35, 0xff, 0x40); /* vfp */ +- adv7535_i2c_reg_write(cec_dev, 0x36, 0xff, 0x02); /* vbp */ +- adv7535_i2c_reg_write(cec_dev, 0x37, 0xff, 0x40); /* vbp */ +- +- /* Reset Internal Timing Generator */ +- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); +- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0x8B); +- adv7535_i2c_reg_write(cec_dev, 0x27, 0xff, 0xCB); +- +- /* HDMI Output */ +- adv7535_i2c_reg_write(main_dev, 0xAF, 0xff, 0x16); +- /* AVI Infoframe - RGB - 16-9 Aspect Ratio */ +- adv7535_i2c_reg_write(main_dev, 0x55, 0xff, 0x02); +- adv7535_i2c_reg_write(main_dev, 0x56, 0xff, 0x0); +- +- /* GC Packet Enable */ +- adv7535_i2c_reg_write(main_dev, 0x40, 0xff, 0x0); +- /* GC Colour Depth - 24 Bit */ +- adv7535_i2c_reg_write(main_dev, 0x4C, 0xff, 0x0); +- /* Down Dither Output Colour Depth - 8 Bit (default) */ +- adv7535_i2c_reg_write(main_dev, 0x49, 0xff, 0x00); +- +- /* set low refresh 1080p30 */ +- adv7535_i2c_reg_write(main_dev, 0x4A, 0xff, 0x80); /*should be 0x80 for 1080p60 and 0x8c for 1080p30*/ +- +- /* HDMI Output Enable */ +- adv7535_i2c_reg_write(cec_dev, 0xbe, 0xff, 0x3c); +- adv7535_i2c_reg_write(cec_dev, 0x03, 0xff, 0x89); ++int mmc_map_to_kernel_blk(int devno){ ++ return devno; + } + +-#define DISPLAY_MIX_SFT_RSTN_CSR 0x00 +-#define DISPLAY_MIX_CLK_EN_CSR 0x04 +- +- /* 'DISP_MIX_SFT_RSTN_CSR' bit fields */ +-#define BUS_RSTN_BLK_SYNC_SFT_EN BIT(6) +- +- /* 'DISP_MIX_CLK_EN_CSR' bit fields */ +-#define LCDIF_PIXEL_CLK_SFT_EN BIT(7) +-#define LCDIF_APB_CLK_SFT_EN BIT(6) +- +-void disp_mix_bus_rstn_reset(ulong gpr_base, bool reset) +-{ +- if (!reset) +- /* release reset */ +- setbits_le32(gpr_base + DISPLAY_MIX_SFT_RSTN_CSR, BUS_RSTN_BLK_SYNC_SFT_EN); +- else +- /* hold reset */ +- clrbits_le32(gpr_base + DISPLAY_MIX_SFT_RSTN_CSR, BUS_RSTN_BLK_SYNC_SFT_EN); +-} +- +-void disp_mix_lcdif_clks_enable(ulong gpr_base, bool enable) ++static void board_bootdev_init(void) + { +- if (enable) +- /* enable lcdif clks */ +- setbits_le32(gpr_base + DISPLAY_MIX_CLK_EN_CSR, LCDIF_PIXEL_CLK_SFT_EN | LCDIF_APB_CLK_SFT_EN); +- else +- /* disable lcdif clks */ +- clrbits_le32(gpr_base + DISPLAY_MIX_CLK_EN_CSR, LCDIF_PIXEL_CLK_SFT_EN | LCDIF_APB_CLK_SFT_EN); +-} +- +-struct mipi_dsi_client_dev adv7535_dev = { +- .channel = 0, +- .lanes = 4, +- .format = MIPI_DSI_FMT_RGB888, +- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | +- MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE, +- .name = "ADV7535", +-}; +- +-struct mipi_dsi_client_dev rm67191_dev = { +- .channel = 0, +- .lanes = 4, +- .format = MIPI_DSI_FMT_RGB888, +- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | +- MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE, +-}; +- +-#define FSL_SIP_GPC 0xC2000000 +-#define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x3 +-#define DISPMIX 9 +-#define MIPI 10 +- +-void do_enable_mipi2hdmi(struct display_info_t const *dev) +-{ +- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); +- gpio_direction_output(IMX_GPIO_NR(1, 8), 1); +- +- /* ADV7353 initialization */ +- adv7535_init(); +- +- /* enable the dispmix & mipi phy power domain */ +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); +- +- /* Put lcdif out of reset */ +- disp_mix_bus_rstn_reset(imx8mm_mipi_dsim_plat_data.gpr_base, false); +- disp_mix_lcdif_clks_enable(imx8mm_mipi_dsim_plat_data.gpr_base, true); +- +- /* Setup mipi dsim */ +- sec_mipi_dsim_setup(&imx8mm_mipi_dsim_plat_data); +- imx_mipi_dsi_bridge_attach(&adv7535_dev); /* attach adv7535 device */ +-} +- +-void do_enable_mipi_led(struct display_info_t const *dev) +-{ +- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); +- gpio_direction_output(IMX_GPIO_NR(1, 8), 0); +- mdelay(100); +- gpio_direction_output(IMX_GPIO_NR(1, 8), 1); +- +- /* enable the dispmix & mipi phy power domain */ +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); +- +- /* Put lcdif out of reset */ +- disp_mix_bus_rstn_reset(imx8mm_mipi_dsim_plat_data.gpr_base, false); +- disp_mix_lcdif_clks_enable(imx8mm_mipi_dsim_plat_data.gpr_base, true); +- +- /* Setup mipi dsim */ +- sec_mipi_dsim_setup(&imx8mm_mipi_dsim_plat_data); +- +- rm67191_init(); +- rm67191_dev.name = displays[1].mode.name; +- imx_mipi_dsi_bridge_attach(&rm67191_dev); /* attach rm67191 device */ +-} +- +-void board_quiesce_devices(void) +-{ +- gpio_request(IMX_GPIO_NR(1, 8), "DSI EN"); +- gpio_direction_output(IMX_GPIO_NR(1, 8), 0); ++ u32 bootdev = get_boot_device(); ++ switch (bootdev) { ++ case MMC3_BOOT: ++ bootdev = 2; ++ break; ++ case SD2_BOOT: ++ bootdev = 1; ++ break; ++ default: ++ env_set("bootdev", NULL); ++ return; ++ } ++ env_set_ulong("bootdev", bootdev); + } + +-struct display_info_t const displays[] = {{ +- .bus = LCDIF_BASE_ADDR, +- .addr = 0, +- .pixfmt = 24, +- .detect = NULL, +- .enable = do_enable_mipi2hdmi, +- .mode = { +- .name = "MIPI2HDMI", +- .refresh = 60, +- .xres = 1920, +- .yres = 1080, +- .pixclock = 6734, /* 148500000 */ +- .left_margin = 148, +- .right_margin = 88, +- .upper_margin = 36, +- .lower_margin = 4, +- .hsync_len = 44, +- .vsync_len = 5, +- .sync = FB_SYNC_EXT, +- .vmode = FB_VMODE_NONINTERLACED +- +-} }, { +- .bus = LCDIF_BASE_ADDR, +- .addr = 0, +- .pixfmt = 24, +- .detect = NULL, +- .enable = do_enable_mipi_led, +- .mode = { +- .name = "RM67191_OLED", +- .refresh = 60, +- .xres = 1080, +- .yres = 1920, +- .pixclock = 7575, /* 132000000 */ +- .left_margin = 34, +- .right_margin = 20, +- .upper_margin = 4, +- .lower_margin = 10, +- .hsync_len = 2, +- .vsync_len = 2, +- .sync = FB_SYNC_EXT, +- .vmode = FB_VMODE_NONINTERLACED +- +-} } }; +-size_t display_count = ARRAY_SIZE(displays); +-#endif +- + int board_late_init(void) + { + int ret; + + #ifdef CONFIG_ENV_IS_IN_MMC + board_late_mmc_env_init(); ++ board_bootdev_init(); + #endif + + ret = setup_mac_address(); +diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h +deleted file mode 100644 +index c3380cb5ef..0000000000 +--- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.h ++++ /dev/null +@@ -1,18 +0,0 @@ +-/* +- * Copyright 2017 NXP +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#ifndef __UCM_IMX8M_MINI__ +-#define __UCM_IMX8M_MINI__ +- +-#define TCM_DATA_CFG 0x7e0000 +-struct lpddr4_tcm_desc { +- unsigned int size; +- unsigned int sign; +- unsigned int index; +- unsigned int count; +-}; +- +-#endif +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 3eb63bf1e6..77b68b8e49 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -1,75 +1,101 @@ +-CONFIG_LOCALVERSION="-rel.1.3.2-rc0" + CONFIG_ARM=y ++CONFIG_SPL_SYS_ICACHE_OFF=y ++CONFIG_SPL_SYS_DCACHE_OFF=y + CONFIG_ARCH_IMX8M=y + CONFIG_SYS_TEXT_BASE=0x40200000 +-CONFIG_SYS_MALLOC_F_LEN=0x2000 ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_ENV_OFFSET=0x4400 ++CONFIG_DM_GPIO=y + CONFIG_TARGET_UCM_IMX8M_MINI=y ++CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" + CONFIG_SPL_MMC_SUPPORT=y +-# CONFIG_IMX_OPTEE is not set +-CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL=y ++CONFIG_CSF_SIZE=0x2000 ++CONFIG_SPL_TEXT_BASE=0x7E1000 + CONFIG_FIT=y ++CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg,SPL_TEXT_BASE=0x7E1000" ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" ++CONFIG_CONSOLE_MUX=y + CONFIG_SPL_LOAD_FIT=y + CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" ++CONFIG_BOARD_LATE_INIT=y + CONFIG_ARCH_MISC_INIT=y +-CONFIG_SPL=y +-CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_BOARD_EARLY_INIT_F=y + CONFIG_SPL_BOARD_INIT=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_POWER_SUPPORT=y + CONFIG_HUSH_PARSER=y +-CONFIG_FASTBOOT=y +-CONFIG_FSL_FASTBOOT=y +-CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +-CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +-CONFIG_FASTBOOT_FLASH=y +-CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_SYS_PROMPT="u-boot=> " ++# CONFIG_BOOTM_NETBSD is not set + CONFIG_CMD_EEPROM=y + CONFIG_CMD_EEPROM_LAYOUT=y + CONFIG_CMD_MEMINFO=y + CONFIG_CMD_MEMTEST=y ++config_cmd_clk=y ++config_cmd_fuse=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_MII=y ++CONFIG_CMD_PING=y + CONFIG_CMD_CACHE=y +-# CONFIG_CMD_LED is not set + CONFIG_CMD_REGULATOR=y + CONFIG_CMD_EXT2=y + CONFIG_CMD_EXT4=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y + CONFIG_EFI_PARTITION=y +-CONFIG_PARTITION_TYPE_GUID=y + CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" + CONFIG_ENV_IS_IN_MMC=y +-CONFIG_IMX8M_LPDDR4=y +-CONFIG_DM_GPIO=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK_COMPOSITE_CCF=y ++CONFIG_CLK_IMX8MM=y ++CONFIG_MXC_GPIO=y ++CONFIG_DM_I2C=y + CONFIG_SYS_I2C_MXC=y +-CONFIG_LED=y +-CONFIG_LED_STATUS=y +-CONFIG_LED_STATUS_GPIO=y +-CONFIG_LED_STATUS0=y +-CONFIG_LED_STATUS_BIT=12 + CONFIG_DM_MMC=y +-CONFIG_DM_SPI_FLASH=y +-CONFIG_SPI_FLASH=y +-CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_MMC_IO_VOLTAGE=y ++CONFIG_MMC_UHS_SUPPORT=y ++CONFIG_MMC_HS400_ES_SUPPORT=y ++CONFIG_MMC_HS400_SUPPORT=y ++CONFIG_FSL_ESDHC_IMX=y + CONFIG_DM_ETH=y +-CONFIG_USB_HOST_ETHER=y +-CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_FEC_MXC=y ++CONFIG_MII=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_IMX8M=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_FIXED=y + CONFIG_DM_REGULATOR_GPIO=y +-CONFIG_DM_SPI=y ++CONFIG_DM_RESET=y ++CONFIG_MXC_UART=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_PSCI=y + CONFIG_DM_THERMAL=y ++CONFIG_NXP_TMU=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_GADGET_MANUFACTURER="FSL" + CONFIG_USB_GADGET_VENDOR_NUM=0x0525 + CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 ++CONFIG_CI_UDC=y + CONFIG_SDP_LOADADDR=0x40400000 +-CONFIG_NR_DRAM_BANKS=4 +-CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_EXT4_WRITE=y ++CONFIG_FAT_WRITE=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++# CONFIG_EFI_LOADER is not set +diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h +index ad4e7997b1..75c6102f10 100644 +--- a/include/configs/ucm-imx8m-mini.h ++++ b/include/configs/ucm-imx8m-mini.h +@@ -1,5 +1,5 @@ + /* +- * Copyright 2018 CompuLab ++ * Copyright 2020 CompuLab + * + * SPDX-License-Identifier: GPL-2.0+ + */ +@@ -9,13 +9,8 @@ + + #include + #include +- + #include "imx_env.h" + +-#ifdef CONFIG_SECURE_BOOT +-#define CONFIG_CSF_SIZE 0x2000 /* 8K region */ +-#endif +- + #define CONFIG_SPL_MAX_SIZE (148 * 1024) + #define CONFIG_SYS_MONITOR_LEN (512 * 1024) + #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +@@ -26,20 +21,19 @@ + #ifdef CONFIG_SPL_BUILD + /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ + #define CONFIG_SPL_WATCHDOG_SUPPORT +-#define CONFIG_SPL_POWER_SUPPORT + #define CONFIG_SPL_DRIVERS_MISC_SUPPORT + #define CONFIG_SPL_I2C_SUPPORT +-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +-#define CONFIG_SPL_STACK 0x91fff0 + #define CONFIG_SPL_LIBCOMMON_SUPPORT + #define CONFIG_SPL_LIBGENERIC_SUPPORT +-#define CONFIG_SPL_BSS_START_ADDR 0x00910000 +-#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ +-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ +-#define CONFIG_SYS_ICACHE_OFF +-#define CONFIG_SYS_DCACHE_OFF +-#define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ ++ ++#define CONFIG_SPL_STACK 0x920000 ++#define CONFIG_SPL_BSS_START_ADDR 0x910000 ++#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K ++#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 ++#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K ++ ++/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ ++#define CONFIG_MALLOC_F_ADDR 0x912000 + + #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ + +@@ -56,10 +50,6 @@ + #define CONFIG_POWER_I2C + #define CONFIG_POWER_BD71837 + +-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +-#else /*ifdef CONFIG_SPL_BUILD*/ +-#define CONFIG_DM_I2C_COMPAT +-#define CONFIG_DM_I2C + #endif /*ifdef CONFIG_SPL_BUILD*/ + + #define CONFIG_CMD_READ +@@ -68,9 +58,7 @@ + + #define CONFIG_REMAKE_ELF + +-#define CONFIG_BOARD_EARLY_INIT_F + #define CONFIG_BOARD_POSTCLK_INIT +-#define CONFIG_BOARD_LATE_INIT + + /* Flat Device Tree Definitions */ + #define CONFIG_OF_BOARD_SETUP +@@ -83,13 +71,8 @@ + /* ENET Config */ + /* ENET1 */ + #if defined(CONFIG_CMD_NET) +-#define CONFIG_CMD_PING +-#define CONFIG_CMD_DHCP +-#define CONFIG_CMD_MII +-#define CONFIG_MII + #define CONFIG_ETHPRIME "FEC" + +-#define CONFIG_FEC_MXC + #define CONFIG_FEC_XCV_TYPE RGMII + #define CONFIG_FEC_MXC_PHYADDR 0 + #define FEC_QUIRK_ENET_MAC +@@ -126,19 +109,20 @@ + "fdt_addr=0x43000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "boot_fdt=yes\0" \ +- "fdt_file="CONFIG_DEFAULT_DEVICE_TREE".dtb\0" \ ++ "fdt_file="CONFIG_DEFAULT_DTB"\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ +- "emmc_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk2p2 rw rootwait;\0" \ +- "sd_ul=setenv iface mmc; setenv dev 0; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk1p2 rw rootwait;\0" \ ++ "root_opt=rootwait rw\0" \ ++ "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ ++ "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ + "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/sda2 rw rootwait;\0" \ ++ "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ + "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ + "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ + "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ +@@ -197,9 +181,8 @@ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + + #define CONFIG_ENV_OVERWRITE +-#define CONFIG_ENV_OFFSET (34 * 512) /* Max possible GPT size */ +-#define CONFIG_ENV_SIZE 0x1000 +-#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ ++#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ ++#define CONFIG_SYS_MMC_ENV_PART 1 + #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + + /* Size of malloc() pool */ +@@ -220,7 +203,6 @@ + + #define CONFIG_BAUDRATE 115200 + +-#define CONFIG_MXC_UART + #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + + /* Monitor Command Prompt */ +@@ -233,30 +215,16 @@ + #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +-#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +-#define CONFIG_MXC_OCOTP +-#define CONFIG_CMD_FUSE +- + #define CONFIG_IMX_BOOTAUX + + /* USDHC */ +-#define CONFIG_CMD_MMC +-#define CONFIG_FSL_ESDHC + #define CONFIG_FSL_USDHC + + #define CONFIG_SYS_FSL_USDHC_NUM 2 + #define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +-#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +-#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 +- +-#define CONFIG_MXC_GPIO +- +-#define CONFIG_MXC_OCOTP +-#define CONFIG_CMD_FUSE +- + #ifndef CONFIG_DM_I2C + #define CONFIG_SYS_I2C + #endif +@@ -286,11 +254,8 @@ + + #endif + +-#define CONFIG_USB_GADGET_DUALSPEED + #define CONFIG_USB_GADGET_VBUS_DRAW 2 + +-#define CONFIG_CI_UDC +- + #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) + #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +@@ -307,7 +272,8 @@ + #define CONFIG_RM67191 + #endif + +-#define CONFIG_OF_SYSTEM_SETUP ++#define CONFIG_BOARD_POSTCLK_INIT ++#define CONFIG_OF_BOARD_SETUP + + #if defined(CONFIG_ANDROID_SUPPORT) + #include "ucm-imx8m-mini_android.h" +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0055-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch b/recipes-bsp/u-boot/compulab/imx8mm/0055-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch new file mode 100644 index 0000000..77e3ed6 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0055-cpl-imx8m-mini-Set-LOCALVERSION-intead-of-EXTRAVERSI.patch @@ -0,0 +1,53 @@ +From 6bce15eb561907ce960577ca4dc2eb2a00394107 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 15:06:14 +0300 +Subject: [PATCH 055/126] cpl-imx8m-mini: Set LOCALVERSION intead of + EXTRAVERSION + +Signed-off-by: Kirill Kapranov +--- + Makefile | 2 +- + configs/mcm-imx8m-mini_defconfig | 1 + + configs/ucm-imx8m-mini_defconfig | 1 + + 3 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 22d2230a6f..0451f445f6 100644 +--- a/Makefile ++++ b/Makefile +@@ -3,7 +3,7 @@ + VERSION = 2021 + PATCHLEVEL = 04 + SUBLEVEL = +-EXTRAVERSION = -mcm-imx8m-mini-1.0 ++EXTRAVERSION = + NAME = + + # *DOCUMENTATION* +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig +index 92cdad293d..a4c3c90f83 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/mcm-imx8m-mini_defconfig +@@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y + CONFIG_SPL=y + CONFIG_CSF_SIZE=0x2000 + CONFIG_SPL_TEXT_BASE=0x7E1000 ++CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0" + CONFIG_FIT=y + CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_LOAD_FIT=y +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 77b68b8e49..2c98eaa256 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y + CONFIG_SPL=y + CONFIG_CSF_SIZE=0x2000 + CONFIG_SPL_TEXT_BASE=0x7E1000 ++CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0" + CONFIG_FIT=y + CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Refactor-.h-configs.patch b/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Refactor-.h-configs.patch new file mode 100644 index 0000000..990f97b --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0056-cpl-imx8m-mini-Refactor-.h-configs.patch @@ -0,0 +1,852 @@ +From 8ce4046b2b4a29a5158e904f11c128b9c42ea5a9 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 15:46:11 +0300 +Subject: [PATCH 056/126] cpl-imx8m-mini: Refactor .h configs + +Signed-off-by: Kirill Kapranov +--- + include/configs/cpl-imx8m-mini.h | 275 +++++++++++++++++++++++++++++++++++++++ + include/configs/mcm-imx8m-mini.h | 265 +------------------------------------ + include/configs/ucm-imx8m-mini.h | 268 +------------------------------------- + 3 files changed, 277 insertions(+), 531 deletions(-) + create mode 100644 include/configs/cpl-imx8m-mini.h + +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +new file mode 100644 +index 0000000000..dd8120f4dc +--- /dev/null ++++ b/include/configs/cpl-imx8m-mini.h +@@ -0,0 +1,275 @@ ++/* ++ * Copyright 2020 CompuLab ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __CPL_IMX8M_MINI_H ++#define __CPL_IMX8M_MINI_H ++ ++#include ++#include ++#include "imx_env.h" ++ ++#define CONFIG_SPL_MAX_SIZE (148 * 1024) ++#define CONFIG_SYS_MONITOR_LEN (512 * 1024) ++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR ++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 ++#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 ++#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) ++ ++#ifdef CONFIG_SPL_BUILD ++/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ ++#define CONFIG_SPL_WATCHDOG_SUPPORT ++#define CONFIG_SPL_DRIVERS_MISC_SUPPORT ++#define CONFIG_SPL_I2C_SUPPORT ++#define CONFIG_SPL_LIBCOMMON_SUPPORT ++#define CONFIG_SPL_LIBGENERIC_SUPPORT ++ ++#define CONFIG_SPL_STACK 0x920000 ++#define CONFIG_SPL_BSS_START_ADDR 0x910000 ++#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K ++#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 ++#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K ++ ++/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ ++#define CONFIG_MALLOC_F_ADDR 0x912000 ++ ++#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ ++ ++#undef CONFIG_DM_MMC ++#undef CONFIG_DM_PMIC ++#undef CONFIG_DM_PMIC_PFUZE100 ++ ++#define CONFIG_SYS_I2C ++#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ ++#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ ++#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ ++ ++#define CONFIG_POWER ++#define CONFIG_POWER_I2C ++#define CONFIG_POWER_BD71837 ++ ++#endif /*ifdef CONFIG_SPL_BUILD*/ ++ ++#define CONFIG_CMD_READ ++#define CONFIG_SERIAL_TAG ++#define CONFIG_FASTBOOT_USB_DEV 0 ++ ++#define CONFIG_REMAKE_ELF ++ ++#define CONFIG_BOARD_POSTCLK_INIT ++ ++/* Flat Device Tree Definitions */ ++#define CONFIG_OF_BOARD_SETUP ++ ++#undef CONFIG_CMD_IMLS ++ ++#undef CONFIG_CMD_CRC32 ++#undef CONFIG_BOOTM_NETBSD ++ ++/* ENET Config */ ++/* ENET1 */ ++#if defined(CONFIG_CMD_NET) ++#define CONFIG_ETHPRIME "FEC" ++ ++#define CONFIG_FEC_XCV_TYPE RGMII ++#define CONFIG_FEC_MXC_PHYADDR 0 ++#define FEC_QUIRK_ENET_MAC ++ ++#define CONFIG_PHY_GIGE ++#define IMX_FEC_BASE 0x30BE0000 ++ ++#define CONFIG_PHYLIB ++#define CONFIG_PHY_ATHEROS ++#endif ++ ++#define CONFIG_MFG_ENV_SETTINGS \ ++ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ ++ "rdinit=/linuxrc " \ ++ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ ++ "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ ++ "g_mass_storage.iSerialNumber=\"\" "\ ++ "clk_ignore_unused "\ ++ "\0" \ ++ "initrd_addr=0x43800000\0" \ ++ "initrd_high=0xffffffff\0" \ ++ "emmc_dev=1\0" \ ++ "sd_dev=0\0" \ ++ "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ ++ "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ ++ "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ ++/* Initial environment variables */ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ CONFIG_MFG_ENV_SETTINGS \ ++ "autoload=off\0" \ ++ "script=boot.scr\0" \ ++ "image=Image\0" \ ++ "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ ++ "fdt_addr=0x43000000\0" \ ++ "fdt_high=0xffffffffffffffff\0" \ ++ "boot_fdt=yes\0" \ ++ "fdt_file="CONFIG_DEFAULT_DTB"\0" \ ++ "initrd_addr=0x43800000\0" \ ++ "initrd_high=0xffffffffffffffff\0" \ ++ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ ++ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ ++ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ ++ "mmcautodetect=yes\0" \ ++ "root_opt=rootwait rw\0" \ ++ "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ ++ "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ ++ "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ ++ "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ ++ "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ ++ "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "source\0" \ ++ "netargs=setenv bootargs console=${console} " \ ++ "root=/dev/nfs " \ ++ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ ++ "netboot=echo Booting from net ...; " \ ++ "run netargs; " \ ++ "if test ${ip_dyn} = yes; then " \ ++ "setenv get_cmd dhcp; " \ ++ "else " \ ++ "setenv get_cmd tftp; " \ ++ "fi; " \ ++ "${get_cmd} ${loadaddr} ${image}; " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ ++ "booti ${loadaddr} - ${fdt_addr}; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT; " \ ++ "fi; " \ ++ "else " \ ++ "booti; " \ ++ "fi;\0" ++#define CONFIG_BOOTCOMMAND \ ++ "for src in sd_ul usb_ul emmc_ul; do " \ ++ "run ${src}; " \ ++ "if run ulbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run ulimage; then " \ ++ "if run ulfdt; then " \ ++ "booti ${loadaddr} - ${fdt_addr}; " \ ++ "else " \ ++ "if test ${boot_fdt} != yes; then " \ ++ "booti ${loadaddr}; " \ ++ "fi; " \ ++ "fi; " \ ++ "fi; " \ ++ "fi; " \ ++ "done; " \ ++ "usb start; ums 0 mmc ${mmcdev};" ++ ++/* Link Definitions */ ++#define CONFIG_LOADADDR 0x40480000 ++ ++#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR ++ ++#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 ++#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 ++#define CONFIG_SYS_INIT_SP_OFFSET \ ++ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) ++#define CONFIG_SYS_INIT_SP_ADDR \ ++ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) ++ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ ++#define CONFIG_SYS_MMC_ENV_PART 1 ++#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ ++ ++/* Size of malloc() pool */ ++#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) ++ ++#define PHYS_SDRAM 0x40000000 ++#define PHYS_SDRAM_2 0x100000000 ++#define PHYS_SDRAM_SIZE 0 /* Memory chip autodetection */ ++#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */ ++#define CONFIG_NR_DRAM_BANKS 4 ++#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM ++ ++#define MEMTEST_DIVIDER 2 ++#define MEMTEST_NUMERATOR 1 ++ ++#define CONFIG_BAUDRATE 115200 ++ ++#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR ++ ++/* Monitor Command Prompt */ ++#undef CONFIG_SYS_PROMPT ++#define CONFIG_SYS_PROMPT "u-boot=> " ++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " ++#define CONFIG_SYS_CBSIZE 2048 ++#define CONFIG_SYS_MAXARGS 64 ++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ ++ sizeof(CONFIG_SYS_PROMPT) + 16) ++ ++#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 ++ ++#define CONFIG_IMX_BOOTAUX ++ ++/* USDHC */ ++#define CONFIG_FSL_USDHC ++ ++#define CONFIG_SYS_FSL_USDHC_NUM 2 ++#define CONFIG_SYS_FSL_ESDHC_ADDR 0 ++ ++#ifndef CONFIG_DM_I2C ++#define CONFIG_SYS_I2C ++#endif ++#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ ++#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ ++#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ ++#define CONFIG_SYS_I2C_SPEED 100000 ++ ++/* EEPROM */ ++#define CONFIG_ENV_EEPROM_IS_ON_I2C ++#define CONFIG_SYS_I2C_EEPROM_BUS 1 ++#define CONFIG_SYS_I2C_SLAVE 0x00 ++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 ++#define CONFIG_SYS_EEPROM_SIZE 256 ++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 ++#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 ++ ++/* USB configs */ ++#ifndef CONFIG_SPL_BUILD ++#define CONFIG_CMD_USB ++#define CONFIG_USB_STORAGE ++#define CONFIG_USBD_HS ++ ++#define CONFIG_CMD_USB_MASS_STORAGE ++#define CONFIG_USB_GADGET_MASS_STORAGE ++#define CONFIG_USB_FUNCTION_MASS_STORAGE ++ ++#endif ++ ++#define CONFIG_USB_GADGET_VBUS_DRAW 2 ++ ++#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) ++#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 ++ ++#ifdef CONFIG_VIDEO ++#define CONFIG_VIDEO_MXS ++#define CONFIG_VIDEO_LOGO ++#define CONFIG_SPLASH_SCREEN ++#define CONFIG_SPLASH_SCREEN_ALIGN ++#define CONFIG_CMD_BMP ++#define CONFIG_BMP_16BPP ++#define CONFIG_VIDEO_BMP_RLE8 ++#define CONFIG_VIDEO_BMP_LOGO ++#define CONFIG_IMX_VIDEO_SKIP ++#define CONFIG_RM67191 ++#endif ++ ++#define CONFIG_BOARD_POSTCLK_INIT ++#define CONFIG_OF_BOARD_SETUP ++ ++#endif +diff --git a/include/configs/mcm-imx8m-mini.h b/include/configs/mcm-imx8m-mini.h +index dd0448efca..602091a782 100644 +--- a/include/configs/mcm-imx8m-mini.h ++++ b/include/configs/mcm-imx8m-mini.h +@@ -7,270 +7,7 @@ + #ifndef __MCM_IMX8M_MINI_H + #define __MCM_IMX8M_MINI_H + +-#include +-#include +-#include "imx_env.h" +- +-#define CONFIG_SPL_MAX_SIZE (148 * 1024) +-#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +-#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +- +-#ifdef CONFIG_SPL_BUILD +-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ +-#define CONFIG_SPL_WATCHDOG_SUPPORT +-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +-#define CONFIG_SPL_I2C_SUPPORT +-#define CONFIG_SPL_LIBCOMMON_SUPPORT +-#define CONFIG_SPL_LIBGENERIC_SUPPORT +- +-#define CONFIG_SPL_STACK 0x920000 +-#define CONFIG_SPL_BSS_START_ADDR 0x910000 +-#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K +-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K +- +-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +-#define CONFIG_MALLOC_F_ADDR 0x912000 +- +-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ +- +-#undef CONFIG_DM_MMC +-#undef CONFIG_DM_PMIC +-#undef CONFIG_DM_PMIC_PFUZE100 +- +-#define CONFIG_SYS_I2C +-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +- +-#define CONFIG_POWER +-#define CONFIG_POWER_I2C +-#define CONFIG_POWER_BD71837 +- +-#endif /*ifdef CONFIG_SPL_BUILD*/ +- +-#define CONFIG_CMD_READ +-#define CONFIG_SERIAL_TAG +-#define CONFIG_FASTBOOT_USB_DEV 0 +- +-#define CONFIG_REMAKE_ELF +- +-#define CONFIG_BOARD_POSTCLK_INIT +- +-/* Flat Device Tree Definitions */ +-#define CONFIG_OF_BOARD_SETUP +- +-#undef CONFIG_CMD_IMLS +- +-#undef CONFIG_CMD_CRC32 +-#undef CONFIG_BOOTM_NETBSD +- +-/* ENET Config */ +-/* ENET1 */ +-#if defined(CONFIG_CMD_NET) +-#define CONFIG_ETHPRIME "FEC" +- +-#define CONFIG_FEC_XCV_TYPE RGMII +-#define CONFIG_FEC_MXC_PHYADDR 0 +-#define FEC_QUIRK_ENET_MAC +- +-#define CONFIG_PHY_GIGE +-#define IMX_FEC_BASE 0x30BE0000 +- +-#define CONFIG_PHYLIB +-#define CONFIG_PHY_ATHEROS +-#endif +- +-#define CONFIG_MFG_ENV_SETTINGS \ +- "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ +- "rdinit=/linuxrc " \ +- "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ +- "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ +- "g_mass_storage.iSerialNumber=\"\" "\ +- "clk_ignore_unused "\ +- "\0" \ +- "initrd_addr=0x43800000\0" \ +- "initrd_high=0xffffffff\0" \ +- "emmc_dev=1\0" \ +- "sd_dev=0\0" \ +- "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ +- "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ +- "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ +-/* Initial environment variables */ +-#define CONFIG_EXTRA_ENV_SETTINGS \ +- CONFIG_MFG_ENV_SETTINGS \ +- "autoload=off\0" \ +- "script=boot.scr\0" \ +- "image=Image\0" \ +- "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ +- "fdt_addr=0x43000000\0" \ +- "fdt_high=0xffffffffffffffff\0" \ +- "boot_fdt=yes\0" \ +- "fdt_file="CONFIG_DEFAULT_DTB"\0" \ +- "initrd_addr=0x43800000\0" \ +- "initrd_high=0xffffffffffffffff\0" \ +- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ +- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ +- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ +- "mmcautodetect=yes\0" \ +- "root_opt=rootwait rw\0" \ +- "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ +- "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ +- "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ +- "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ +- "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ +- "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ +- "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ +- "bootscript=echo Running bootscript from mmc ...; " \ +- "source\0" \ +- "netargs=setenv bootargs console=${console} " \ +- "root=/dev/nfs " \ +- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ +- "netboot=echo Booting from net ...; " \ +- "run netargs; " \ +- "if test ${ip_dyn} = yes; then " \ +- "setenv get_cmd dhcp; " \ +- "else " \ +- "setenv get_cmd tftp; " \ +- "fi; " \ +- "${get_cmd} ${loadaddr} ${image}; " \ +- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ +- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ +- "booti ${loadaddr} - ${fdt_addr}; " \ +- "else " \ +- "echo WARN: Cannot load the DT; " \ +- "fi; " \ +- "else " \ +- "booti; " \ +- "fi;\0" +-#define CONFIG_BOOTCOMMAND \ +- "for src in sd_ul usb_ul emmc_ul; do " \ +- "run ${src}; " \ +- "if run ulbootscript; then " \ +- "run bootscript; " \ +- "else " \ +- "if run ulimage; then " \ +- "if run ulfdt; then " \ +- "booti ${loadaddr} - ${fdt_addr}; " \ +- "else " \ +- "if test ${boot_fdt} != yes; then " \ +- "booti ${loadaddr}; " \ +- "fi; " \ +- "fi; " \ +- "fi; " \ +- "fi; " \ +- "done; " \ +- "usb start; ums 0 mmc ${mmcdev};" +- +-/* Link Definitions */ +-#define CONFIG_LOADADDR 0x40480000 +- +-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +- +-#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +-#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +-#define CONFIG_SYS_INIT_SP_OFFSET \ +- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +-#define CONFIG_SYS_INIT_SP_ADDR \ +- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +- +-#define CONFIG_ENV_OVERWRITE +-#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +-#define CONFIG_SYS_MMC_ENV_PART 1 +-#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +- +-/* Size of malloc() pool */ +-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) +- +-#define PHYS_SDRAM 0x40000000 +-#define PHYS_SDRAM_2 0x100000000 +-#define PHYS_SDRAM_SIZE 0 /* Memory chip autodetection */ +-#define PHYS_SDRAM_2_SIZE 0 /* Memory chip autodetection */ +-#define CONFIG_NR_DRAM_BANKS 4 +-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +- +-#define MEMTEST_DIVIDER 2 +-#define MEMTEST_NUMERATOR 1 +- +-#define CONFIG_BAUDRATE 115200 +- +-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +- +-/* Monitor Command Prompt */ +-#undef CONFIG_SYS_PROMPT +-#define CONFIG_SYS_PROMPT "u-boot=> " +-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +-#define CONFIG_SYS_CBSIZE 2048 +-#define CONFIG_SYS_MAXARGS 64 +-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +- sizeof(CONFIG_SYS_PROMPT) + 16) +- +-#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 +- +-#define CONFIG_IMX_BOOTAUX +- +-/* USDHC */ +-#define CONFIG_FSL_USDHC +- +-#define CONFIG_SYS_FSL_USDHC_NUM 2 +-#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +- +-#ifndef CONFIG_DM_I2C +-#define CONFIG_SYS_I2C +-#endif +-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +-#define CONFIG_SYS_I2C_SPEED 100000 +- +-/* EEPROM */ +-#define CONFIG_ENV_EEPROM_IS_ON_I2C +-#define CONFIG_SYS_I2C_EEPROM_BUS 1 +-#define CONFIG_SYS_I2C_SLAVE 0x00 +-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +-#define CONFIG_SYS_EEPROM_SIZE 256 +-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +- +-/* USB configs */ +-#ifndef CONFIG_SPL_BUILD +-#define CONFIG_CMD_USB +-#define CONFIG_USB_STORAGE +-#define CONFIG_USBD_HS +- +-#define CONFIG_CMD_USB_MASS_STORAGE +-#define CONFIG_USB_GADGET_MASS_STORAGE +-#define CONFIG_USB_FUNCTION_MASS_STORAGE +- +-#endif +- +-#define CONFIG_USB_GADGET_VBUS_DRAW 2 +- +-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +- +-#ifdef CONFIG_VIDEO +-#define CONFIG_VIDEO_MXS +-#define CONFIG_VIDEO_LOGO +-#define CONFIG_SPLASH_SCREEN +-#define CONFIG_SPLASH_SCREEN_ALIGN +-#define CONFIG_CMD_BMP +-#define CONFIG_BMP_16BPP +-#define CONFIG_VIDEO_BMP_RLE8 +-#define CONFIG_VIDEO_BMP_LOGO +-#define CONFIG_IMX_VIDEO_SKIP +-#define CONFIG_RM67191 +-#endif +- +-#define CONFIG_BOARD_POSTCLK_INIT +-#define CONFIG_OF_BOARD_SETUP ++#include "cpl-imx8m-mini.h" + + #if defined(CONFIG_ANDROID_SUPPORT) + #include "mcm-imx8m-mini_android.h" +diff --git a/include/configs/ucm-imx8m-mini.h b/include/configs/ucm-imx8m-mini.h +index 75c6102f10..b3d6082a66 100644 +--- a/include/configs/ucm-imx8m-mini.h ++++ b/include/configs/ucm-imx8m-mini.h +@@ -7,273 +7,7 @@ + #ifndef __UCM_IMX8M_MINI_H + #define __UCM_IMX8M_MINI_H + +-#include +-#include +-#include "imx_env.h" +- +-#define CONFIG_SPL_MAX_SIZE (148 * 1024) +-#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +-#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +- +-#ifdef CONFIG_SPL_BUILD +-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ +-#define CONFIG_SPL_WATCHDOG_SUPPORT +-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +-#define CONFIG_SPL_I2C_SUPPORT +-#define CONFIG_SPL_LIBCOMMON_SUPPORT +-#define CONFIG_SPL_LIBGENERIC_SUPPORT +- +-#define CONFIG_SPL_STACK 0x920000 +-#define CONFIG_SPL_BSS_START_ADDR 0x910000 +-#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K +-#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K +- +-/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +-#define CONFIG_MALLOC_F_ADDR 0x912000 +- +-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ +- +-#undef CONFIG_DM_MMC +-#undef CONFIG_DM_PMIC +-#undef CONFIG_DM_PMIC_PFUZE100 +- +-#define CONFIG_SYS_I2C +-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +- +-#define CONFIG_POWER +-#define CONFIG_POWER_I2C +-#define CONFIG_POWER_BD71837 +- +-#endif /*ifdef CONFIG_SPL_BUILD*/ +- +-#define CONFIG_CMD_READ +-#define CONFIG_SERIAL_TAG +-#define CONFIG_FASTBOOT_USB_DEV 0 +- +-#define CONFIG_REMAKE_ELF +- +-#define CONFIG_BOARD_POSTCLK_INIT +- +-/* Flat Device Tree Definitions */ +-#define CONFIG_OF_BOARD_SETUP +- +-#undef CONFIG_CMD_IMLS +- +-#undef CONFIG_CMD_CRC32 +-#undef CONFIG_BOOTM_NETBSD +- +-/* ENET Config */ +-/* ENET1 */ +-#if defined(CONFIG_CMD_NET) +-#define CONFIG_ETHPRIME "FEC" +- +-#define CONFIG_FEC_XCV_TYPE RGMII +-#define CONFIG_FEC_MXC_PHYADDR 0 +-#define FEC_QUIRK_ENET_MAC +- +-#define CONFIG_PHY_GIGE +-#define IMX_FEC_BASE 0x30BE0000 +- +-#define CONFIG_PHYLIB +-#define CONFIG_PHY_ATHEROS +-#endif +- +-#define CONFIG_MFG_ENV_SETTINGS \ +- "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ +- "rdinit=/linuxrc " \ +- "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ +- "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ +- "g_mass_storage.iSerialNumber=\"\" "\ +- "clk_ignore_unused "\ +- "\0" \ +- "initrd_addr=0x43800000\0" \ +- "initrd_high=0xffffffff\0" \ +- "emmc_dev=1\0" \ +- "sd_dev=0\0" \ +- "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ +- "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ +- "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ +-/* Initial environment variables */ +-#define CONFIG_EXTRA_ENV_SETTINGS \ +- CONFIG_MFG_ENV_SETTINGS \ +- "autoload=off\0" \ +- "script=boot.scr\0" \ +- "image=Image\0" \ +- "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ +- "fdt_addr=0x43000000\0" \ +- "fdt_high=0xffffffffffffffff\0" \ +- "boot_fdt=yes\0" \ +- "fdt_file="CONFIG_DEFAULT_DTB"\0" \ +- "initrd_addr=0x43800000\0" \ +- "initrd_high=0xffffffffffffffff\0" \ +- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ +- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ +- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ +- "mmcautodetect=yes\0" \ +- "root_opt=rootwait rw\0" \ +- "emmc_ul=setenv iface mmc; setenv dev 2; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk2p2 ${root_opt};\0" \ +- "sd_ul=setenv iface mmc; setenv dev 1; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk1p2 ${root_opt};\0" \ +- "usb_ul=usb start; setenv iface usb; setenv dev 0; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ +- "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ +- "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ +- "ulfdt=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ +- "load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file}; fi;\0" \ +- "bootscript=echo Running bootscript from mmc ...; " \ +- "source\0" \ +- "netargs=setenv bootargs console=${console} " \ +- "root=/dev/nfs " \ +- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ +- "netboot=echo Booting from net ...; " \ +- "run netargs; " \ +- "if test ${ip_dyn} = yes; then " \ +- "setenv get_cmd dhcp; " \ +- "else " \ +- "setenv get_cmd tftp; " \ +- "fi; " \ +- "${get_cmd} ${loadaddr} ${image}; " \ +- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ +- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ +- "booti ${loadaddr} - ${fdt_addr}; " \ +- "else " \ +- "echo WARN: Cannot load the DT; " \ +- "fi; " \ +- "else " \ +- "booti; " \ +- "fi;\0" +-#define CONFIG_BOOTCOMMAND \ +- "for src in sd_ul usb_ul emmc_ul; do " \ +- "run ${src}; " \ +- "if run ulbootscript; then " \ +- "run bootscript; " \ +- "else " \ +- "if run ulimage; then " \ +- "if run ulfdt; then " \ +- "booti ${loadaddr} - ${fdt_addr}; " \ +- "else " \ +- "if test ${boot_fdt} != yes; then " \ +- "booti ${loadaddr}; " \ +- "fi; " \ +- "fi; " \ +- "fi; " \ +- "fi; " \ +- "done; " \ +- "usb start; ums 0 mmc ${mmcdev};" +- +-/* Link Definitions */ +-#define CONFIG_LOADADDR 0x40480000 +- +-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +- +-#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +-#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +-#define CONFIG_SYS_INIT_SP_OFFSET \ +- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +-#define CONFIG_SYS_INIT_SP_ADDR \ +- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +- +-#define CONFIG_ENV_OVERWRITE +-#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +-#define CONFIG_SYS_MMC_ENV_PART 1 +-#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +- +-/* Size of malloc() pool */ +-#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2*1024) + (16*1024)) * 1024) +- +-#define PHYS_SDRAM 0x40000000 +-#define PHYS_SDRAM_2 0x100000000 +-#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB default size*/ +-#undef PHYS_SDRAM_2_SIZE /* Memory chip autodetection */ +-#define CONFIG_NR_DRAM_BANKS 4 +- +-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +-#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ +-#define PHYS_SDRAM_2_SIZE 0x40000000 +- +-#define MEMTEST_DIVIDER 2 +-#define MEMTEST_NUMERATOR 1 +- +-#define CONFIG_BAUDRATE 115200 +- +-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +- +-/* Monitor Command Prompt */ +-#undef CONFIG_SYS_PROMPT +-#define CONFIG_SYS_PROMPT "u-boot=> " +-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +-#define CONFIG_SYS_CBSIZE 2048 +-#define CONFIG_SYS_MAXARGS 64 +-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +- sizeof(CONFIG_SYS_PROMPT) + 16) +- +-#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 +- +-#define CONFIG_IMX_BOOTAUX +- +-/* USDHC */ +-#define CONFIG_FSL_USDHC +- +-#define CONFIG_SYS_FSL_USDHC_NUM 2 +-#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +- +-#ifndef CONFIG_DM_I2C +-#define CONFIG_SYS_I2C +-#endif +-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +-#define CONFIG_SYS_I2C_SPEED 100000 +- +-/* EEPROM */ +-#define CONFIG_ENV_EEPROM_IS_ON_I2C +-#define CONFIG_SYS_I2C_EEPROM_BUS 1 +-#define CONFIG_SYS_I2C_SLAVE 0x00 +-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +-#define CONFIG_SYS_EEPROM_SIZE 256 +-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +- +-/* USB configs */ +-#ifndef CONFIG_SPL_BUILD +-#define CONFIG_CMD_USB +-#define CONFIG_USB_STORAGE +-#define CONFIG_USBD_HS +- +-#define CONFIG_CMD_USB_MASS_STORAGE +-#define CONFIG_USB_GADGET_MASS_STORAGE +-#define CONFIG_USB_FUNCTION_MASS_STORAGE +- +-#endif +- +-#define CONFIG_USB_GADGET_VBUS_DRAW 2 +- +-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +- +-#ifdef CONFIG_VIDEO +-#define CONFIG_VIDEO_MXS +-#define CONFIG_VIDEO_LOGO +-#define CONFIG_SPLASH_SCREEN +-#define CONFIG_SPLASH_SCREEN_ALIGN +-#define CONFIG_CMD_BMP +-#define CONFIG_BMP_16BPP +-#define CONFIG_VIDEO_BMP_RLE8 +-#define CONFIG_VIDEO_BMP_LOGO +-#define CONFIG_IMX_VIDEO_SKIP +-#define CONFIG_RM67191 +-#endif +- +-#define CONFIG_BOARD_POSTCLK_INIT +-#define CONFIG_OF_BOARD_SETUP ++#include "cpl-imx8m-mini.h" + + #if defined(CONFIG_ANDROID_SUPPORT) + #include "ucm-imx8m-mini_android.h" +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.dts.patch b/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.dts.patch new file mode 100644 index 0000000..c95391a --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0057-cpl-imx8m-mini-Refactor-.dts.patch @@ -0,0 +1,1434 @@ +From f208c15a68d06cb6f3d5ea34331a57882a6679ac Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 15:48:15 +0300 +Subject: [PATCH 057/126] cpl-imx8m-mini: Refactor .dts + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 472 +++++++++++++++++++++++++++++++++++++++ + arch/arm/dts/mcm-imx8m-mini.dts | 457 +------------------------------------ + arch/arm/dts/ucm-imx8m-mini.dts | 457 +------------------------------------ + 3 files changed, 474 insertions(+), 912 deletions(-) + create mode 100644 arch/arm/dts/cpl-imx8m-mini.dtsi + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +new file mode 100644 +index 0000000000..3fe1e7ac5f +--- /dev/null ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -0,0 +1,472 @@ ++/* ++ * Copyright 2018 CompuLab ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include "imx8mm.dtsi" ++ ++/ { ++ chosen { ++ bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; ++ stdout-patch = &uart3; ++ }; ++ ++ reg_usdhc2_vmmc: regulator-usdhc2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VSD_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ startup-delay-us = <100>; ++ off-on-delay-us = <12000>; ++ }; ++ ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog_1>; ++ ++ cpl-imx8m-mini { ++ pinctrl_hog_1: hoggrp-1 { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 ++ MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 ++ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 ++ >; ++ }; ++ ++ pinctrl_fec1: fec1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 ++ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 ++ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f ++ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f ++ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f ++ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f ++ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 ++ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 ++ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 ++ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 ++ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f ++ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 ++ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 ++ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f ++ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 ++ >; ++ }; ++ ++ pinctrl_flexspi0: flexspi0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 ++ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 ++ ++ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 ++ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 ++ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 ++ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_pmic: pmicirq { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 ++ >; ++ }; ++ ++ pinctrl_uart3: uart1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 ++ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 ++ >; ++ }; ++ ++ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 ++ MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 ++ MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 ++ MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 ++ >; ++ }; ++ ++ pinctrl_usdhc2_gpio: usdhc2grpgpio { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 ++ >; ++ }; ++ ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_100mhz: usdhc2grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_200mhz: usdhc2grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 ++ >; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ clock-frequency = <400000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "disabled"; ++ ++}; ++ ++&i2c2 { ++ clock-frequency = <400000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++ ++ pmic: bd71837@4b { ++ reg = <0x4b>; ++ compatible = "rohm,bd71837"; ++ /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ ++ pinctrl-0 = <&pinctrl_pmic>; ++ gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; ++ ++ gpo { ++ rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ ++ }; ++ ++ regulators { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ bd71837,pmic-buck2-uses-i2c-dvs; ++ bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ ++ ++ buck1_reg: regulator@0 { ++ reg = <0>; ++ regulator-compatible = "buck1"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-ramp-delay = <1250>; ++ }; ++ ++ buck2_reg: regulator@1 { ++ reg = <1>; ++ regulator-compatible = "buck2"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-ramp-delay = <1250>; ++ }; ++ ++ buck3_reg: regulator@2 { ++ reg = <2>; ++ regulator-compatible = "buck3"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1300000>; ++ }; ++ ++ buck4_reg: regulator@3 { ++ reg = <3>; ++ regulator-compatible = "buck4"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1300000>; ++ }; ++ ++ buck5_reg: regulator@4 { ++ reg = <4>; ++ regulator-compatible = "buck5"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ buck6_reg: regulator@5 { ++ reg = <5>; ++ regulator-compatible = "buck6"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ buck7_reg: regulator@6 { ++ reg = <6>; ++ regulator-compatible = "buck7"; ++ regulator-min-microvolt = <1605000>; ++ regulator-max-microvolt = <1995000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ buck8_reg: regulator@7 { ++ reg = <7>; ++ regulator-compatible = "buck8"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo1_reg: regulator@8 { ++ reg = <8>; ++ regulator-compatible = "ldo1"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo2_reg: regulator@9 { ++ reg = <9>; ++ regulator-compatible = "ldo2"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo3_reg: regulator@10 { ++ reg = <10>; ++ regulator-compatible = "ldo3"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo4_reg: regulator@11 { ++ reg = <11>; ++ regulator-compatible = "ldo4"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo5_reg: regulator@12 { ++ reg = <12>; ++ regulator-compatible = "ldo5"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ ldo6_reg: regulator@13 { ++ reg = <13>; ++ regulator-compatible = "ldo6"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo7_reg: regulator@14 { ++ reg = <14>; ++ regulator-compatible = "ldo7"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "disabled"; ++}; ++ ++&fec1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_fec1>; ++ phy-mode = "rgmii-id"; ++ phy-handle = <ðphy0>; ++ fsl,magic-packet; ++ status = "okay"; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethphy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ at803x,led-act-blind-workaround; ++ at803x,eee-okay; ++ at803x,vddio-1p8v; ++ }; ++ }; ++}; ++ ++&uart3 { /* console */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart3>; ++ status = "okay"; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; ++ bus-width = <4>; ++ fsl,wp-controller; ++ non-removable; ++ vmmc-supply = <®_usdhc2_vmmc>; ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; ++ bus-width = <8>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&wdog1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++ status = "okay"; ++}; ++ ++&A53_0 { ++ arm-supply = <&buck2_reg>; ++}; ++ ++&usbotg1 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usbotg2 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&cpu_alert0 { ++ temperature = <105000>; ++}; ++&cpu_crit0 { ++ temperature = <115000>; ++}; +diff --git a/arch/arm/dts/mcm-imx8m-mini.dts b/arch/arm/dts/mcm-imx8m-mini.dts +index 85f4c46dd7..060e51793c 100644 +--- a/arch/arm/dts/mcm-imx8m-mini.dts ++++ b/arch/arm/dts/mcm-imx8m-mini.dts +@@ -14,464 +14,9 @@ + + /dts-v1/; + +-#include +-#include "imx8mm.dtsi" ++#include "cpl-imx8m-mini.dtsi" + + / { + model = "CompuLab MCM-iMX8M-Mini board"; + compatible = "cpl,mcm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; +- +- chosen { +- bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; +- stdout-patch = &uart3; +- }; +- +- reg_usdhc2_vmmc: regulator-usdhc2 { +- compatible = "regulator-fixed"; +- regulator-name = "VSD_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- startup-delay-us = <100>; +- off-on-delay-us = <12000>; +- }; +- +-}; +- +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog_1>; +- +- mcm-imx8m-mini { +- pinctrl_hog_1: hoggrp-1 { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 +- MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 +- MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 +- >; +- }; +- +- pinctrl_fec1: fec1grp { +- fsl,pins = < +- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 +- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 +- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f +- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f +- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f +- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f +- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 +- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 +- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 +- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 +- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f +- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 +- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 +- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f +- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 +- >; +- }; +- +- pinctrl_flexspi0: flexspi0grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 +- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 +- +- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 +- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 +- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 +- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 +- >; +- }; +- +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_pmic: pmicirq { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 +- >; +- }; +- +- pinctrl_uart3: uart1grp { +- fsl,pins = < +- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 +- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 +- >; +- }; +- +- +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 +- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 +- >; +- }; +- +- pinctrl_usdhc2_gpio: usdhc2grpgpio { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 +- MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 +- >; +- }; +- +- pinctrl_usdhc2: usdhc2grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 +- >; +- }; +- +- pinctrl_usdhc3_100mhz: usdhc3grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 +- >; +- }; +- +- pinctrl_usdhc3_200mhz: usdhc3grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 +- >; +- }; +- +- pinctrl_wdog: wdoggrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 +- >; +- }; +- }; +-}; +- +-&i2c1 { +- clock-frequency = <400000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "disabled"; +- +-}; +- +-&i2c2 { +- clock-frequency = <400000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c2>; +- status = "okay"; +- +- pmic: bd71837@4b { +- reg = <0x4b>; +- compatible = "rohm,bd71837"; +- /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ +- pinctrl-0 = <&pinctrl_pmic>; +- gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; +- +- gpo { +- rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ +- }; +- +- regulators { +- #address-cells = <1>; +- #size-cells = <0>; +- +- bd71837,pmic-buck2-uses-i2c-dvs; +- bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ +- +- buck1_reg: regulator@0 { +- reg = <0>; +- regulator-compatible = "buck1"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-ramp-delay = <1250>; +- }; +- +- buck2_reg: regulator@1 { +- reg = <1>; +- regulator-compatible = "buck2"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-ramp-delay = <1250>; +- }; +- +- buck3_reg: regulator@2 { +- reg = <2>; +- regulator-compatible = "buck3"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- }; +- +- buck4_reg: regulator@3 { +- reg = <3>; +- regulator-compatible = "buck4"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- }; +- +- buck5_reg: regulator@4 { +- reg = <4>; +- regulator-compatible = "buck5"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1350000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck6_reg: regulator@5 { +- reg = <5>; +- regulator-compatible = "buck6"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck7_reg: regulator@6 { +- reg = <6>; +- regulator-compatible = "buck7"; +- regulator-min-microvolt = <1605000>; +- regulator-max-microvolt = <1995000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck8_reg: regulator@7 { +- reg = <7>; +- regulator-compatible = "buck8"; +- regulator-min-microvolt = <800000>; +- regulator-max-microvolt = <1400000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo1_reg: regulator@8 { +- reg = <8>; +- regulator-compatible = "ldo1"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo2_reg: regulator@9 { +- reg = <9>; +- regulator-compatible = "ldo2"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <900000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo3_reg: regulator@10 { +- reg = <10>; +- regulator-compatible = "ldo3"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo4_reg: regulator@11 { +- reg = <11>; +- regulator-compatible = "ldo4"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <1800000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo5_reg: regulator@12 { +- reg = <12>; +- regulator-compatible = "ldo5"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- }; +- +- ldo6_reg: regulator@13 { +- reg = <13>; +- regulator-compatible = "ldo6"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <1800000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo7_reg: regulator@14 { +- reg = <14>; +- regulator-compatible = "ldo7"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- }; +- }; +- }; +-}; +- +-&i2c3 { +- clock-frequency = <100000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "disabled"; +-}; +- +-&fec1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_fec1>; +- phy-mode = "rgmii-id"; +- phy-handle = <ðphy0>; +- fsl,magic-packet; +- status = "okay"; +- +- mdio { +- #address-cells = <1>; +- #size-cells = <0>; +- +- ethphy0: ethernet-phy@0 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0>; +- at803x,led-act-blind-workaround; +- at803x,eee-okay; +- at803x,vddio-1p8v; +- }; +- }; +-}; +- +-&uart3 { /* console */ +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart3>; +- status = "okay"; +-}; +- +-&usdhc2 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; +- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; +- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; +- bus-width = <4>; +- fsl,wp-controller; +- non-removable; +- vmmc-supply = <®_usdhc2_vmmc>; +- status = "okay"; +-}; +- +-&usdhc3 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc3>; +- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; +- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +- bus-width = <8>; +- non-removable; +- status = "okay"; +-}; +- +-&wdog1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_wdog>; +- fsl,ext-reset-output; +- status = "okay"; +-}; +- +-&A53_0 { +- arm-supply = <&buck2_reg>; +-}; +- +-&usbotg1 { +- dr_mode = "otg"; +- status = "okay"; +-}; +- +-&usbotg2 { +- dr_mode = "host"; +- status = "okay"; +-}; +- +-&cpu_alert0 { +- temperature = <105000>; +-}; +-&cpu_crit0 { +- temperature = <115000>; + }; +diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts +index f2794e74e9..7b81e8a75b 100644 +--- a/arch/arm/dts/ucm-imx8m-mini.dts ++++ b/arch/arm/dts/ucm-imx8m-mini.dts +@@ -14,464 +14,9 @@ + + /dts-v1/; + +-#include +-#include "imx8mm.dtsi" ++#include "cpl-imx8m-mini.dtsi" + + / { + model = "CompuLab UCM-iMX8M-Mini board"; + compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; +- +- chosen { +- bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; +- stdout-patch = &uart3; +- }; +- +- reg_usdhc2_vmmc: regulator-usdhc2 { +- compatible = "regulator-fixed"; +- regulator-name = "VSD_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- startup-delay-us = <100>; +- off-on-delay-us = <12000>; +- }; +- +-}; +- +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog_1>; +- +- ucm-imx8m-mini { +- pinctrl_hog_1: hoggrp-1 { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 +- MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 +- MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 +- >; +- }; +- +- pinctrl_fec1: fec1grp { +- fsl,pins = < +- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 +- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 +- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f +- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f +- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f +- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f +- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 +- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 +- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 +- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 +- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f +- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 +- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 +- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f +- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 +- >; +- }; +- +- pinctrl_flexspi0: flexspi0grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 +- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 +- +- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 +- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 +- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 +- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 +- >; +- }; +- +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_pmic: pmicirq { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 +- >; +- }; +- +- pinctrl_uart3: uart1grp { +- fsl,pins = < +- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 +- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 +- >; +- }; +- +- +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 +- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 +- >; +- }; +- +- pinctrl_usdhc2_gpio: usdhc2grpgpio { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 +- MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 +- >; +- }; +- +- pinctrl_usdhc2: usdhc2grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 +- >; +- }; +- +- pinctrl_usdhc3_100mhz: usdhc3grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 +- >; +- }; +- +- pinctrl_usdhc3_200mhz: usdhc3grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 +- >; +- }; +- +- pinctrl_wdog: wdoggrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 +- >; +- }; +- }; +-}; +- +-&i2c1 { +- clock-frequency = <400000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "disabled"; +- +-}; +- +-&i2c2 { +- clock-frequency = <400000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c2>; +- status = "okay"; +- +- pmic: bd71837@4b { +- reg = <0x4b>; +- compatible = "rohm,bd71837"; +- /* PMIC BD71837 PMIC_nINT GPIO1_IO3 */ +- pinctrl-0 = <&pinctrl_pmic>; +- gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; +- +- gpo { +- rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ +- }; +- +- regulators { +- #address-cells = <1>; +- #size-cells = <0>; +- +- bd71837,pmic-buck2-uses-i2c-dvs; +- bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */ +- +- buck1_reg: regulator@0 { +- reg = <0>; +- regulator-compatible = "buck1"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-ramp-delay = <1250>; +- }; +- +- buck2_reg: regulator@1 { +- reg = <1>; +- regulator-compatible = "buck2"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-ramp-delay = <1250>; +- }; +- +- buck3_reg: regulator@2 { +- reg = <2>; +- regulator-compatible = "buck3"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- }; +- +- buck4_reg: regulator@3 { +- reg = <3>; +- regulator-compatible = "buck4"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1300000>; +- }; +- +- buck5_reg: regulator@4 { +- reg = <4>; +- regulator-compatible = "buck5"; +- regulator-min-microvolt = <700000>; +- regulator-max-microvolt = <1350000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck6_reg: regulator@5 { +- reg = <5>; +- regulator-compatible = "buck6"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck7_reg: regulator@6 { +- reg = <6>; +- regulator-compatible = "buck7"; +- regulator-min-microvolt = <1605000>; +- regulator-max-microvolt = <1995000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- buck8_reg: regulator@7 { +- reg = <7>; +- regulator-compatible = "buck8"; +- regulator-min-microvolt = <800000>; +- regulator-max-microvolt = <1400000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo1_reg: regulator@8 { +- reg = <8>; +- regulator-compatible = "ldo1"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo2_reg: regulator@9 { +- reg = <9>; +- regulator-compatible = "ldo2"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <900000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo3_reg: regulator@10 { +- reg = <10>; +- regulator-compatible = "ldo3"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo4_reg: regulator@11 { +- reg = <11>; +- regulator-compatible = "ldo4"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <1800000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo5_reg: regulator@12 { +- reg = <12>; +- regulator-compatible = "ldo5"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- }; +- +- ldo6_reg: regulator@13 { +- reg = <13>; +- regulator-compatible = "ldo6"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <1800000>; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- ldo7_reg: regulator@14 { +- reg = <14>; +- regulator-compatible = "ldo7"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- }; +- }; +- }; +-}; +- +-&i2c3 { +- clock-frequency = <100000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "disabled"; +-}; +- +-&fec1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_fec1>; +- phy-mode = "rgmii-id"; +- phy-handle = <ðphy0>; +- fsl,magic-packet; +- status = "okay"; +- +- mdio { +- #address-cells = <1>; +- #size-cells = <0>; +- +- ethphy0: ethernet-phy@0 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0>; +- at803x,led-act-blind-workaround; +- at803x,eee-okay; +- at803x,vddio-1p8v; +- }; +- }; +-}; +- +-&uart3 { /* console */ +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart3>; +- status = "okay"; +-}; +- +-&usdhc2 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; +- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; +- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; +- bus-width = <4>; +- fsl,wp-controller; +- non-removable; +- vmmc-supply = <®_usdhc2_vmmc>; +- status = "okay"; +-}; +- +-&usdhc3 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc3>; +- pinctrl-1 = <&pinctrl_usdhc3_100mhz>; +- pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +- bus-width = <8>; +- non-removable; +- status = "okay"; +-}; +- +-&wdog1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_wdog>; +- fsl,ext-reset-output; +- status = "okay"; +-}; +- +-&A53_0 { +- arm-supply = <&buck2_reg>; +-}; +- +-&usbotg1 { +- dr_mode = "otg"; +- status = "okay"; +-}; +- +-&usbotg2 { +- dr_mode = "host"; +- status = "okay"; +-}; +- +-&cpu_alert0 { +- temperature = <105000>; +-}; +-&cpu_crit0 { +- temperature = <115000>; + }; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0058-iot-gate-imx8-Add-basic-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0058-iot-gate-imx8-Add-basic-support.patch new file mode 100644 index 0000000..2114e99 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0058-iot-gate-imx8-Add-basic-support.patch @@ -0,0 +1,577 @@ +From 684d387f307b2d6259e528eb6785d8cdead52ba5 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 15:52:47 +0300 +Subject: [PATCH 058/126] iot-gate-imx8: Add basic support + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/iot-gate-imx8.dts | 49 +++++ + arch/arm/mach-imx/imx8m/Kconfig | 7 + + board/compulab/iot-gate-imx8/Kconfig | 17 ++ + board/compulab/iot-gate-imx8/Makefile | 15 ++ + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 265 +++++++++++++++++++++++++++ + board/compulab/iot-gate-imx8/spl.c | 8 + + configs/iot-gate-imx8_defconfig | 102 +++++++++++ + include/configs/iot-gate-imx8.h | 15 ++ + 9 files changed, 479 insertions(+) + create mode 100644 arch/arm/dts/iot-gate-imx8.dts + create mode 100644 board/compulab/iot-gate-imx8/Kconfig + create mode 100644 board/compulab/iot-gate-imx8/Makefile + create mode 100644 board/compulab/iot-gate-imx8/iot-gate-imx8.c + create mode 100644 board/compulab/iot-gate-imx8/spl.c + create mode 100644 configs/iot-gate-imx8_defconfig + create mode 100644 include/configs/iot-gate-imx8.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index c6b54163d0..1fc99ed1c9 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -890,6 +890,7 @@ dtb-$(CONFIG_ARCH_IMX8ULP) += imx8ulp-evk.dtb imx8ulp-evk-i3c.dtb + + dtb-$(CONFIG_TARGET_UCM_IMX8M_MINI) += ucm-imx8m-mini.dtb + dtb-$(CONFIG_TARGET_MCM_IMX8M_MINI) += mcm-imx8m-mini.dtb ++dtb-$(CONFIG_TARGET_IOT_GATE_IMX8) += iot-gate-imx8.dtb + + dtb-$(CONFIG_RCAR_GEN2) += \ + r8a7790-lager-u-boot.dtb \ +diff --git a/arch/arm/dts/iot-gate-imx8.dts b/arch/arm/dts/iot-gate-imx8.dts +new file mode 100644 +index 0000000000..6b6b2d69c7 +--- /dev/null ++++ b/arch/arm/dts/iot-gate-imx8.dts +@@ -0,0 +1,49 @@ ++/* ++ * Copyright 2020 CompuLab ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++/dts-v1/; ++ ++#include "cpl-imx8m-mini.dtsi" ++ ++/ { ++ model = "CompuLab IOT-GATE-iMX8"; ++ compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; ++ ++ reg_vusb_5v: regulator-usdhc2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VUSB_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; ++ regulator-boot-on; ++ enable-active-high; ++ }; ++}; ++ ++&usbotg1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctl_usb_gpio>; ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&iomuxc { ++ sb-iotgimx8 { ++ pinctl_usb_gpio: usb_gpio_grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig +index a38ec31d25..3102155bc1 100644 +--- a/arch/arm/mach-imx/imx8m/Kconfig ++++ b/arch/arm/mach-imx/imx8m/Kconfig +@@ -272,6 +272,12 @@ config TARGET_MCM_IMX8M_MINI + select SUPPORT_SPL + select IMX8M_LPDDR4 + ++config TARGET_IOT_GATE_IMX8 ++ bool "CompuLab iot-gate-imx8" ++ select IMX8MM ++ select SUPPORT_SPL ++ select IMX8M_LPDDR4 ++ + endchoice + + source "board/freescale/imx8mq_evk/Kconfig" +@@ -291,5 +297,6 @@ source "board/phytec/phycore_imx8mm/Kconfig" + source "board/phytec/phycore_imx8mp/Kconfig" + source "board/compulab/ucm-imx8m-mini/Kconfig" + source "board/compulab/mcm-imx8m-mini/Kconfig" ++source "board/compulab/iot-gate-imx8/Kconfig" + + endif +diff --git a/board/compulab/iot-gate-imx8/Kconfig b/board/compulab/iot-gate-imx8/Kconfig +new file mode 100644 +index 0000000000..84f53ca6b9 +--- /dev/null ++++ b/board/compulab/iot-gate-imx8/Kconfig +@@ -0,0 +1,17 @@ ++if TARGET_IOT_GATE_IMX8 ++ ++config SYS_BOARD ++ default "iot-gate-imx8" ++ ++config SYS_VENDOR ++ default "compulab" ++ ++config SYS_CONFIG_NAME ++ default "iot-gate-imx8" ++ ++config DEFAULT_DTB ++ string "U-Boot Default Device Tree File" ++ depends on TARGET_IOT_GATE_IMX8 ++ default "sb-iotgimx8-can.dtb" ++ ++endif +diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile +new file mode 100644 +index 0000000000..af743b977b +--- /dev/null ++++ b/board/compulab/iot-gate-imx8/Makefile +@@ -0,0 +1,15 @@ ++# ++# Copyright 2018 CompuLab ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ ++ifdef CONFIG_SPL_BUILD ++obj-y += spl.o ++else ++obj-y += iot-gate-imx8.o ++endif ++ ++obj-y += ../plat/imx8mm/ +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +new file mode 100644 +index 0000000000..d01b8f8767 +--- /dev/null ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -0,0 +1,265 @@ ++/* ++ * Copyright 2020 CompuLab ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../common/eeprom.h" ++#include ++#include ++#include ++#include "ddr/ddr.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#ifdef CONFIG_BOARD_POSTCLK_INIT ++int board_postclk_init(void) ++{ ++ /* TODO */ ++ return 0; ++} ++#endif ++int board_phys_sdram_size(phys_size_t *size) ++{ ++ struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; ++ ++ switch (lpddr4_tcm_desc->size) { ++ case 4096: ++ case 2048: ++ case 1024: ++ *size = (1L << 20) * lpddr4_tcm_desc->size; ++ break; ++ default: ++ printf("%s: DRAM size %uM is not supported \n", __func__, ++ lpddr4_tcm_desc->size); ++ while ( 1 ) {}; ++ break; ++ }; ++ return 0; ++} ++ /* Get the top of usable RAM */ ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++ ++ if(gd->ram_top > 0x100000000) ++ gd->ram_top = 0x100000000; ++ ++ return gd->ram_top; ++} ++ ++int dram_init(void) ++{ ++ phys_size_t sdram_size; ++ int ret; ++ ret = board_phys_sdram_size(&sdram_size); ++ printf("%s: size %llu\n", __func__, sdram_size); ++ if (ret) ++ return ret; ++ ++ /* rom_pointer[1] contains the size of TEE occupies */ ++ gd->ram_size = sdram_size - rom_pointer[1]; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_OF_BOARD_SETUP ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_FEC_MXC ++#define FEC_RST_PAD IMX_GPIO_NR(1, 10) ++static iomux_v3_cfg_t const fec1_rst_pads[] = { ++ IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), ++}; ++ ++static void setup_iomux_fec(void) ++{ ++ imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, ++ ARRAY_SIZE(fec1_rst_pads)); ++ ++ gpio_request(FEC_RST_PAD, "fec1_rst"); ++ gpio_direction_output(FEC_RST_PAD, 0); ++ udelay(500); ++ gpio_direction_output(FEC_RST_PAD, 1); ++} ++ ++/* ++ * setup_mac_address() - set Ethernet MAC address environment. ++ * ++ * @return: 0 on success, -1 on failure ++ */ ++static int setup_mac_address(void) ++{ ++ int ret; ++ unsigned char enetaddr[6]; ++ ++ ret = eth_env_get_enetaddr("ethaddr", enetaddr); ++ if (ret) ++ return 0; ++ ++ ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); ++ if (ret) ++ return ret; ++ ++ ret = is_valid_ethaddr(enetaddr); ++ if (!ret) ++ return -1; ++ ++ ret = eth_env_set_enetaddr("ethaddr", enetaddr); ++ if (ret) ++ return -1; ++ ++ return 0; ++} ++ ++static int setup_fec(void) ++{ ++ struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs ++ = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; ++ ++ setup_iomux_fec(); ++ ++ /* Use 125M anatop REF_CLK1 for ENET1, not from external */ ++ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], ++ IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); ++ return set_clk_enet(ENET_125MHZ); ++} ++ ++int board_phy_config(struct phy_device *phydev) ++{ ++ /* enable rgmii rxc skew and phy mode select to RGMII copper */ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); ++ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); ++ ++ if (phydev->drv->config) ++ phydev->drv->config(phydev); ++ return 0; ++} ++#endif ++ ++int board_usb_init(int index, enum usb_init_type init) ++{ ++ debug("board_usb_init %d, type %d\n", index, init); ++ ++ imx8m_usb_power(index, true); ++ ++ return 0; ++} ++ ++int board_usb_cleanup(int index, enum usb_init_type init) ++{ ++ debug("board_usb_cleanup %d, type %d\n", index, init); ++ ++ imx8m_usb_power(index, false); ++ ++ return 0; ++} ++int board_init(void) ++{ ++ ++#ifdef CONFIG_FEC_MXC ++ setup_fec(); ++#endif ++ return 0; ++} ++ ++int board_mmc_get_env_dev(int devno) ++{ ++ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); ++ if (user_env_devno != ULONG_MAX) { ++ printf("User Environment dev# is (%lu)\n", user_env_devno); ++ return (int)user_env_devno; ++ } ++ return devno; ++} ++ ++static int _mmc_get_env_part(void) ++{ ++ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); ++ if (user_env_part != ULONG_MAX) { ++ printf("User Environment part# is (%lu)\n", user_env_part); ++ return (int)user_env_part; ++ } ++ return CONFIG_SYS_MMC_ENV_PART; ++} ++ ++uint mmc_get_env_part(struct mmc *mmc) ++{ ++ if (mmc->part_support) ++ return _mmc_get_env_part(); ++ ++ return 0; ++} ++ ++int mmc_map_to_kernel_blk(int devno){ ++ return devno; ++} ++ ++static void board_bootdev_init(void) ++{ ++ u32 bootdev = get_boot_device(); ++ switch (bootdev) { ++ case MMC3_BOOT: ++ bootdev = 2; ++ break; ++ case SD2_BOOT: ++ bootdev = 1; ++ break; ++ default: ++ env_set("bootdev", NULL); ++ return; ++ } ++ env_set_ulong("bootdev", bootdev); ++} ++ ++int board_late_init(void) ++{ ++ int ret; ++ ++#ifdef CONFIG_ENV_IS_IN_MMC ++ board_late_mmc_env_init(); ++ board_bootdev_init(); ++#endif ++ ++ ret = setup_mac_address(); ++ if (ret < 0) ++ printf("%s: Can't set MAC address\n", __func__); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_FSL_FASTBOOT ++#ifdef CONFIG_ANDROID_RECOVERY ++int is_recovery_key_pressing(void) ++{ ++ return 0; /*TODO*/ ++} ++#endif /*CONFIG_ANDROID_RECOVERY*/ ++#endif /*CONFIG_FSL_FASTBOOT*/ +diff --git a/board/compulab/iot-gate-imx8/spl.c b/board/compulab/iot-gate-imx8/spl.c +new file mode 100644 +index 0000000000..6488770333 +--- /dev/null ++++ b/board/compulab/iot-gate-imx8/spl.c +@@ -0,0 +1,8 @@ ++#include ++#include ++#include ++#include ++ ++int spl_board_private_init(void) { ++ return 0; ++} +diff --git a/configs/iot-gate-imx8_defconfig b/configs/iot-gate-imx8_defconfig +new file mode 100644 +index 0000000000..39c448eca0 +--- /dev/null ++++ b/configs/iot-gate-imx8_defconfig +@@ -0,0 +1,102 @@ ++CONFIG_ARM=y ++CONFIG_SPL_SYS_ICACHE_OFF=y ++CONFIG_SPL_SYS_DCACHE_OFF=y ++CONFIG_ARCH_IMX8M=y ++CONFIG_SYS_TEXT_BASE=0x40200000 ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_ENV_OFFSET=0x4400 ++CONFIG_DM_GPIO=y ++CONFIG_TARGET_IOT_GATE_IMX8=y ++CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL=y ++CONFIG_CSF_SIZE=0x2000 ++CONFIG_SPL_TEXT_BASE=0x7E1000 ++CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" ++CONFIG_FIT=y ++CONFIG_FIT_EXTERNAL_OFFSET=0x3000 ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" ++CONFIG_CONSOLE_MUX=y ++CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_ARCH_MISC_INIT=y ++CONFIG_BOARD_EARLY_INIT_F=y ++CONFIG_SPL_BOARD_INIT=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="u-boot=> " ++# CONFIG_BOOTM_NETBSD is not set ++CONFIG_CMD_EEPROM=y ++CONFIG_CMD_EEPROM_LAYOUT=y ++CONFIG_CMD_MEMINFO=y ++CONFIG_CMD_MEMTEST=y ++CONFIG_CMD_CLK=y ++CONFIG_CMD_FUSE=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_MII=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_CMD_EXT2=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_EFI_PARTITION=y ++CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK_COMPOSITE_CCF=y ++CONFIG_CLK_IMX8MM=y ++CONFIG_MXC_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_SYS_I2C_MXC=y ++CONFIG_DM_MMC=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_MMC_IO_VOLTAGE=y ++CONFIG_MMC_UHS_SUPPORT=y ++CONFIG_MMC_HS400_ES_SUPPORT=y ++CONFIG_MMC_HS400_SUPPORT=y ++CONFIG_FSL_ESDHC_IMX=y ++CONFIG_DM_ETH=y ++CONFIG_FEC_MXC=y ++CONFIG_MII=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_IMX8M=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_RESET=y ++CONFIG_MXC_UART=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_PSCI=y ++CONFIG_DM_THERMAL=y ++CONFIG_NXP_TMU=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="FSL" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0525 ++CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 ++CONFIG_CI_UDC=y ++CONFIG_SDP_LOADADDR=0x40400000 ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_EXT4_WRITE=y ++CONFIG_FAT_WRITE=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++# CONFIG_EFI_LOADER is not set +diff --git a/include/configs/iot-gate-imx8.h b/include/configs/iot-gate-imx8.h +new file mode 100644 +index 0000000000..b3d6082a66 +--- /dev/null ++++ b/include/configs/iot-gate-imx8.h +@@ -0,0 +1,15 @@ ++/* ++ * Copyright 2020 CompuLab ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __UCM_IMX8M_MINI_H ++#define __UCM_IMX8M_MINI_H ++ ++#include "cpl-imx8m-mini.h" ++ ++#if defined(CONFIG_ANDROID_SUPPORT) ++#include "ucm-imx8m-mini_android.h" ++#endif ++#endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0059-mcm-imx8m-mini-config-Update-env-size-offest.patch b/recipes-bsp/u-boot/compulab/imx8mm/0059-mcm-imx8m-mini-config-Update-env-size-offest.patch new file mode 100644 index 0000000..8b1b489 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0059-mcm-imx8m-mini-config-Update-env-size-offest.patch @@ -0,0 +1,28 @@ +From 94829c14ef32f7d41ac3b5b5efee763c549ff196 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 15 Jul 2020 15:25:04 +0300 +Subject: [PATCH 059/126] mcm-imx8m-mini: config: Update env size/offest + +Signed-off-by: Valentin Raevsky +--- + configs/mcm-imx8m-mini_defconfig | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig +index a4c3c90f83..971e1ec982 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/mcm-imx8m-mini_defconfig +@@ -4,8 +4,8 @@ CONFIG_SPL_SYS_DCACHE_OFF=y + CONFIG_ARCH_IMX8M=y + CONFIG_SYS_TEXT_BASE=0x40200000 + CONFIG_SPL_GPIO_SUPPORT=y +-CONFIG_ENV_SIZE=0x4000 +-CONFIG_ENV_OFFSET=0x1000 ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_ENV_OFFSET=0x4400 + CONFIG_DM_GPIO=y + CONFIG_TARGET_MCM_IMX8M_MINI=y + CONFIG_SPL_MMC_SUPPORT=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0060-imx8m-mini-env-config-Update-size-offset-value.patch b/recipes-bsp/u-boot/compulab/imx8mm/0060-imx8m-mini-env-config-Update-size-offset-value.patch new file mode 100644 index 0000000..ab69e00 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0060-imx8m-mini-env-config-Update-size-offset-value.patch @@ -0,0 +1,29 @@ +From e94a6f8fef7c25d00a41f791ab16813fc760c392 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 15 Jul 2020 15:27:37 +0300 +Subject: [PATCH 060/126] imx8m-mini: env: config: Update size/offset value + +Update size/offset value for CompuLab imx8m-mini boards + +Signed-off-by: Valentin Raevsky +--- + tools/env/fw_env.config | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/tools/env/fw_env.config b/tools/env/fw_env.config +index 3222fd715c..988ef9f728 100644 +--- a/tools/env/fw_env.config ++++ b/tools/env/fw_env.config +@@ -6,6 +6,6 @@ + # be the same as the Environment size, which is valid for NOR and SPI-dataflash + # Device offset must be prefixed with 0x to be parsed as a hexadecimal value. + +-# Block device for mcm-imx8m-mini +-/dev/mmcblk2boot0 0x1000 0x4000 +-#/dev/mmcblk1 0x1000 0x4000 ++# Block devices for CompuLab imx8m-mini ++/dev/mmcblk2boot0 0x4400 0x1000 ++#/dev/mmcblk1 0x4400 0x1000 +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch b/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch new file mode 100644 index 0000000..4e55ef2 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0061-imx8-eeprom-Move-to-the-imx8-platform-independent-fo.patch @@ -0,0 +1,123 @@ +From 663f170f28034023bbd13d6c4359be43719862e7 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Fri, 17 Jul 2020 18:59:22 +0300 +Subject: [PATCH 061/126] imx8: eeprom: Move to the imx8 platform independent + folder + +Move the eeprom code the imx8 platform independent folder. +The same code gets used by all CompuLab imx8 boards. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/iot-gate-imx8/Makefile | 2 ++ + board/compulab/mcm-imx8m-mini/Makefile | 2 ++ + board/compulab/plat/imx8/Makefile | 1 + + board/compulab/plat/{imx8mm => imx8}/eeprom/Makefile | 0 + board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.c | 0 + board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.h | 0 + board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom_spl.c | 1 + + board/compulab/plat/imx8mm/Makefile | 1 - + board/compulab/ucm-imx8m-mini/Makefile | 2 ++ + 9 files changed, 8 insertions(+), 1 deletion(-) + create mode 100644 board/compulab/plat/imx8/Makefile + rename board/compulab/plat/{imx8mm => imx8}/eeprom/Makefile (100%) + rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.c (100%) + rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom.h (100%) + rename board/compulab/plat/{imx8mm => imx8}/eeprom/eeprom_spl.c (99%) + +diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile +index af743b977b..e5239d1dbb 100644 +--- a/board/compulab/iot-gate-imx8/Makefile ++++ b/board/compulab/iot-gate-imx8/Makefile +@@ -5,6 +5,7 @@ + # + + ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +@@ -13,3 +14,4 @@ obj-y += iot-gate-imx8.o + endif + + obj-y += ../plat/imx8mm/ ++obj-y += ../plat/imx8/ +diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile +index 9ce2875d6e..2cadd46fb8 100644 +--- a/board/compulab/mcm-imx8m-mini/Makefile ++++ b/board/compulab/mcm-imx8m-mini/Makefile +@@ -5,6 +5,7 @@ + # + + ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +@@ -13,3 +14,4 @@ obj-y += mcm-imx8m-mini.o + endif + + obj-y += ../plat/imx8mm/ ++obj-y += ../plat/imx8/ +diff --git a/board/compulab/plat/imx8/Makefile b/board/compulab/plat/imx8/Makefile +new file mode 100644 +index 0000000000..9d3044cb9e +--- /dev/null ++++ b/board/compulab/plat/imx8/Makefile +@@ -0,0 +1 @@ ++obj-y += eeprom/ +diff --git a/board/compulab/plat/imx8mm/eeprom/Makefile b/board/compulab/plat/imx8/eeprom/Makefile +similarity index 100% +rename from board/compulab/plat/imx8mm/eeprom/Makefile +rename to board/compulab/plat/imx8/eeprom/Makefile +diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom.c b/board/compulab/plat/imx8/eeprom/eeprom.c +similarity index 100% +rename from board/compulab/plat/imx8mm/eeprom/eeprom.c +rename to board/compulab/plat/imx8/eeprom/eeprom.c +diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom.h b/board/compulab/plat/imx8/eeprom/eeprom.h +similarity index 100% +rename from board/compulab/plat/imx8mm/eeprom/eeprom.h +rename to board/compulab/plat/imx8/eeprom/eeprom.h +diff --git a/board/compulab/plat/imx8mm/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +similarity index 99% +rename from board/compulab/plat/imx8mm/eeprom/eeprom_spl.c +rename to board/compulab/plat/imx8/eeprom/eeprom_spl.c +index 09a04fda92..f25493b1ee 100644 +--- a/board/compulab/plat/imx8mm/eeprom/eeprom_spl.c ++++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + #include + #include + #include +diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile +index 2f68e0523e..33b3fedef9 100644 +--- a/board/compulab/plat/imx8mm/Makefile ++++ b/board/compulab/plat/imx8mm/Makefile +@@ -1,3 +1,2 @@ + obj-y += ddr/ +-obj-y += eeprom/ + obj-y += spl/ +diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile +index dbde2116cd..870792441c 100644 +--- a/board/compulab/ucm-imx8m-mini/Makefile ++++ b/board/compulab/ucm-imx8m-mini/Makefile +@@ -5,6 +5,7 @@ + # + + ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +@@ -13,3 +14,4 @@ obj-y += ucm-imx8m-mini.o + endif + + obj-y += ../plat/imx8mm/ ++obj-y += ../plat/imx8/ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Remove-duplicated-code.patch b/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Remove-duplicated-code.patch new file mode 100644 index 0000000..1b1a4f9 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0062-imx8-eeprom-Remove-duplicated-code.patch @@ -0,0 +1,285 @@ +From bac8699e303c75526c30e3e850601c39944dad8a Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Sat, 18 Jul 2020 13:02:39 +0300 +Subject: [PATCH 062/126] imx8: eeprom: Remove duplicated code + +Remove duplicated code. +Leave the i2c spl helper only for use in the ddr discovery. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8/eeprom/Makefile | 4 - + board/compulab/plat/imx8/eeprom/eeprom.c | 192 --------------------------- + board/compulab/plat/imx8/eeprom/eeprom.h | 30 ----- + board/compulab/plat/imx8/eeprom/eeprom_spl.c | 5 +- + 4 files changed, 4 insertions(+), 227 deletions(-) + delete mode 100644 board/compulab/plat/imx8/eeprom/eeprom.c + delete mode 100644 board/compulab/plat/imx8/eeprom/eeprom.h + +diff --git a/board/compulab/plat/imx8/eeprom/Makefile b/board/compulab/plat/imx8/eeprom/Makefile +index 9ec4d29dc1..62ee6de6fa 100644 +--- a/board/compulab/plat/imx8/eeprom/Makefile ++++ b/board/compulab/plat/imx8/eeprom/Makefile +@@ -1,5 +1 @@ +-ifdef CONFIG_SPL_BUILD + obj-y += eeprom_spl.o +-else +-obj-y += eeprom.o +-endif +diff --git a/board/compulab/plat/imx8/eeprom/eeprom.c b/board/compulab/plat/imx8/eeprom/eeprom.c +deleted file mode 100644 +index fd1fa49e21..0000000000 +--- a/board/compulab/plat/imx8/eeprom/eeprom.c ++++ /dev/null +@@ -1,192 +0,0 @@ +-/* +- * (C) Copyright 2011 CompuLab, Ltd. +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#ifndef CONFIG_SYS_I2C_EEPROM_ADDR +-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +-#endif +- +-#ifndef CONFIG_SYS_I2C_EEPROM_BUS +-#define CONFIG_SYS_I2C_EEPROM_BUS 1 +-#endif +- +-#define EEPROM_LAYOUT_VER_OFFSET 44 +-#define BOARD_SERIAL_OFFSET 20 +-#define BOARD_SERIAL_OFFSET_LEGACY 8 +-#define BOARD_REV_OFFSET 0 +-#define BOARD_REV_OFFSET_LEGACY 6 +-#define BOARD_REV_SIZE 2 +-#define PRODUCT_NAME_OFFSET 128 +-#define PRODUCT_NAME_SIZE 16 +-#define MAC_ADDR_OFFSET 4 +-#define MAC_ADDR_OFFSET_LEGACY 0 +- +-#define LAYOUT_INVALID 0 +-#define LAYOUT_LEGACY 0xff +- +-static int cpl_eeprom_bus; +-static int cpl_eeprom_layout; +- +-static struct udevice *g_dev = NULL; +- +-static int cpl_eeprom_init(void) { +- +- int i2c_bus = CONFIG_SYS_I2C_EEPROM_BUS; +- uint8_t chip = CONFIG_SYS_I2C_EEPROM_ADDR; +- +- struct udevice *bus, *dev; +- int ret; +- +- if (!g_dev) { +- +- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); +- if (ret) { +- printf("%s: No bus %d\n", __func__, i2c_bus); +- return ret; +- } +- +- ret = dm_i2c_probe(bus, chip, 0, &dev); +- if (ret) { +- printf("%s: Can't find device id=0x%x, on bus %d\n", +- __func__, chip, i2c_bus); +- return ret; +- } +- +- /* Init */ +- g_dev = dev; +- } +- +- return 0; +-} +- +-static int cpl_eeprom_read(uint offset, uchar *buf, int len) +-{ +- int res; +- +- res = cpl_eeprom_init(); +- if (res < 0) +- return res; +- +- res = dm_i2c_read(g_dev, offset, buf, len); +- +- return res; +-} +- +- +-static int cpl_eeprom_setup(uint eeprom_bus) +-{ +- int res; +- +- /* +- * We know the setup was already done when the layout is set to a valid +- * value and we're using the same bus as before. +- */ +- if (cpl_eeprom_layout != LAYOUT_INVALID && eeprom_bus == cpl_eeprom_bus) +- return 0; +- +- cpl_eeprom_bus = eeprom_bus; +- res = cpl_eeprom_read(EEPROM_LAYOUT_VER_OFFSET, +- (uchar *)&cpl_eeprom_layout, 1); +- +- if (res) { +- cpl_eeprom_layout = LAYOUT_INVALID; +- return res; +- } +- +- if (cpl_eeprom_layout == 0 || cpl_eeprom_layout >= 0x20) +- cpl_eeprom_layout = LAYOUT_LEGACY; +- +- return 0; +-} +- +-/* +- * Routine: cpl_eeprom_read_mac_addr +- * Description: read mac address and store it in buf. +- */ +-int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) +-{ +- uint offset; +- int err; +- +- err = cpl_eeprom_setup(eeprom_bus); +- if (err) +- return err; +- +- offset = (cpl_eeprom_layout != LAYOUT_LEGACY) ? +- MAC_ADDR_OFFSET : MAC_ADDR_OFFSET_LEGACY; +- +- return cpl_eeprom_read(offset, buf, 6); +-} +- +-static u32 board_rev; +- +-/* +- * Routine: cpl_eeprom_get_board_rev +- * Description: read system revision from eeprom +- */ +-u32 cpl_eeprom_get_board_rev(uint eeprom_bus) +-{ +- char str[5]; /* Legacy representation can contain at most 4 digits */ +- uint offset = BOARD_REV_OFFSET_LEGACY; +- +- if (board_rev) +- return board_rev; +- +- if (cpl_eeprom_setup(eeprom_bus)) +- return 0; +- +- if (cpl_eeprom_layout != LAYOUT_LEGACY) +- offset = BOARD_REV_OFFSET; +- +- if (cpl_eeprom_read(offset, (uchar *)&board_rev, BOARD_REV_SIZE)) +- return 0; +- +- /* +- * Convert legacy syntactic representation to semantic +- * representation. i.e. for rev 1.00: 0x100 --> 0x64 +- */ +- if (cpl_eeprom_layout == LAYOUT_LEGACY) { +- sprintf(str, "%x", board_rev); +- board_rev = simple_strtoul(str, NULL, 10); +- } +- +- return board_rev; +-}; +- +-/* +- * Routine: cpl_eeprom_get_board_rev +- * Description: read system revision from eeprom +- * +- * @buf: buffer to store the product name +- * @eeprom_bus: i2c bus num of the eeprom +- * +- * @return: 0 on success, < 0 on failure +- */ +-int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) +-{ +- int err; +- +- if (buf == NULL) +- return -EINVAL; +- +- err = cpl_eeprom_setup(eeprom_bus); +- if (err) +- return err; +- +- err = cpl_eeprom_read(PRODUCT_NAME_OFFSET, buf, PRODUCT_NAME_SIZE); +- if (!err) /* Protect ourselves from invalid data (unterminated str) */ +- buf[PRODUCT_NAME_SIZE - 1] = '\0'; +- +- return err; +-} +diff --git a/board/compulab/plat/imx8/eeprom/eeprom.h b/board/compulab/plat/imx8/eeprom/eeprom.h +deleted file mode 100644 +index 9de4aadd43..0000000000 +--- a/board/compulab/plat/imx8/eeprom/eeprom.h ++++ /dev/null +@@ -1,30 +0,0 @@ +-/* +- * (C) Copyright 2011 CompuLab, Ltd. +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#ifndef _EEPROM_ +-#define _EEPROM_ +-#include +- +-#ifdef CONFIG_DM_I2C +-int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); +-u32 cpl_eeprom_get_board_rev(uint eeprom_bus); +-int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); +-#else +-static inline int cpl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) +-{ +- return 1; +-} +-static inline u32 cpl_eeprom_get_board_rev(uint eeprom_bus) +-{ +- return 0; +-} +-static inline int cpl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) +-{ +- return -ENOSYS; +-} +-#endif +- +-#endif +diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +index f25493b1ee..79b2e29c63 100644 +--- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c ++++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +@@ -12,7 +12,8 @@ + #include + #include + #include +-#include "eeprom.h" ++ ++#ifdef CONFIG_SPL_BUILD + + #define CONFIG_SYS_I2C_EEPROM_ADDR_P1 0x51 + #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +@@ -146,3 +147,5 @@ u32 cl_eeprom_set_osize(u32 osize) + + return board_osize; + }; ++ ++#endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch b/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch new file mode 100644 index 0000000..a8405de --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0063-imx8mm-plat-Add-the-common-board-file-for-imx8mm-SoC.patch @@ -0,0 +1,1078 @@ +From 4b5f04afd0ebe44ac23ba4d96af52c92072dce7b Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 16:27:49 +0300 +Subject: [PATCH 063/126] imx8mm: plat: Add the common board file for imx8mm + SoC + +Signed-off-by: Kirill Kapranov +--- + board/compulab/iot-gate-imx8/Makefile | 2 +- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 235 ----------------------- + board/compulab/mcm-imx8m-mini/Makefile | 2 +- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 235 ----------------------- + board/compulab/plat/imx8mm/Makefile | 1 + + board/compulab/plat/imx8mm/board/Makefile | 4 + + board/compulab/plat/imx8mm/board/board.c | 247 +++++++++++++++++++++++++ + board/compulab/ucm-imx8m-mini/Makefile | 2 +- + board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c | 235 ----------------------- + 9 files changed, 255 insertions(+), 708 deletions(-) + create mode 100644 board/compulab/plat/imx8mm/board/Makefile + create mode 100644 board/compulab/plat/imx8mm/board/board.c + +diff --git a/board/compulab/iot-gate-imx8/Makefile b/board/compulab/iot-gate-imx8/Makefile +index e5239d1dbb..fa228294ef 100644 +--- a/board/compulab/iot-gate-imx8/Makefile ++++ b/board/compulab/iot-gate-imx8/Makefile +@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +-else ++else + obj-y += iot-gate-imx8.o + endif + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index d01b8f8767..6cafc259e9 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -23,243 +23,8 @@ + #include + #include + #include +-#include "../common/eeprom.h" + #include + #include + #include +-#include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; +- +-#ifdef CONFIG_BOARD_POSTCLK_INIT +-int board_postclk_init(void) +-{ +- /* TODO */ +- return 0; +-} +-#endif +-int board_phys_sdram_size(phys_size_t *size) +-{ +- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; +- +- switch (lpddr4_tcm_desc->size) { +- case 4096: +- case 2048: +- case 1024: +- *size = (1L << 20) * lpddr4_tcm_desc->size; +- break; +- default: +- printf("%s: DRAM size %uM is not supported \n", __func__, +- lpddr4_tcm_desc->size); +- while ( 1 ) {}; +- break; +- }; +- return 0; +-} +- /* Get the top of usable RAM */ +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- +- if(gd->ram_top > 0x100000000) +- gd->ram_top = 0x100000000; +- +- return gd->ram_top; +-} +- +-int dram_init(void) +-{ +- phys_size_t sdram_size; +- int ret; +- ret = board_phys_sdram_size(&sdram_size); +- printf("%s: size %llu\n", __func__, sdram_size); +- if (ret) +- return ret; +- +- /* rom_pointer[1] contains the size of TEE occupies */ +- gd->ram_size = sdram_size - rom_pointer[1]; +- +- return 0; +-} +- +-#ifdef CONFIG_OF_BOARD_SETUP +-int ft_board_setup(void *blob, bd_t *bd) +-{ +- return 0; +-} +-#endif +- +-#ifdef CONFIG_FEC_MXC +-#define FEC_RST_PAD IMX_GPIO_NR(1, 10) +-static iomux_v3_cfg_t const fec1_rst_pads[] = { +- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +-}; +- +-static void setup_iomux_fec(void) +-{ +- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, +- ARRAY_SIZE(fec1_rst_pads)); +- +- gpio_request(FEC_RST_PAD, "fec1_rst"); +- gpio_direction_output(FEC_RST_PAD, 0); +- udelay(500); +- gpio_direction_output(FEC_RST_PAD, 1); +-} +- +-/* +- * setup_mac_address() - set Ethernet MAC address environment. +- * +- * @return: 0 on success, -1 on failure +- */ +-static int setup_mac_address(void) +-{ +- int ret; +- unsigned char enetaddr[6]; +- +- ret = eth_env_get_enetaddr("ethaddr", enetaddr); +- if (ret) +- return 0; +- +- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); +- if (ret) +- return ret; +- +- ret = is_valid_ethaddr(enetaddr); +- if (!ret) +- return -1; +- +- ret = eth_env_set_enetaddr("ethaddr", enetaddr); +- if (ret) +- return -1; +- +- return 0; +-} +- +-static int setup_fec(void) +-{ +- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs +- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; +- +- setup_iomux_fec(); +- +- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ +- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], +- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); +- return set_clk_enet(ENET_125MHZ); +-} +- +-int board_phy_config(struct phy_device *phydev) +-{ +- /* enable rgmii rxc skew and phy mode select to RGMII copper */ +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); +- +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); +- +- if (phydev->drv->config) +- phydev->drv->config(phydev); +- return 0; +-} +-#endif +- +-int board_usb_init(int index, enum usb_init_type init) +-{ +- debug("board_usb_init %d, type %d\n", index, init); +- +- imx8m_usb_power(index, true); +- +- return 0; +-} +- +-int board_usb_cleanup(int index, enum usb_init_type init) +-{ +- debug("board_usb_cleanup %d, type %d\n", index, init); +- +- imx8m_usb_power(index, false); +- +- return 0; +-} +-int board_init(void) +-{ +- +-#ifdef CONFIG_FEC_MXC +- setup_fec(); +-#endif +- return 0; +-} +- +-int board_mmc_get_env_dev(int devno) +-{ +- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); +- if (user_env_devno != ULONG_MAX) { +- printf("User Environment dev# is (%lu)\n", user_env_devno); +- return (int)user_env_devno; +- } +- return devno; +-} +- +-static int _mmc_get_env_part(void) +-{ +- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); +- if (user_env_part != ULONG_MAX) { +- printf("User Environment part# is (%lu)\n", user_env_part); +- return (int)user_env_part; +- } +- return CONFIG_SYS_MMC_ENV_PART; +-} +- +-uint mmc_get_env_part(struct mmc *mmc) +-{ +- if (mmc->part_support) +- return _mmc_get_env_part(); +- +- return 0; +-} +- +-int mmc_map_to_kernel_blk(int devno){ +- return devno; +-} +- +-static void board_bootdev_init(void) +-{ +- u32 bootdev = get_boot_device(); +- switch (bootdev) { +- case MMC3_BOOT: +- bootdev = 2; +- break; +- case SD2_BOOT: +- bootdev = 1; +- break; +- default: +- env_set("bootdev", NULL); +- return; +- } +- env_set_ulong("bootdev", bootdev); +-} +- +-int board_late_init(void) +-{ +- int ret; +- +-#ifdef CONFIG_ENV_IS_IN_MMC +- board_late_mmc_env_init(); +- board_bootdev_init(); +-#endif +- +- ret = setup_mac_address(); +- if (ret < 0) +- printf("%s: Can't set MAC address\n", __func__); +- +- return 0; +-} +- +-#ifdef CONFIG_FSL_FASTBOOT +-#ifdef CONFIG_ANDROID_RECOVERY +-int is_recovery_key_pressing(void) +-{ +- return 0; /*TODO*/ +-} +-#endif /*CONFIG_ANDROID_RECOVERY*/ +-#endif /*CONFIG_FSL_FASTBOOT*/ +diff --git a/board/compulab/mcm-imx8m-mini/Makefile b/board/compulab/mcm-imx8m-mini/Makefile +index 2cadd46fb8..906eff02bd 100644 +--- a/board/compulab/mcm-imx8m-mini/Makefile ++++ b/board/compulab/mcm-imx8m-mini/Makefile +@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +-else ++else + obj-y += mcm-imx8m-mini.o + endif + +diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +index d01b8f8767..6cafc259e9 100644 +--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c ++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +@@ -23,243 +23,8 @@ + #include + #include + #include +-#include "../common/eeprom.h" + #include + #include + #include +-#include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; +- +-#ifdef CONFIG_BOARD_POSTCLK_INIT +-int board_postclk_init(void) +-{ +- /* TODO */ +- return 0; +-} +-#endif +-int board_phys_sdram_size(phys_size_t *size) +-{ +- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; +- +- switch (lpddr4_tcm_desc->size) { +- case 4096: +- case 2048: +- case 1024: +- *size = (1L << 20) * lpddr4_tcm_desc->size; +- break; +- default: +- printf("%s: DRAM size %uM is not supported \n", __func__, +- lpddr4_tcm_desc->size); +- while ( 1 ) {}; +- break; +- }; +- return 0; +-} +- /* Get the top of usable RAM */ +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- +- if(gd->ram_top > 0x100000000) +- gd->ram_top = 0x100000000; +- +- return gd->ram_top; +-} +- +-int dram_init(void) +-{ +- phys_size_t sdram_size; +- int ret; +- ret = board_phys_sdram_size(&sdram_size); +- printf("%s: size %llu\n", __func__, sdram_size); +- if (ret) +- return ret; +- +- /* rom_pointer[1] contains the size of TEE occupies */ +- gd->ram_size = sdram_size - rom_pointer[1]; +- +- return 0; +-} +- +-#ifdef CONFIG_OF_BOARD_SETUP +-int ft_board_setup(void *blob, bd_t *bd) +-{ +- return 0; +-} +-#endif +- +-#ifdef CONFIG_FEC_MXC +-#define FEC_RST_PAD IMX_GPIO_NR(1, 10) +-static iomux_v3_cfg_t const fec1_rst_pads[] = { +- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +-}; +- +-static void setup_iomux_fec(void) +-{ +- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, +- ARRAY_SIZE(fec1_rst_pads)); +- +- gpio_request(FEC_RST_PAD, "fec1_rst"); +- gpio_direction_output(FEC_RST_PAD, 0); +- udelay(500); +- gpio_direction_output(FEC_RST_PAD, 1); +-} +- +-/* +- * setup_mac_address() - set Ethernet MAC address environment. +- * +- * @return: 0 on success, -1 on failure +- */ +-static int setup_mac_address(void) +-{ +- int ret; +- unsigned char enetaddr[6]; +- +- ret = eth_env_get_enetaddr("ethaddr", enetaddr); +- if (ret) +- return 0; +- +- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); +- if (ret) +- return ret; +- +- ret = is_valid_ethaddr(enetaddr); +- if (!ret) +- return -1; +- +- ret = eth_env_set_enetaddr("ethaddr", enetaddr); +- if (ret) +- return -1; +- +- return 0; +-} +- +-static int setup_fec(void) +-{ +- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs +- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; +- +- setup_iomux_fec(); +- +- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ +- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], +- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); +- return set_clk_enet(ENET_125MHZ); +-} +- +-int board_phy_config(struct phy_device *phydev) +-{ +- /* enable rgmii rxc skew and phy mode select to RGMII copper */ +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); +- +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); +- +- if (phydev->drv->config) +- phydev->drv->config(phydev); +- return 0; +-} +-#endif +- +-int board_usb_init(int index, enum usb_init_type init) +-{ +- debug("board_usb_init %d, type %d\n", index, init); +- +- imx8m_usb_power(index, true); +- +- return 0; +-} +- +-int board_usb_cleanup(int index, enum usb_init_type init) +-{ +- debug("board_usb_cleanup %d, type %d\n", index, init); +- +- imx8m_usb_power(index, false); +- +- return 0; +-} +-int board_init(void) +-{ +- +-#ifdef CONFIG_FEC_MXC +- setup_fec(); +-#endif +- return 0; +-} +- +-int board_mmc_get_env_dev(int devno) +-{ +- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); +- if (user_env_devno != ULONG_MAX) { +- printf("User Environment dev# is (%lu)\n", user_env_devno); +- return (int)user_env_devno; +- } +- return devno; +-} +- +-static int _mmc_get_env_part(void) +-{ +- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); +- if (user_env_part != ULONG_MAX) { +- printf("User Environment part# is (%lu)\n", user_env_part); +- return (int)user_env_part; +- } +- return CONFIG_SYS_MMC_ENV_PART; +-} +- +-uint mmc_get_env_part(struct mmc *mmc) +-{ +- if (mmc->part_support) +- return _mmc_get_env_part(); +- +- return 0; +-} +- +-int mmc_map_to_kernel_blk(int devno){ +- return devno; +-} +- +-static void board_bootdev_init(void) +-{ +- u32 bootdev = get_boot_device(); +- switch (bootdev) { +- case MMC3_BOOT: +- bootdev = 2; +- break; +- case SD2_BOOT: +- bootdev = 1; +- break; +- default: +- env_set("bootdev", NULL); +- return; +- } +- env_set_ulong("bootdev", bootdev); +-} +- +-int board_late_init(void) +-{ +- int ret; +- +-#ifdef CONFIG_ENV_IS_IN_MMC +- board_late_mmc_env_init(); +- board_bootdev_init(); +-#endif +- +- ret = setup_mac_address(); +- if (ret < 0) +- printf("%s: Can't set MAC address\n", __func__); +- +- return 0; +-} +- +-#ifdef CONFIG_FSL_FASTBOOT +-#ifdef CONFIG_ANDROID_RECOVERY +-int is_recovery_key_pressing(void) +-{ +- return 0; /*TODO*/ +-} +-#endif /*CONFIG_ANDROID_RECOVERY*/ +-#endif /*CONFIG_FSL_FASTBOOT*/ +diff --git a/board/compulab/plat/imx8mm/Makefile b/board/compulab/plat/imx8mm/Makefile +index 33b3fedef9..15ce667357 100644 +--- a/board/compulab/plat/imx8mm/Makefile ++++ b/board/compulab/plat/imx8mm/Makefile +@@ -1,2 +1,3 @@ + obj-y += ddr/ + obj-y += spl/ ++obj-y += board/ +diff --git a/board/compulab/plat/imx8mm/board/Makefile b/board/compulab/plat/imx8mm/board/Makefile +new file mode 100644 +index 0000000000..8c50727052 +--- /dev/null ++++ b/board/compulab/plat/imx8mm/board/Makefile +@@ -0,0 +1,4 @@ ++ccflags-y += -I$(srctree)/board/compulab/ ++ccflags-y += -I$(srctree)/board/compulab/plat/imx8mm/ ++ ++obj-y += board.o +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +new file mode 100644 +index 0000000000..819e6ef32c +--- /dev/null ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -0,0 +1,247 @@ ++/* ++ * Copyright 2020 CompuLab ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "ddr/ddr.h" ++#include "common/eeprom.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#ifdef CONFIG_BOARD_POSTCLK_INIT ++int board_postclk_init(void) ++{ ++ /* TODO */ ++ return 0; ++} ++#endif ++int board_phys_sdram_size(phys_size_t *size) ++{ ++ struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; ++ ++ switch (lpddr4_tcm_desc->size) { ++ case 4096: ++ case 2048: ++ case 1024: ++ *size = (1L << 20) * lpddr4_tcm_desc->size; ++ break; ++ default: ++ printf("%s: DRAM size %uM is not supported \n", __func__, ++ lpddr4_tcm_desc->size); ++ while ( 1 ) {}; ++ break; ++ }; ++ return 0; ++} ++ /* Get the top of usable RAM */ ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++ ++ if(gd->ram_top > 0x100000000) ++ gd->ram_top = 0x100000000; ++ ++ return gd->ram_top; ++} ++ ++#ifdef CONFIG_OF_BOARD_SETUP ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_FEC_MXC ++#define FEC_RST_PAD IMX_GPIO_NR(1, 10) ++static iomux_v3_cfg_t const fec1_rst_pads[] = { ++ IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), ++}; ++ ++static void setup_iomux_fec(void) ++{ ++ imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, ++ ARRAY_SIZE(fec1_rst_pads)); ++ ++ gpio_request(FEC_RST_PAD, "fec1_rst"); ++ gpio_direction_output(FEC_RST_PAD, 0); ++ udelay(500); ++ gpio_direction_output(FEC_RST_PAD, 1); ++} ++ ++/* ++ * setup_mac_address() - set Ethernet MAC address environment. ++ * ++ * @return: 0 on success, -1 on failure ++ */ ++static int setup_mac_address(void) ++{ ++ int ret; ++ unsigned char enetaddr[6]; ++ ++ ret = eth_env_get_enetaddr("ethaddr", enetaddr); ++ if (ret) ++ return 0; ++ ++ ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); ++ if (ret) ++ return ret; ++ ++ ret = is_valid_ethaddr(enetaddr); ++ if (!ret) ++ return -1; ++ ++ ret = eth_env_set_enetaddr("ethaddr", enetaddr); ++ if (ret) ++ return -1; ++ ++ return 0; ++} ++ ++static int setup_fec(void) ++{ ++ struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs ++ = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; ++ ++ setup_iomux_fec(); ++ ++ /* Use 125M anatop REF_CLK1 for ENET1, not from external */ ++ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], ++ IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); ++ return set_clk_enet(ENET_125MHZ); ++} ++ ++int board_phy_config(struct phy_device *phydev) ++{ ++ /* enable rgmii rxc skew and phy mode select to RGMII copper */ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); ++ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); ++ ++ if (phydev->drv->config) ++ phydev->drv->config(phydev); ++ return 0; ++} ++#endif ++ ++int board_usb_init(int index, enum usb_init_type init) ++{ ++ debug("board_usb_init %d, type %d\n", index, init); ++ ++ imx8m_usb_power(index, true); ++ ++ return 0; ++} ++ ++int board_usb_cleanup(int index, enum usb_init_type init) ++{ ++ debug("board_usb_cleanup %d, type %d\n", index, init); ++ ++ imx8m_usb_power(index, false); ++ ++ return 0; ++} ++int board_init(void) ++{ ++ ++#ifdef CONFIG_FEC_MXC ++ setup_fec(); ++#endif ++ return 0; ++} ++ ++int board_mmc_get_env_dev(int devno) ++{ ++ const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); ++ if (user_env_devno != ULONG_MAX) { ++ printf("User Environment dev# is (%lu)\n", user_env_devno); ++ return (int)user_env_devno; ++ } ++ return devno; ++} ++ ++static int _mmc_get_env_part(void) ++{ ++ const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); ++ if (user_env_part != ULONG_MAX) { ++ printf("User Environment part# is (%lu)\n", user_env_part); ++ return (int)user_env_part; ++ } ++ return CONFIG_SYS_MMC_ENV_PART; ++} ++ ++uint mmc_get_env_part(struct mmc *mmc) ++{ ++ if (mmc->part_support) ++ return _mmc_get_env_part(); ++ ++ return 0; ++} ++ ++static void board_bootdev_init(void) ++{ ++ u32 bootdev = get_boot_device(); ++ switch (bootdev) { ++ case MMC3_BOOT: ++ bootdev = 2; ++ break; ++ case SD2_BOOT: ++ bootdev = 1; ++ break; ++ default: ++ env_set("bootdev", NULL); ++ return; ++ } ++ env_set_ulong("bootdev", bootdev); ++} ++ ++int board_late_init(void) ++{ ++ int ret; ++ ++#ifdef CONFIG_ENV_IS_IN_MMC ++ board_late_mmc_env_init(); ++ board_bootdev_init(); ++#endif ++ ++ ret = setup_mac_address(); ++ if (ret < 0) ++ printf("%s: Can't set MAC address\n", __func__); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_FSL_FASTBOOT ++#ifdef CONFIG_ANDROID_RECOVERY ++int is_recovery_key_pressing(void) ++{ ++ return 0; /*TODO*/ ++} ++#endif /*CONFIG_ANDROID_RECOVERY*/ ++#endif /*CONFIG_FSL_FASTBOOT*/ +diff --git a/board/compulab/ucm-imx8m-mini/Makefile b/board/compulab/ucm-imx8m-mini/Makefile +index 870792441c..50618b9b6d 100644 +--- a/board/compulab/ucm-imx8m-mini/Makefile ++++ b/board/compulab/ucm-imx8m-mini/Makefile +@@ -9,7 +9,7 @@ ccflags-y += -I$(srctree)/board/compulab/plat/imx8/ + + ifdef CONFIG_SPL_BUILD + obj-y += spl.o +-else ++else + obj-y += ucm-imx8m-mini.o + endif + +diff --git a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +index cfb4831a80..6cafc259e9 100644 +--- a/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c ++++ b/board/compulab/ucm-imx8m-mini/ucm-imx8m-mini.c +@@ -23,243 +23,8 @@ + #include + #include + #include +-#include "../common/eeprom.h" + #include + #include + #include +-#include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; +- +-#ifdef CONFIG_BOARD_POSTCLK_INIT +-int board_postclk_init(void) +-{ +- /* TODO */ +- return 0; +-} +-#endif +- +-int board_phys_sdram_size(phys_size_t *size) +-{ +- struct lpddr4_tcm_desc *lpddr4_tcm_desc = (struct lpddr4_tcm_desc *) TCM_DATA_CFG; +- +- switch (lpddr4_tcm_desc->size) { +- case 4096: +- case 2048: +- case 1024: +- *size = (1L << 20) * lpddr4_tcm_desc->size; +- break; +- default: +- printf("%s: DRAM size %uM is not supported \n", __func__, +- lpddr4_tcm_desc->size); +- while ( 1 ) {}; +- break; +- }; +- return 0; +-} +- /* Get the top of usable RAM */ +-ulong board_get_usable_ram_top(ulong total_size) +-{ +- +- if(gd->ram_top > 0x100000000) +- gd->ram_top = 0x100000000; +- +- return gd->ram_top; +-} +- +-int dram_init(void) +-{ +- phys_size_t sdram_size; +- int ret; +- ret = board_phys_sdram_size(&sdram_size); +- if (ret) +- return ret; +- +- /* rom_pointer[1] contains the size of TEE occupies */ +- gd->ram_size = sdram_size - rom_pointer[1]; +- +- return 0; +-} +- +-#ifdef CONFIG_OF_BOARD_SETUP +-int ft_board_setup(void *blob, bd_t *bd) +-{ +- return 0; +-} +-#endif +- +-#ifdef CONFIG_FEC_MXC +-#define FEC_RST_PAD IMX_GPIO_NR(1, 10) +-static iomux_v3_cfg_t const fec1_rst_pads[] = { +- IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +-}; +- +-static void setup_iomux_fec(void) +-{ +- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, +- ARRAY_SIZE(fec1_rst_pads)); +- +- gpio_request(FEC_RST_PAD, "fec1_rst"); +- gpio_direction_output(FEC_RST_PAD, 0); +- udelay(500); +- gpio_direction_output(FEC_RST_PAD, 1); +-} +- +-/* +- * setup_mac_address() - set Ethernet MAC address environment. +- * +- * @return: 0 on success, -1 on failure +- */ +-static int setup_mac_address(void) +-{ +- int ret; +- unsigned char enetaddr[6]; +- +- ret = eth_env_get_enetaddr("ethaddr", enetaddr); +- if (ret) +- return 0; +- +- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); +- if (ret) +- return ret; +- +- ret = is_valid_ethaddr(enetaddr); +- if (!ret) +- return -1; +- +- ret = eth_env_set_enetaddr("ethaddr", enetaddr); +- if (ret) +- return -1; +- +- return 0; +-} +- +-static int setup_fec(void) +-{ +- struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs +- = (struct iomuxc_gpr_base_regs *) IOMUXC_GPR_BASE_ADDR; +- +- setup_iomux_fec(); +- +- /* Use 125M anatop REF_CLK1 for ENET1, not from external */ +- clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], +- IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); +- return set_clk_enet(ENET_125MHZ); +-} +- +-int board_phy_config(struct phy_device *phydev) +-{ +- /* enable rgmii rxc skew and phy mode select to RGMII copper */ +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); +- +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); +- +- if (phydev->drv->config) +- phydev->drv->config(phydev); +- return 0; +-} +-#endif +- +-int board_usb_init(int index, enum usb_init_type init) +-{ +- debug("board_usb_init %d, type %d\n", index, init); +- +- imx8m_usb_power(index, true); +- +- return 0; +-} +- +-int board_usb_cleanup(int index, enum usb_init_type init) +-{ +- debug("board_usb_cleanup %d, type %d\n", index, init); +- +- imx8m_usb_power(index, false); +- +- return 0; +-} +-int board_init(void) +-{ +- +-#ifdef CONFIG_FEC_MXC +- setup_fec(); +-#endif +- return 0; +-} +- +-int board_mmc_get_env_dev(int devno) +-{ +- const ulong user_env_devno = env_get_hex("env_dev", ULONG_MAX); +- if (user_env_devno != ULONG_MAX) { +- printf("User Environment dev# is (%lu)\n", user_env_devno); +- return (int)user_env_devno; +- } +- return devno; +-} +- +-static int _mmc_get_env_part(void) +-{ +- const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); +- if (user_env_part != ULONG_MAX) { +- printf("User Environment part# is (%lu)\n", user_env_part); +- return (int)user_env_part; +- } +- return CONFIG_SYS_MMC_ENV_PART; +-} +- +-uint mmc_get_env_part(struct mmc *mmc) +-{ +- if (mmc->part_support) +- return _mmc_get_env_part(); +- +- return 0; +-} +- +-int mmc_map_to_kernel_blk(int devno){ +- return devno; +-} +- +-static void board_bootdev_init(void) +-{ +- u32 bootdev = get_boot_device(); +- switch (bootdev) { +- case MMC3_BOOT: +- bootdev = 2; +- break; +- case SD2_BOOT: +- bootdev = 1; +- break; +- default: +- env_set("bootdev", NULL); +- return; +- } +- env_set_ulong("bootdev", bootdev); +-} +- +-int board_late_init(void) +-{ +- int ret; +- +-#ifdef CONFIG_ENV_IS_IN_MMC +- board_late_mmc_env_init(); +- board_bootdev_init(); +-#endif +- +- ret = setup_mac_address(); +- if (ret < 0) +- printf("%s: Can't set MAC address\n", __func__); +- +- return 0; +-} +- +-#ifdef CONFIG_FSL_FASTBOOT +-#ifdef CONFIG_ANDROID_RECOVERY +-int is_recovery_key_pressing(void) +-{ +- return 0; /*TODO*/ +-} +-#endif /*CONFIG_ANDROID_RECOVERY*/ +-#endif /*CONFIG_FSL_FASTBOOT*/ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8m-mini-Refactor-the-usdhc2.patch b/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8m-mini-Refactor-the-usdhc2.patch new file mode 100644 index 0000000..506a14c --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0064-imx8m-mini-Refactor-the-usdhc2.patch @@ -0,0 +1,100 @@ +From eb1947cb1550fdcb8e41364f2e9b3e9deab974b5 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Jul 2020 06:08:58 +0300 +Subject: [PATCH 064/126] imx8m-mini: Refactor the usdhc2 + +1) Make it removable. +2) Disable 1V8. +3) Fix the card detect in spl and u-boot. + +Signed-off-by: Valentin Raevsky +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 5 +++-- + board/compulab/plat/imx8mm/spl/spl.c | 26 ++++---------------------- + 2 files changed, 7 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index 3fe1e7ac5f..4f9c5fbfb9 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -125,7 +125,7 @@ + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < +- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 + MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 + >; + }; +@@ -426,10 +426,11 @@ + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; ++ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + fsl,wp-controller; +- non-removable; + vmmc-supply = <®_usdhc2_vmmc>; ++ no-1-8-v; + status = "okay"; + }; + +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +index 50aa6bea3f..643093aaf9 100644 +--- a/board/compulab/plat/imx8mm/spl/spl.c ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -55,7 +55,7 @@ struct i2c_pads_info i2c_pad_info1 = { + }, + }; + +-#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 18) ++#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 12) + #define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19) + + #define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE |PAD_CTL_PE | \ +@@ -83,20 +83,9 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { + IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), ++ IMX8MM_PAD_SD2_CD_B_GPIO2_IO12 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL), + }; + +-/* +- * The evk board uses DAT3 to detect CD card plugin, +- * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. +- */ +-static iomux_v3_cfg_t const usdhc2_cd_pad = +- IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL); +- +-static iomux_v3_cfg_t const usdhc2_dat3_pad = +- IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 | +- MUX_PAD_CTRL(USDHC_PAD_CTRL); +- +- + static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC2_BASE_ADDR, 0, 4}, + {USDHC3_BASE_ADDR, 0, 8}, +@@ -153,18 +142,11 @@ int board_mmc_getcd(struct mmc *mmc) + ret = 1; + break; + case USDHC2_BASE_ADDR: +- imx_iomux_v3_setup_pad(usdhc2_cd_pad); + gpio_request(USDHC2_CD_GPIO, "usdhc2 cd"); + gpio_direction_input(USDHC2_CD_GPIO); +- +- /* +- * Since it is the DAT3 pin, this pin is pulled to +- * low voltage if no card +- */ + ret = gpio_get_value(USDHC2_CD_GPIO); +- +- imx_iomux_v3_setup_pad(usdhc2_dat3_pad); +- return ret; ++ /* CD is active low */ ++ return !ret; + } + + return 1; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0065-mcm-imx8m-mini-reset-Refactor-the-reset.patch b/recipes-bsp/u-boot/compulab/imx8mm/0065-mcm-imx8m-mini-reset-Refactor-the-reset.patch new file mode 100644 index 0000000..222c55b --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0065-mcm-imx8m-mini-reset-Refactor-the-reset.patch @@ -0,0 +1,46 @@ +From c8f58be8401b672be8aa35226470ffd2da136364 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Jul 2020 06:29:03 +0300 +Subject: [PATCH 065/126] mcm-imx8m-mini: reset: Refactor the reset + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8mm/spl/spl.c | 9 --------- + configs/mcm-imx8m-mini_defconfig | 3 --- + 2 files changed, 12 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +index 643093aaf9..ad1be9befd 100644 +--- a/board/compulab/plat/imx8mm/spl/spl.c ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -251,12 +251,3 @@ void board_init_f(ulong dummy) + + board_init_r(NULL, 0); + } +- +-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +-{ +- puts ("resetting ...\n"); +- +- reset_cpu(WDOG1_BASE_ADDR); +- +- return 0; +-} +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig +index 971e1ec982..e0e4f86329 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/mcm-imx8m-mini_defconfig +@@ -77,10 +77,7 @@ CONFIG_PINCTRL_IMX8M=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_FIXED=y + CONFIG_DM_REGULATOR_GPIO=y +-CONFIG_DM_RESET=y + CONFIG_MXC_UART=y +-CONFIG_SYSRESET=y +-CONFIG_SYSRESET_PSCI=y + CONFIG_DM_THERMAL=y + CONFIG_NXP_TMU=y + CONFIG_USB=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0066-imx8m-mini-ddr-Change-the-memory-presets-order.patch b/recipes-bsp/u-boot/compulab/imx8mm/0066-imx8m-mini-ddr-Change-the-memory-presets-order.patch new file mode 100644 index 0000000..311632d --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0066-imx8m-mini-ddr-Change-the-memory-presets-order.patch @@ -0,0 +1,36 @@ +From 0a9c14878c90919628fa76ca098f18c86c06cf97 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Jul 2020 13:01:28 +0300 +Subject: [PATCH 066/126] imx8m-mini: ddr: Change the memory presets order + +Make the simplest one 1-st. +Nanya 1G has the best ddr-phy settings for reading the mr4-mr8 registers. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8mm/ddr/ddr.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 1340475bef..4d774835ef 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -63,11 +63,11 @@ struct lpddr4_desc { + + #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') + static const struct lpddr4_desc lpddr4_array[] = { +- { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, //Only the first timing entry is in use +- { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, +- { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, //Only the first timing entry is in use + { .name = "Nanya", .id = 0x05000010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, +- { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, ++ { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, ++ { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, + }; + + static unsigned int lpddr4_get_mr(void) +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-env-Fix-getopt_long-parameters-string.patch b/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-env-Fix-getopt_long-parameters-string.patch new file mode 100644 index 0000000..cc7c9d2 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0067-imx8m-mini-env-Fix-getopt_long-parameters-string.patch @@ -0,0 +1,26 @@ +From 20f325051a66a31b0c6644e63cd2f8bb2b616e6e Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Jul 2020 14:00:31 +0300 +Subject: [PATCH 067/126] imx8m-mini: env: Fix getopt_long() parameters' string + +Signed-off-by: Valentin Raevsky +--- + tools/env/fw_env_main.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c +index ebd18b40ba..ca9ad78014 100644 +--- a/tools/env/fw_env_main.c ++++ b/tools/env/fw_env_main.c +@@ -122,7 +122,7 @@ static void parse_common_args(int argc, char *argv[]) + env_opts.config_file = CONFIG_FILE; + #endif + +- while ((c = getopt_long(argc, argv, ":a:c:l:h:v:e", long_options, NULL)) != ++ while ((c = getopt_long(argc, argv, ":a:c:l:h:ve", long_options, NULL)) != + EOF) { + switch (c) { + #ifdef CONFIG_FILE +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0068-ucm-imx8m-mini-Fix-reset.patch b/recipes-bsp/u-boot/compulab/imx8mm/0068-ucm-imx8m-mini-Fix-reset.patch new file mode 100644 index 0000000..e30a19b --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0068-ucm-imx8m-mini-Fix-reset.patch @@ -0,0 +1,28 @@ +From 5368f1fce9510d82964e9cc38c76f754f2ff1355 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 22 Jul 2020 22:26:54 +0300 +Subject: [PATCH 068/126] ucm-imx8m-mini: Fix reset + +Signed-off-by: Kirill Kapranov +--- + configs/ucm-imx8m-mini_defconfig | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 2c98eaa256..ac8b3f558e 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -78,10 +78,7 @@ CONFIG_PINCTRL_IMX8M=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_FIXED=y + CONFIG_DM_REGULATOR_GPIO=y +-CONFIG_DM_RESET=y + CONFIG_MXC_UART=y +-CONFIG_SYSRESET=y +-CONFIG_SYSRESET_PSCI=y + CONFIG_DM_THERMAL=y + CONFIG_NXP_TMU=y + CONFIG_USB=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0069-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch b/recipes-bsp/u-boot/compulab/imx8mm/0069-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch new file mode 100644 index 0000000..2f68d4c --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0069-imx8m-mini-spl-Add-__weak-board_fit_config_name_matc.patch @@ -0,0 +1,30 @@ +From 0db9464775f4664c48b8428cdbd3cd70c87dea2c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 5 Aug 2020 00:20:44 +0300 +Subject: [PATCH 069/126] imx8m-mini: spl: Add __weak + board_fit_config_name_match() + +Add __weak board_fit_config_name_match(). +Each board can redefind this function in its spl.c file. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8mm/spl/spl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +index ad1be9befd..63af88caa5 100644 +--- a/board/compulab/plat/imx8mm/spl/spl.c ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -212,7 +212,7 @@ void spl_board_init(void) + } + + #ifdef CONFIG_SPL_LOAD_FIT +-int board_fit_config_name_match(const char *name) ++__weak int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0070-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch b/recipes-bsp/u-boot/compulab/imx8mm/0070-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch new file mode 100644 index 0000000..4763844 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0070-mcm-imx8m-mini-spl-Add-board_fit_config_name_match.patch @@ -0,0 +1,32 @@ +From 447d297f3b0fbc8f2c02d99bc79215a01a7f27f7 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 5 Aug 2020 00:22:29 +0300 +Subject: [PATCH 070/126] mcm-imx8m-mini: spl: Add + board_fit_config_name_match() + +Signed-off-by: Valentin Raevsky +--- + board/compulab/mcm-imx8m-mini/spl.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/board/compulab/mcm-imx8m-mini/spl.c b/board/compulab/mcm-imx8m-mini/spl.c +index d6ece8ef3e..1a208e09a4 100644 +--- a/board/compulab/mcm-imx8m-mini/spl.c ++++ b/board/compulab/mcm-imx8m-mini/spl.c +@@ -7,3 +7,13 @@ + int spl_board_private_init(void) { + return 0; + } ++ ++#ifdef CONFIG_SPL_LOAD_FIT ++int board_fit_config_name_match(const char *name) ++{ ++ /* Just empty function now - can't decide what to choose */ ++ debug("%s: %s\n", __func__, name); ++ ++ return 0; ++} ++#endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0071-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch b/recipes-bsp/u-boot/compulab/imx8mm/0071-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch new file mode 100644 index 0000000..9f41e37 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0071-imx8m-mini-u-boot-Add-__weak-uboot_board_private_ini.patch @@ -0,0 +1,51 @@ +From 6815fe714952f3ee9e044e3ad14a3feb83857ca6 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 5 Aug 2020 00:25:22 +0300 +Subject: [PATCH 071/126] imx8m-mini: u-boot: Add __weak + uboot_board_private_init() + +Add a __weak uboot_board_private_init(). +Each board can redefind this function in its board.c file. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8mm/board/board.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 819e6ef32c..2d12861bb8 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -167,12 +168,21 @@ int board_usb_cleanup(int index, enum usb_init_type init) + + return 0; + } ++ ++__weak int uboot_board_private_init(void) { ++ return 0; ++} ++ + int board_init(void) + { + + #ifdef CONFIG_FEC_MXC + setup_fec(); + #endif ++ if (uboot_board_private_init()) { ++ printf("uboot_board_private_init() failed\n"); ++ hang(); ++ } + return 0; + } + +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0072-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch b/recipes-bsp/u-boot/compulab/imx8mm/0072-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch new file mode 100644 index 0000000..3ccb638 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0072-mcm-imx8m-mini-u-boot-Add-uboot_board_private_init.patch @@ -0,0 +1,26 @@ +From 24922199f7e640a0dc20042bdc0ffaa900f85896 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 5 Aug 2020 00:26:12 +0300 +Subject: [PATCH 072/126] mcm-imx8m-mini: u-boot: Add + uboot_board_private_init() + +Signed-off-by: Valentin Raevsky +--- + board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +index 6cafc259e9..bd863f154f 100644 +--- a/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c ++++ b/board/compulab/mcm-imx8m-mini/mcm-imx8m-mini.c +@@ -28,3 +28,7 @@ + #include + + DECLARE_GLOBAL_DATA_PTR; ++ ++int uboot_board_private_init(void) { ++ return 0; ++} +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0073-Add-ddr_init-return-handling.patch b/recipes-bsp/u-boot/compulab/imx8mm/0073-Add-ddr_init-return-handling.patch new file mode 100644 index 0000000..b8a789c --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0073-Add-ddr_init-return-handling.patch @@ -0,0 +1,29 @@ +From afa38bc44bb5b3054439f83173f95f28018064dd Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 19 Aug 2020 18:45:55 +0300 +Subject: [PATCH 073/126] Add ddr_init return handling + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/ddr/ddr.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 4d774835ef..3912de6316 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -152,7 +152,10 @@ void spl_dram_init(void) + printf("DDRINFO(%s): %s %dG @ %d MHz\n", (ddr_found ? "D" : "?" ), lpddr4_array[i].name, + lpddr4_array[i].size, lpddr4_array[i].timing->fsp_table[0]); + +- ddr_init(lpddr4_array[i].timing); ++ if (ddr_init(lpddr4_array[i].timing)) { ++ SPL_TCM_INIT; ++ do_reset(NULL,0,0,NULL); ++ } + + ddr_info_mrr = lpddr4_get_mr(); + if (ddr_info_mrr == 0xFFFFFFFF ) { +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0074-spl-Enable-Kingston-DRAM-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0074-spl-Enable-Kingston-DRAM-support.patch new file mode 100644 index 0000000..426e6dc --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0074-spl-Enable-Kingston-DRAM-support.patch @@ -0,0 +1,121 @@ +From 2daab9bfa0085f0b3ed0587128327b14b03fa302 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 18 Aug 2020 19:10:19 +0300 +Subject: [PATCH 074/126] spl: Enable Kingston DRAM support + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8/eeprom/eeprom_spl.c | 21 +++++++++++++++++++++ + board/compulab/plat/imx8mm/ddr/ddr.c | 27 ++++++++++++++++++++------- + 2 files changed, 41 insertions(+), 7 deletions(-) + +diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +index 79b2e29c63..b3c894a9af 100644 +--- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c ++++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +@@ -79,6 +79,10 @@ static int cl_eeprom_write(uint offset, uchar *buf, int len) + #define BOARD_DDRINFO_SIZE 4 + static u32 board_ddrinfo = 0xdeadbeef; + ++#define BOARD_DDRSUBIND_OFFSET 0x44 ++#define BOARD_DDRSUBIND_SIZE 1 ++static u8 board_ddrsubind = 0xff; ++ + #define BOARD_DRATE_OFFSET 0x50 + #define BOARD_DRATE_SIZE 4 + static u32 board_drate = 0xdeadbeef; +@@ -129,6 +133,23 @@ u32 cl_eeprom_set_drate(u32 drate, unsigned int r, unsigned int c) + return board_drate; + }; + ++u8 cl_eeprom_get_subind(void) ++{ ++ if (cl_eeprom_read(BOARD_DDRSUBIND_OFFSET, (uchar *)&board_ddrsubind, BOARD_DDRSUBIND_SIZE)) ++ return 0xff; ++ ++ return board_ddrsubind; ++}; ++ ++u8 cl_eeprom_set_subind(u8 ddrsubind) ++{ ++ if (cl_eeprom_write(BOARD_DDRSUBIND_OFFSET, (uchar *)&ddrsubind, BOARD_DDRSUBIND_SIZE)) ++ return 0xff; ++ board_ddrsubind = ddrsubind; ++ ++ return board_ddrsubind; ++}; ++ + /* override-size ifaces */ + u32 cl_eeprom_get_osize(void) + { +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 3912de6316..970d3ab81b 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -19,6 +19,8 @@ + /* Forward declarations */ + u32 cl_eeprom_get_ddrinfo(void); + u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); ++u32 cl_eeprom_get_subind(void); ++u32 cl_eeprom_set_subind(u32 subind); + + u32 cl_eeprom_get_osize(void); + +@@ -57,17 +59,24 @@ struct lpddr4_desc { + * use it if default is not the + * 1-st array entry */ + unsigned int _default; ++ /* An optional field to distiguish DRAM chips that ++ * have different geometry, though return the same MRR. ++ * Default value 0xff ++ */ ++ u8 subind; + struct dram_timing_info *timing; + char *desc[4]; + }; + + #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') + static const struct lpddr4_desc lpddr4_array[] = { +- { .name = "Nanya", .id = 0x01050008, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, //Only the first timing entry is in use +- { .name = "Nanya", .id = 0x05000010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, +- { .name = "Samsung",.id = 0x01061010, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, +- { .name = "Micron", .id = 0xff020008, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, +- { .name = "Micron", .id = 0xff000110, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, ++ { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, ++ { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, ++ { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, ++ { .name = "Micron", .id = 0xff000110, .subind = 0xff, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, + }; + + static unsigned int lpddr4_get_mr(void) +@@ -122,7 +131,8 @@ void spl_dram_init(void) + /* get ddr type from the eeprom if not in tcm scan mode */ + ddr_info = cl_eeprom_get_ddrinfo(); + for ( i = 0; i < ARRAY_SIZE(lpddr4_array); i++ ) { +- if (lpddr4_array[i].id == ddr_info) { ++ if (lpddr4_array[i].id == ddr_info && ++ lpddr4_array[i].subind == cl_eeprom_get_subind()) { + ddr_found = 1; + break; + } +@@ -177,10 +187,13 @@ void spl_dram_init(void) + if (ddr_found == 0) { + /* Update eeprom */ + cl_eeprom_set_ddrinfo(ddr_info_mrr); ++ mdelay(10); + ddr_info = cl_eeprom_get_ddrinfo(); ++ mdelay(10); ++ cl_eeprom_set_subind(lpddr4_array[i].subind); + /* make sure that the ddr_info has reached the eeprom */ + printf("DDRINFO(E): mr5-8 [ 0x%x ], read back\n", ddr_info); +- if (ddr_info_mrr != ddr_info) { ++ if (ddr_info_mrr != ddr_info || cl_eeprom_get_subind() != lpddr4_array[i].subind) { + printf("DDRINFO(EEPROM): make sure that the eeprom is accessible\n"); + printf("DDRINFO(EEPROM): i2c dev 1; i2c md 0x51 0x40 0x50\n"); + } +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0075-Add-show_suite-function.patch b/recipes-bsp/u-boot/compulab/imx8mm/0075-Add-show_suite-function.patch new file mode 100644 index 0000000..0dc9daf --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0075-Add-show_suite-function.patch @@ -0,0 +1,276 @@ +From 218460565b10716a8bc5aa1215f8a3449ea6fb9b Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sat, 29 Aug 2020 22:14:48 +0300 +Subject: [PATCH 075/126] Add show_suite function + +The function shows product names of UCM and SB on boot. + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 2 +- + board/compulab/common/eeprom.c | 88 ++++++++++++++++++++++++-------- + board/compulab/common/eeprom.h | 1 + + board/compulab/plat/imx8mm/board/board.c | 17 ++++++ + 4 files changed, 87 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index 4f9c5fbfb9..a587c3dda0 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -226,7 +226,7 @@ + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; +- status = "disabled"; ++ status = "okay"; + + }; + +diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c +index defd9b6446..46363c0707 100644 +--- a/board/compulab/common/eeprom.c ++++ b/board/compulab/common/eeprom.c +@@ -7,6 +7,7 @@ + * SPDX-License-Identifier: GPL-2.0+ + */ + ++#include + #include + #include + #include +@@ -22,8 +23,16 @@ + # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + #endif + ++#ifndef CONFIG_SYS_I2C_EEPROM_ADDR_SB ++# define CONFIG_SYS_I2C_EEPROM_ADDR_SB 0x54 ++#endif ++ + #ifndef CONFIG_SYS_I2C_EEPROM_BUS +-#define CONFIG_SYS_I2C_EEPROM_BUS 0 ++# define CONFIG_SYS_I2C_EEPROM_BUS 1 ++#endif ++ ++#ifndef CONFIG_SYS_I2C_EEPROM_BUS_SB ++# define CONFIG_SYS_I2C_EEPROM_BUS_SB 0 + #endif + + #define EEPROM_LAYOUT_VER_OFFSET 44 +@@ -40,31 +49,43 @@ + #define LAYOUT_INVALID 0 + #define LAYOUT_LEGACY 0xff + +-static int cl_eeprom_bus; + static int cl_eeprom_layout; /* Implicitly LAYOUT_INVALID */ + +-static struct udevice *g_dev = NULL; ++struct eeprom_path { ++ int bus; ++ uint8_t chip; ++}; + +-static int cpl_eeprom_init(void) { ++static const struct eeprom_path eeprom_som = { ++ CONFIG_SYS_I2C_EEPROM_BUS, ++ CONFIG_SYS_I2C_EEPROM_ADDR ++}; ++static const struct eeprom_path eeprom_sb = { ++ CONFIG_SYS_I2C_EEPROM_BUS_SB, ++ CONFIG_SYS_I2C_EEPROM_ADDR_SB ++}; ++ ++static const struct eeprom_path *working_eeprom; + +- int i2c_bus = CONFIG_SYS_I2C_EEPROM_BUS; +- uint8_t chip = CONFIG_SYS_I2C_EEPROM_ADDR; ++static struct udevice *g_dev = NULL; ++ ++static int cpl_eeprom_init(void) { + + struct udevice *bus, *dev; + int ret; + + if (!g_dev) { + +- ret = uclass_get_device_by_seq(UCLASS_I2C, i2c_bus, &bus); ++ ret = uclass_get_device_by_seq(UCLASS_I2C, working_eeprom->bus, &bus); + if (ret) { +- printf("%s: No bus %d\n", __func__, i2c_bus); ++ printf("%s: No bus %d\n", __func__, working_eeprom->bus); + return ret; + } + +- ret = dm_i2c_probe(bus, chip, 0, &dev); ++ ret = dm_i2c_probe(bus, working_eeprom->chip, 0, &dev); + if (ret) { + printf("%s: Can't find device id=0x%x, on bus %d\n", +- __func__, chip, i2c_bus); ++ __func__, working_eeprom->chip, working_eeprom->bus); + return ret; + } + +@@ -88,7 +109,7 @@ static int cl_eeprom_read(uint offset, uchar *buf, int len) + return res; + } + +-static int cl_eeprom_setup(uint eeprom_bus) ++static int cl_eeprom_setup(const struct eeprom_path *eeprom) + { + int res; + +@@ -96,10 +117,11 @@ static int cl_eeprom_setup(uint eeprom_bus) + * We know the setup was already done when the layout is set to a valid + * value and we're using the same bus as before. + */ +- if (cl_eeprom_layout != LAYOUT_INVALID && eeprom_bus == cl_eeprom_bus) ++ if (cl_eeprom_layout != LAYOUT_INVALID && eeprom == working_eeprom) + return 0; + +- cl_eeprom_bus = eeprom_bus; ++ working_eeprom = eeprom; ++ g_dev = NULL; + res = cl_eeprom_read(EEPROM_LAYOUT_VER_OFFSET, + (uchar *)&cl_eeprom_layout, 1); + if (res) { +@@ -120,7 +142,7 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) + + memset(serialnr, 0, sizeof(*serialnr)); + +- if (cl_eeprom_setup(CONFIG_SYS_I2C_EEPROM_BUS)) ++ if (cl_eeprom_setup(&eeprom_som)) + return; + + offset = (cl_eeprom_layout != LAYOUT_LEGACY) ? +@@ -139,12 +161,12 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) + * Routine: cl_eeprom_read_mac_addr + * Description: read mac address and store it in buf. + */ +-int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) ++int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus __attribute__((unused))) + { + uint offset; + int err; + +- err = cl_eeprom_setup(eeprom_bus); ++ err = cl_eeprom_setup(&eeprom_som); + if (err) + return err; + +@@ -160,7 +182,7 @@ static u32 board_rev; + * Routine: cl_eeprom_get_board_rev + * Description: read system revision from eeprom + */ +-u32 cl_eeprom_get_board_rev(uint eeprom_bus) ++u32 cl_eeprom_get_board_rev(uint eeprom_bus __attribute__((unused))) + { + char str[5]; /* Legacy representation can contain at most 4 digits */ + uint offset = BOARD_REV_OFFSET_LEGACY; +@@ -168,7 +190,7 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus) + if (board_rev) + return board_rev; + +- if (cl_eeprom_setup(eeprom_bus)) ++ if (cl_eeprom_setup(&eeprom_som)) + return 0; + + if (cl_eeprom_layout != LAYOUT_LEGACY) +@@ -198,14 +220,14 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus) + * + * @return: 0 on success, < 0 on failure + */ +-int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) ++int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus __attribute__((unused))) + { + int err; + + if (buf == NULL) + return -EINVAL; + +- err = cl_eeprom_setup(eeprom_bus); ++ err = cl_eeprom_setup(&eeprom_som); + if (err) + return err; + +@@ -216,6 +238,32 @@ int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) + return err; + } + ++static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) ++{ ++ int len; ++ int err; ++ uchar tmp[PRODUCT_NAME_SIZE]; ++ ++ err = cl_eeprom_setup(eeprom); ++ if (err) ++ printf("%s: Error accesing i2c %x@%x\n", __func__, eeprom->bus, eeprom->chip); ++ else ++ err = cl_eeprom_read(PRODUCT_NAME_OFFSET, tmp, PRODUCT_NAME_SIZE); ++ ++ if (!err && tmp[0] != 0xff) // Check if the flash isn't written ++ len = snprintf(buf, PRODUCT_NAME_SIZE, (char*)tmp); ++ else ++ len = snprintf(buf, PRODUCT_NAME_SIZE, "unknown"); ++ ++ return len; ++} ++void cl_eeprom_get_suite(char *buf) ++{ ++ buf += cl_eeprom_read_product_name(buf, &eeprom_som); ++ buf += sprintf(buf, " @ "); ++ buf += cl_eeprom_read_product_name(buf, &eeprom_sb); ++} ++ + #ifdef CONFIG_CMD_EEPROM_LAYOUT + /** + * eeprom_field_print_bin_ver() - print a "version field" which contains binary +diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h +index 09804ee146..d366f59288 100644 +--- a/board/compulab/common/eeprom.h ++++ b/board/compulab/common/eeprom.h +@@ -15,6 +15,7 @@ + int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); + u32 cl_eeprom_get_board_rev(uint eeprom_bus); + int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); ++void cl_eeprom_get_suite(char* buf); + #else + static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) + { +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 2d12861bb8..4ec5a5af4f 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -173,6 +173,22 @@ __weak int uboot_board_private_init(void) { + return 0; + } + ++static void show_suite_info(void) ++{ ++ char *buf = malloc(200); //More than necessary ++ ++ if(!buf) { ++ printf("%s: Not enough memory\n", __func__); ++ return; ++ } ++ ++ cl_eeprom_get_suite(buf); ++ printf("Suite:\t%s\n", buf); ++ ++ free(buf); ++ return; ++} ++ + int board_init(void) + { + +@@ -183,6 +199,7 @@ int board_init(void) + printf("uboot_board_private_init() failed\n"); + hang(); + } ++ show_suite_info(); + return 0; + } + +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0076-Clean-debug-printout.patch b/recipes-bsp/u-boot/compulab/imx8mm/0076-Clean-debug-printout.patch new file mode 100644 index 0000000..09e0f16 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0076-Clean-debug-printout.patch @@ -0,0 +1,26 @@ +From debba895d9bbb88e1b855417e6448cd96fed978b Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sat, 29 Aug 2020 22:37:39 +0300 +Subject: [PATCH 076/126] Clean debug printout + +Signed-off-by: Kirill Kapranov +--- + board/compulab/common/eeprom.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c +index 46363c0707..ebcafac04b 100644 +--- a/board/compulab/common/eeprom.c ++++ b/board/compulab/common/eeprom.c +@@ -260,7 +260,7 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr + void cl_eeprom_get_suite(char *buf) + { + buf += cl_eeprom_read_product_name(buf, &eeprom_som); +- buf += sprintf(buf, " @ "); ++ buf += sprintf(buf, " on "); + buf += cl_eeprom_read_product_name(buf, &eeprom_sb); + } + +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0077-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0077-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch new file mode 100644 index 0000000..8e667b5 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0077-imx8m-ddr-Add-Nanya-2G-2400-MTS-support.patch @@ -0,0 +1,1914 @@ +From 0c72e9bfb6f91dafa950db6ddd0ce2742479d219 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Sun, 30 Aug 2020 10:44:03 +0300 +Subject: [PATCH 077/126] imx8m: ddr: Add Nanya 2G 2400 MTS support + +Add Nanya 2G 2400 MTS support. +Addresses the dram issue discovered on this dram configuration. + +Signed-off-by: Valentin Raevsky +--- + board/compulab/plat/imx8mm/ddr/Makefile | 3 + + board/compulab/plat/imx8mm/ddr/ddr.c | 4 + + board/compulab/plat/imx8mm/ddr/ddr.h | 1 + + .../plat/imx8mm/ddr/lpddr4_timing_05000010.c | 1849 ++++++++++++++++++++ + 4 files changed, 1857 insertions(+) + create mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c + +diff --git a/board/compulab/plat/imx8mm/ddr/Makefile b/board/compulab/plat/imx8mm/ddr/Makefile +index 47c48dbae2..daf9c67950 100644 +--- a/board/compulab/plat/imx8mm/ddr/Makefile ++++ b/board/compulab/plat/imx8mm/ddr/Makefile +@@ -3,3 +3,6 @@ + +obj-y += lpddr4_timing_ff000110.o + +obj-y += lpddr4_timing_01061010.o + +obj-y += lpddr4_timing_01050008.o +++ifndef CONFIG_TARGET_MCM_IMX8M_MINI +++obj-y += lpddr4_timing_05000010.o +++endif +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 970d3ab81b..8a7d221b97 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -70,7 +70,11 @@ struct lpddr4_desc { + + #define DEFAULT (('D' << 24) + ('E' << 16 ) + ( 'F' << 8 ) + 'A') + static const struct lpddr4_desc lpddr4_array[] = { ++#ifdef CONFIG_TARGET_MCM_IMX8M_MINI + { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++#else ++ { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_05000010}, ++#endif + { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.h b/board/compulab/plat/imx8mm/ddr/ddr.h +index 4d2a238439..4901e826a8 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.h ++++ b/board/compulab/plat/imx8mm/ddr/ddr.h +@@ -11,6 +11,7 @@ extern struct dram_timing_info ucm_dram_timing_ff020008; + extern struct dram_timing_info ucm_dram_timing_ff000110; + extern struct dram_timing_info ucm_dram_timing_01061010; + extern struct dram_timing_info ucm_dram_timing_01050008; ++extern struct dram_timing_info ucm_dram_timing_05000010; + + void spl_dram_init(void); + +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c +new file mode 100644 +index 0000000000..5b091de47b +--- /dev/null ++++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c +@@ -0,0 +1,1849 @@ ++/* ++ * Copyright 2018 NXP ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * Generated code from MX8M_DDR_tool ++ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga ++ */ ++ ++#include ++#include ++ ++static struct dram_cfg_param ddr_ddrc_cfg[] = { ++ /** Initialize DDRC registers **/ ++ {0x3d400304,0x1}, ++ {0x3d400030,0x1}, ++ {0x3d400000,0xa1080020}, ++ {0x3d400020,0x223}, ++ {0x3d400024,0x2ee00}, ++ {0x3d400064,0x4900a8}, ++ {0x3d4000d0,0xc0030495}, ++ {0x3d4000d4,0x770000}, ++ {0x3d4000dc,0xc40024}, ++ {0x3d4000e0,0x310000}, ++ {0x3d4000e8,0x66004d}, ++ {0x3d4000ec,0x16004d}, ++ {0x3d400100,0x1618141a}, ++ {0x3d400104,0x504a6}, ++ {0x3d40010c,0x909000}, ++ {0x3d400110,0xb04060b}, ++ {0x3d400114,0x2030909}, ++ {0x3d400118,0x1010006}, ++ {0x3d40011c,0x301}, ++ {0x3d400130,0x20500}, ++ {0x3d400134,0xb100002}, ++ {0x3d400138,0xad}, ++ {0x3d400144,0x78003c}, ++ {0x3d400180,0x2580012}, ++ {0x3d400184,0x1e0493e}, ++ {0x3d400188,0x0}, ++ {0x3d400190,0x4938208}, ++ {0x3d400194,0x80303}, ++ {0x3d4001b4,0x1308}, ++ {0x3d4001a0,0xe0400018}, ++ {0x3d4001a4,0xdf00e4}, ++ {0x3d4001a8,0x80000000}, ++ {0x3d4001b0,0x11}, ++ {0x3d4001c0,0x1}, ++ {0x3d4001c4,0x0}, ++ {0x3d4000f4,0xc99}, ++ {0x3d400108,0x60c1514}, ++ {0x3d400200,0x1f}, ++ {0x3d40020c,0x0}, ++ {0x3d400210,0x1f1f}, ++ {0x3d400204,0x80808}, ++ {0x3d400214,0x7070707}, ++ {0x3d400218,0x7070707}, ++ {0x3d400250,0x29001701}, ++ {0x3d400254,0x2c}, ++ {0x3d40025c,0x4000030}, ++ {0x3d400264,0x900093e7}, ++ {0x3d40026c,0x2005574}, ++ {0x3d400400,0x111}, ++ {0x3d400408,0x72ff}, ++ {0x3d400494,0x2100e07}, ++ {0x3d400498,0x620096}, ++ {0x3d40049c,0x1100e07}, ++ {0x3d4004a0,0xc8012c}, ++ {0x3d402020,0x21}, ++ {0x3d402024,0x7d00}, ++ {0x3d402050,0x20d040}, ++ {0x3d402064,0xc001c}, ++ {0x3d4020dc,0x840000}, ++ {0x3d4020e0,0x310000}, ++ {0x3d4020e8,0x66004d}, ++ {0x3d4020ec,0x16004d}, ++ {0x3d402100,0xa040305}, ++ {0x3d402104,0x30407}, ++ {0x3d402108,0x203060b}, ++ {0x3d40210c,0x505000}, ++ {0x3d402110,0x2040202}, ++ {0x3d402114,0x2030202}, ++ {0x3d402118,0x1010004}, ++ {0x3d40211c,0x301}, ++ {0x3d402130,0x20300}, ++ {0x3d402134,0xa100002}, ++ {0x3d402138,0x1d}, ++ {0x3d402144,0x14000a}, ++ {0x3d402180,0x640004}, ++ {0x3d402190,0x3818200}, ++ {0x3d402194,0x80303}, ++ {0x3d4021b4,0x100}, ++ {0x3d403020,0x21}, ++ {0x3d403024,0x1f40}, ++ {0x3d403050,0x20d040}, ++ {0x3d403064,0x30007}, ++ {0x3d4030dc,0x840000}, ++ {0x3d4030e0,0x310000}, ++ {0x3d4030e8,0x66004d}, ++ {0x3d4030ec,0x16004d}, ++ {0x3d403100,0xa010102}, ++ {0x3d403104,0x30404}, ++ {0x3d403108,0x203060b}, ++ {0x3d40310c,0x505000}, ++ {0x3d403110,0x2040202}, ++ {0x3d403114,0x2030202}, ++ {0x3d403118,0x1010004}, ++ {0x3d40311c,0x301}, ++ {0x3d403130,0x20300}, ++ {0x3d403134,0xa100002}, ++ {0x3d403138,0x8}, ++ {0x3d403144,0x50003}, ++ {0x3d403180,0x190004}, ++ {0x3d403190,0x3818200}, ++ {0x3d403194,0x80303}, ++ {0x3d4031b4,0x100}, ++ {0x3d400028,0x0}, ++}; ++ ++/* PHY Initialize Configuration */ ++static struct dram_cfg_param ddr_ddrphy_cfg[] = { ++ {0x100a0,0x0}, ++ {0x100a1,0x1}, ++ {0x100a2,0x2}, ++ {0x100a3,0x3}, ++ {0x100a4,0x4}, ++ {0x100a5,0x5}, ++ {0x100a6,0x6}, ++ {0x100a7,0x7}, ++ {0x110a0,0x0}, ++ {0x110a1,0x1}, ++ {0x110a2,0x3}, ++ {0x110a3,0x4}, ++ {0x110a4,0x5}, ++ {0x110a5,0x2}, ++ {0x110a6,0x7}, ++ {0x110a7,0x6}, ++ {0x120a0,0x0}, ++ {0x120a1,0x1}, ++ {0x120a2,0x3}, ++ {0x120a3,0x2}, ++ {0x120a4,0x5}, ++ {0x120a5,0x4}, ++ {0x120a6,0x7}, ++ {0x120a7,0x6}, ++ {0x130a0,0x0}, ++ {0x130a1,0x1}, ++ {0x130a2,0x2}, ++ {0x130a3,0x3}, ++ {0x130a4,0x4}, ++ {0x130a5,0x5}, ++ {0x130a6,0x6}, ++ {0x130a7,0x7}, ++ {0x1005f,0x1ff}, ++ {0x1015f,0x1ff}, ++ {0x1105f,0x1ff}, ++ {0x1115f,0x1ff}, ++ {0x1205f,0x1ff}, ++ {0x1215f,0x1ff}, ++ {0x1305f,0x1ff}, ++ {0x1315f,0x1ff}, ++ {0x11005f,0x1ff}, ++ {0x11015f,0x1ff}, ++ {0x11105f,0x1ff}, ++ {0x11115f,0x1ff}, ++ {0x11205f,0x1ff}, ++ {0x11215f,0x1ff}, ++ {0x11305f,0x1ff}, ++ {0x11315f,0x1ff}, ++ {0x21005f,0x1ff}, ++ {0x21015f,0x1ff}, ++ {0x21105f,0x1ff}, ++ {0x21115f,0x1ff}, ++ {0x21205f,0x1ff}, ++ {0x21215f,0x1ff}, ++ {0x21305f,0x1ff}, ++ {0x21315f,0x1ff}, ++ {0x55,0x1ff}, ++ {0x1055,0x1ff}, ++ {0x2055,0x1ff}, ++ {0x3055,0x1ff}, ++ {0x4055,0x1ff}, ++ {0x5055,0x1ff}, ++ {0x6055,0x1ff}, ++ {0x7055,0x1ff}, ++ {0x8055,0x1ff}, ++ {0x9055,0x1ff}, ++ {0x200c5,0xa}, ++ {0x1200c5,0x7}, ++ {0x2200c5,0x7}, ++ {0x2002e,0x2}, ++ {0x12002e,0x2}, ++ {0x22002e,0x2}, ++ {0x90204,0x0}, ++ {0x190204,0x0}, ++ {0x290204,0x0}, ++ {0x20024,0x1ab}, ++ {0x2003a,0x0}, ++ {0x120024,0x1ab}, ++ {0x2003a,0x0}, ++ {0x220024,0x1ab}, ++ {0x2003a,0x0}, ++ {0x20056,0x2}, ++ {0x120056,0xa}, ++ {0x220056,0xa}, ++ {0x1004d,0xe00}, ++ {0x1014d,0xe00}, ++ {0x1104d,0xe00}, ++ {0x1114d,0xe00}, ++ {0x1204d,0xe00}, ++ {0x1214d,0xe00}, ++ {0x1304d,0xe00}, ++ {0x1314d,0xe00}, ++ {0x11004d,0xe00}, ++ {0x11014d,0xe00}, ++ {0x11104d,0xe00}, ++ {0x11114d,0xe00}, ++ {0x11204d,0xe00}, ++ {0x11214d,0xe00}, ++ {0x11304d,0xe00}, ++ {0x11314d,0xe00}, ++ {0x21004d,0xe00}, ++ {0x21014d,0xe00}, ++ {0x21104d,0xe00}, ++ {0x21114d,0xe00}, ++ {0x21204d,0xe00}, ++ {0x21214d,0xe00}, ++ {0x21304d,0xe00}, ++ {0x21314d,0xe00}, ++ {0x10049,0xeba}, ++ {0x10149,0xeba}, ++ {0x11049,0xeba}, ++ {0x11149,0xeba}, ++ {0x12049,0xeba}, ++ {0x12149,0xeba}, ++ {0x13049,0xeba}, ++ {0x13149,0xeba}, ++ {0x110049,0xeba}, ++ {0x110149,0xeba}, ++ {0x111049,0xeba}, ++ {0x111149,0xeba}, ++ {0x112049,0xeba}, ++ {0x112149,0xeba}, ++ {0x113049,0xeba}, ++ {0x113149,0xeba}, ++ {0x210049,0xeba}, ++ {0x210149,0xeba}, ++ {0x211049,0xeba}, ++ {0x211149,0xeba}, ++ {0x212049,0xeba}, ++ {0x212149,0xeba}, ++ {0x213049,0xeba}, ++ {0x213149,0xeba}, ++ {0x43,0x63}, ++ {0x1043,0x63}, ++ {0x2043,0x63}, ++ {0x3043,0x63}, ++ {0x4043,0x63}, ++ {0x5043,0x63}, ++ {0x6043,0x63}, ++ {0x7043,0x63}, ++ {0x8043,0x63}, ++ {0x9043,0x63}, ++ {0x20018,0x3}, ++ {0x20075,0x4}, ++ {0x20050,0x0}, ++ {0x20008,0x258}, ++ {0x120008,0x64}, ++ {0x220008,0x19}, ++ {0x20088,0x9}, ++ {0x200b2,0xdc}, ++ {0x10043,0x5a1}, ++ {0x10143,0x5a1}, ++ {0x11043,0x5a1}, ++ {0x11143,0x5a1}, ++ {0x12043,0x5a1}, ++ {0x12143,0x5a1}, ++ {0x13043,0x5a1}, ++ {0x13143,0x5a1}, ++ {0x1200b2,0xdc}, ++ {0x110043,0x5a1}, ++ {0x110143,0x5a1}, ++ {0x111043,0x5a1}, ++ {0x111143,0x5a1}, ++ {0x112043,0x5a1}, ++ {0x112143,0x5a1}, ++ {0x113043,0x5a1}, ++ {0x113143,0x5a1}, ++ {0x2200b2,0xdc}, ++ {0x210043,0x5a1}, ++ {0x210143,0x5a1}, ++ {0x211043,0x5a1}, ++ {0x211143,0x5a1}, ++ {0x212043,0x5a1}, ++ {0x212143,0x5a1}, ++ {0x213043,0x5a1}, ++ {0x213143,0x5a1}, ++ {0x200fa,0x1}, ++ {0x1200fa,0x1}, ++ {0x2200fa,0x1}, ++ {0x20019,0x1}, ++ {0x120019,0x1}, ++ {0x220019,0x1}, ++ {0x200f0,0x660}, ++ {0x200f1,0x0}, ++ {0x200f2,0x4444}, ++ {0x200f3,0x8888}, ++ {0x200f4,0x5665}, ++ {0x200f5,0x0}, ++ {0x200f6,0x0}, ++ {0x200f7,0xf000}, ++ {0x20025,0x0}, ++ {0x2002d,0x0}, ++ {0x12002d,0x0}, ++ {0x22002d,0x0}, ++ {0x200c7,0x21}, ++ {0x1200c7,0x21}, ++ {0x2200c7,0x21}, ++ {0x200ca,0x24}, ++ {0x1200ca,0x24}, ++ {0x2200ca,0x24}, ++}; ++ ++/* ddr phy trained csr */ ++static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { ++ { 0x200b2, 0x0 }, ++ { 0x1200b2, 0x0 }, ++ { 0x2200b2, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, ++ { 0x110043, 0x0 }, ++ { 0x210043, 0x0 }, ++ { 0x10143, 0x0 }, ++ { 0x110143, 0x0 }, ++ { 0x210143, 0x0 }, ++ { 0x11043, 0x0 }, ++ { 0x111043, 0x0 }, ++ { 0x211043, 0x0 }, ++ { 0x11143, 0x0 }, ++ { 0x111143, 0x0 }, ++ { 0x211143, 0x0 }, ++ { 0x12043, 0x0 }, ++ { 0x112043, 0x0 }, ++ { 0x212043, 0x0 }, ++ { 0x12143, 0x0 }, ++ { 0x112143, 0x0 }, ++ { 0x212143, 0x0 }, ++ { 0x13043, 0x0 }, ++ { 0x113043, 0x0 }, ++ { 0x213043, 0x0 }, ++ { 0x13143, 0x0 }, ++ { 0x113143, 0x0 }, ++ { 0x213143, 0x0 }, ++ { 0x80, 0x0 }, ++ { 0x100080, 0x0 }, ++ { 0x200080, 0x0 }, ++ { 0x1080, 0x0 }, ++ { 0x101080, 0x0 }, ++ { 0x201080, 0x0 }, ++ { 0x2080, 0x0 }, ++ { 0x102080, 0x0 }, ++ { 0x202080, 0x0 }, ++ { 0x3080, 0x0 }, ++ { 0x103080, 0x0 }, ++ { 0x203080, 0x0 }, ++ { 0x4080, 0x0 }, ++ { 0x104080, 0x0 }, ++ { 0x204080, 0x0 }, ++ { 0x5080, 0x0 }, ++ { 0x105080, 0x0 }, ++ { 0x205080, 0x0 }, ++ { 0x6080, 0x0 }, ++ { 0x106080, 0x0 }, ++ { 0x206080, 0x0 }, ++ { 0x7080, 0x0 }, ++ { 0x107080, 0x0 }, ++ { 0x207080, 0x0 }, ++ { 0x8080, 0x0 }, ++ { 0x108080, 0x0 }, ++ { 0x208080, 0x0 }, ++ { 0x9080, 0x0 }, ++ { 0x109080, 0x0 }, ++ { 0x209080, 0x0 }, ++ { 0x10080, 0x0 }, ++ { 0x110080, 0x0 }, ++ { 0x210080, 0x0 }, ++ { 0x10180, 0x0 }, ++ { 0x110180, 0x0 }, ++ { 0x210180, 0x0 }, ++ { 0x11080, 0x0 }, ++ { 0x111080, 0x0 }, ++ { 0x211080, 0x0 }, ++ { 0x11180, 0x0 }, ++ { 0x111180, 0x0 }, ++ { 0x211180, 0x0 }, ++ { 0x12080, 0x0 }, ++ { 0x112080, 0x0 }, ++ { 0x212080, 0x0 }, ++ { 0x12180, 0x0 }, ++ { 0x112180, 0x0 }, ++ { 0x212180, 0x0 }, ++ { 0x13080, 0x0 }, ++ { 0x113080, 0x0 }, ++ { 0x213080, 0x0 }, ++ { 0x13180, 0x0 }, ++ { 0x113180, 0x0 }, ++ { 0x213180, 0x0 }, ++ { 0x10081, 0x0 }, ++ { 0x110081, 0x0 }, ++ { 0x210081, 0x0 }, ++ { 0x10181, 0x0 }, ++ { 0x110181, 0x0 }, ++ { 0x210181, 0x0 }, ++ { 0x11081, 0x0 }, ++ { 0x111081, 0x0 }, ++ { 0x211081, 0x0 }, ++ { 0x11181, 0x0 }, ++ { 0x111181, 0x0 }, ++ { 0x211181, 0x0 }, ++ { 0x12081, 0x0 }, ++ { 0x112081, 0x0 }, ++ { 0x212081, 0x0 }, ++ { 0x12181, 0x0 }, ++ { 0x112181, 0x0 }, ++ { 0x212181, 0x0 }, ++ { 0x13081, 0x0 }, ++ { 0x113081, 0x0 }, ++ { 0x213081, 0x0 }, ++ { 0x13181, 0x0 }, ++ { 0x113181, 0x0 }, ++ { 0x213181, 0x0 }, ++ { 0x100d0, 0x0 }, ++ { 0x1100d0, 0x0 }, ++ { 0x2100d0, 0x0 }, ++ { 0x101d0, 0x0 }, ++ { 0x1101d0, 0x0 }, ++ { 0x2101d0, 0x0 }, ++ { 0x110d0, 0x0 }, ++ { 0x1110d0, 0x0 }, ++ { 0x2110d0, 0x0 }, ++ { 0x111d0, 0x0 }, ++ { 0x1111d0, 0x0 }, ++ { 0x2111d0, 0x0 }, ++ { 0x120d0, 0x0 }, ++ { 0x1120d0, 0x0 }, ++ { 0x2120d0, 0x0 }, ++ { 0x121d0, 0x0 }, ++ { 0x1121d0, 0x0 }, ++ { 0x2121d0, 0x0 }, ++ { 0x130d0, 0x0 }, ++ { 0x1130d0, 0x0 }, ++ { 0x2130d0, 0x0 }, ++ { 0x131d0, 0x0 }, ++ { 0x1131d0, 0x0 }, ++ { 0x2131d0, 0x0 }, ++ { 0x100d1, 0x0 }, ++ { 0x1100d1, 0x0 }, ++ { 0x2100d1, 0x0 }, ++ { 0x101d1, 0x0 }, ++ { 0x1101d1, 0x0 }, ++ { 0x2101d1, 0x0 }, ++ { 0x110d1, 0x0 }, ++ { 0x1110d1, 0x0 }, ++ { 0x2110d1, 0x0 }, ++ { 0x111d1, 0x0 }, ++ { 0x1111d1, 0x0 }, ++ { 0x2111d1, 0x0 }, ++ { 0x120d1, 0x0 }, ++ { 0x1120d1, 0x0 }, ++ { 0x2120d1, 0x0 }, ++ { 0x121d1, 0x0 }, ++ { 0x1121d1, 0x0 }, ++ { 0x2121d1, 0x0 }, ++ { 0x130d1, 0x0 }, ++ { 0x1130d1, 0x0 }, ++ { 0x2130d1, 0x0 }, ++ { 0x131d1, 0x0 }, ++ { 0x1131d1, 0x0 }, ++ { 0x2131d1, 0x0 }, ++ { 0x10068, 0x0 }, ++ { 0x10168, 0x0 }, ++ { 0x10268, 0x0 }, ++ { 0x10368, 0x0 }, ++ { 0x10468, 0x0 }, ++ { 0x10568, 0x0 }, ++ { 0x10668, 0x0 }, ++ { 0x10768, 0x0 }, ++ { 0x10868, 0x0 }, ++ { 0x11068, 0x0 }, ++ { 0x11168, 0x0 }, ++ { 0x11268, 0x0 }, ++ { 0x11368, 0x0 }, ++ { 0x11468, 0x0 }, ++ { 0x11568, 0x0 }, ++ { 0x11668, 0x0 }, ++ { 0x11768, 0x0 }, ++ { 0x11868, 0x0 }, ++ { 0x12068, 0x0 }, ++ { 0x12168, 0x0 }, ++ { 0x12268, 0x0 }, ++ { 0x12368, 0x0 }, ++ { 0x12468, 0x0 }, ++ { 0x12568, 0x0 }, ++ { 0x12668, 0x0 }, ++ { 0x12768, 0x0 }, ++ { 0x12868, 0x0 }, ++ { 0x13068, 0x0 }, ++ { 0x13168, 0x0 }, ++ { 0x13268, 0x0 }, ++ { 0x13368, 0x0 }, ++ { 0x13468, 0x0 }, ++ { 0x13568, 0x0 }, ++ { 0x13668, 0x0 }, ++ { 0x13768, 0x0 }, ++ { 0x13868, 0x0 }, ++ { 0x10069, 0x0 }, ++ { 0x10169, 0x0 }, ++ { 0x10269, 0x0 }, ++ { 0x10369, 0x0 }, ++ { 0x10469, 0x0 }, ++ { 0x10569, 0x0 }, ++ { 0x10669, 0x0 }, ++ { 0x10769, 0x0 }, ++ { 0x10869, 0x0 }, ++ { 0x11069, 0x0 }, ++ { 0x11169, 0x0 }, ++ { 0x11269, 0x0 }, ++ { 0x11369, 0x0 }, ++ { 0x11469, 0x0 }, ++ { 0x11569, 0x0 }, ++ { 0x11669, 0x0 }, ++ { 0x11769, 0x0 }, ++ { 0x11869, 0x0 }, ++ { 0x12069, 0x0 }, ++ { 0x12169, 0x0 }, ++ { 0x12269, 0x0 }, ++ { 0x12369, 0x0 }, ++ { 0x12469, 0x0 }, ++ { 0x12569, 0x0 }, ++ { 0x12669, 0x0 }, ++ { 0x12769, 0x0 }, ++ { 0x12869, 0x0 }, ++ { 0x13069, 0x0 }, ++ { 0x13169, 0x0 }, ++ { 0x13269, 0x0 }, ++ { 0x13369, 0x0 }, ++ { 0x13469, 0x0 }, ++ { 0x13569, 0x0 }, ++ { 0x13669, 0x0 }, ++ { 0x13769, 0x0 }, ++ { 0x13869, 0x0 }, ++ { 0x1008c, 0x0 }, ++ { 0x11008c, 0x0 }, ++ { 0x21008c, 0x0 }, ++ { 0x1018c, 0x0 }, ++ { 0x11018c, 0x0 }, ++ { 0x21018c, 0x0 }, ++ { 0x1108c, 0x0 }, ++ { 0x11108c, 0x0 }, ++ { 0x21108c, 0x0 }, ++ { 0x1118c, 0x0 }, ++ { 0x11118c, 0x0 }, ++ { 0x21118c, 0x0 }, ++ { 0x1208c, 0x0 }, ++ { 0x11208c, 0x0 }, ++ { 0x21208c, 0x0 }, ++ { 0x1218c, 0x0 }, ++ { 0x11218c, 0x0 }, ++ { 0x21218c, 0x0 }, ++ { 0x1308c, 0x0 }, ++ { 0x11308c, 0x0 }, ++ { 0x21308c, 0x0 }, ++ { 0x1318c, 0x0 }, ++ { 0x11318c, 0x0 }, ++ { 0x21318c, 0x0 }, ++ { 0x1008d, 0x0 }, ++ { 0x11008d, 0x0 }, ++ { 0x21008d, 0x0 }, ++ { 0x1018d, 0x0 }, ++ { 0x11018d, 0x0 }, ++ { 0x21018d, 0x0 }, ++ { 0x1108d, 0x0 }, ++ { 0x11108d, 0x0 }, ++ { 0x21108d, 0x0 }, ++ { 0x1118d, 0x0 }, ++ { 0x11118d, 0x0 }, ++ { 0x21118d, 0x0 }, ++ { 0x1208d, 0x0 }, ++ { 0x11208d, 0x0 }, ++ { 0x21208d, 0x0 }, ++ { 0x1218d, 0x0 }, ++ { 0x11218d, 0x0 }, ++ { 0x21218d, 0x0 }, ++ { 0x1308d, 0x0 }, ++ { 0x11308d, 0x0 }, ++ { 0x21308d, 0x0 }, ++ { 0x1318d, 0x0 }, ++ { 0x11318d, 0x0 }, ++ { 0x21318d, 0x0 }, ++ { 0x100c0, 0x0 }, ++ { 0x1100c0, 0x0 }, ++ { 0x2100c0, 0x0 }, ++ { 0x101c0, 0x0 }, ++ { 0x1101c0, 0x0 }, ++ { 0x2101c0, 0x0 }, ++ { 0x102c0, 0x0 }, ++ { 0x1102c0, 0x0 }, ++ { 0x2102c0, 0x0 }, ++ { 0x103c0, 0x0 }, ++ { 0x1103c0, 0x0 }, ++ { 0x2103c0, 0x0 }, ++ { 0x104c0, 0x0 }, ++ { 0x1104c0, 0x0 }, ++ { 0x2104c0, 0x0 }, ++ { 0x105c0, 0x0 }, ++ { 0x1105c0, 0x0 }, ++ { 0x2105c0, 0x0 }, ++ { 0x106c0, 0x0 }, ++ { 0x1106c0, 0x0 }, ++ { 0x2106c0, 0x0 }, ++ { 0x107c0, 0x0 }, ++ { 0x1107c0, 0x0 }, ++ { 0x2107c0, 0x0 }, ++ { 0x108c0, 0x0 }, ++ { 0x1108c0, 0x0 }, ++ { 0x2108c0, 0x0 }, ++ { 0x110c0, 0x0 }, ++ { 0x1110c0, 0x0 }, ++ { 0x2110c0, 0x0 }, ++ { 0x111c0, 0x0 }, ++ { 0x1111c0, 0x0 }, ++ { 0x2111c0, 0x0 }, ++ { 0x112c0, 0x0 }, ++ { 0x1112c0, 0x0 }, ++ { 0x2112c0, 0x0 }, ++ { 0x113c0, 0x0 }, ++ { 0x1113c0, 0x0 }, ++ { 0x2113c0, 0x0 }, ++ { 0x114c0, 0x0 }, ++ { 0x1114c0, 0x0 }, ++ { 0x2114c0, 0x0 }, ++ { 0x115c0, 0x0 }, ++ { 0x1115c0, 0x0 }, ++ { 0x2115c0, 0x0 }, ++ { 0x116c0, 0x0 }, ++ { 0x1116c0, 0x0 }, ++ { 0x2116c0, 0x0 }, ++ { 0x117c0, 0x0 }, ++ { 0x1117c0, 0x0 }, ++ { 0x2117c0, 0x0 }, ++ { 0x118c0, 0x0 }, ++ { 0x1118c0, 0x0 }, ++ { 0x2118c0, 0x0 }, ++ { 0x120c0, 0x0 }, ++ { 0x1120c0, 0x0 }, ++ { 0x2120c0, 0x0 }, ++ { 0x121c0, 0x0 }, ++ { 0x1121c0, 0x0 }, ++ { 0x2121c0, 0x0 }, ++ { 0x122c0, 0x0 }, ++ { 0x1122c0, 0x0 }, ++ { 0x2122c0, 0x0 }, ++ { 0x123c0, 0x0 }, ++ { 0x1123c0, 0x0 }, ++ { 0x2123c0, 0x0 }, ++ { 0x124c0, 0x0 }, ++ { 0x1124c0, 0x0 }, ++ { 0x2124c0, 0x0 }, ++ { 0x125c0, 0x0 }, ++ { 0x1125c0, 0x0 }, ++ { 0x2125c0, 0x0 }, ++ { 0x126c0, 0x0 }, ++ { 0x1126c0, 0x0 }, ++ { 0x2126c0, 0x0 }, ++ { 0x127c0, 0x0 }, ++ { 0x1127c0, 0x0 }, ++ { 0x2127c0, 0x0 }, ++ { 0x128c0, 0x0 }, ++ { 0x1128c0, 0x0 }, ++ { 0x2128c0, 0x0 }, ++ { 0x130c0, 0x0 }, ++ { 0x1130c0, 0x0 }, ++ { 0x2130c0, 0x0 }, ++ { 0x131c0, 0x0 }, ++ { 0x1131c0, 0x0 }, ++ { 0x2131c0, 0x0 }, ++ { 0x132c0, 0x0 }, ++ { 0x1132c0, 0x0 }, ++ { 0x2132c0, 0x0 }, ++ { 0x133c0, 0x0 }, ++ { 0x1133c0, 0x0 }, ++ { 0x2133c0, 0x0 }, ++ { 0x134c0, 0x0 }, ++ { 0x1134c0, 0x0 }, ++ { 0x2134c0, 0x0 }, ++ { 0x135c0, 0x0 }, ++ { 0x1135c0, 0x0 }, ++ { 0x2135c0, 0x0 }, ++ { 0x136c0, 0x0 }, ++ { 0x1136c0, 0x0 }, ++ { 0x2136c0, 0x0 }, ++ { 0x137c0, 0x0 }, ++ { 0x1137c0, 0x0 }, ++ { 0x2137c0, 0x0 }, ++ { 0x138c0, 0x0 }, ++ { 0x1138c0, 0x0 }, ++ { 0x2138c0, 0x0 }, ++ { 0x100c1, 0x0 }, ++ { 0x1100c1, 0x0 }, ++ { 0x2100c1, 0x0 }, ++ { 0x101c1, 0x0 }, ++ { 0x1101c1, 0x0 }, ++ { 0x2101c1, 0x0 }, ++ { 0x102c1, 0x0 }, ++ { 0x1102c1, 0x0 }, ++ { 0x2102c1, 0x0 }, ++ { 0x103c1, 0x0 }, ++ { 0x1103c1, 0x0 }, ++ { 0x2103c1, 0x0 }, ++ { 0x104c1, 0x0 }, ++ { 0x1104c1, 0x0 }, ++ { 0x2104c1, 0x0 }, ++ { 0x105c1, 0x0 }, ++ { 0x1105c1, 0x0 }, ++ { 0x2105c1, 0x0 }, ++ { 0x106c1, 0x0 }, ++ { 0x1106c1, 0x0 }, ++ { 0x2106c1, 0x0 }, ++ { 0x107c1, 0x0 }, ++ { 0x1107c1, 0x0 }, ++ { 0x2107c1, 0x0 }, ++ { 0x108c1, 0x0 }, ++ { 0x1108c1, 0x0 }, ++ { 0x2108c1, 0x0 }, ++ { 0x110c1, 0x0 }, ++ { 0x1110c1, 0x0 }, ++ { 0x2110c1, 0x0 }, ++ { 0x111c1, 0x0 }, ++ { 0x1111c1, 0x0 }, ++ { 0x2111c1, 0x0 }, ++ { 0x112c1, 0x0 }, ++ { 0x1112c1, 0x0 }, ++ { 0x2112c1, 0x0 }, ++ { 0x113c1, 0x0 }, ++ { 0x1113c1, 0x0 }, ++ { 0x2113c1, 0x0 }, ++ { 0x114c1, 0x0 }, ++ { 0x1114c1, 0x0 }, ++ { 0x2114c1, 0x0 }, ++ { 0x115c1, 0x0 }, ++ { 0x1115c1, 0x0 }, ++ { 0x2115c1, 0x0 }, ++ { 0x116c1, 0x0 }, ++ { 0x1116c1, 0x0 }, ++ { 0x2116c1, 0x0 }, ++ { 0x117c1, 0x0 }, ++ { 0x1117c1, 0x0 }, ++ { 0x2117c1, 0x0 }, ++ { 0x118c1, 0x0 }, ++ { 0x1118c1, 0x0 }, ++ { 0x2118c1, 0x0 }, ++ { 0x120c1, 0x0 }, ++ { 0x1120c1, 0x0 }, ++ { 0x2120c1, 0x0 }, ++ { 0x121c1, 0x0 }, ++ { 0x1121c1, 0x0 }, ++ { 0x2121c1, 0x0 }, ++ { 0x122c1, 0x0 }, ++ { 0x1122c1, 0x0 }, ++ { 0x2122c1, 0x0 }, ++ { 0x123c1, 0x0 }, ++ { 0x1123c1, 0x0 }, ++ { 0x2123c1, 0x0 }, ++ { 0x124c1, 0x0 }, ++ { 0x1124c1, 0x0 }, ++ { 0x2124c1, 0x0 }, ++ { 0x125c1, 0x0 }, ++ { 0x1125c1, 0x0 }, ++ { 0x2125c1, 0x0 }, ++ { 0x126c1, 0x0 }, ++ { 0x1126c1, 0x0 }, ++ { 0x2126c1, 0x0 }, ++ { 0x127c1, 0x0 }, ++ { 0x1127c1, 0x0 }, ++ { 0x2127c1, 0x0 }, ++ { 0x128c1, 0x0 }, ++ { 0x1128c1, 0x0 }, ++ { 0x2128c1, 0x0 }, ++ { 0x130c1, 0x0 }, ++ { 0x1130c1, 0x0 }, ++ { 0x2130c1, 0x0 }, ++ { 0x131c1, 0x0 }, ++ { 0x1131c1, 0x0 }, ++ { 0x2131c1, 0x0 }, ++ { 0x132c1, 0x0 }, ++ { 0x1132c1, 0x0 }, ++ { 0x2132c1, 0x0 }, ++ { 0x133c1, 0x0 }, ++ { 0x1133c1, 0x0 }, ++ { 0x2133c1, 0x0 }, ++ { 0x134c1, 0x0 }, ++ { 0x1134c1, 0x0 }, ++ { 0x2134c1, 0x0 }, ++ { 0x135c1, 0x0 }, ++ { 0x1135c1, 0x0 }, ++ { 0x2135c1, 0x0 }, ++ { 0x136c1, 0x0 }, ++ { 0x1136c1, 0x0 }, ++ { 0x2136c1, 0x0 }, ++ { 0x137c1, 0x0 }, ++ { 0x1137c1, 0x0 }, ++ { 0x2137c1, 0x0 }, ++ { 0x138c1, 0x0 }, ++ { 0x1138c1, 0x0 }, ++ { 0x2138c1, 0x0 }, ++ { 0x10020, 0x0 }, ++ { 0x110020, 0x0 }, ++ { 0x210020, 0x0 }, ++ { 0x11020, 0x0 }, ++ { 0x111020, 0x0 }, ++ { 0x211020, 0x0 }, ++ { 0x12020, 0x0 }, ++ { 0x112020, 0x0 }, ++ { 0x212020, 0x0 }, ++ { 0x13020, 0x0 }, ++ { 0x113020, 0x0 }, ++ { 0x213020, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, ++ { 0x120010, 0x0 }, ++ { 0x220010, 0x0 }, ++ { 0x20011, 0x0 }, ++ { 0x120011, 0x0 }, ++ { 0x220011, 0x0 }, ++ { 0x100ae, 0x0 }, ++ { 0x1100ae, 0x0 }, ++ { 0x2100ae, 0x0 }, ++ { 0x100af, 0x0 }, ++ { 0x1100af, 0x0 }, ++ { 0x2100af, 0x0 }, ++ { 0x110ae, 0x0 }, ++ { 0x1110ae, 0x0 }, ++ { 0x2110ae, 0x0 }, ++ { 0x110af, 0x0 }, ++ { 0x1110af, 0x0 }, ++ { 0x2110af, 0x0 }, ++ { 0x120ae, 0x0 }, ++ { 0x1120ae, 0x0 }, ++ { 0x2120ae, 0x0 }, ++ { 0x120af, 0x0 }, ++ { 0x1120af, 0x0 }, ++ { 0x2120af, 0x0 }, ++ { 0x130ae, 0x0 }, ++ { 0x1130ae, 0x0 }, ++ { 0x2130ae, 0x0 }, ++ { 0x130af, 0x0 }, ++ { 0x1130af, 0x0 }, ++ { 0x2130af, 0x0 }, ++ { 0x20020, 0x0 }, ++ { 0x120020, 0x0 }, ++ { 0x220020, 0x0 }, ++ { 0x100a0, 0x0 }, ++ { 0x100a1, 0x0 }, ++ { 0x100a2, 0x0 }, ++ { 0x100a3, 0x0 }, ++ { 0x100a4, 0x0 }, ++ { 0x100a5, 0x0 }, ++ { 0x100a6, 0x0 }, ++ { 0x100a7, 0x0 }, ++ { 0x110a0, 0x0 }, ++ { 0x110a1, 0x0 }, ++ { 0x110a2, 0x0 }, ++ { 0x110a3, 0x0 }, ++ { 0x110a4, 0x0 }, ++ { 0x110a5, 0x0 }, ++ { 0x110a6, 0x0 }, ++ { 0x110a7, 0x0 }, ++ { 0x120a0, 0x0 }, ++ { 0x120a1, 0x0 }, ++ { 0x120a2, 0x0 }, ++ { 0x120a3, 0x0 }, ++ { 0x120a4, 0x0 }, ++ { 0x120a5, 0x0 }, ++ { 0x120a6, 0x0 }, ++ { 0x120a7, 0x0 }, ++ { 0x130a0, 0x0 }, ++ { 0x130a1, 0x0 }, ++ { 0x130a2, 0x0 }, ++ { 0x130a3, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, ++ { 0x12007c, 0x0 }, ++ { 0x22007c, 0x0 }, ++ { 0x2007d, 0x0 }, ++ { 0x12007d, 0x0 }, ++ { 0x22007d, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, ++ { 0x190201, 0x0 }, ++ { 0x290201, 0x0 }, ++ { 0x90202, 0x0 }, ++ { 0x190202, 0x0 }, ++ { 0x290202, 0x0 }, ++ { 0x90203, 0x0 }, ++ { 0x190203, 0x0 }, ++ { 0x290203, 0x0 }, ++ { 0x90204, 0x0 }, ++ { 0x190204, 0x0 }, ++ { 0x290204, 0x0 }, ++ { 0x90205, 0x0 }, ++ { 0x190205, 0x0 }, ++ { 0x290205, 0x0 }, ++ { 0x90206, 0x0 }, ++ { 0x190206, 0x0 }, ++ { 0x290206, 0x0 }, ++ { 0x90207, 0x0 }, ++ { 0x190207, 0x0 }, ++ { 0x290207, 0x0 }, ++ { 0x90208, 0x0 }, ++ { 0x190208, 0x0 }, ++ { 0x290208, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, ++ { 0x11662, 0x0 }, ++ { 0x11762, 0x0 }, ++ { 0x11862, 0x0 }, ++ { 0x12062, 0x0 }, ++ { 0x12162, 0x0 }, ++ { 0x12262, 0x0 }, ++ { 0x12362, 0x0 }, ++ { 0x12462, 0x0 }, ++ { 0x12562, 0x0 }, ++ { 0x12662, 0x0 }, ++ { 0x12762, 0x0 }, ++ { 0x12862, 0x0 }, ++ { 0x13062, 0x0 }, ++ { 0x13162, 0x0 }, ++ { 0x13262, 0x0 }, ++ { 0x13362, 0x0 }, ++ { 0x13462, 0x0 }, ++ { 0x13562, 0x0 }, ++ { 0x13662, 0x0 }, ++ { 0x13762, 0x0 }, ++ { 0x13862, 0x0 }, ++ { 0x20077, 0x0 }, ++ { 0x10001, 0x0 }, ++ { 0x11001, 0x0 }, ++ { 0x12001, 0x0 }, ++ { 0x13001, 0x0 }, ++ { 0x10040, 0x0 }, ++ { 0x10140, 0x0 }, ++ { 0x10240, 0x0 }, ++ { 0x10340, 0x0 }, ++ { 0x10440, 0x0 }, ++ { 0x10540, 0x0 }, ++ { 0x10640, 0x0 }, ++ { 0x10740, 0x0 }, ++ { 0x10840, 0x0 }, ++ { 0x10030, 0x0 }, ++ { 0x10130, 0x0 }, ++ { 0x10230, 0x0 }, ++ { 0x10330, 0x0 }, ++ { 0x10430, 0x0 }, ++ { 0x10530, 0x0 }, ++ { 0x10630, 0x0 }, ++ { 0x10730, 0x0 }, ++ { 0x10830, 0x0 }, ++ { 0x11040, 0x0 }, ++ { 0x11140, 0x0 }, ++ { 0x11240, 0x0 }, ++ { 0x11340, 0x0 }, ++ { 0x11440, 0x0 }, ++ { 0x11540, 0x0 }, ++ { 0x11640, 0x0 }, ++ { 0x11740, 0x0 }, ++ { 0x11840, 0x0 }, ++ { 0x11030, 0x0 }, ++ { 0x11130, 0x0 }, ++ { 0x11230, 0x0 }, ++ { 0x11330, 0x0 }, ++ { 0x11430, 0x0 }, ++ { 0x11530, 0x0 }, ++ { 0x11630, 0x0 }, ++ { 0x11730, 0x0 }, ++ { 0x11830, 0x0 }, ++ { 0x12040, 0x0 }, ++ { 0x12140, 0x0 }, ++ { 0x12240, 0x0 }, ++ { 0x12340, 0x0 }, ++ { 0x12440, 0x0 }, ++ { 0x12540, 0x0 }, ++ { 0x12640, 0x0 }, ++ { 0x12740, 0x0 }, ++ { 0x12840, 0x0 }, ++ { 0x12030, 0x0 }, ++ { 0x12130, 0x0 }, ++ { 0x12230, 0x0 }, ++ { 0x12330, 0x0 }, ++ { 0x12430, 0x0 }, ++ { 0x12530, 0x0 }, ++ { 0x12630, 0x0 }, ++ { 0x12730, 0x0 }, ++ { 0x12830, 0x0 }, ++ { 0x13040, 0x0 }, ++ { 0x13140, 0x0 }, ++ { 0x13240, 0x0 }, ++ { 0x13340, 0x0 }, ++ { 0x13440, 0x0 }, ++ { 0x13540, 0x0 }, ++ { 0x13640, 0x0 }, ++ { 0x13740, 0x0 }, ++ { 0x13840, 0x0 }, ++ { 0x13030, 0x0 }, ++ { 0x13130, 0x0 }, ++ { 0x13230, 0x0 }, ++ { 0x13330, 0x0 }, ++ { 0x13430, 0x0 }, ++ { 0x13530, 0x0 }, ++ { 0x13630, 0x0 }, ++ { 0x13730, 0x0 }, ++ { 0x13830, 0x0 }, ++}; ++/* P0 message block paremeter for training firmware */ ++static struct dram_cfg_param ddr_fsp0_cfg[] = { ++ {0xd0000, 0x0}, ++ {0x54003,0x960}, ++ {0x54004,0x2}, ++ {0x54005,0x2228}, ++ {0x54006,0x11}, ++ {0x54008,0x131f}, ++ {0x54009,0xc8}, ++ {0x5400b,0x2}, ++ {0x5400d,0x100}, ++ {0x54012,0x110}, ++ {0x54019,0x24c4}, ++ {0x5401a,0x31}, ++ {0x5401b,0x4d66}, ++ {0x5401c,0x4d00}, ++ {0x5401e,0x16}, ++ {0x5401f,0x24c4}, ++ {0x54020,0x31}, ++ {0x54021,0x4d66}, ++ {0x54022,0x4d00}, ++ {0x54024,0x16}, ++ {0x5402b,0x1000}, ++ {0x5402c,0x1}, ++ {0x54032,0xc400}, ++ {0x54033,0x3124}, ++ {0x54034,0x6600}, ++ {0x54035,0x4d}, ++ {0x54036,0x4d}, ++ {0x54037,0x1600}, ++ {0x54038,0xc400}, ++ {0x54039,0x3124}, ++ {0x5403a,0x6600}, ++ {0x5403b,0x4d}, ++ {0x5403c,0x4d}, ++ {0x5403d,0x1600}, ++ {0xd0000, 0x1}, ++}; ++ ++ ++/* P1 message block paremeter for training firmware */ ++static struct dram_cfg_param ddr_fsp1_cfg[] = { ++ {0xd0000, 0x0}, ++ {0x54002,0x101}, ++ {0x54003,0x190}, ++ {0x54004,0x2}, ++ {0x54005,0x2228}, ++ {0x54006,0x11}, ++ {0x54008,0x121f}, ++ {0x54009,0xc8}, ++ {0x5400b,0x2}, ++ {0x5400d,0x100}, ++ {0x54012,0x110}, ++ {0x54019,0x84}, ++ {0x5401a,0x31}, ++ {0x5401b,0x4d66}, ++ {0x5401c,0x4d00}, ++ {0x5401e,0x16}, ++ {0x5401f,0x84}, ++ {0x54020,0x31}, ++ {0x54021,0x4d66}, ++ {0x54022,0x4d00}, ++ {0x54024,0x16}, ++ {0x5402b,0x1000}, ++ {0x5402c,0x1}, ++ {0x54032,0x8400}, ++ {0x54033,0x3100}, ++ {0x54034,0x6600}, ++ {0x54035,0x4d}, ++ {0x54036,0x4d}, ++ {0x54037,0x1600}, ++ {0x54038,0x8400}, ++ {0x54039,0x3100}, ++ {0x5403a,0x6600}, ++ {0x5403b,0x4d}, ++ {0x5403c,0x4d}, ++ {0x5403d,0x1600}, ++ {0xd0000, 0x1}, ++}; ++ ++ ++/* P2 message block paremeter for training firmware */ ++static struct dram_cfg_param ddr_fsp2_cfg[] = { ++ {0xd0000, 0x0}, ++ {0x54002,0x102}, ++ {0x54003,0x64}, ++ {0x54004,0x2}, ++ {0x54005,0x2228}, ++ {0x54006,0x11}, ++ {0x54008,0x121f}, ++ {0x54009,0xc8}, ++ {0x5400b,0x2}, ++ {0x5400d,0x100}, ++ {0x54012,0x110}, ++ {0x54019,0x84}, ++ {0x5401a,0x31}, ++ {0x5401b,0x4d66}, ++ {0x5401c,0x4d00}, ++ {0x5401e,0x16}, ++ {0x5401f,0x84}, ++ {0x54020,0x31}, ++ {0x54021,0x4d66}, ++ {0x54022,0x4d00}, ++ {0x54024,0x16}, ++ {0x5402b,0x1000}, ++ {0x5402c,0x1}, ++ {0x54032,0x8400}, ++ {0x54033,0x3100}, ++ {0x54034,0x6600}, ++ {0x54035,0x4d}, ++ {0x54036,0x4d}, ++ {0x54037,0x1600}, ++ {0x54038,0x8400}, ++ {0x54039,0x3100}, ++ {0x5403a,0x6600}, ++ {0x5403b,0x4d}, ++ {0x5403c,0x4d}, ++ {0x5403d,0x1600}, ++ {0xd0000, 0x1}, ++}; ++ ++ ++/* P0 2D message block paremeter for training firmware */ ++static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { ++ {0xd0000, 0x0}, ++ {0x54003,0x960}, ++ {0x54004,0x2}, ++ {0x54005,0x2228}, ++ {0x54006,0x11}, ++ {0x54008,0x61}, ++ {0x54009,0xc8}, ++ {0x5400b,0x2}, ++ {0x5400f,0x100}, ++ {0x54010,0x1f7f}, ++ {0x54012,0x110}, ++ {0x54019,0x24c4}, ++ {0x5401a,0x31}, ++ {0x5401b,0x4d66}, ++ {0x5401c,0x4d00}, ++ {0x5401e,0x16}, ++ {0x5401f,0x24c4}, ++ {0x54020,0x31}, ++ {0x54021,0x4d66}, ++ {0x54022,0x4d00}, ++ {0x54024,0x16}, ++ {0x5402b,0x1000}, ++ {0x5402c,0x1}, ++ {0x54032,0xc400}, ++ {0x54033,0x3124}, ++ {0x54034,0x6600}, ++ {0x54035,0x4d}, ++ {0x54036,0x4d}, ++ {0x54037,0x1600}, ++ {0x54038,0xc400}, ++ {0x54039,0x3124}, ++ {0x5403a,0x6600}, ++ {0x5403b,0x4d}, ++ {0x5403c,0x4d}, ++ {0x5403d,0x1600}, ++ { 0xd0000, 0x1 }, ++}; ++ ++/* DRAM PHY init engine image */ ++static struct dram_cfg_param ddr_phy_pie[] = { ++ {0xd0000, 0x0}, ++ {0x90000,0x10}, ++ {0x90001,0x400}, ++ {0x90002,0x10e}, ++ {0x90003,0x0}, ++ {0x90004,0x0}, ++ {0x90005,0x8}, ++ {0x90029,0xb}, ++ {0x9002a,0x480}, ++ {0x9002b,0x109}, ++ {0x9002c,0x8}, ++ {0x9002d,0x448}, ++ {0x9002e,0x139}, ++ {0x9002f,0x8}, ++ {0x90030,0x478}, ++ {0x90031,0x109}, ++ {0x90032,0x0}, ++ {0x90033,0xe8}, ++ {0x90034,0x109}, ++ {0x90035,0x2}, ++ {0x90036,0x10}, ++ {0x90037,0x139}, ++ {0x90038,0xf}, ++ {0x90039,0x7c0}, ++ {0x9003a,0x139}, ++ {0x9003b,0x44}, ++ {0x9003c,0x630}, ++ {0x9003d,0x159}, ++ {0x9003e,0x14f}, ++ {0x9003f,0x630}, ++ {0x90040,0x159}, ++ {0x90041,0x47}, ++ {0x90042,0x630}, ++ {0x90043,0x149}, ++ {0x90044,0x4f}, ++ {0x90045,0x630}, ++ {0x90046,0x179}, ++ {0x90047,0x8}, ++ {0x90048,0xe0}, ++ {0x90049,0x109}, ++ {0x9004a,0x0}, ++ {0x9004b,0x7c8}, ++ {0x9004c,0x109}, ++ {0x9004d,0x0}, ++ {0x9004e,0x1}, ++ {0x9004f,0x8}, ++ {0x90050,0x0}, ++ {0x90051,0x45a}, ++ {0x90052,0x9}, ++ {0x90053,0x0}, ++ {0x90054,0x448}, ++ {0x90055,0x109}, ++ {0x90056,0x40}, ++ {0x90057,0x630}, ++ {0x90058,0x179}, ++ {0x90059,0x1}, ++ {0x9005a,0x618}, ++ {0x9005b,0x109}, ++ {0x9005c,0x40c0}, ++ {0x9005d,0x630}, ++ {0x9005e,0x149}, ++ {0x9005f,0x8}, ++ {0x90060,0x4}, ++ {0x90061,0x48}, ++ {0x90062,0x4040}, ++ {0x90063,0x630}, ++ {0x90064,0x149}, ++ {0x90065,0x0}, ++ {0x90066,0x4}, ++ {0x90067,0x48}, ++ {0x90068,0x40}, ++ {0x90069,0x630}, ++ {0x9006a,0x149}, ++ {0x9006b,0x10}, ++ {0x9006c,0x4}, ++ {0x9006d,0x18}, ++ {0x9006e,0x0}, ++ {0x9006f,0x4}, ++ {0x90070,0x78}, ++ {0x90071,0x549}, ++ {0x90072,0x630}, ++ {0x90073,0x159}, ++ {0x90074,0xd49}, ++ {0x90075,0x630}, ++ {0x90076,0x159}, ++ {0x90077,0x94a}, ++ {0x90078,0x630}, ++ {0x90079,0x159}, ++ {0x9007a,0x441}, ++ {0x9007b,0x630}, ++ {0x9007c,0x149}, ++ {0x9007d,0x42}, ++ {0x9007e,0x630}, ++ {0x9007f,0x149}, ++ {0x90080,0x1}, ++ {0x90081,0x630}, ++ {0x90082,0x149}, ++ {0x90083,0x0}, ++ {0x90084,0xe0}, ++ {0x90085,0x109}, ++ {0x90086,0xa}, ++ {0x90087,0x10}, ++ {0x90088,0x109}, ++ {0x90089,0x9}, ++ {0x9008a,0x3c0}, ++ {0x9008b,0x149}, ++ {0x9008c,0x9}, ++ {0x9008d,0x3c0}, ++ {0x9008e,0x159}, ++ {0x9008f,0x18}, ++ {0x90090,0x10}, ++ {0x90091,0x109}, ++ {0x90092,0x0}, ++ {0x90093,0x3c0}, ++ {0x90094,0x109}, ++ {0x90095,0x18}, ++ {0x90096,0x4}, ++ {0x90097,0x48}, ++ {0x90098,0x18}, ++ {0x90099,0x4}, ++ {0x9009a,0x58}, ++ {0x9009b,0xa}, ++ {0x9009c,0x10}, ++ {0x9009d,0x109}, ++ {0x9009e,0x2}, ++ {0x9009f,0x10}, ++ {0x900a0,0x109}, ++ {0x900a1,0x5}, ++ {0x900a2,0x7c0}, ++ {0x900a3,0x109}, ++ {0x900a4,0x10}, ++ {0x900a5,0x10}, ++ {0x900a6,0x109}, ++ {0x40000,0x811}, ++ {0x40020,0x880}, ++ {0x40040,0x0}, ++ {0x40060,0x0}, ++ {0x40001,0x4008}, ++ {0x40021,0x83}, ++ {0x40041,0x4f}, ++ {0x40061,0x0}, ++ {0x40002,0x4040}, ++ {0x40022,0x83}, ++ {0x40042,0x51}, ++ {0x40062,0x0}, ++ {0x40003,0x811}, ++ {0x40023,0x880}, ++ {0x40043,0x0}, ++ {0x40063,0x0}, ++ {0x40004,0x720}, ++ {0x40024,0xf}, ++ {0x40044,0x1740}, ++ {0x40064,0x0}, ++ {0x40005,0x16}, ++ {0x40025,0x83}, ++ {0x40045,0x4b}, ++ {0x40065,0x0}, ++ {0x40006,0x716}, ++ {0x40026,0xf}, ++ {0x40046,0x2001}, ++ {0x40066,0x0}, ++ {0x40007,0x716}, ++ {0x40027,0xf}, ++ {0x40047,0x2800}, ++ {0x40067,0x0}, ++ {0x40008,0x716}, ++ {0x40028,0xf}, ++ {0x40048,0xf00}, ++ {0x40068,0x0}, ++ {0x40009,0x720}, ++ {0x40029,0xf}, ++ {0x40049,0x1400}, ++ {0x40069,0x0}, ++ {0x4000a,0xe08}, ++ {0x4002a,0xc15}, ++ {0x4004a,0x0}, ++ {0x4006a,0x0}, ++ {0x4000b,0x623}, ++ {0x4002b,0x15}, ++ {0x4004b,0x0}, ++ {0x4006b,0x0}, ++ {0x4000c,0x4028}, ++ {0x4002c,0x80}, ++ {0x4004c,0x0}, ++ {0x4006c,0x0}, ++ {0x4000d,0xe08}, ++ {0x4002d,0xc1a}, ++ {0x4004d,0x0}, ++ {0x4006d,0x0}, ++ {0x4000e,0x623}, ++ {0x4002e,0x1a}, ++ {0x4004e,0x0}, ++ {0x4006e,0x0}, ++ {0x4000f,0x4040}, ++ {0x4002f,0x80}, ++ {0x4004f,0x0}, ++ {0x4006f,0x0}, ++ {0x40010,0x2604}, ++ {0x40030,0x15}, ++ {0x40050,0x0}, ++ {0x40070,0x0}, ++ {0x40011,0x708}, ++ {0x40031,0x5}, ++ {0x40051,0x0}, ++ {0x40071,0x2002}, ++ {0x40012,0x8}, ++ {0x40032,0x80}, ++ {0x40052,0x0}, ++ {0x40072,0x0}, ++ {0x40013,0x2604}, ++ {0x40033,0x1a}, ++ {0x40053,0x0}, ++ {0x40073,0x0}, ++ {0x40014,0x708}, ++ {0x40034,0xa}, ++ {0x40054,0x0}, ++ {0x40074,0x2002}, ++ {0x40015,0x4040}, ++ {0x40035,0x80}, ++ {0x40055,0x0}, ++ {0x40075,0x0}, ++ {0x40016,0x60a}, ++ {0x40036,0x15}, ++ {0x40056,0x1200}, ++ {0x40076,0x0}, ++ {0x40017,0x61a}, ++ {0x40037,0x15}, ++ {0x40057,0x1300}, ++ {0x40077,0x0}, ++ {0x40018,0x60a}, ++ {0x40038,0x1a}, ++ {0x40058,0x1200}, ++ {0x40078,0x0}, ++ {0x40019,0x642}, ++ {0x40039,0x1a}, ++ {0x40059,0x1300}, ++ {0x40079,0x0}, ++ {0x4001a,0x4808}, ++ {0x4003a,0x880}, ++ {0x4005a,0x0}, ++ {0x4007a,0x0}, ++ {0x900a7,0x0}, ++ {0x900a8,0x790}, ++ {0x900a9,0x11a}, ++ {0x900aa,0x8}, ++ {0x900ab,0x7aa}, ++ {0x900ac,0x2a}, ++ {0x900ad,0x10}, ++ {0x900ae,0x7b2}, ++ {0x900af,0x2a}, ++ {0x900b0,0x0}, ++ {0x900b1,0x7c8}, ++ {0x900b2,0x109}, ++ {0x900b3,0x10}, ++ {0x900b4,0x2a8}, ++ {0x900b5,0x129}, ++ {0x900b6,0x8}, ++ {0x900b7,0x370}, ++ {0x900b8,0x129}, ++ {0x900b9,0xa}, ++ {0x900ba,0x3c8}, ++ {0x900bb,0x1a9}, ++ {0x900bc,0xc}, ++ {0x900bd,0x408}, ++ {0x900be,0x199}, ++ {0x900bf,0x14}, ++ {0x900c0,0x790}, ++ {0x900c1,0x11a}, ++ {0x900c2,0x8}, ++ {0x900c3,0x4}, ++ {0x900c4,0x18}, ++ {0x900c5,0xe}, ++ {0x900c6,0x408}, ++ {0x900c7,0x199}, ++ {0x900c8,0x8}, ++ {0x900c9,0x8568}, ++ {0x900ca,0x108}, ++ {0x900cb,0x18}, ++ {0x900cc,0x790}, ++ {0x900cd,0x16a}, ++ {0x900ce,0x8}, ++ {0x900cf,0x1d8}, ++ {0x900d0,0x169}, ++ {0x900d1,0x10}, ++ {0x900d2,0x8558}, ++ {0x900d3,0x168}, ++ {0x900d4,0x70}, ++ {0x900d5,0x788}, ++ {0x900d6,0x16a}, ++ {0x900d7,0x1ff8}, ++ {0x900d8,0x85a8}, ++ {0x900d9,0x1e8}, ++ {0x900da,0x50}, ++ {0x900db,0x798}, ++ {0x900dc,0x16a}, ++ {0x900dd,0x60}, ++ {0x900de,0x7a0}, ++ {0x900df,0x16a}, ++ {0x900e0,0x8}, ++ {0x900e1,0x8310}, ++ {0x900e2,0x168}, ++ {0x900e3,0x8}, ++ {0x900e4,0xa310}, ++ {0x900e5,0x168}, ++ {0x900e6,0xa}, ++ {0x900e7,0x408}, ++ {0x900e8,0x169}, ++ {0x900e9,0x6e}, ++ {0x900ea,0x0}, ++ {0x900eb,0x68}, ++ {0x900ec,0x0}, ++ {0x900ed,0x408}, ++ {0x900ee,0x169}, ++ {0x900ef,0x0}, ++ {0x900f0,0x8310}, ++ {0x900f1,0x168}, ++ {0x900f2,0x0}, ++ {0x900f3,0xa310}, ++ {0x900f4,0x168}, ++ {0x900f5,0x1ff8}, ++ {0x900f6,0x85a8}, ++ {0x900f7,0x1e8}, ++ {0x900f8,0x68}, ++ {0x900f9,0x798}, ++ {0x900fa,0x16a}, ++ {0x900fb,0x78}, ++ {0x900fc,0x7a0}, ++ {0x900fd,0x16a}, ++ {0x900fe,0x68}, ++ {0x900ff,0x790}, ++ {0x90100,0x16a}, ++ {0x90101,0x8}, ++ {0x90102,0x8b10}, ++ {0x90103,0x168}, ++ {0x90104,0x8}, ++ {0x90105,0xab10}, ++ {0x90106,0x168}, ++ {0x90107,0xa}, ++ {0x90108,0x408}, ++ {0x90109,0x169}, ++ {0x9010a,0x58}, ++ {0x9010b,0x0}, ++ {0x9010c,0x68}, ++ {0x9010d,0x0}, ++ {0x9010e,0x408}, ++ {0x9010f,0x169}, ++ {0x90110,0x0}, ++ {0x90111,0x8b10}, ++ {0x90112,0x168}, ++ {0x90113,0x0}, ++ {0x90114,0xab10}, ++ {0x90115,0x168}, ++ {0x90116,0x0}, ++ {0x90117,0x1d8}, ++ {0x90118,0x169}, ++ {0x90119,0x80}, ++ {0x9011a,0x790}, ++ {0x9011b,0x16a}, ++ {0x9011c,0x18}, ++ {0x9011d,0x7aa}, ++ {0x9011e,0x6a}, ++ {0x9011f,0xa}, ++ {0x90120,0x0}, ++ {0x90121,0x1e9}, ++ {0x90122,0x8}, ++ {0x90123,0x8080}, ++ {0x90124,0x108}, ++ {0x90125,0xf}, ++ {0x90126,0x408}, ++ {0x90127,0x169}, ++ {0x90128,0xc}, ++ {0x90129,0x0}, ++ {0x9012a,0x68}, ++ {0x9012b,0x9}, ++ {0x9012c,0x0}, ++ {0x9012d,0x1a9}, ++ {0x9012e,0x0}, ++ {0x9012f,0x408}, ++ {0x90130,0x169}, ++ {0x90131,0x0}, ++ {0x90132,0x8080}, ++ {0x90133,0x108}, ++ {0x90134,0x8}, ++ {0x90135,0x7aa}, ++ {0x90136,0x6a}, ++ {0x90137,0x0}, ++ {0x90138,0x8568}, ++ {0x90139,0x108}, ++ {0x9013a,0xb7}, ++ {0x9013b,0x790}, ++ {0x9013c,0x16a}, ++ {0x9013d,0x1f}, ++ {0x9013e,0x0}, ++ {0x9013f,0x68}, ++ {0x90140,0x8}, ++ {0x90141,0x8558}, ++ {0x90142,0x168}, ++ {0x90143,0xf}, ++ {0x90144,0x408}, ++ {0x90145,0x169}, ++ {0x90146,0xc}, ++ {0x90147,0x0}, ++ {0x90148,0x68}, ++ {0x90149,0x0}, ++ {0x9014a,0x408}, ++ {0x9014b,0x169}, ++ {0x9014c,0x0}, ++ {0x9014d,0x8558}, ++ {0x9014e,0x168}, ++ {0x9014f,0x8}, ++ {0x90150,0x3c8}, ++ {0x90151,0x1a9}, ++ {0x90152,0x3}, ++ {0x90153,0x370}, ++ {0x90154,0x129}, ++ {0x90155,0x20}, ++ {0x90156,0x2aa}, ++ {0x90157,0x9}, ++ {0x90158,0x0}, ++ {0x90159,0x400}, ++ {0x9015a,0x10e}, ++ {0x9015b,0x8}, ++ {0x9015c,0xe8}, ++ {0x9015d,0x109}, ++ {0x9015e,0x0}, ++ {0x9015f,0x8140}, ++ {0x90160,0x10c}, ++ {0x90161,0x10}, ++ {0x90162,0x8138}, ++ {0x90163,0x10c}, ++ {0x90164,0x8}, ++ {0x90165,0x7c8}, ++ {0x90166,0x101}, ++ {0x90167,0x8}, ++ {0x90168,0x0}, ++ {0x90169,0x8}, ++ {0x9016a,0x8}, ++ {0x9016b,0x448}, ++ {0x9016c,0x109}, ++ {0x9016d,0xf}, ++ {0x9016e,0x7c0}, ++ {0x9016f,0x109}, ++ {0x90170,0x0}, ++ {0x90171,0xe8}, ++ {0x90172,0x109}, ++ {0x90173,0x47}, ++ {0x90174,0x630}, ++ {0x90175,0x109}, ++ {0x90176,0x8}, ++ {0x90177,0x618}, ++ {0x90178,0x109}, ++ {0x90179,0x8}, ++ {0x9017a,0xe0}, ++ {0x9017b,0x109}, ++ {0x9017c,0x0}, ++ {0x9017d,0x7c8}, ++ {0x9017e,0x109}, ++ {0x9017f,0x8}, ++ {0x90180,0x8140}, ++ {0x90181,0x10c}, ++ {0x90182,0x0}, ++ {0x90183,0x1}, ++ {0x90184,0x8}, ++ {0x90185,0x8}, ++ {0x90186,0x4}, ++ {0x90187,0x8}, ++ {0x90188,0x8}, ++ {0x90189,0x7c8}, ++ {0x9018a,0x101}, ++ {0x90006,0x0}, ++ {0x90007,0x0}, ++ {0x90008,0x8}, ++ {0x90009,0x0}, ++ {0x9000a,0x0}, ++ {0x9000b,0x0}, ++ {0xd00e7,0x400}, ++ {0x90017,0x0}, ++ {0x9001f,0x2a}, ++ {0x90026,0x6a}, ++ {0x400d0,0x0}, ++ {0x400d1,0x101}, ++ {0x400d2,0x105}, ++ {0x400d3,0x107}, ++ {0x400d4,0x10f}, ++ {0x400d5,0x202}, ++ {0x400d6,0x20a}, ++ {0x400d7,0x20b}, ++ {0x2003a,0x2}, ++ {0x2000b,0x4b}, ++ {0x2000c,0x96}, ++ {0x2000d,0x5dc}, ++ {0x2000e,0x2c}, ++ {0x12000b,0xc}, ++ {0x12000c,0x19}, ++ {0x12000d,0xfa}, ++ {0x12000e,0x10}, ++ {0x22000b,0x3}, ++ {0x22000c,0x6}, ++ {0x22000d,0x3e}, ++ {0x22000e,0x10}, ++ {0x9000c,0x0}, ++ {0x9000d,0x173}, ++ {0x9000e,0x60}, ++ {0x9000f,0x6110}, ++ {0x90010,0x2152}, ++ {0x90011,0xdfbd}, ++ {0x90012,0x60}, ++ {0x90013,0x6152}, ++ {0x20010,0x5a}, ++ {0x20011,0x3}, ++ {0x120010,0x5a}, ++ {0x120011,0x3}, ++ {0x220010,0x5a}, ++ {0x220011,0x3}, ++ {0x40080,0xe0}, ++ {0x40081,0x12}, ++ {0x40082,0xe0}, ++ {0x40083,0x12}, ++ {0x40084,0xe0}, ++ {0x40085,0x12}, ++ {0x140080,0xe0}, ++ {0x140081,0x12}, ++ {0x140082,0xe0}, ++ {0x140083,0x12}, ++ {0x140084,0xe0}, ++ {0x140085,0x12}, ++ {0x240080,0xe0}, ++ {0x240081,0x12}, ++ {0x240082,0xe0}, ++ {0x240083,0x12}, ++ {0x240084,0xe0}, ++ {0x240085,0x12}, ++ {0x400fd,0xf}, ++ {0x10011,0x1}, ++ {0x10012,0x1}, ++ {0x10013,0x180}, ++ {0x10018,0x1}, ++ {0x10002,0x6209}, ++ {0x100b2,0x1}, ++ {0x101b4,0x1}, ++ {0x102b4,0x1}, ++ {0x103b4,0x1}, ++ {0x104b4,0x1}, ++ {0x105b4,0x1}, ++ {0x106b4,0x1}, ++ {0x107b4,0x1}, ++ {0x108b4,0x1}, ++ {0x11011,0x1}, ++ {0x11012,0x1}, ++ {0x11013,0x180}, ++ {0x11018,0x1}, ++ {0x11002,0x6209}, ++ {0x110b2,0x1}, ++ {0x111b4,0x1}, ++ {0x112b4,0x1}, ++ {0x113b4,0x1}, ++ {0x114b4,0x1}, ++ {0x115b4,0x1}, ++ {0x116b4,0x1}, ++ {0x117b4,0x1}, ++ {0x118b4,0x1}, ++ {0x12011,0x1}, ++ {0x12012,0x1}, ++ {0x12013,0x180}, ++ {0x12018,0x1}, ++ {0x12002,0x6209}, ++ {0x120b2,0x1}, ++ {0x121b4,0x1}, ++ {0x122b4,0x1}, ++ {0x123b4,0x1}, ++ {0x124b4,0x1}, ++ {0x125b4,0x1}, ++ {0x126b4,0x1}, ++ {0x127b4,0x1}, ++ {0x128b4,0x1}, ++ {0x13011,0x1}, ++ {0x13012,0x1}, ++ {0x13013,0x180}, ++ {0x13018,0x1}, ++ {0x13002,0x6209}, ++ {0x130b2,0x1}, ++ {0x131b4,0x1}, ++ {0x132b4,0x1}, ++ {0x133b4,0x1}, ++ {0x134b4,0x1}, ++ {0x135b4,0x1}, ++ {0x136b4,0x1}, ++ {0x137b4,0x1}, ++ {0x138b4,0x1}, ++ {0x2003a,0x2}, ++ {0xc0080,0x2}, ++ {0xd0000, 0x1} ++}; ++ ++static struct dram_fsp_msg ddr_dram_fsp_msg[] = { ++ { ++ /* P0 2400mts 1D */ ++ .drate = 2400, ++ .fw_type = FW_1D_IMAGE, ++ .fsp_cfg = ddr_fsp0_cfg, ++ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), ++ }, ++ { ++ /* P1 400mts 1D */ ++ .drate = 400, ++ .fw_type = FW_1D_IMAGE, ++ .fsp_cfg = ddr_fsp1_cfg, ++ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), ++ }, ++ { ++ /* P2 100mts 1D */ ++ .drate = 100, ++ .fw_type = FW_1D_IMAGE, ++ .fsp_cfg = ddr_fsp2_cfg, ++ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), ++ }, ++ { ++ /* P0 2400mts 2D */ ++ .drate = 2400, ++ .fw_type = FW_2D_IMAGE, ++ .fsp_cfg = ddr_fsp0_2d_cfg, ++ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), ++ }, ++}; ++ ++/* ddr timing config params */ ++struct dram_timing_info ucm_dram_timing_05000010 = { ++ .ddrc_cfg = ddr_ddrc_cfg, ++ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), ++ .ddrphy_cfg = ddr_ddrphy_cfg, ++ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), ++ .fsp_msg = ddr_dram_fsp_msg, ++ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), ++ .ddrphy_trained_csr = ddr_ddrphy_trained_csr, ++ .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), ++ .ddrphy_pie = ddr_phy_pie, ++ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), ++ .fsp_table = { 2400, 400, 100, }, ++}; ++ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0078-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch b/recipes-bsp/u-boot/compulab/imx8mm/0078-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch new file mode 100644 index 0000000..2644add --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0078-ucm-imx8m-mini-Enable-status-LED-and-cmd-led.patch @@ -0,0 +1,78 @@ +From 7c45580b9dd2ca23e663375ac138c9bfb760cbdb Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 2 Sep 2020 23:11:10 +0300 +Subject: [PATCH 078/126] ucm-imx8m-mini: Enable status LED and cmd led + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/ucm-imx8m-mini.dts | 20 ++++++++++++++++++++ + board/compulab/plat/imx8mm/board/board.c | 3 +++ + configs/ucm-imx8m-mini_defconfig | 5 ++++- + 3 files changed, 27 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts +index 7b81e8a75b..ba0e169004 100644 +--- a/arch/arm/dts/ucm-imx8m-mini.dts ++++ b/arch/arm/dts/ucm-imx8m-mini.dts +@@ -19,4 +19,24 @@ + / { + model = "CompuLab UCM-iMX8M-Mini board"; + compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_led>; ++ ++ status_led { ++ label = "status"; ++ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl_gpio_led: gpioledgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 ++ >; ++ }; + }; +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 4ec5a5af4f..03e479ee57 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -199,6 +199,9 @@ int board_init(void) + printf("uboot_board_private_init() failed\n"); + hang(); + } ++ if (IS_ENABLED(CONFIG_LED)) ++ led_default_state(); ++ + show_suite_info(); + return 0; + } +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index ac8b3f558e..7d4b487ce9 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -45,7 +45,7 @@ CONFIG_CMD_DHCP=y + CONFIG_CMD_MII=y + CONFIG_CMD_PING=y + CONFIG_CMD_CACHE=y +-CONFIG_CMD_REGULATOR=y ++CONFIG_CMD_REGULATOR= + CONFIG_CMD_EXT2=y + CONFIG_CMD_EXT4=y + CONFIG_CMD_FAT=y +@@ -97,3 +97,6 @@ CONFIG_EXT4_WRITE=y + CONFIG_FAT_WRITE=y + CONFIG_OF_LIBFDT_OVERLAY=y + # CONFIG_EFI_LOADER is not set ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0079-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch b/recipes-bsp/u-boot/compulab/imx8mm/0079-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch new file mode 100644 index 0000000..c387d92 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0079-mcm-and-ucm-Enable-status-LED-for-both-platforms.patch @@ -0,0 +1,112 @@ +From a9645982b8f14229c3a9984f459f22619c5a82c6 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sat, 5 Sep 2020 17:18:29 +0300 +Subject: [PATCH 079/126] mcm and ucm: Enable status LED for both platforms + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 17 +++++++++++++++++ + arch/arm/dts/ucm-imx8m-mini.dts | 20 -------------------- + board/compulab/plat/imx8mm/board/board.c | 1 + + configs/mcm-imx8m-mini_defconfig | 2 ++ + configs/ucm-imx8m-mini_defconfig | 1 - + 5 files changed, 20 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index a587c3dda0..c37ad9c71d 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -32,6 +32,17 @@ + off-on-delay-us = <12000>; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_led>; ++ ++ status_led { ++ label = "status"; ++ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ }; + }; + + &iomuxc { +@@ -219,6 +230,12 @@ + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; ++ ++ pinctrl_gpio_led: gpioledgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 ++ >; ++ }; + }; + }; + +diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts +index ba0e169004..7b81e8a75b 100644 +--- a/arch/arm/dts/ucm-imx8m-mini.dts ++++ b/arch/arm/dts/ucm-imx8m-mini.dts +@@ -19,24 +19,4 @@ + / { + model = "CompuLab UCM-iMX8M-Mini board"; + compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; +- +- leds { +- compatible = "gpio-leds"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpio_led>; +- +- status_led { +- label = "status"; +- gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; +- default-state = "on"; +- }; +- }; +-}; +- +-&iomuxc { +- pinctrl_gpio_led: gpioledgrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 +- >; +- }; + }; +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 03e479ee57..58bcefbd82 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + #include + #include + #include +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig +index e0e4f86329..cf388e99a5 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/mcm-imx8m-mini_defconfig +@@ -96,3 +96,5 @@ CONFIG_EXT4_WRITE=y + CONFIG_FAT_WRITE=y + CONFIG_OF_LIBFDT_OVERLAY=y + # CONFIG_EFI_LOADER is not set ++CONFIG_LED=y ++CONFIG_LED_GPIO=y +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 7d4b487ce9..9fb020d256 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -99,4 +99,3 @@ CONFIG_OF_LIBFDT_OVERLAY=y + # CONFIG_EFI_LOADER is not set + CONFIG_LED=y + CONFIG_LED_GPIO=y +- +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0080-Enable-env-address-export-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0080-Enable-env-address-export-via-FDT.patch new file mode 100644 index 0000000..37c6c8a --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0080-Enable-env-address-export-via-FDT.patch @@ -0,0 +1,122 @@ +From ece5bd09e9bf6224bb1fa71127132b92b4b1146c Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Thu, 8 Oct 2020 20:33:08 +0300 +Subject: [PATCH 080/126] Enable env address export via FDT + +Signed-off-by: Kirill Kapranov +--- + board/compulab/common/mmc.c | 2 ++ + board/compulab/plat/imx8mm/board/board.c | 47 ++++++++++++++++++++++++++++---- + 2 files changed, 44 insertions(+), 5 deletions(-) + +diff --git a/board/compulab/common/mmc.c b/board/compulab/common/mmc.c +index 52b15ab5f3..9d6bf38282 100644 +--- a/board/compulab/common/mmc.c ++++ b/board/compulab/common/mmc.c +@@ -48,4 +48,6 @@ void board_late_mmc_env_init(void) + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); ++ ++ return; + } +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 58bcefbd82..f3565ec77d 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -34,6 +34,9 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++static int env_dev = -1; ++static int env_part= -1; ++ + #ifdef CONFIG_BOARD_POSTCLK_INIT + int board_postclk_init(void) + { +@@ -70,8 +73,30 @@ ulong board_get_usable_ram_top(ulong total_size) + } + + #ifdef CONFIG_OF_BOARD_SETUP ++static int fdt_set_env_addr(void *blob, bd_t *bd) ++{ ++ char tmp[32]; ++ int nodeoff = fdt_add_subnode(blob, 0, "fw_env"); ++ if(0 > nodeoff) ++ return nodeoff; ++ ++ fdt_setprop(blob, nodeoff, "env_off", tmp, sprintf(tmp, "0x%x", CONFIG_ENV_OFFSET)); ++ fdt_setprop(blob, nodeoff, "env_size", tmp, sprintf(tmp, "0x%x", CONFIG_ENV_SIZE)); ++ if(0 < env_dev) { ++ switch(env_part) { ++ case 1 ... 2: ++ fdt_setprop(blob, nodeoff, "env_dev", tmp, sprintf(tmp, "/dev/mmcblk%iboot%i", env_dev, env_part - 1)); ++ break; ++ default: ++ fdt_setprop(blob, nodeoff, "env_dev", tmp, sprintf(tmp, "/dev/mmcblk%i", env_dev)); ++ break; ++ } ++ } ++} ++ + int ft_board_setup(void *blob, bd_t *bd) + { ++ fdt_set_env_addr(blob, bd); + return 0; + } + #endif +@@ -217,27 +242,32 @@ int board_mmc_get_env_dev(int devno) + return devno; + } + +-static int _mmc_get_env_part(void) ++static int _mmc_get_env_part(struct mmc *mmc) + { + const ulong user_env_part = env_get_hex("env_part", ULONG_MAX); + if (user_env_part != ULONG_MAX) { + printf("User Environment part# is (%lu)\n", user_env_part); + return (int)user_env_part; + } +- return CONFIG_SYS_MMC_ENV_PART; ++ ++ return EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + } + + uint mmc_get_env_part(struct mmc *mmc) + { +- if (mmc->part_support) +- return _mmc_get_env_part(); +- ++ if (mmc->part_support && mmc->part_config != MMCPART_NOAVAILABLE) { ++ uint partno = _mmc_get_env_part(mmc); ++ env_part = partno; ++ return partno; ++ } + return 0; + } + + static void board_bootdev_init(void) + { + u32 bootdev = get_boot_device(); ++ struct mmc *mmc; ++ + switch (bootdev) { + case MMC3_BOOT: + bootdev = 2; +@@ -249,6 +279,13 @@ static void board_bootdev_init(void) + env_set("bootdev", NULL); + return; + } ++ ++ env_dev = bootdev; ++ ++ mmc = find_mmc_device(bootdev); ++ if (mmc && mmc->part_support && mmc->part_config != MMCPART_NOAVAILABLE) ++ env_part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); ++ + env_set_ulong("bootdev", bootdev); + } + +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0081-fw_utils-Enable-actual-env-address-readout.patch b/recipes-bsp/u-boot/compulab/imx8mm/0081-fw_utils-Enable-actual-env-address-readout.patch new file mode 100644 index 0000000..7fa5a1d --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0081-fw_utils-Enable-actual-env-address-readout.patch @@ -0,0 +1,131 @@ +From 95c3013f286882d3d4141025f183c37b56dd5b36 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Thu, 8 Oct 2020 20:38:21 +0300 +Subject: [PATCH 081/126] fw_utils: Enable actual env address readout + +Signed-off-by: Kirill Kapranov +--- + tools/env/fw_env_main.c | 66 +++++++++++++++++++++++++++++++++++++++++++++- + tools/env/fw_env_private.h | 1 + + 2 files changed, 66 insertions(+), 1 deletion(-) + +diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c +index ca9ad78014..8d247ae910 100644 +--- a/tools/env/fw_env_main.c ++++ b/tools/env/fw_env_main.c +@@ -50,6 +50,7 @@ static struct option long_options[] = { + {"lock", required_argument, NULL, 'l'}, + {"version", no_argument, NULL, 'v'}, + {"env", no_argument, NULL, 'e'}, ++ {"viadt", no_argument, NULL, 'E'}, + {NULL, 0, NULL, 0} + }; + +@@ -76,6 +77,9 @@ void usage_printenv(void) + " -n, --noheader do not repeat variable name in output\n" + " -l, --lock lock node, default:/var/lock\n" + " -e, --env print default fw_env.config\n" ++#ifdef CONFIG_DT_NODE ++ " -E, --viadt print environment passed via devicetree\n" ++#endif + "\n"); + } + +@@ -114,6 +118,61 @@ void usage_env_set(void) + "\n"); + } + ++ ++#if defined(CONFIG_DT_NODE) ++ ++#define GET_PROP_i(NAME) int NAME = read_dt_prop_int( CONFIG_DT_NODE "/" #NAME, NULL ) ++#define GET_PROP_s(NAME) char* NAME = NULL; read_dt_prop_int( CONFIG_DT_NODE "/" #NAME , &NAME) ++#define CLEAR_s(NAME) if(NAME) free(NAME) ++ ++static int read_dt_prop_int(const char *name, char** str) ++{ ++ FILE *fp; ++ int retval; ++ char *buf = NULL; ++ size_t count = 0; ++ ++ fp = fopen(name, "r"); ++ if(fp == NULL) { ++ fprintf(stderr, "Can't open property %s %m\n", name); ++ return -1; ++ } ++ ++ retval = getline(&buf, &count, fp); ++ fclose(fp); ++ if(0 < retval) { ++ if(str) { //extract a string property ++ *str = buf; ++ return 0; ++ } ++ else { //extract a integer property ++ retval = strtoul(buf, NULL, 0); ++ } ++ } ++ ++ CLEAR_s(buf); ++ ++ return retval; ++} ++ ++int get_config_via_dt(void) ++{ ++ GET_PROP_i(env_size); ++ GET_PROP_i(env_off); ++ GET_PROP_s(env_dev); ++ ++ if( !env_dev || 0 >= env_size || 0>= env_off) { ++ fprintf(stderr, "Valid DT node %s not found\n", CONFIG_DT_NODE); ++ return -1; ++ } ++ ++ printf("%s\t0x%x\t0x%x\n", env_dev, env_off, env_size); ++ ++ CLEAR_s(env_dev); ++ ++ return 0; ++} ++#endif + static void parse_common_args(int argc, char *argv[]) + { + int c; +@@ -122,7 +181,7 @@ static void parse_common_args(int argc, char *argv[]) + env_opts.config_file = CONFIG_FILE; + #endif + +- while ((c = getopt_long(argc, argv, ":a:c:l:h:ve", long_options, NULL)) != ++ while ((c = getopt_long(argc, argv, ":a:c:l:h:veE", long_options, NULL)) != + EOF) { + switch (c) { + #ifdef CONFIG_FILE +@@ -146,6 +205,11 @@ static void parse_common_args(int argc, char *argv[]) + fprintf(stdout, "/dev/mmcblk1 0x%x 0x%x\n", CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE); + exit(EXIT_SUCCESS); + break; ++#if defined(CONFIG_DT_NODE) ++ case 'E': ++ exit(get_config_via_dt()); ++ break; ++#endif + default: + /* ignore unknown options */ + break; +diff --git a/tools/env/fw_env_private.h b/tools/env/fw_env_private.h +index 86be16dabc..9c3b7bf50c 100644 +--- a/tools/env/fw_env_private.h ++++ b/tools/env/fw_env_private.h +@@ -22,6 +22,7 @@ + * for notes on configuration. + */ + #define CONFIG_FILE "/etc/fw_env.config" ++#define CONFIG_DT_NODE "/sys/firmware/devicetree/base/fw_env" + + #ifndef CONFIG_FILE + #define HAVE_REDUND /* For systems with 2 env sectors */ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0082-SPL-Disable-fake-memsize-report.patch b/recipes-bsp/u-boot/compulab/imx8mm/0082-SPL-Disable-fake-memsize-report.patch new file mode 100644 index 0000000..0373ee0 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0082-SPL-Disable-fake-memsize-report.patch @@ -0,0 +1,112 @@ +From 225fb914d4dabc16a5c6ffe8aa9e202692224504 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Thu, 22 Oct 2020 21:02:05 +0300 +Subject: [PATCH 082/126] SPL: Disable fake memsize report + +The SPL can reports to U-boot a fake memsize, read from EEPROM. This feature is purposed only for +debug; it may be enabled using config. + +Signed-off-by: Kirill Kapranov +--- + arch/arm/mach-imx/imx8m/Kconfig | 1 + + board/compulab/plat/Kconfig | 11 +++++++++++ + board/compulab/plat/imx8/eeprom/eeprom_spl.c | 4 ++++ + board/compulab/plat/imx8mm/ddr/ddr.c | 9 +++++++-- + 4 files changed, 23 insertions(+), 2 deletions(-) + create mode 100644 board/compulab/plat/Kconfig + +diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig +index 3102155bc1..eac80a9989 100644 +--- a/arch/arm/mach-imx/imx8m/Kconfig ++++ b/arch/arm/mach-imx/imx8m/Kconfig +@@ -298,5 +298,6 @@ source "board/phytec/phycore_imx8mp/Kconfig" + source "board/compulab/ucm-imx8m-mini/Kconfig" + source "board/compulab/mcm-imx8m-mini/Kconfig" + source "board/compulab/iot-gate-imx8/Kconfig" ++source "board/compulab/plat/Kconfig" + + endif +diff --git a/board/compulab/plat/Kconfig b/board/compulab/plat/Kconfig +new file mode 100644 +index 0000000000..af14b8b642 +--- /dev/null ++++ b/board/compulab/plat/Kconfig +@@ -0,0 +1,11 @@ ++menu "Compulab platform features" ++ depends on TARGET_UCM_IMX8M_MINI || TARGET_MCM_IMX8M_MINI || TARGET_IOT_GATE_IMX8 ++ ++config SPL_REPORT_FAKE_MEMSIZE ++ bool "SPL passes a fake DRAM size to U-Boot" ++ default n ++ help ++ SPL passes to the U-Boot a value from EEPROM instead of a real memory ++ size. For debug purposes ONLY!!! ++ ++endmenu +diff --git a/board/compulab/plat/imx8/eeprom/eeprom_spl.c b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +index b3c894a9af..354e6fb4b6 100644 +--- a/board/compulab/plat/imx8/eeprom/eeprom_spl.c ++++ b/board/compulab/plat/imx8/eeprom/eeprom_spl.c +@@ -87,9 +87,11 @@ static u8 board_ddrsubind = 0xff; + #define BOARD_DRATE_SIZE 4 + static u32 board_drate = 0xdeadbeef; + ++#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE + #define BOARD_OSIZE_OFFSET 0x80 + #define BOARD_OSIZE_SIZE 4 + static u32 board_osize = 0xdeadbeef; ++#endif + + #define BOARD_DDRINFO_VALID(A) (A != 0xdeadbeef) + +@@ -150,6 +152,7 @@ u8 cl_eeprom_set_subind(u8 ddrsubind) + return board_ddrsubind; + }; + ++#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE + /* override-size ifaces */ + u32 cl_eeprom_get_osize(void) + { +@@ -168,5 +171,6 @@ u32 cl_eeprom_set_osize(u32 osize) + + return board_osize; + }; ++#endif //CONFIG_SPL_REPORT_FAKE_MEMSIZE + + #endif +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 8a7d221b97..95f75df596 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -22,8 +22,9 @@ u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); + u32 cl_eeprom_get_subind(void); + u32 cl_eeprom_set_subind(u32 subind); + ++#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE + u32 cl_eeprom_get_osize(void); +- ++#endif + static unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr) + { + unsigned int tmp; +@@ -202,7 +203,7 @@ void spl_dram_init(void) + printf("DDRINFO(EEPROM): i2c dev 1; i2c md 0x51 0x40 0x50\n"); + } + } +- ++#ifdef CONFIG_SPL_REPORT_FAKE_MEMSIZE + /* Pass the dram size to th U-Boot through the tcm memory */ + { /* To figure out what to store into the TCM buffer */ + /* For debug purpouse only. To override the real memsize */ +@@ -212,4 +213,8 @@ void spl_dram_init(void) + + lpddr4_tcm_desc->size = ddr_tcm_size; + } ++#else ++ lpddr4_tcm_desc->size = lpddr4_array[i].size; ++#endif ++ + } +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0083-fdt-Add-export-SoM-data-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0083-fdt-Add-export-SoM-data-via-FDT.patch new file mode 100644 index 0000000..a9f03f9 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0083-fdt-Add-export-SoM-data-via-FDT.patch @@ -0,0 +1,184 @@ +From f16d545e4d968bb9a5223f3bea6ccc2f80649dae Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 3 Nov 2020 22:20:00 +0200 +Subject: [PATCH 083/126] fdt: Add export SoM data via FDT + +Export via FDT the following data: + board options + board revision (major) + product name + serial number + +Signed-off-by: Kirill Kapranov +--- + board/compulab/common/eeprom.c | 40 +++++++++++++++++++++++--------- + board/compulab/common/eeprom.h | 22 ++++++++++++++++++ + board/compulab/plat/imx8mm/board/board.c | 28 ++++++++++++++++++++++ + 3 files changed, 79 insertions(+), 11 deletions(-) + +diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c +index ebcafac04b..95467149f3 100644 +--- a/board/compulab/common/eeprom.c ++++ b/board/compulab/common/eeprom.c +@@ -35,17 +35,6 @@ + # define CONFIG_SYS_I2C_EEPROM_BUS_SB 0 + #endif + +-#define EEPROM_LAYOUT_VER_OFFSET 44 +-#define BOARD_SERIAL_OFFSET 20 +-#define BOARD_SERIAL_OFFSET_LEGACY 8 +-#define BOARD_REV_OFFSET 0 +-#define BOARD_REV_OFFSET_LEGACY 6 +-#define BOARD_REV_SIZE 2 +-#define PRODUCT_NAME_OFFSET 128 +-#define PRODUCT_NAME_SIZE 16 +-#define MAC_ADDR_OFFSET 4 +-#define MAC_ADDR_OFFSET_LEGACY 0 +- + #define LAYOUT_INVALID 0 + #define LAYOUT_LEGACY 0xff + +@@ -238,6 +227,30 @@ int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus __attribute__((unused + return err; + } + ++static int cl_eeprom_read_options(char *buf, const struct eeprom_path *eeprom) ++{ ++ int len = 0; ++ int err; ++ uchar tmp[PRODUCT_OPTION_SIZE]; ++ ++ err = cl_eeprom_setup(eeprom); ++ if (err) { ++ printf("%s: Error accesing i2c %x@%x\n", __func__, eeprom->bus, eeprom->chip); ++ return snprintf(buf, PRODUCT_NAME_SIZE, "unknown"); ++ } ++ ++ for(int i = 0; i < PRODUCT_OPTION_NUM; ++i) { ++ err = cl_eeprom_read(PRODUCT_OPTION_OFFSET + PRODUCT_OPTION_SIZE * i, tmp, PRODUCT_OPTION_SIZE); ++ if (!err && tmp[0] != 0xff) // Check if the flash isn't written ++ len += snprintf(buf + len, PRODUCT_OPTION_SIZE, (char*)tmp); ++ } ++ return len; ++} ++int cl_eeprom_read_som_options(char *buf) ++{ ++ return cl_eeprom_read_options(buf, &eeprom_som); ++} ++ + static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) + { + int len; +@@ -257,6 +270,11 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr + + return len; + } ++int cl_eeprom_read_som_name(char *buf) ++{ ++ return cl_eeprom_read_product_name(buf, &eeprom_som); ++} ++ + void cl_eeprom_get_suite(char *buf) + { + buf += cl_eeprom_read_product_name(buf, &eeprom_som); +diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h +index d366f59288..dd7d82d855 100644 +--- a/board/compulab/common/eeprom.h ++++ b/board/compulab/common/eeprom.h +@@ -11,11 +11,28 @@ + #define _EEPROM_ + #include + ++#define EEPROM_LAYOUT_VER_OFFSET 44 ++#define BOARD_SERIAL_OFFSET 20 ++#define BOARD_SERIAL_OFFSET_LEGACY 8 ++#define BOARD_REV_OFFSET 0 ++#define BOARD_REV_OFFSET_LEGACY 6 ++#define BOARD_REV_SIZE 2 ++#define PRODUCT_NAME_OFFSET 128 ++#define PRODUCT_NAME_SIZE 16 ++#define PRODUCT_OPTION_OFFSET 144 ++#define PRODUCT_OPTION_SIZE 16 ++#define PRODUCT_OPTION_NUM 5 ++#define MAC_ADDR_OFFSET 4 ++#define MAC_ADDR_OFFSET_LEGACY 0 ++ + #if (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)) + int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); + u32 cl_eeprom_get_board_rev(uint eeprom_bus); + int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); ++int cl_eeprom_read_som_name(char *buf); ++int cl_eeprom_read_som_options(char *buf); + void cl_eeprom_get_suite(char* buf); ++void cpl_get_board_serial(struct tag_serialnr *serialnr); + #else + static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) + { +@@ -29,6 +46,11 @@ static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) + { + return -ENOSYS; + } ++static inline void cpl_get_board_serial(struct tag_serialnr *serialnr) ++{ ++ return 0; ++} ++ + #endif + + #endif +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index f3565ec77d..0ad59ea59b 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -73,6 +74,32 @@ ulong board_get_usable_ram_top(ulong total_size) + } + + #ifdef CONFIG_OF_BOARD_SETUP ++static void fdt_set_sn(void *blob) ++{ ++ u32 rev; ++ char buf[100]; ++ int len; ++ union { ++ struct tag_serialnr s; ++ u64 u; ++ } serialnr; ++ ++ len = cl_eeprom_read_som_name(buf); ++ fdt_setprop(blob, 0, "product-name", buf, len); ++ ++ cpl_get_board_serial(&serialnr.s); ++ fdt_setprop(blob, 0, "serial-number", buf, sprintf(buf, "%llx", serialnr.u) + 1); ++ ++ rev = cl_eeprom_get_board_rev(0); ++ fdt_setprop(blob, 0, "board-revision", buf, ++ sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); ++ ++ len = cl_eeprom_read_som_options(buf); ++ fdt_setprop(blob, 0, "board-options", buf, len); ++ ++ return; ++} ++ + static int fdt_set_env_addr(void *blob, bd_t *bd) + { + char tmp[32]; +@@ -97,6 +124,7 @@ static int fdt_set_env_addr(void *blob, bd_t *bd) + int ft_board_setup(void *blob, bd_t *bd) + { + fdt_set_env_addr(blob, bd); ++ fdt_set_sn(blob); + return 0; + } + #endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0084-board-minor-cleaninig.patch b/recipes-bsp/u-boot/compulab/imx8mm/0084-board-minor-cleaninig.patch new file mode 100644 index 0000000..0da33c4 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0084-board-minor-cleaninig.patch @@ -0,0 +1,40 @@ +From e83c55e61a11ae9f05bbecf3e0e769411c4a1b1f Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sat, 7 Nov 2020 22:25:40 +0200 +Subject: [PATCH 084/126] board: minor cleaninig + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/board/board.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 0ad59ea59b..13b9d336a7 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -100,7 +100,7 @@ static void fdt_set_sn(void *blob) + return; + } + +-static int fdt_set_env_addr(void *blob, bd_t *bd) ++static int fdt_set_env_addr(void *blob) + { + char tmp[32]; + int nodeoff = fdt_add_subnode(blob, 0, "fw_env"); +@@ -119,11 +119,12 @@ static int fdt_set_env_addr(void *blob, bd_t *bd) + break; + } + } ++ return 0; + } + + int ft_board_setup(void *blob, bd_t *bd) + { +- fdt_set_env_addr(blob, bd); ++ fdt_set_env_addr(blob); + fdt_set_sn(blob); + return 0; + } +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0085-rtc-Disable-bus-when-powered-from-battery.patch b/recipes-bsp/u-boot/compulab/imx8mm/0085-rtc-Disable-bus-when-powered-from-battery.patch new file mode 100644 index 0000000..7aa3c71 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0085-rtc-Disable-bus-when-powered-from-battery.patch @@ -0,0 +1,90 @@ +From af2dc6965740b9b35d47b75fc6aa4b9d5a363052 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 18 Nov 2020 22:10:58 +0200 +Subject: [PATCH 085/126] rtc: Disable bus when powered from battery + +Signed-off-by: Kirill Kapranov +--- + board/compulab/common/rtc.h | 20 ++++++++++++++++++++ + board/compulab/plat/imx8mm/board/board.c | 28 ++++++++++++++++++++++++++++ + 2 files changed, 48 insertions(+) + create mode 100644 board/compulab/common/rtc.h + +diff --git a/board/compulab/common/rtc.h b/board/compulab/common/rtc.h +new file mode 100644 +index 0000000000..b5927a86f4 +--- /dev/null ++++ b/board/compulab/common/rtc.h +@@ -0,0 +1,20 @@ ++#ifndef _RTC_H_ ++#define _RTC_H_ ++ ++ ++#ifndef CONFIG_SYS_I2C_RTC_BUS ++#define CONFIG_SYS_I2C_RTC_BUS 1 ++#endif ++ ++#ifndef CONFIG_SYS_I2C_RTC_ADDR ++#define CONFIG_SYS_I2C_RTC_ADDR 0x69 ++#endif ++ ++#define ABX8XX_REG_CFG_KEY 0x1f ++#define ABX8XX_CFG_KEY_MISC 0x9d ++ ++#define ABX8XX_REG_BATMODE 0x27 ++#define ABX8XX_BATMODE_IOBM_NOT 0 ++ ++#endif //_RTC_H_ ++ +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 13b9d336a7..8e732a4b35 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -32,6 +32,7 @@ + #include + #include "ddr/ddr.h" + #include "common/eeprom.h" ++#include "common/rtc.h" + + DECLARE_GLOBAL_DATA_PTR; + +@@ -244,9 +245,36 @@ static void show_suite_info(void) + return; + } + ++static void disable_rtc_bus_on_battery(void) ++{ ++ struct udevice *bus, *dev; ++ int ret; ++ ++ ret = uclass_get_device_by_seq(UCLASS_I2C, CONFIG_SYS_I2C_RTC_BUS, &bus); ++ if (ret) { ++ printf("%s: No bus %d\n", __func__, CONFIG_SYS_I2C_RTC_BUS); ++ return; ++ } ++ ++ ret = dm_i2c_probe(bus, CONFIG_SYS_I2C_RTC_ADDR, 0, &dev); ++ if (ret) { ++ printf("%s: Can't find device id=0x%x, on bus %d\n", ++ __func__, CONFIG_SYS_I2C_RTC_BUS, CONFIG_SYS_I2C_RTC_ADDR); ++ return; ++ } ++ ++ if((ret = dm_i2c_reg_write(dev, ABX8XX_REG_CFG_KEY, ABX8XX_CFG_KEY_MISC)) || ++ (ret = dm_i2c_reg_write(dev, ABX8XX_REG_BATMODE, ABX8XX_BATMODE_IOBM_NOT))) ++ printf("%s: i2c write error %d\n", __func__, ret); ++ ++ return; ++} ++ + int board_init(void) + { + ++ disable_rtc_bus_on_battery(); ++ + #ifdef CONFIG_FEC_MXC + setup_fec(); + #endif +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0086-fdt-Add-export-of-base-board-data-via-FDT.patch b/recipes-bsp/u-boot/compulab/imx8mm/0086-fdt-Add-export-of-base-board-data-via-FDT.patch new file mode 100644 index 0000000..8c41664 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0086-fdt-Add-export-of-base-board-data-via-FDT.patch @@ -0,0 +1,191 @@ +From 6e7584fb88e394d89466f573b9c1f1890216c68a Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 6 Dec 2020 23:11:15 +0200 +Subject: [PATCH 086/126] fdt: Add export of base board data via FDT + +Export via FDT the following data: + base board options + base board revision (major) + base board name + base board serial number + +Signed-off-by: Kirill Kapranov +--- + board/compulab/common/eeprom.c | 46 +++++++++++++++++++++++++++++--- + board/compulab/common/eeprom.h | 17 +++++------- + board/compulab/plat/imx8mm/board/board.c | 23 ++++++++++++---- + 3 files changed, 67 insertions(+), 19 deletions(-) + +diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c +index 95467149f3..c1d321361c 100644 +--- a/board/compulab/common/eeprom.c ++++ b/board/compulab/common/eeprom.c +@@ -124,14 +124,14 @@ static int cl_eeprom_setup(const struct eeprom_path *eeprom) + return 0; + } + +-void cpl_get_board_serial(struct tag_serialnr *serialnr) ++static void cpl_get_board_serial(struct tag_serialnr *serialnr, const struct eeprom_path *eeprom) + { + u32 serial[2]; + uint offset; + + memset(serialnr, 0, sizeof(*serialnr)); + +- if (cl_eeprom_setup(&eeprom_som)) ++ if (cl_eeprom_setup(eeprom)) + return; + + offset = (cl_eeprom_layout != LAYOUT_LEGACY) ? +@@ -145,6 +145,14 @@ void cpl_get_board_serial(struct tag_serialnr *serialnr) + serialnr->high = serial[1]; + } + } ++inline void cpl_get_som_serial(struct tag_serialnr *serialnr) ++{ ++ return cpl_get_board_serial(serialnr, &eeprom_som); ++} ++inline void cpl_get_sb_serial(struct tag_serialnr *serialnr) ++{ ++ return cpl_get_board_serial(serialnr, &eeprom_sb); ++} + + /* + * Routine: cl_eeprom_read_mac_addr +@@ -198,7 +206,29 @@ u32 cl_eeprom_get_board_rev(uint eeprom_bus __attribute__((unused))) + } + + return board_rev; +-}; ++} ++ ++static u32 cl_eeprom_get_revision(const struct eeprom_path *eeprom) ++{ ++ u32 revision; ++ ++ if (cl_eeprom_setup(eeprom)) ++ return 0; ++ ++ if (cl_eeprom_read(BOARD_REV_OFFSET, (uchar *)&revision, BOARD_REV_SIZE)) ++ return 0; ++ ++ return revision; ++} ++u32 cl_eeprom_get_som_revision(void) ++{ ++ return cl_eeprom_get_revision(&eeprom_som); ++} ++u32 cl_eeprom_get_sb_revision(void) ++{ ++ return cl_eeprom_get_revision(&eeprom_sb); ++} ++ + + /* + * Routine: cl_eeprom_get_board_rev +@@ -250,6 +280,10 @@ int cl_eeprom_read_som_options(char *buf) + { + return cl_eeprom_read_options(buf, &eeprom_som); + } ++int cl_eeprom_read_sb_options(char *buf) ++{ ++ return cl_eeprom_read_options(buf, &eeprom_sb); ++} + + static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eeprom) + { +@@ -270,6 +304,12 @@ static int cl_eeprom_read_product_name(char *buf, const struct eeprom_path *eepr + + return len; + } ++ ++int cl_eeprom_read_sb_name(char *buf) ++{ ++ return cl_eeprom_read_product_name(buf, &eeprom_sb); ++} ++ + int cl_eeprom_read_som_name(char *buf) + { + return cl_eeprom_read_product_name(buf, &eeprom_som); +diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h +index dd7d82d855..6d447a6fac 100644 +--- a/board/compulab/common/eeprom.h ++++ b/board/compulab/common/eeprom.h +@@ -27,30 +27,25 @@ + + #if (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)) + int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); +-u32 cl_eeprom_get_board_rev(uint eeprom_bus); ++u32 cl_eeprom_get_som_revision(void); ++u32 cl_eeprom_get_sb_revision(void); + int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); ++int cl_eeprom_read_sb_name(char *buf); + int cl_eeprom_read_som_name(char *buf); + int cl_eeprom_read_som_options(char *buf); ++int cl_eeprom_read_sb_options(char *buf); + void cl_eeprom_get_suite(char* buf); +-void cpl_get_board_serial(struct tag_serialnr *serialnr); ++void cpl_get_som_serial(struct tag_serialnr *serialnr); ++void cpl_get_sb_serial(struct tag_serialnr *serialnr); + #else + static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) + { + return 1; + } +-static inline u32 cl_eeprom_get_board_rev(uint eeprom_bus) +-{ +- return 0; +-} + static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus) + { + return -ENOSYS; + } +-static inline void cpl_get_board_serial(struct tag_serialnr *serialnr) +-{ +- return 0; +-} +- + #endif + + #endif +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 8e732a4b35..5ea8fb8e41 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -88,15 +88,28 @@ static void fdt_set_sn(void *blob) + len = cl_eeprom_read_som_name(buf); + fdt_setprop(blob, 0, "product-name", buf, len); + +- cpl_get_board_serial(&serialnr.s); +- fdt_setprop(blob, 0, "serial-number", buf, sprintf(buf, "%llx", serialnr.u) + 1); ++ len = cl_eeprom_read_sb_name(buf); ++ fdt_setprop(blob, 0, "baseboard-name", buf, len); + +- rev = cl_eeprom_get_board_rev(0); +- fdt_setprop(blob, 0, "board-revision", buf, ++ cpl_get_som_serial(&serialnr.s); ++ fdt_setprop(blob, 0, "product-sn", buf, sprintf(buf, "%llx", serialnr.u) + 1); ++ ++ cpl_get_sb_serial(&serialnr.s); ++ fdt_setprop(blob, 0, "baseboard-sn", buf, sprintf(buf, "%llx", serialnr.u) + 1); ++ ++ rev = cl_eeprom_get_som_revision(); ++ fdt_setprop(blob, 0, "product-revision", buf, ++ sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); ++ ++ rev = cl_eeprom_get_sb_revision(); ++ fdt_setprop(blob, 0, "baseboard-revision", buf, + sprintf(buf, "%u.%02u", rev/100 , rev%100 ) + 1); + + len = cl_eeprom_read_som_options(buf); +- fdt_setprop(blob, 0, "board-options", buf, len); ++ fdt_setprop(blob, 0, "product-options", buf, len); ++ ++ len = cl_eeprom_read_sb_options(buf); ++ fdt_setprop(blob, 0, "baseboard-options", buf, len); + + return; + } +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0087-spl-ddr-Enable-DDR-ID-0x1060008.patch b/recipes-bsp/u-boot/compulab/imx8mm/0087-spl-ddr-Enable-DDR-ID-0x1060008.patch new file mode 100644 index 0000000..56e9112 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0087-spl-ddr-Enable-DDR-ID-0x1060008.patch @@ -0,0 +1,27 @@ +From b9d5700aa3c3dca4c1aebb1b22a737f1d7369b15 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 14 Feb 2021 22:59:10 +0200 +Subject: [PATCH 087/126] spl:ddr: Enable DDR ID 0x1060008 + +Enable Samsung 1G chip. + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/ddr/ddr.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 95f75df596..7ba199f55a 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -78,6 +78,7 @@ static const struct lpddr4_desc lpddr4_array[] = { + #endif + { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, ++ { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0088-drivers-video-Add-startek-ili9881c-panel-driver.patch b/recipes-bsp/u-boot/compulab/imx8mm/0088-drivers-video-Add-startek-ili9881c-panel-driver.patch new file mode 100644 index 0000000..d4416ac --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0088-drivers-video-Add-startek-ili9881c-panel-driver.patch @@ -0,0 +1,559 @@ +From 1bd5455f22ec050cd3be4fe1ff18fb0c03e3e8ad Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 19 Jul 2021 16:31:04 +0300 +Subject: [PATCH 088/126] drivers: video: Add startek-ili9881c panel driver + +Signed-off-by: Kirill Kapranov +--- + drivers/video/Kconfig | 9 + + drivers/video/Makefile | 1 + + drivers/video/startek-ili9881c.c | 505 +++++++++++++++++++++++++++++++++++++++ + 3 files changed, 515 insertions(+) + create mode 100644 drivers/video/startek-ili9881c.c + +diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig +index 653e6d72a7..a13d90f3d1 100644 +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -439,6 +439,15 @@ config VIDEO_LCD_RAYDIUM_RM67191 + Say Y here if you want to enable support for Raydium RM68200 + 1080x1920 DSI video mode panel. + ++config VIDEO_LCD_STARTEK_ILI9881C ++ tristate "Startek ILI9881C-based panels" ++ depends on DM_VIDEO ++ select VIDEO_MIPI_DSI ++ default n ++ help ++ Say Y if you want to enable support for panels based on the ++ Startek panel with an ILI9881c controller. ++ + config VIDEO_LCD_SSD2828 + bool "SSD2828 bridge chip" + default n +diff --git a/drivers/video/Makefile b/drivers/video/Makefile +index bd6056ccf1..c48cde4760 100644 +--- a/drivers/video/Makefile ++++ b/drivers/video/Makefile +@@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o + obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o + obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o + obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM67191) += raydium-rm67191.o ++obj-$(CONFIG_VIDEO_LCD_STARTEK_ILI9881C) += startek-ili9881c.o + obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o + obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o + obj-$(CONFIG_VIDEO_ADV7535) += adv7535.o +diff --git a/drivers/video/startek-ili9881c.c b/drivers/video/startek-ili9881c.c +new file mode 100644 +index 0000000000..d7c32a0de4 +--- /dev/null ++++ b/drivers/video/startek-ili9881c.c +@@ -0,0 +1,505 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright 2019 NXP ++ * Copyright 2021 CompuLab LTD. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define LCD_XSIZE_TFT 720 ++#define LCD_YSIZE_TFT 1280 ++#define PCLOCK 62000 ++#define LCD_VBPD 20 ++#define LCD_VFPD 10 ++#define LCD_VSPW 10 ++#define LCD_HBPD 30 ++#define LCD_HFPD 10 ++#define LCD_HSPW 20 ++ ++enum ili9881c_op { ++ ILI9881C_SWITCH_PAGE, ++ ILI9881C_COMMAND, ++}; ++ ++struct ili9881c_instr { ++ enum ili9881c_op op; ++ ++ union arg { ++ struct cmd { ++ u8 cmd; ++ u8 data; ++ } cmd; ++ u8 page; ++ } arg; ++}; ++ ++#define ILI9881C_SWITCH_PAGE_INSTR(_page) \ ++ { \ ++ .op = ILI9881C_SWITCH_PAGE, \ ++ .arg = { \ ++ .page = (_page), \ ++ }, \ ++ } ++ ++#define ILI9881C_COMMAND_INSTR(_cmd, _data) \ ++ { \ ++ .op = ILI9881C_COMMAND, \ ++ .arg = { \ ++ .cmd = { \ ++ .cmd = (_cmd), \ ++ .data = (_data), \ ++ }, \ ++ }, \ ++ } ++ ++static const struct ili9881c_instr ili9881c_init[] = { ++ ILI9881C_SWITCH_PAGE_INSTR(3), ++ ILI9881C_COMMAND_INSTR(0x01, 0x00), ++ ILI9881C_COMMAND_INSTR(0x02, 0x00), ++ ILI9881C_COMMAND_INSTR(0x03, 0x72), ++ ILI9881C_COMMAND_INSTR(0x04, 0x00), ++ ILI9881C_COMMAND_INSTR(0x05, 0x00), ++ ILI9881C_COMMAND_INSTR(0x06, 0x09), ++ ILI9881C_COMMAND_INSTR(0x07, 0x00), ++ ILI9881C_COMMAND_INSTR(0x08, 0x00), ++ ILI9881C_COMMAND_INSTR(0x09, 0x01), ++ ILI9881C_COMMAND_INSTR(0x0a, 0x00), ++ ILI9881C_COMMAND_INSTR(0x0b, 0x00), ++ ILI9881C_COMMAND_INSTR(0x0c, 0x01), ++ ILI9881C_COMMAND_INSTR(0x0d, 0x00), ++ ILI9881C_COMMAND_INSTR(0x0e, 0x00), ++ ILI9881C_COMMAND_INSTR(0x0f, 0x00), ++ ILI9881C_COMMAND_INSTR(0x10, 0x00), ++ ILI9881C_COMMAND_INSTR(0x11, 0x00), ++ ILI9881C_COMMAND_INSTR(0x12, 0x00), ++ ILI9881C_COMMAND_INSTR(0x13, 0x00), ++ ILI9881C_COMMAND_INSTR(0x14, 0x00), ++ ILI9881C_COMMAND_INSTR(0x15, 0x00), ++ ILI9881C_COMMAND_INSTR(0x16, 0x00), ++ ILI9881C_COMMAND_INSTR(0x17, 0x00), ++ ILI9881C_COMMAND_INSTR(0x18, 0x00), ++ ILI9881C_COMMAND_INSTR(0x19, 0x00), ++ ILI9881C_COMMAND_INSTR(0x1a, 0x00), ++ ILI9881C_COMMAND_INSTR(0x1b, 0x00), ++ ILI9881C_COMMAND_INSTR(0x1c, 0x00), ++ ILI9881C_COMMAND_INSTR(0x1d, 0x00), ++ ILI9881C_COMMAND_INSTR(0x1e, 0x40), ++ ILI9881C_COMMAND_INSTR(0x1f, 0x80), ++ ILI9881C_COMMAND_INSTR(0x20, 0x05), ++ ILI9881C_COMMAND_INSTR(0x20, 0x05), ++ ILI9881C_COMMAND_INSTR(0x21, 0x02), ++ ILI9881C_COMMAND_INSTR(0x22, 0x00), ++ ILI9881C_COMMAND_INSTR(0x23, 0x00), ++ ILI9881C_COMMAND_INSTR(0x24, 0x00), ++ ILI9881C_COMMAND_INSTR(0x25, 0x00), ++ ILI9881C_COMMAND_INSTR(0x26, 0x00), ++ ILI9881C_COMMAND_INSTR(0x27, 0x00), ++ ILI9881C_COMMAND_INSTR(0x28, 0x33), ++ ILI9881C_COMMAND_INSTR(0x29, 0x02), ++ ILI9881C_COMMAND_INSTR(0x2a, 0x00), ++ ILI9881C_COMMAND_INSTR(0x2b, 0x00), ++ ILI9881C_COMMAND_INSTR(0x2c, 0x00), ++ ILI9881C_COMMAND_INSTR(0x2d, 0x00), ++ ILI9881C_COMMAND_INSTR(0x2e, 0x00), ++ ILI9881C_COMMAND_INSTR(0x2f, 0x00), ++ ILI9881C_COMMAND_INSTR(0x30, 0x00), ++ ILI9881C_COMMAND_INSTR(0x31, 0x00), ++ ILI9881C_COMMAND_INSTR(0x32, 0x00), ++ ILI9881C_COMMAND_INSTR(0x32, 0x00), ++ ILI9881C_COMMAND_INSTR(0x33, 0x00), ++ ILI9881C_COMMAND_INSTR(0x34, 0x04), ++ ILI9881C_COMMAND_INSTR(0x35, 0x00), ++ ILI9881C_COMMAND_INSTR(0x36, 0x00), ++ ILI9881C_COMMAND_INSTR(0x37, 0x00), ++ ILI9881C_COMMAND_INSTR(0x38, 0x3C), ++ ILI9881C_COMMAND_INSTR(0x39, 0x00), ++ ILI9881C_COMMAND_INSTR(0x3a, 0x40), ++ ILI9881C_COMMAND_INSTR(0x3b, 0x40), ++ ILI9881C_COMMAND_INSTR(0x3c, 0x00), ++ ILI9881C_COMMAND_INSTR(0x3d, 0x00), ++ ILI9881C_COMMAND_INSTR(0x3e, 0x00), ++ ILI9881C_COMMAND_INSTR(0x3f, 0x00), ++ ILI9881C_COMMAND_INSTR(0x40, 0x00), ++ ILI9881C_COMMAND_INSTR(0x41, 0x00), ++ ILI9881C_COMMAND_INSTR(0x42, 0x00), ++ ILI9881C_COMMAND_INSTR(0x43, 0x00), ++ ILI9881C_COMMAND_INSTR(0x44, 0x00), ++ ILI9881C_COMMAND_INSTR(0x50, 0x01), ++ ILI9881C_COMMAND_INSTR(0x51, 0x23), ++ ILI9881C_COMMAND_INSTR(0x52, 0x45), ++ ILI9881C_COMMAND_INSTR(0x53, 0x67), ++ ILI9881C_COMMAND_INSTR(0x54, 0x89), ++ ILI9881C_COMMAND_INSTR(0x55, 0xab), ++ ILI9881C_COMMAND_INSTR(0x56, 0x01), ++ ILI9881C_COMMAND_INSTR(0x57, 0x23), ++ ILI9881C_COMMAND_INSTR(0x58, 0x45), ++ ILI9881C_COMMAND_INSTR(0x59, 0x67), ++ ILI9881C_COMMAND_INSTR(0x5a, 0x89), ++ ILI9881C_COMMAND_INSTR(0x5b, 0xab), ++ ILI9881C_COMMAND_INSTR(0x5c, 0xcd), ++ ILI9881C_COMMAND_INSTR(0x5d, 0xef), ++ ILI9881C_COMMAND_INSTR(0x5e, 0x11), ++ ILI9881C_COMMAND_INSTR(0x5f, 0x01), ++ ILI9881C_COMMAND_INSTR(0x60, 0x00), ++ ILI9881C_COMMAND_INSTR(0x61, 0x15), ++ ILI9881C_COMMAND_INSTR(0x62, 0x14), ++ ILI9881C_COMMAND_INSTR(0x63, 0x0E), ++ ILI9881C_COMMAND_INSTR(0x64, 0x0F), ++ ILI9881C_COMMAND_INSTR(0x65, 0x0C), ++ ILI9881C_COMMAND_INSTR(0x66, 0x0D), ++ ILI9881C_COMMAND_INSTR(0x67, 0x06), ++ ILI9881C_COMMAND_INSTR(0x68, 0x02), ++ ILI9881C_COMMAND_INSTR(0x69, 0x07), ++ ILI9881C_COMMAND_INSTR(0x6a, 0x02), ++ ILI9881C_COMMAND_INSTR(0x6b, 0x02), ++ ILI9881C_COMMAND_INSTR(0x6c, 0x02), ++ ILI9881C_COMMAND_INSTR(0x6d, 0x02), ++ ILI9881C_COMMAND_INSTR(0x6e, 0x02), ++ ILI9881C_COMMAND_INSTR(0x6f, 0x02), ++ ILI9881C_COMMAND_INSTR(0x70, 0x02), ++ ILI9881C_COMMAND_INSTR(0x71, 0x02), ++ ILI9881C_COMMAND_INSTR(0x72, 0x02), ++ ILI9881C_COMMAND_INSTR(0x73, 0x02), ++ ILI9881C_COMMAND_INSTR(0x74, 0x02), ++ ILI9881C_COMMAND_INSTR(0x75, 0x01), ++ ILI9881C_COMMAND_INSTR(0x76, 0x00), ++ ILI9881C_COMMAND_INSTR(0x77, 0x14), ++ ILI9881C_COMMAND_INSTR(0x78, 0x15), ++ ILI9881C_COMMAND_INSTR(0x79, 0x0E), ++ ILI9881C_COMMAND_INSTR(0x7a, 0x0F), ++ ILI9881C_COMMAND_INSTR(0x7b, 0x0C), ++ ILI9881C_COMMAND_INSTR(0x7c, 0x0D), ++ ILI9881C_COMMAND_INSTR(0x7d, 0x06), ++ ILI9881C_COMMAND_INSTR(0x7e, 0x02), ++ ILI9881C_COMMAND_INSTR(0x7f, 0x07), ++ ILI9881C_COMMAND_INSTR(0x80, 0x02), ++ ILI9881C_COMMAND_INSTR(0x81, 0x02), ++ ILI9881C_COMMAND_INSTR(0x83, 0x02), ++ ILI9881C_COMMAND_INSTR(0x84, 0x02), ++ ILI9881C_COMMAND_INSTR(0x85, 0x02), ++ ILI9881C_COMMAND_INSTR(0x86, 0x02), ++ ILI9881C_COMMAND_INSTR(0x87, 0x02), ++ ILI9881C_COMMAND_INSTR(0x88, 0x02), ++ ILI9881C_COMMAND_INSTR(0x89, 0x02), ++ ILI9881C_COMMAND_INSTR(0x8A, 0x02), ++ ILI9881C_SWITCH_PAGE_INSTR(0x4), ++ ILI9881C_COMMAND_INSTR(0x6C, 0x15), ++ ILI9881C_COMMAND_INSTR(0x6E, 0x2A), ++ ILI9881C_COMMAND_INSTR(0x6F, 0x33), ++ ILI9881C_COMMAND_INSTR(0x3A, 0x94), ++ ILI9881C_COMMAND_INSTR(0x8D, 0x15), ++ ILI9881C_COMMAND_INSTR(0x87, 0xBA), ++ ILI9881C_COMMAND_INSTR(0x26, 0x76), ++ ILI9881C_COMMAND_INSTR(0xB2, 0xD1), ++ ILI9881C_COMMAND_INSTR(0xB5, 0x06), ++ ILI9881C_SWITCH_PAGE_INSTR(0x1), ++ ILI9881C_COMMAND_INSTR(0x22, 0x0A), ++ ILI9881C_COMMAND_INSTR(0x31, 0x00), ++ ILI9881C_COMMAND_INSTR(0x53, 0x90), ++ ILI9881C_COMMAND_INSTR(0x55, 0xA2), ++ ILI9881C_COMMAND_INSTR(0x50, 0xB7), ++ ILI9881C_COMMAND_INSTR(0x51, 0xB7), ++ ILI9881C_COMMAND_INSTR(0x60, 0x22), ++ ILI9881C_COMMAND_INSTR(0x61, 0x00), ++ ILI9881C_COMMAND_INSTR(0x62, 0x19), ++ ILI9881C_COMMAND_INSTR(0x63, 0x10), ++ ILI9881C_COMMAND_INSTR(0xA0, 0x08), ++ ILI9881C_COMMAND_INSTR(0xA1, 0x1A), ++ ILI9881C_COMMAND_INSTR(0xA2, 0x27), ++ ILI9881C_COMMAND_INSTR(0xA3, 0x15), ++ ILI9881C_COMMAND_INSTR(0xA4, 0x17), ++ ILI9881C_COMMAND_INSTR(0xA5, 0x2A), ++ ILI9881C_COMMAND_INSTR(0xA6, 0x1E), ++ ILI9881C_COMMAND_INSTR(0xA7, 0x1F), ++ ILI9881C_COMMAND_INSTR(0xA8, 0x8B), ++ ILI9881C_COMMAND_INSTR(0xA9, 0x1B), ++ ILI9881C_COMMAND_INSTR(0xAA, 0x27), ++ ILI9881C_COMMAND_INSTR(0xAB, 0x78), ++ ILI9881C_COMMAND_INSTR(0xAC, 0x18), ++ ILI9881C_COMMAND_INSTR(0xAD, 0x18), ++ ILI9881C_COMMAND_INSTR(0xAE, 0x4C), ++ ILI9881C_COMMAND_INSTR(0xAF, 0x21), ++ ILI9881C_COMMAND_INSTR(0xB0, 0x27), ++ ILI9881C_COMMAND_INSTR(0xB1, 0x54), ++ ILI9881C_COMMAND_INSTR(0xB2, 0x67), ++ ILI9881C_COMMAND_INSTR(0xB3, 0x39), ++ ILI9881C_COMMAND_INSTR(0xC0, 0x08), ++ ILI9881C_COMMAND_INSTR(0xC1, 0x1A), ++ ILI9881C_COMMAND_INSTR(0xC2, 0x27), ++ ILI9881C_COMMAND_INSTR(0xC3, 0x15), ++ ILI9881C_COMMAND_INSTR(0xC4, 0x17), ++ ILI9881C_COMMAND_INSTR(0xC5, 0x2A), ++ ILI9881C_COMMAND_INSTR(0xC6, 0x1E), ++ ILI9881C_COMMAND_INSTR(0xC7, 0x1F), ++ ILI9881C_COMMAND_INSTR(0xC8, 0x8B), ++ ILI9881C_COMMAND_INSTR(0xC9, 0x1B), ++ ILI9881C_COMMAND_INSTR(0xCA, 0x27), ++ ILI9881C_COMMAND_INSTR(0xCB, 0x78), ++ ILI9881C_COMMAND_INSTR(0xCC, 0x18), ++ ILI9881C_COMMAND_INSTR(0xCD, 0x18), ++ ILI9881C_COMMAND_INSTR(0xCE, 0x4C), ++ ILI9881C_COMMAND_INSTR(0xCF, 0x21), ++ ILI9881C_COMMAND_INSTR(0xD0, 0x27), ++ ILI9881C_COMMAND_INSTR(0xD1, 0x54), ++ ILI9881C_COMMAND_INSTR(0xD2, 0x67), ++ ILI9881C_COMMAND_INSTR(0xD3, 0x39), ++ ILI9881C_SWITCH_PAGE_INSTR(0), ++ ILI9881C_COMMAND_INSTR(0x35, 0x00), ++ ILI9881C_COMMAND_INSTR(0x3A, 0x7), ++}; ++ ++struct ili9881c_panel_priv { ++ struct gpio_desc reset; ++ unsigned int lanes; ++ enum mipi_dsi_pixel_format format; ++ unsigned long mode_flags; ++}; ++ ++static const struct display_timing default_timing = { ++ .pixelclock.typ = ( 61776000 << 1 ), ++ .hactive.typ = LCD_XSIZE_TFT, ++ .hfront_porch.typ = LCD_HFPD, ++ .hback_porch.typ = LCD_HBPD, ++ .hsync_len.typ = LCD_HSPW, ++ .vactive.typ = LCD_YSIZE_TFT, ++ .vfront_porch.typ = LCD_VFPD, ++ .vback_porch.typ = LCD_VBPD, ++ .vsync_len.typ = LCD_VSPW, ++ .flags = DISPLAY_FLAGS_HSYNC_LOW | ++ DISPLAY_FLAGS_VSYNC_LOW | ++ DISPLAY_FLAGS_DE_LOW, ++}; ++ ++static u8 color_format_from_dsi_format(enum mipi_dsi_pixel_format format) ++{ ++ switch (format) { ++ case MIPI_DSI_FMT_RGB565: ++ return 0x55; ++ case MIPI_DSI_FMT_RGB666: ++ case MIPI_DSI_FMT_RGB666_PACKED: ++ return 0x66; ++ case MIPI_DSI_FMT_RGB888: ++ return 0x77; ++ default: ++ return 0x77; /* for backward compatibility */ ++ } ++}; ++ ++static int ili9881c_switch_page(struct mipi_dsi_device *dsi, u8 page) ++{ ++ u8 buf[4] = { 0xff, 0x98, 0x81, page }; ++ int ret; ++ ++ ret = mipi_dsi_dcs_write_buffer(dsi, buf, sizeof(buf)); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int ili9881c_send_cmd_data(struct mipi_dsi_device *dsi, u8 cmd, u8 data) ++{ ++ u8 buf[2] = { cmd, data }; ++ int ret; ++ ++ ret = mipi_dsi_dcs_write_buffer(dsi, buf, sizeof(buf)); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int ili9881c_enable(struct udevice *dev) ++{ ++ struct ili9881c_panel_priv *priv = dev_get_priv(dev); ++ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_device *dsi = plat->device; ++ u8 color_format = color_format_from_dsi_format(priv->format); ++ int ret; ++ unsigned int i; ++ ++ dsi->mode_flags |= MIPI_DSI_MODE_LPM; ++ ++ for (i = 0; i < ARRAY_SIZE(ili9881c_init); i++) { ++ const struct ili9881c_instr *instr = &ili9881c_init[i]; ++ ++ if (instr->op == ILI9881C_SWITCH_PAGE) ++ ret = ili9881c_switch_page(dsi, instr->arg.page); ++ else if (instr->op == ILI9881C_COMMAND) ++ ret = ili9881c_send_cmd_data(dsi, instr->arg.cmd.cmd, ++ instr->arg.cmd.data); ++ ++ if (ret) { ++ dev_warn(dev, "%s %d Failed command # = [ 0x%x ]; ret = [ %d ]\n",__func__,__LINE__,i,ret); ++ return ret; ++ } ++ } ++ ++ /* The default value is 4-lane mode ++ * Issue if 2-lane required ++ */ ++ if (dsi->lanes == 2) { ++ ret = ili9881c_switch_page(dsi, 1); ++ if (ret) ++ return ret; ++ ++ ret = ili9881c_send_cmd_data(dsi, 0xB7, 0x03); ++ if (ret) ++ return ret; ++ ++ ret = ili9881c_switch_page(dsi, 0); ++ if (ret) ++ return ret; ++ } ++ ++ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); ++ if (ret) ++ return ret; ++ ++ /* Set tear scanline */ ++ ret = mipi_dsi_dcs_set_tear_scanline(dsi, 0x380); ++ if (ret < 0) { ++ dev_warn(dev, "Failed to set tear scanline (%d)\n", ret); ++ return ret; ++ } ++ ++ /* Set pixel format */ ++ ret = mipi_dsi_dcs_set_pixel_format(dsi, color_format); ++ if (ret < 0) { ++ dev_warn(dev, "Failed to set pixel format (%d)\n", ret); ++ return ret; ++ } ++ ++ ret = mipi_dsi_dcs_set_display_brightness(dsi, 0xffff); ++ if (ret < 0) { ++ dev_warn(dev, "Failed to set display brightness (%d)\n", ret); ++ return ret; ++ } ++ ++ ret = mipi_dsi_dcs_exit_sleep_mode(dsi); ++ if (ret) { ++ dev_warn(dev, "Failed to exit sleep mode (%d)\n", ret); ++ return ret; ++ } ++ mdelay(120); ++ ++ ret = mipi_dsi_dcs_set_display_on(dsi); ++ if (ret) { ++ dev_warn(dev, "Failed to set display on (%d)\n", ret); ++ return ret; ++ } ++ mdelay(20); ++ ++ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; ++ ++ dev_dbg(dev,"Set %d-lane mode ; Color %d\n",dsi->lanes,color_format); ++ ++ return 0; ++} ++ ++static int ili9881c_panel_enable_backlight(struct udevice *dev) ++{ ++ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_device *device = plat->device; ++ int ret; ++ ++ ret = mipi_dsi_attach(device); ++ if (ret < 0) ++ return ret; ++ ++ return ili9881c_enable(dev); ++} ++ ++static int ili9881c_panel_get_display_timing(struct udevice *dev, ++ struct display_timing *timings) ++{ ++ struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_device *device = plat->device; ++ struct ili9881c_panel_priv *priv = dev_get_priv(dev); ++ ++ memcpy(timings, &default_timing, sizeof(*timings)); ++ ++ /* fill characteristics of DSI data link */ ++ if (device) { ++ device->lanes = priv->lanes; ++ device->format = priv->format; ++ device->mode_flags = priv->mode_flags; ++ } ++ ++ return 0; ++} ++ ++static int ili9881c_panel_probe(struct udevice *dev) ++{ ++ struct ili9881c_panel_priv *priv = dev_get_priv(dev); ++ int ret; ++ ++ priv->format = MIPI_DSI_FMT_RGB888; ++ priv->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE; ++ priv->mode_flags |= MIPI_DSI_MODE_VIDEO; ++ ++ ret = dev_read_u32(dev, "dsi-lanes", &priv->lanes); ++ if (ret) { ++ dev_warn(dev, "Failed to get dsi-lanes property (%d)\n", ret); ++ return ret; ++ } ++ ++ ret = gpio_request_by_name(dev, "reset-gpio", 0, &priv->reset, ++ GPIOD_IS_OUT); ++ if (ret) { ++ dev_warn(dev, "Warning: cannot get reset GPIO\n"); ++ if (ret != -ENOENT) ++ return ret; ++ } ++ ++ /* reset panel */ ++ ret = dm_gpio_set_value(&priv->reset, true); ++ if (ret) ++ dev_warn(dev, "reset gpio fails to set true\n"); ++ ++ mdelay(100); ++ ++ ret = dm_gpio_set_value(&priv->reset, false); ++ if (ret) ++ dev_warn(dev, "reset gpio fails to set true\n"); ++ ++ mdelay(100); ++ ++ return 0; ++} ++ ++static int ili9881c_panel_disable(struct udevice *dev) ++{ ++ struct ili9881c_panel_priv *priv = dev_get_priv(dev); ++ ++ dm_gpio_set_value(&priv->reset, true); ++ ++ return 0; ++} ++ ++static const struct panel_ops ili9881c_panel_ops = { ++ .enable_backlight = ili9881c_panel_enable_backlight, ++ .get_display_timing = ili9881c_panel_get_display_timing, ++}; ++ ++static const struct udevice_id ili9881c_panel_ids[] = { ++ { .compatible = "startek,ili9881c" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(ili9881c_panel) = { ++ .name = "ili9881c_panel", ++ .id = UCLASS_PANEL, ++ .of_match = ili9881c_panel_ids, ++ .ops = &ili9881c_panel_ops, ++ .probe = ili9881c_panel_probe, ++ .remove = ili9881c_panel_disable, ++ .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), ++ .priv_auto_alloc_size = sizeof(struct ili9881c_panel_priv), ++}; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0089-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0089-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch new file mode 100644 index 0000000..6e9c64a --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0089-cpl-imx8m-mini-Enable-startek-ili9881c-panel-support.patch @@ -0,0 +1,160 @@ +From 00f4bde0fd51e5657c17da0e2a906b9cf58086b8 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 24 Feb 2021 15:02:17 +0200 +Subject: [PATCH 089/126] cpl-imx8m-mini: Enable startek-ili9881c panel support + +Signed-off-by: Valentin Raevsky +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 57 ++++++++++++++++++++++++++++++++ + board/compulab/plat/imx8mm/board/board.c | 8 +++++ + include/configs/cpl-imx8m-mini.h | 7 ++-- + 3 files changed, 69 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index c37ad9c71d..98cdae0d22 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -43,6 +43,26 @@ + default-state = "on"; + }; + }; ++ ++ dsi_host: dsi-host { ++ compatible = "samsung,sec-mipi-dsi"; ++ status = "okay"; ++ }; ++ ++ ili9881c_panel { ++ compatible = "startek,ili9881c"; ++ reset-gpio = <&pca9555 6 GPIO_ACTIVE_LOW>; ++ dsi-lanes = <4>; ++ panel-width-mm = <63>; ++ panel-height-mm = <115>; ++ status = "okay"; ++ ++ port { ++ ili9881c_from_dsim: endpoint { ++ remote-endpoint = <&ili9881c_to_dsim>; ++ }; ++ }; ++ }; + }; + + &iomuxc { +@@ -245,6 +265,12 @@ + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + ++ pca9555:pca9555@20 { ++ compatible = "nxp,pca9555"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x20>; ++ }; + }; + + &i2c2 { +@@ -410,6 +436,24 @@ + status = "disabled"; + }; + ++&lcdif { ++ display = <&display0>; ++ status = "okay"; ++ display0: display@0 { ++ bits-per-pixel = <24>; ++ bus-width = <24>; ++ }; ++}; ++ ++&mipi_dsi { ++ status = "okay"; ++ port@1 { ++ ili9881c_to_dsim: endpoint { ++ remote-endpoint = <&ili9881c_from_dsim>; ++ }; ++ }; ++}; ++ + &fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; +@@ -488,3 +532,16 @@ + &cpu_crit0 { + temperature = <115000>; + }; ++ ++&lcdif { ++ enable_polarity_low; ++ /delete-property/ assigned-clocks; ++ /delete-property/ assigned-clock-parents; ++ /delete-property/ assigned-clock-rates; ++}; ++ ++&mipi_dsi { ++ /delete-property/ assigned-clocks; ++ /delete-property/ assigned-clock-parents; ++ /delete-property/ assigned-clock-rates; ++}; +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 5ea8fb8e41..25ee8eee97 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -283,6 +283,11 @@ static void disable_rtc_bus_on_battery(void) + return; + } + ++#define FSL_SIP_GPC 0xC2000000 ++#define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x3 ++#define DISPMIX 9 ++#define MIPI 10 ++ + int board_init(void) + { + +@@ -298,6 +303,9 @@ int board_init(void) + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + ++ call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); ++ call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); ++ + show_suite_info(); + return 0; + } +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index dd8120f4dc..d0252592f5 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -102,6 +102,7 @@ + /* Initial environment variables */ + #define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ ++ "splashimage=0x50000000\0" \ + "autoload=off\0" \ + "script=boot.scr\0" \ + "image=Image\0" \ +@@ -256,17 +257,17 @@ + #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) + #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +-#ifdef CONFIG_VIDEO ++#ifdef CONFIG_DM_VIDEO + #define CONFIG_VIDEO_MXS + #define CONFIG_VIDEO_LOGO + #define CONFIG_SPLASH_SCREEN + #define CONFIG_SPLASH_SCREEN_ALIGN + #define CONFIG_CMD_BMP + #define CONFIG_BMP_16BPP ++#define CONFIG_BMP_24BPP ++#define CONFIG_BMP_32BPP + #define CONFIG_VIDEO_BMP_RLE8 + #define CONFIG_VIDEO_BMP_LOGO +-#define CONFIG_IMX_VIDEO_SKIP +-#define CONFIG_RM67191 + #endif + + #define CONFIG_BOARD_POSTCLK_INIT +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0090-cm-imx8m-mini-config-Enable-startek-ili9881c.patch b/recipes-bsp/u-boot/compulab/imx8mm/0090-cm-imx8m-mini-config-Enable-startek-ili9881c.patch new file mode 100644 index 0000000..00b6f32 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0090-cm-imx8m-mini-config-Enable-startek-ili9881c.patch @@ -0,0 +1,69 @@ +From f883f4b9684b99d51b6081dd722ca1a9079920ae Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Wed, 24 Feb 2021 15:06:16 +0200 +Subject: [PATCH 090/126] cm-imx8m-mini: config: Enable startek-ili9881c + +Signed-off-by: Valentin Raevsky +--- + configs/mcm-imx8m-mini_defconfig | 5 +++++ + configs/ucm-imx8m-mini_defconfig | 7 ++++++- + 2 files changed, 11 insertions(+), 1 deletion(-) + +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/mcm-imx8m-mini_defconfig +index cf388e99a5..a54442424e 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/mcm-imx8m-mini_defconfig +@@ -60,6 +60,7 @@ CONFIG_SYSCON=y + CONFIG_CLK_COMPOSITE_CCF=y + CONFIG_CLK_IMX8MM=y + CONFIG_MXC_GPIO=y ++CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y + CONFIG_SYS_I2C_MXC=y + CONFIG_DM_MMC=y +@@ -92,6 +93,10 @@ CONFIG_SDP_LOADADDR=0x40400000 + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y ++CONFIG_VIDEO_IMX_SEC_DSI=y + CONFIG_EXT4_WRITE=y + CONFIG_FAT_WRITE=y + CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 9fb020d256..9abb9bfd7c 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -45,7 +45,7 @@ CONFIG_CMD_DHCP=y + CONFIG_CMD_MII=y + CONFIG_CMD_PING=y + CONFIG_CMD_CACHE=y +-CONFIG_CMD_REGULATOR= ++CONFIG_CMD_REGULATOR=y + CONFIG_CMD_EXT2=y + CONFIG_CMD_EXT4=y + CONFIG_CMD_FAT=y +@@ -61,6 +61,7 @@ CONFIG_SYSCON=y + CONFIG_CLK_COMPOSITE_CCF=y + CONFIG_CLK_IMX8MM=y + CONFIG_MXC_GPIO=y ++CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y + CONFIG_SYS_I2C_MXC=y + CONFIG_DM_MMC=y +@@ -93,6 +94,10 @@ CONFIG_SDP_LOADADDR=0x40400000 + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y ++CONFIG_VIDEO_IMX_SEC_DSI=y + CONFIG_EXT4_WRITE=y + CONFIG_FAT_WRITE=y + CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0091-Migration-to-5.10.35.patch b/recipes-bsp/u-boot/compulab/imx8mm/0091-Migration-to-5.10.35.patch new file mode 100644 index 0000000..7271fed --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0091-Migration-to-5.10.35.patch @@ -0,0 +1,222 @@ +From 03c848abfef43d14fa20ddd56e6de56b5a97b587 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 20 Jul 2021 23:50:14 +0300 +Subject: [PATCH 091/126] Migration to 5.10.35 + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/board/board.c | 12 +++++++++--- + board/compulab/plat/imx8mm/ddr/ddr.c | 2 +- + board/compulab/plat/imx8mm/spl/common.c | 1 + + board/compulab/plat/imx8mm/spl/spl.c | 14 +++++++------- + configs/ucm-imx8m-mini_defconfig | 2 +- + drivers/video/startek-ili9881c.c | 24 +++++++++++++----------- + include/configs/cpl-imx8m-mini.h | 2 -- + 7 files changed, 32 insertions(+), 25 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 25ee8eee97..e0d10a87f7 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -29,6 +29,8 @@ + #include + #include + #include ++#include ++#include + #include + #include "ddr/ddr.h" + #include "common/eeprom.h" +@@ -136,7 +138,7 @@ static int fdt_set_env_addr(void *blob) + return 0; + } + +-int ft_board_setup(void *blob, bd_t *bd) ++int ft_board_setup(void *blob, struct bd_info *bd) + { + fdt_set_env_addr(blob); + fdt_set_sn(blob); +@@ -291,6 +293,8 @@ static void disable_rtc_bus_on_battery(void) + int board_init(void) + { + ++ struct arm_smccc_res res; ++ + disable_rtc_bus_on_battery(); + + #ifdef CONFIG_FEC_MXC +@@ -303,8 +307,10 @@ int board_init(void) + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, DISPMIX, true, 0); +- call_imx_sip(FSL_SIP_GPC, FSL_SIP_CONFIG_GPC_PM_DOMAIN, MIPI, true, 0); ++ arm_smccc_smc(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, ++ DISPMIX, true, 0, 0, 0, 0, &res); ++ arm_smccc_smc(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, ++ MIPI, true, 0, 0, 0, 0, &res); + + show_suite_info(); + return 0; +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 7ba199f55a..ff337f9223 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -13,8 +13,8 @@ + #include + #include + #include ++#include + #include "ddr.h" +-#include "../ucm-imx8m-mini.h" + + /* Forward declarations */ + u32 cl_eeprom_get_ddrinfo(void); +diff --git a/board/compulab/plat/imx8mm/spl/common.c b/board/compulab/plat/imx8mm/spl/common.c +index 5f1d1e5b97..14ef0e6b8f 100644 +--- a/board/compulab/plat/imx8mm/spl/common.c ++++ b/board/compulab/plat/imx8mm/spl/common.c +@@ -2,6 +2,7 @@ + #include + #include + #include ++#include + #include + + #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +index 63af88caa5..c82d59ab1e 100644 +--- a/board/compulab/plat/imx8mm/spl/spl.c ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -91,7 +91,7 @@ static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR, 0, 8}, + }; + +-int board_mmc_init(bd_t *bis) ++int board_mmc_init(struct bd_info *bis) + { + int i, ret; + /* +@@ -168,22 +168,22 @@ int power_init_board(void) + + + /* decrease RESET key long push time from the default 10s to 10ms */ +- pmic_reg_write(p, BD71837_PWRONCONFIG1, 0x0); ++ pmic_reg_write(p, BD718XX_PWRONCONFIG1, 0x0); + + /* unlock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x1); ++ pmic_reg_write(p, BD718XX_REGLOCK, 0x1); + + /* decrease VDD_ARM to 0.85V for 1.2GHz operation */ +- pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); ++ pmic_reg_write(p, BD718XX_BUCK1_VOLT_RUN, 0x0f); + + /* increase VDD_DRAM to 0.975V (9v5 required but not supported)*/ +- pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); ++ pmic_reg_write(p, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83); + + /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ +- pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); ++ pmic_reg_write(p, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28); + + /* lock the PMIC regs */ +- pmic_reg_write(p, BD71837_REGLOCK, 0x11); ++ pmic_reg_write(p, BD718XX_REGLOCK, 0x11); + + return 0; + } +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +index 9abb9bfd7c..8595b6b86a 100644 +--- a/configs/ucm-imx8m-mini_defconfig ++++ b/configs/ucm-imx8m-mini_defconfig +@@ -1,3 +1,4 @@ ++CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.2" + CONFIG_ARM=y + CONFIG_SPL_SYS_ICACHE_OFF=y + CONFIG_SPL_SYS_DCACHE_OFF=y +@@ -14,7 +15,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y + CONFIG_SPL=y + CONFIG_CSF_SIZE=0x2000 + CONFIG_SPL_TEXT_BASE=0x7E1000 +-CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.0" + CONFIG_FIT=y + CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +diff --git a/drivers/video/startek-ili9881c.c b/drivers/video/startek-ili9881c.c +index d7c32a0de4..0615dba17f 100644 +--- a/drivers/video/startek-ili9881c.c ++++ b/drivers/video/startek-ili9881c.c +@@ -11,6 +11,8 @@ + #include + #include + #include ++#include ++#include + + #define LCD_XSIZE_TFT 720 + #define LCD_YSIZE_TFT 1280 +@@ -318,7 +320,7 @@ static int ili9881c_send_cmd_data(struct mipi_dsi_device *dsi, u8 cmd, u8 data) + static int ili9881c_enable(struct udevice *dev) + { + struct ili9881c_panel_priv *priv = dev_get_priv(dev); +- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + struct mipi_dsi_device *dsi = plat->device; + u8 color_format = color_format_from_dsi_format(priv->format); + int ret; +@@ -405,7 +407,7 @@ static int ili9881c_enable(struct udevice *dev) + + static int ili9881c_panel_enable_backlight(struct udevice *dev) + { +- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + struct mipi_dsi_device *device = plat->device; + int ret; + +@@ -419,7 +421,7 @@ static int ili9881c_panel_enable_backlight(struct udevice *dev) + static int ili9881c_panel_get_display_timing(struct udevice *dev, + struct display_timing *timings) + { +- struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); ++ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + struct mipi_dsi_device *device = plat->device; + struct ili9881c_panel_priv *priv = dev_get_priv(dev); + +@@ -494,12 +496,12 @@ static const struct udevice_id ili9881c_panel_ids[] = { + }; + + U_BOOT_DRIVER(ili9881c_panel) = { +- .name = "ili9881c_panel", +- .id = UCLASS_PANEL, +- .of_match = ili9881c_panel_ids, +- .ops = &ili9881c_panel_ops, +- .probe = ili9881c_panel_probe, +- .remove = ili9881c_panel_disable, +- .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), +- .priv_auto_alloc_size = sizeof(struct ili9881c_panel_priv), ++ .name = "ili9881c_panel", ++ .id = UCLASS_PANEL, ++ .of_match = ili9881c_panel_ids, ++ .ops = &ili9881c_panel_ops, ++ .probe = ili9881c_panel_probe, ++ .remove = ili9881c_panel_disable, ++ .plat_auto = sizeof(struct mipi_dsi_panel_plat), ++ .priv_auto = sizeof(struct ili9881c_panel_priv), + }; +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index d0252592f5..23c2623130 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -182,8 +182,6 @@ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + + #define CONFIG_ENV_OVERWRITE +-#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +-#define CONFIG_SYS_MMC_ENV_PART 1 + #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + + /* Size of malloc() pool */ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0092-Fix-mmc_autodetect.patch b/recipes-bsp/u-boot/compulab/imx8mm/0092-Fix-mmc_autodetect.patch new file mode 100644 index 0000000..1674804 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0092-Fix-mmc_autodetect.patch @@ -0,0 +1,26 @@ +From 1fd2b5d87571cbf9cbd70f19577ef7566102bf96 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Thu, 26 Aug 2021 01:04:37 +0300 +Subject: [PATCH 092/126] Fix mmc_autodetect + +Signed-off-by: Kirill Kapranov +Suggested-by: Marc Haesen +--- + board/compulab/common/mmc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/board/compulab/common/mmc.c b/board/compulab/common/mmc.c +index 9d6bf38282..dfa4259b8f 100644 +--- a/board/compulab/common/mmc.c ++++ b/board/compulab/common/mmc.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + static int check_mmc_autodetect(void) + { +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0093-config-Enable-video.patch b/recipes-bsp/u-boot/compulab/imx8mm/0093-config-Enable-video.patch new file mode 100644 index 0000000..56ec2ea --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0093-config-Enable-video.patch @@ -0,0 +1,29 @@ +From 9f1eca9455fd282ac47506b520d8e73881551150 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 14 Sep 2021 22:44:44 +0300 +Subject: [PATCH 093/126] config: Enable video + +Signed-off-by: Kirill Kapranov +--- + include/configs/cpl-imx8m-mini.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index 23c2623130..a65d86e253 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -258,9 +258,9 @@ + #ifdef CONFIG_DM_VIDEO + #define CONFIG_VIDEO_MXS + #define CONFIG_VIDEO_LOGO +-#define CONFIG_SPLASH_SCREEN ++#define CONFIG_SPLASH_SCREEN 1 + #define CONFIG_SPLASH_SCREEN_ALIGN +-#define CONFIG_CMD_BMP ++#define CONFIG_CMD_BMP 1 + #define CONFIG_BMP_16BPP + #define CONFIG_BMP_24BPP + #define CONFIG_BMP_32BPP +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0094-mmc-Fix-mmc_switch-workflow-issue.patch b/recipes-bsp/u-boot/compulab/imx8mm/0094-mmc-Fix-mmc_switch-workflow-issue.patch new file mode 100644 index 0000000..e188d2e --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0094-mmc-Fix-mmc_switch-workflow-issue.patch @@ -0,0 +1,36 @@ +From ed9a23dd10e2e8f0b682f95b195d64ec019d7f04 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 3 Oct 2021 01:41:43 +0300 +Subject: [PATCH 094/126] mmc: Fix mmc_switch workflow issue + +Revert the patch 9a461acedebe664cf1e557c3b9ec983e6b04e805, that introduces +premature falling back on a long timeout instead of continuation of the +initialization. +Clear the ambiguity of the comment that led this. + +Signed-off-by: Kirill Kapranov +--- + drivers/mmc/mmc.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c +index 785ebc0cd3..6d9766a697 100644 +--- a/drivers/mmc/mmc.c ++++ b/drivers/mmc/mmc.c +@@ -819,11 +819,11 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, + return ret; + + /* +- * In cases when not allowed to poll by using CMD13 or because we aren't ++ * In cases we aren't allowed to poll by using CMD13, nor are we + * capable of polling by using mmc_wait_dat0, then rely on waiting the + * stated timeout to be sufficient. + */ +- if (ret == -ENOSYS || !send_status) { ++ if (ret == -ENOSYS && !send_status) { + mdelay(timeout_ms); + return 0; + } +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0095-defconfig-Break-down-to-common-and-specific-parts.patch b/recipes-bsp/u-boot/compulab/imx8mm/0095-defconfig-Break-down-to-common-and-specific-parts.patch new file mode 100644 index 0000000..7f3c507 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0095-defconfig-Break-down-to-common-and-specific-parts.patch @@ -0,0 +1,324 @@ +From e27b606de23eb3acc3fbd1f50a9ded274720b2ef Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 4 Oct 2021 00:18:04 +0300 +Subject: [PATCH 095/126] defconfig: Break down to common and specific parts + +Signed-off-by: Kirill Kapranov +--- + ...mx8m-mini_defconfig => cl-imx8m-mini_defconfig} | 4 - + configs/iot-gate-imx8.config | 15 +++ + configs/iot-gate-imx8_defconfig | 102 -------------------- + configs/mcm-imx8m-mini.config | 5 + + configs/ucm-imx8m-mini.config | 5 + + configs/ucm-imx8m-mini_defconfig | 106 --------------------- + 6 files changed, 25 insertions(+), 212 deletions(-) + rename configs/{mcm-imx8m-mini_defconfig => cl-imx8m-mini_defconfig} (93%) + create mode 100644 configs/iot-gate-imx8.config + delete mode 100644 configs/iot-gate-imx8_defconfig + create mode 100644 configs/mcm-imx8m-mini.config + create mode 100644 configs/ucm-imx8m-mini.config + delete mode 100644 configs/ucm-imx8m-mini_defconfig + +diff --git a/configs/mcm-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig +similarity index 93% +rename from configs/mcm-imx8m-mini_defconfig +rename to configs/cl-imx8m-mini_defconfig +index a54442424e..b54110b42f 100644 +--- a/configs/mcm-imx8m-mini_defconfig ++++ b/configs/cl-imx8m-mini_defconfig +@@ -7,13 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y + CONFIG_ENV_SIZE=0x1000 + CONFIG_ENV_OFFSET=0x4400 + CONFIG_DM_GPIO=y +-CONFIG_TARGET_MCM_IMX8M_MINI=y + CONFIG_SPL_MMC_SUPPORT=y + CONFIG_SPL_SERIAL_SUPPORT=y + CONFIG_SPL=y + CONFIG_CSF_SIZE=0x2000 + CONFIG_SPL_TEXT_BASE=0x7E1000 +-CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.0" + CONFIG_FIT=y + CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_LOAD_FIT=y +@@ -21,7 +19,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" + CONFIG_OF_SYSTEM_SETUP=y + CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" + CONFIG_CONSOLE_MUX=y +-CONFIG_DEFAULT_FDT_FILE="mcm-imx8m-mini.dtb" + CONFIG_BOARD_LATE_INIT=y + CONFIG_ARCH_MISC_INIT=y + CONFIG_BOARD_EARLY_INIT_F=y +@@ -51,7 +48,6 @@ CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y + CONFIG_EFI_PARTITION=y + CONFIG_OF_CONTROL=y +-CONFIG_DEFAULT_DEVICE_TREE="mcm-imx8m-mini" + CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +new file mode 100644 +index 0000000000..af0eed3983 +--- /dev/null ++++ b/configs/iot-gate-imx8.config +@@ -0,0 +1,15 @@ ++CONFIG_TARGET_IOT_GATE_IMX8=y ++CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" ++CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" ++CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" ++CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" ++CONFIG_DM_PCA953X=n ++CONFIG_DM_RESET=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_PSCI=y ++CONFIG_DM_VIDEO=n ++CONFIG_SYS_WHITE_ON_BLACK=n ++CONFIG_VIDEO_LCD_STARTEK_ILI9881C=n ++CONFIG_VIDEO_IMX_SEC_DSI=n ++CONFIG_LED=n ++CONFIG_LED_GPIO=n +diff --git a/configs/iot-gate-imx8_defconfig b/configs/iot-gate-imx8_defconfig +deleted file mode 100644 +index 39c448eca0..0000000000 +--- a/configs/iot-gate-imx8_defconfig ++++ /dev/null +@@ -1,102 +0,0 @@ +-CONFIG_ARM=y +-CONFIG_SPL_SYS_ICACHE_OFF=y +-CONFIG_SPL_SYS_DCACHE_OFF=y +-CONFIG_ARCH_IMX8M=y +-CONFIG_SYS_TEXT_BASE=0x40200000 +-CONFIG_SPL_GPIO_SUPPORT=y +-CONFIG_ENV_SIZE=0x1000 +-CONFIG_ENV_OFFSET=0x4400 +-CONFIG_DM_GPIO=y +-CONFIG_TARGET_IOT_GATE_IMX8=y +-CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" +-CONFIG_SPL_MMC_SUPPORT=y +-CONFIG_SPL_SERIAL_SUPPORT=y +-CONFIG_SPL=y +-CONFIG_CSF_SIZE=0x2000 +-CONFIG_SPL_TEXT_BASE=0x7E1000 +-CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" +-CONFIG_FIT=y +-CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +-CONFIG_SPL_LOAD_FIT=y +-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +-CONFIG_OF_SYSTEM_SETUP=y +-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" +-CONFIG_CONSOLE_MUX=y +-CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" +-CONFIG_BOARD_LATE_INIT=y +-CONFIG_ARCH_MISC_INIT=y +-CONFIG_BOARD_EARLY_INIT_F=y +-CONFIG_SPL_BOARD_INIT=y +-CONFIG_SPL_SEPARATE_BSS=y +-CONFIG_SPL_POWER_SUPPORT=y +-CONFIG_HUSH_PARSER=y +-CONFIG_SYS_PROMPT="u-boot=> " +-# CONFIG_BOOTM_NETBSD is not set +-CONFIG_CMD_EEPROM=y +-CONFIG_CMD_EEPROM_LAYOUT=y +-CONFIG_CMD_MEMINFO=y +-CONFIG_CMD_MEMTEST=y +-CONFIG_CMD_CLK=y +-CONFIG_CMD_FUSE=y +-CONFIG_CMD_GPIO=y +-CONFIG_CMD_I2C=y +-CONFIG_CMD_MMC=y +-CONFIG_CMD_DHCP=y +-CONFIG_CMD_MII=y +-CONFIG_CMD_PING=y +-CONFIG_CMD_CACHE=y +-CONFIG_CMD_REGULATOR=y +-CONFIG_CMD_EXT2=y +-CONFIG_CMD_EXT4=y +-CONFIG_CMD_FAT=y +-CONFIG_CMD_FS_GENERIC=y +-CONFIG_EFI_PARTITION=y +-CONFIG_OF_CONTROL=y +-CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" +-CONFIG_ENV_IS_IN_MMC=y +-CONFIG_SYS_RELOC_GD_ENV_ADDR=y +-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-CONFIG_REGMAP=y +-CONFIG_SYSCON=y +-CONFIG_CLK_COMPOSITE_CCF=y +-CONFIG_CLK_IMX8MM=y +-CONFIG_MXC_GPIO=y +-CONFIG_DM_I2C=y +-CONFIG_SYS_I2C_MXC=y +-CONFIG_DM_MMC=y +-CONFIG_SUPPORT_EMMC_BOOT=y +-CONFIG_MMC_IO_VOLTAGE=y +-CONFIG_MMC_UHS_SUPPORT=y +-CONFIG_MMC_HS400_ES_SUPPORT=y +-CONFIG_MMC_HS400_SUPPORT=y +-CONFIG_FSL_ESDHC_IMX=y +-CONFIG_DM_ETH=y +-CONFIG_FEC_MXC=y +-CONFIG_MII=y +-CONFIG_PINCTRL=y +-CONFIG_PINCTRL_IMX8M=y +-CONFIG_DM_REGULATOR=y +-CONFIG_DM_REGULATOR_FIXED=y +-CONFIG_DM_REGULATOR_GPIO=y +-CONFIG_DM_RESET=y +-CONFIG_MXC_UART=y +-CONFIG_SYSRESET=y +-CONFIG_SYSRESET_PSCI=y +-CONFIG_DM_THERMAL=y +-CONFIG_NXP_TMU=y +-CONFIG_USB=y +-CONFIG_DM_USB=y +-CONFIG_USB_EHCI_HCD=y +-CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_MANUFACTURER="FSL" +-CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +-CONFIG_CI_UDC=y +-CONFIG_SDP_LOADADDR=0x40400000 +-CONFIG_USB_GADGET_DOWNLOAD=y +-CONFIG_USB_HOST_ETHER=y +-CONFIG_USB_ETHER_ASIX88179=y +-CONFIG_EXT4_WRITE=y +-CONFIG_FAT_WRITE=y +-CONFIG_OF_LIBFDT_OVERLAY=y +-# CONFIG_EFI_LOADER is not set +diff --git a/configs/mcm-imx8m-mini.config b/configs/mcm-imx8m-mini.config +new file mode 100644 +index 0000000000..bf8ebeee96 +--- /dev/null ++++ b/configs/mcm-imx8m-mini.config +@@ -0,0 +1,5 @@ ++CONFIG_LOCALVERSION="-mcm-imx8m-mini-2.2" ++CONFIG_TARGET_MCM_IMX8M_MINI=y ++CONFIG_DEFAULT_DTB="mcm-imx8m-mini.dtb" ++CONFIG_DEFAULT_FDT_FILE="mcm-imx8m-mini.dtb" ++CONFIG_DEFAULT_DEVICE_TREE="mcm-imx8m-mini" +diff --git a/configs/ucm-imx8m-mini.config b/configs/ucm-imx8m-mini.config +new file mode 100644 +index 0000000000..41d00fe549 +--- /dev/null ++++ b/configs/ucm-imx8m-mini.config +@@ -0,0 +1,5 @@ ++CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.1" ++CONFIG_TARGET_UCM_IMX8M_MINI=y ++CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" ++CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" ++CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" +diff --git a/configs/ucm-imx8m-mini_defconfig b/configs/ucm-imx8m-mini_defconfig +deleted file mode 100644 +index 8595b6b86a..0000000000 +--- a/configs/ucm-imx8m-mini_defconfig ++++ /dev/null +@@ -1,106 +0,0 @@ +-CONFIG_LOCALVERSION="-ucm-imx8m-mini-2.2" +-CONFIG_ARM=y +-CONFIG_SPL_SYS_ICACHE_OFF=y +-CONFIG_SPL_SYS_DCACHE_OFF=y +-CONFIG_ARCH_IMX8M=y +-CONFIG_SYS_TEXT_BASE=0x40200000 +-CONFIG_SPL_GPIO_SUPPORT=y +-CONFIG_ENV_SIZE=0x1000 +-CONFIG_ENV_OFFSET=0x4400 +-CONFIG_DM_GPIO=y +-CONFIG_TARGET_UCM_IMX8M_MINI=y +-CONFIG_DEFAULT_DTB="ucm-imx8m-mini.dtb" +-CONFIG_SPL_MMC_SUPPORT=y +-CONFIG_SPL_SERIAL_SUPPORT=y +-CONFIG_SPL=y +-CONFIG_CSF_SIZE=0x2000 +-CONFIG_SPL_TEXT_BASE=0x7E1000 +-CONFIG_FIT=y +-CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +-CONFIG_OF_SYSTEM_SETUP=y +-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" +-CONFIG_CONSOLE_MUX=y +-CONFIG_SPL_LOAD_FIT=y +-CONFIG_DEFAULT_FDT_FILE="ucm-imx8m-mini.dtb" +-CONFIG_BOARD_LATE_INIT=y +-CONFIG_ARCH_MISC_INIT=y +-CONFIG_BOARD_EARLY_INIT_F=y +-CONFIG_SPL_BOARD_INIT=y +-CONFIG_SPL_SEPARATE_BSS=y +-CONFIG_SPL_POWER_SUPPORT=y +-CONFIG_HUSH_PARSER=y +-CONFIG_SYS_PROMPT="u-boot=> " +-# CONFIG_BOOTM_NETBSD is not set +-CONFIG_CMD_EEPROM=y +-CONFIG_CMD_EEPROM_LAYOUT=y +-CONFIG_CMD_MEMINFO=y +-CONFIG_CMD_MEMTEST=y +-config_cmd_clk=y +-config_cmd_fuse=y +-CONFIG_CMD_GPIO=y +-CONFIG_CMD_I2C=y +-CONFIG_CMD_MMC=y +-CONFIG_CMD_DHCP=y +-CONFIG_CMD_MII=y +-CONFIG_CMD_PING=y +-CONFIG_CMD_CACHE=y +-CONFIG_CMD_REGULATOR=y +-CONFIG_CMD_EXT2=y +-CONFIG_CMD_EXT4=y +-CONFIG_CMD_FAT=y +-CONFIG_CMD_FS_GENERIC=y +-CONFIG_EFI_PARTITION=y +-CONFIG_OF_CONTROL=y +-CONFIG_DEFAULT_DEVICE_TREE="ucm-imx8m-mini" +-CONFIG_ENV_IS_IN_MMC=y +-CONFIG_SYS_RELOC_GD_ENV_ADDR=y +-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +-CONFIG_REGMAP=y +-CONFIG_SYSCON=y +-CONFIG_CLK_COMPOSITE_CCF=y +-CONFIG_CLK_IMX8MM=y +-CONFIG_MXC_GPIO=y +-CONFIG_DM_PCA953X=y +-CONFIG_DM_I2C=y +-CONFIG_SYS_I2C_MXC=y +-CONFIG_DM_MMC=y +-CONFIG_SUPPORT_EMMC_BOOT=y +-CONFIG_MMC_IO_VOLTAGE=y +-CONFIG_MMC_UHS_SUPPORT=y +-CONFIG_MMC_HS400_ES_SUPPORT=y +-CONFIG_MMC_HS400_SUPPORT=y +-CONFIG_FSL_ESDHC_IMX=y +-CONFIG_DM_ETH=y +-CONFIG_FEC_MXC=y +-CONFIG_MII=y +-CONFIG_PINCTRL=y +-CONFIG_PINCTRL_IMX8M=y +-CONFIG_DM_REGULATOR=y +-CONFIG_DM_REGULATOR_FIXED=y +-CONFIG_DM_REGULATOR_GPIO=y +-CONFIG_MXC_UART=y +-CONFIG_DM_THERMAL=y +-CONFIG_NXP_TMU=y +-CONFIG_USB=y +-CONFIG_DM_USB=y +-CONFIG_USB_EHCI_HCD=y +-CONFIG_USB_GADGET=y +-CONFIG_USB_GADGET_MANUFACTURER="FSL" +-CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +-CONFIG_CI_UDC=y +-CONFIG_SDP_LOADADDR=0x40400000 +-CONFIG_USB_GADGET_DOWNLOAD=y +-CONFIG_USB_HOST_ETHER=y +-CONFIG_USB_ETHER_ASIX88179=y +-CONFIG_DM_VIDEO=y +-CONFIG_SYS_WHITE_ON_BLACK=y +-CONFIG_VIDEO_LCD_STARTEK_ILI9881C=y +-CONFIG_VIDEO_IMX_SEC_DSI=y +-CONFIG_EXT4_WRITE=y +-CONFIG_FAT_WRITE=y +-CONFIG_OF_LIBFDT_OVERLAY=y +-# CONFIG_EFI_LOADER is not set +-CONFIG_LED=y +-CONFIG_LED_GPIO=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0096-spl-lpddr-training-size-optimisation.patch b/recipes-bsp/u-boot/compulab/imx8mm/0096-spl-lpddr-training-size-optimisation.patch new file mode 100644 index 0000000..e6323c3 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0096-spl-lpddr-training-size-optimisation.patch @@ -0,0 +1,7022 @@ +From 25c370cb630cd2471dbac94f9b0379427487d9e3 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 14 Mar 2022 10:23:37 +0200 +Subject: [PATCH 096/126] spl: lpddr training size optimisation + +LPDDR training tables have been shrunk by means of unification and +common parts detachment. + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/ddr/Makefile | 14 +- + board/compulab/plat/imx8mm/ddr/ddr.c | 5 + + .../plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h | 724 ++++++++ + ...lpddr4_timing_01050008.c => lpddr4_timing_01.c} | 847 ++------- + .../plat/imx8mm/ddr/lpddr4_timing_01061010.c | 1848 -------------------- + ...lpddr4_timing_05000010.c => lpddr4_timing_05.c} | 724 -------- + ...lpddr4_timing_ff020008.c => lpddr4_timing_ff.c} | 849 ++------- + .../plat/imx8mm/ddr/lpddr4_timing_ff000110.c | 1848 -------------------- + 8 files changed, 977 insertions(+), 5882 deletions(-) + create mode 100644 board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h + rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_01050008.c => lpddr4_timing_01.c} (58%) + delete mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c + rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_05000010.c => lpddr4_timing_05.c} (58%) + rename board/compulab/plat/imx8mm/ddr/{lpddr4_timing_ff020008.c => lpddr4_timing_ff.c} (58%) + delete mode 100644 board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c + +diff --git a/board/compulab/plat/imx8mm/ddr/Makefile b/board/compulab/plat/imx8mm/ddr/Makefile +index daf9c67950..db35e41c71 100644 +--- a/board/compulab/plat/imx8mm/ddr/Makefile ++++ b/board/compulab/plat/imx8mm/ddr/Makefile +@@ -1,8 +1,6 @@ +-+obj-y += ddr.o +-+obj-y += lpddr4_timing_ff020008.o +-+obj-y += lpddr4_timing_ff000110.o +-+obj-y += lpddr4_timing_01061010.o +-+obj-y += lpddr4_timing_01050008.o +-+ifndef CONFIG_TARGET_MCM_IMX8M_MINI +-+obj-y += lpddr4_timing_05000010.o +-+endif ++obj-y += ddr.o ++obj-y += lpddr4_timing_ff.o ++obj-y += lpddr4_timing_01.o ++ifndef CONFIG_TARGET_MCM_IMX8M_MINI ++obj-y += lpddr4_timing_05.o ++endif +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index ff337f9223..5d2d883d23 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -15,6 +15,7 @@ + #include + #include + #include "ddr.h" ++#include "ddr_ddrphy_trained_csr.h" + + /* Forward declarations */ + u32 cl_eeprom_get_ddrinfo(void); +@@ -168,6 +169,10 @@ void spl_dram_init(void) + printf("DDRINFO(%s): %s %dG @ %d MHz\n", (ddr_found ? "D" : "?" ), lpddr4_array[i].name, + lpddr4_array[i].size, lpddr4_array[i].timing->fsp_table[0]); + ++ //Initialize the common part of all trainigs ++ lpddr4_array[i].timing->ddrphy_trained_csr = ddr_ddrphy_trained_csr; ++ lpddr4_array[i].timing->ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr); ++ + if (ddr_init(lpddr4_array[i].timing)) { + SPL_TCM_INIT; + do_reset(NULL,0,0,NULL); +diff --git a/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h b/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h +new file mode 100644 +index 0000000000..ec0a3e463f +--- /dev/null ++++ b/board/compulab/plat/imx8mm/ddr/ddr_ddrphy_trained_csr.h +@@ -0,0 +1,724 @@ ++#include ++ ++/* ddr phy trained csr */ ++struct dram_cfg_param ddr_ddrphy_trained_csr[] = { ++ { 0x200b2, 0x0 }, ++ { 0x1200b2, 0x0 }, ++ { 0x2200b2, 0x0 }, ++ { 0x200cb, 0x0 }, ++ { 0x10043, 0x0 }, ++ { 0x110043, 0x0 }, ++ { 0x210043, 0x0 }, ++ { 0x10143, 0x0 }, ++ { 0x110143, 0x0 }, ++ { 0x210143, 0x0 }, ++ { 0x11043, 0x0 }, ++ { 0x111043, 0x0 }, ++ { 0x211043, 0x0 }, ++ { 0x11143, 0x0 }, ++ { 0x111143, 0x0 }, ++ { 0x211143, 0x0 }, ++ { 0x12043, 0x0 }, ++ { 0x112043, 0x0 }, ++ { 0x212043, 0x0 }, ++ { 0x12143, 0x0 }, ++ { 0x112143, 0x0 }, ++ { 0x212143, 0x0 }, ++ { 0x13043, 0x0 }, ++ { 0x113043, 0x0 }, ++ { 0x213043, 0x0 }, ++ { 0x13143, 0x0 }, ++ { 0x113143, 0x0 }, ++ { 0x213143, 0x0 }, ++ { 0x80, 0x0 }, ++ { 0x100080, 0x0 }, ++ { 0x200080, 0x0 }, ++ { 0x1080, 0x0 }, ++ { 0x101080, 0x0 }, ++ { 0x201080, 0x0 }, ++ { 0x2080, 0x0 }, ++ { 0x102080, 0x0 }, ++ { 0x202080, 0x0 }, ++ { 0x3080, 0x0 }, ++ { 0x103080, 0x0 }, ++ { 0x203080, 0x0 }, ++ { 0x4080, 0x0 }, ++ { 0x104080, 0x0 }, ++ { 0x204080, 0x0 }, ++ { 0x5080, 0x0 }, ++ { 0x105080, 0x0 }, ++ { 0x205080, 0x0 }, ++ { 0x6080, 0x0 }, ++ { 0x106080, 0x0 }, ++ { 0x206080, 0x0 }, ++ { 0x7080, 0x0 }, ++ { 0x107080, 0x0 }, ++ { 0x207080, 0x0 }, ++ { 0x8080, 0x0 }, ++ { 0x108080, 0x0 }, ++ { 0x208080, 0x0 }, ++ { 0x9080, 0x0 }, ++ { 0x109080, 0x0 }, ++ { 0x209080, 0x0 }, ++ { 0x10080, 0x0 }, ++ { 0x110080, 0x0 }, ++ { 0x210080, 0x0 }, ++ { 0x10180, 0x0 }, ++ { 0x110180, 0x0 }, ++ { 0x210180, 0x0 }, ++ { 0x11080, 0x0 }, ++ { 0x111080, 0x0 }, ++ { 0x211080, 0x0 }, ++ { 0x11180, 0x0 }, ++ { 0x111180, 0x0 }, ++ { 0x211180, 0x0 }, ++ { 0x12080, 0x0 }, ++ { 0x112080, 0x0 }, ++ { 0x212080, 0x0 }, ++ { 0x12180, 0x0 }, ++ { 0x112180, 0x0 }, ++ { 0x212180, 0x0 }, ++ { 0x13080, 0x0 }, ++ { 0x113080, 0x0 }, ++ { 0x213080, 0x0 }, ++ { 0x13180, 0x0 }, ++ { 0x113180, 0x0 }, ++ { 0x213180, 0x0 }, ++ { 0x10081, 0x0 }, ++ { 0x110081, 0x0 }, ++ { 0x210081, 0x0 }, ++ { 0x10181, 0x0 }, ++ { 0x110181, 0x0 }, ++ { 0x210181, 0x0 }, ++ { 0x11081, 0x0 }, ++ { 0x111081, 0x0 }, ++ { 0x211081, 0x0 }, ++ { 0x11181, 0x0 }, ++ { 0x111181, 0x0 }, ++ { 0x211181, 0x0 }, ++ { 0x12081, 0x0 }, ++ { 0x112081, 0x0 }, ++ { 0x212081, 0x0 }, ++ { 0x12181, 0x0 }, ++ { 0x112181, 0x0 }, ++ { 0x212181, 0x0 }, ++ { 0x13081, 0x0 }, ++ { 0x113081, 0x0 }, ++ { 0x213081, 0x0 }, ++ { 0x13181, 0x0 }, ++ { 0x113181, 0x0 }, ++ { 0x213181, 0x0 }, ++ { 0x100d0, 0x0 }, ++ { 0x1100d0, 0x0 }, ++ { 0x2100d0, 0x0 }, ++ { 0x101d0, 0x0 }, ++ { 0x1101d0, 0x0 }, ++ { 0x2101d0, 0x0 }, ++ { 0x110d0, 0x0 }, ++ { 0x1110d0, 0x0 }, ++ { 0x2110d0, 0x0 }, ++ { 0x111d0, 0x0 }, ++ { 0x1111d0, 0x0 }, ++ { 0x2111d0, 0x0 }, ++ { 0x120d0, 0x0 }, ++ { 0x1120d0, 0x0 }, ++ { 0x2120d0, 0x0 }, ++ { 0x121d0, 0x0 }, ++ { 0x1121d0, 0x0 }, ++ { 0x2121d0, 0x0 }, ++ { 0x130d0, 0x0 }, ++ { 0x1130d0, 0x0 }, ++ { 0x2130d0, 0x0 }, ++ { 0x131d0, 0x0 }, ++ { 0x1131d0, 0x0 }, ++ { 0x2131d0, 0x0 }, ++ { 0x100d1, 0x0 }, ++ { 0x1100d1, 0x0 }, ++ { 0x2100d1, 0x0 }, ++ { 0x101d1, 0x0 }, ++ { 0x1101d1, 0x0 }, ++ { 0x2101d1, 0x0 }, ++ { 0x110d1, 0x0 }, ++ { 0x1110d1, 0x0 }, ++ { 0x2110d1, 0x0 }, ++ { 0x111d1, 0x0 }, ++ { 0x1111d1, 0x0 }, ++ { 0x2111d1, 0x0 }, ++ { 0x120d1, 0x0 }, ++ { 0x1120d1, 0x0 }, ++ { 0x2120d1, 0x0 }, ++ { 0x121d1, 0x0 }, ++ { 0x1121d1, 0x0 }, ++ { 0x2121d1, 0x0 }, ++ { 0x130d1, 0x0 }, ++ { 0x1130d1, 0x0 }, ++ { 0x2130d1, 0x0 }, ++ { 0x131d1, 0x0 }, ++ { 0x1131d1, 0x0 }, ++ { 0x2131d1, 0x0 }, ++ { 0x10068, 0x0 }, ++ { 0x10168, 0x0 }, ++ { 0x10268, 0x0 }, ++ { 0x10368, 0x0 }, ++ { 0x10468, 0x0 }, ++ { 0x10568, 0x0 }, ++ { 0x10668, 0x0 }, ++ { 0x10768, 0x0 }, ++ { 0x10868, 0x0 }, ++ { 0x11068, 0x0 }, ++ { 0x11168, 0x0 }, ++ { 0x11268, 0x0 }, ++ { 0x11368, 0x0 }, ++ { 0x11468, 0x0 }, ++ { 0x11568, 0x0 }, ++ { 0x11668, 0x0 }, ++ { 0x11768, 0x0 }, ++ { 0x11868, 0x0 }, ++ { 0x12068, 0x0 }, ++ { 0x12168, 0x0 }, ++ { 0x12268, 0x0 }, ++ { 0x12368, 0x0 }, ++ { 0x12468, 0x0 }, ++ { 0x12568, 0x0 }, ++ { 0x12668, 0x0 }, ++ { 0x12768, 0x0 }, ++ { 0x12868, 0x0 }, ++ { 0x13068, 0x0 }, ++ { 0x13168, 0x0 }, ++ { 0x13268, 0x0 }, ++ { 0x13368, 0x0 }, ++ { 0x13468, 0x0 }, ++ { 0x13568, 0x0 }, ++ { 0x13668, 0x0 }, ++ { 0x13768, 0x0 }, ++ { 0x13868, 0x0 }, ++ { 0x10069, 0x0 }, ++ { 0x10169, 0x0 }, ++ { 0x10269, 0x0 }, ++ { 0x10369, 0x0 }, ++ { 0x10469, 0x0 }, ++ { 0x10569, 0x0 }, ++ { 0x10669, 0x0 }, ++ { 0x10769, 0x0 }, ++ { 0x10869, 0x0 }, ++ { 0x11069, 0x0 }, ++ { 0x11169, 0x0 }, ++ { 0x11269, 0x0 }, ++ { 0x11369, 0x0 }, ++ { 0x11469, 0x0 }, ++ { 0x11569, 0x0 }, ++ { 0x11669, 0x0 }, ++ { 0x11769, 0x0 }, ++ { 0x11869, 0x0 }, ++ { 0x12069, 0x0 }, ++ { 0x12169, 0x0 }, ++ { 0x12269, 0x0 }, ++ { 0x12369, 0x0 }, ++ { 0x12469, 0x0 }, ++ { 0x12569, 0x0 }, ++ { 0x12669, 0x0 }, ++ { 0x12769, 0x0 }, ++ { 0x12869, 0x0 }, ++ { 0x13069, 0x0 }, ++ { 0x13169, 0x0 }, ++ { 0x13269, 0x0 }, ++ { 0x13369, 0x0 }, ++ { 0x13469, 0x0 }, ++ { 0x13569, 0x0 }, ++ { 0x13669, 0x0 }, ++ { 0x13769, 0x0 }, ++ { 0x13869, 0x0 }, ++ { 0x1008c, 0x0 }, ++ { 0x11008c, 0x0 }, ++ { 0x21008c, 0x0 }, ++ { 0x1018c, 0x0 }, ++ { 0x11018c, 0x0 }, ++ { 0x21018c, 0x0 }, ++ { 0x1108c, 0x0 }, ++ { 0x11108c, 0x0 }, ++ { 0x21108c, 0x0 }, ++ { 0x1118c, 0x0 }, ++ { 0x11118c, 0x0 }, ++ { 0x21118c, 0x0 }, ++ { 0x1208c, 0x0 }, ++ { 0x11208c, 0x0 }, ++ { 0x21208c, 0x0 }, ++ { 0x1218c, 0x0 }, ++ { 0x11218c, 0x0 }, ++ { 0x21218c, 0x0 }, ++ { 0x1308c, 0x0 }, ++ { 0x11308c, 0x0 }, ++ { 0x21308c, 0x0 }, ++ { 0x1318c, 0x0 }, ++ { 0x11318c, 0x0 }, ++ { 0x21318c, 0x0 }, ++ { 0x1008d, 0x0 }, ++ { 0x11008d, 0x0 }, ++ { 0x21008d, 0x0 }, ++ { 0x1018d, 0x0 }, ++ { 0x11018d, 0x0 }, ++ { 0x21018d, 0x0 }, ++ { 0x1108d, 0x0 }, ++ { 0x11108d, 0x0 }, ++ { 0x21108d, 0x0 }, ++ { 0x1118d, 0x0 }, ++ { 0x11118d, 0x0 }, ++ { 0x21118d, 0x0 }, ++ { 0x1208d, 0x0 }, ++ { 0x11208d, 0x0 }, ++ { 0x21208d, 0x0 }, ++ { 0x1218d, 0x0 }, ++ { 0x11218d, 0x0 }, ++ { 0x21218d, 0x0 }, ++ { 0x1308d, 0x0 }, ++ { 0x11308d, 0x0 }, ++ { 0x21308d, 0x0 }, ++ { 0x1318d, 0x0 }, ++ { 0x11318d, 0x0 }, ++ { 0x21318d, 0x0 }, ++ { 0x100c0, 0x0 }, ++ { 0x1100c0, 0x0 }, ++ { 0x2100c0, 0x0 }, ++ { 0x101c0, 0x0 }, ++ { 0x1101c0, 0x0 }, ++ { 0x2101c0, 0x0 }, ++ { 0x102c0, 0x0 }, ++ { 0x1102c0, 0x0 }, ++ { 0x2102c0, 0x0 }, ++ { 0x103c0, 0x0 }, ++ { 0x1103c0, 0x0 }, ++ { 0x2103c0, 0x0 }, ++ { 0x104c0, 0x0 }, ++ { 0x1104c0, 0x0 }, ++ { 0x2104c0, 0x0 }, ++ { 0x105c0, 0x0 }, ++ { 0x1105c0, 0x0 }, ++ { 0x2105c0, 0x0 }, ++ { 0x106c0, 0x0 }, ++ { 0x1106c0, 0x0 }, ++ { 0x2106c0, 0x0 }, ++ { 0x107c0, 0x0 }, ++ { 0x1107c0, 0x0 }, ++ { 0x2107c0, 0x0 }, ++ { 0x108c0, 0x0 }, ++ { 0x1108c0, 0x0 }, ++ { 0x2108c0, 0x0 }, ++ { 0x110c0, 0x0 }, ++ { 0x1110c0, 0x0 }, ++ { 0x2110c0, 0x0 }, ++ { 0x111c0, 0x0 }, ++ { 0x1111c0, 0x0 }, ++ { 0x2111c0, 0x0 }, ++ { 0x112c0, 0x0 }, ++ { 0x1112c0, 0x0 }, ++ { 0x2112c0, 0x0 }, ++ { 0x113c0, 0x0 }, ++ { 0x1113c0, 0x0 }, ++ { 0x2113c0, 0x0 }, ++ { 0x114c0, 0x0 }, ++ { 0x1114c0, 0x0 }, ++ { 0x2114c0, 0x0 }, ++ { 0x115c0, 0x0 }, ++ { 0x1115c0, 0x0 }, ++ { 0x2115c0, 0x0 }, ++ { 0x116c0, 0x0 }, ++ { 0x1116c0, 0x0 }, ++ { 0x2116c0, 0x0 }, ++ { 0x117c0, 0x0 }, ++ { 0x1117c0, 0x0 }, ++ { 0x2117c0, 0x0 }, ++ { 0x118c0, 0x0 }, ++ { 0x1118c0, 0x0 }, ++ { 0x2118c0, 0x0 }, ++ { 0x120c0, 0x0 }, ++ { 0x1120c0, 0x0 }, ++ { 0x2120c0, 0x0 }, ++ { 0x121c0, 0x0 }, ++ { 0x1121c0, 0x0 }, ++ { 0x2121c0, 0x0 }, ++ { 0x122c0, 0x0 }, ++ { 0x1122c0, 0x0 }, ++ { 0x2122c0, 0x0 }, ++ { 0x123c0, 0x0 }, ++ { 0x1123c0, 0x0 }, ++ { 0x2123c0, 0x0 }, ++ { 0x124c0, 0x0 }, ++ { 0x1124c0, 0x0 }, ++ { 0x2124c0, 0x0 }, ++ { 0x125c0, 0x0 }, ++ { 0x1125c0, 0x0 }, ++ { 0x2125c0, 0x0 }, ++ { 0x126c0, 0x0 }, ++ { 0x1126c0, 0x0 }, ++ { 0x2126c0, 0x0 }, ++ { 0x127c0, 0x0 }, ++ { 0x1127c0, 0x0 }, ++ { 0x2127c0, 0x0 }, ++ { 0x128c0, 0x0 }, ++ { 0x1128c0, 0x0 }, ++ { 0x2128c0, 0x0 }, ++ { 0x130c0, 0x0 }, ++ { 0x1130c0, 0x0 }, ++ { 0x2130c0, 0x0 }, ++ { 0x131c0, 0x0 }, ++ { 0x1131c0, 0x0 }, ++ { 0x2131c0, 0x0 }, ++ { 0x132c0, 0x0 }, ++ { 0x1132c0, 0x0 }, ++ { 0x2132c0, 0x0 }, ++ { 0x133c0, 0x0 }, ++ { 0x1133c0, 0x0 }, ++ { 0x2133c0, 0x0 }, ++ { 0x134c0, 0x0 }, ++ { 0x1134c0, 0x0 }, ++ { 0x2134c0, 0x0 }, ++ { 0x135c0, 0x0 }, ++ { 0x1135c0, 0x0 }, ++ { 0x2135c0, 0x0 }, ++ { 0x136c0, 0x0 }, ++ { 0x1136c0, 0x0 }, ++ { 0x2136c0, 0x0 }, ++ { 0x137c0, 0x0 }, ++ { 0x1137c0, 0x0 }, ++ { 0x2137c0, 0x0 }, ++ { 0x138c0, 0x0 }, ++ { 0x1138c0, 0x0 }, ++ { 0x2138c0, 0x0 }, ++ { 0x100c1, 0x0 }, ++ { 0x1100c1, 0x0 }, ++ { 0x2100c1, 0x0 }, ++ { 0x101c1, 0x0 }, ++ { 0x1101c1, 0x0 }, ++ { 0x2101c1, 0x0 }, ++ { 0x102c1, 0x0 }, ++ { 0x1102c1, 0x0 }, ++ { 0x2102c1, 0x0 }, ++ { 0x103c1, 0x0 }, ++ { 0x1103c1, 0x0 }, ++ { 0x2103c1, 0x0 }, ++ { 0x104c1, 0x0 }, ++ { 0x1104c1, 0x0 }, ++ { 0x2104c1, 0x0 }, ++ { 0x105c1, 0x0 }, ++ { 0x1105c1, 0x0 }, ++ { 0x2105c1, 0x0 }, ++ { 0x106c1, 0x0 }, ++ { 0x1106c1, 0x0 }, ++ { 0x2106c1, 0x0 }, ++ { 0x107c1, 0x0 }, ++ { 0x1107c1, 0x0 }, ++ { 0x2107c1, 0x0 }, ++ { 0x108c1, 0x0 }, ++ { 0x1108c1, 0x0 }, ++ { 0x2108c1, 0x0 }, ++ { 0x110c1, 0x0 }, ++ { 0x1110c1, 0x0 }, ++ { 0x2110c1, 0x0 }, ++ { 0x111c1, 0x0 }, ++ { 0x1111c1, 0x0 }, ++ { 0x2111c1, 0x0 }, ++ { 0x112c1, 0x0 }, ++ { 0x1112c1, 0x0 }, ++ { 0x2112c1, 0x0 }, ++ { 0x113c1, 0x0 }, ++ { 0x1113c1, 0x0 }, ++ { 0x2113c1, 0x0 }, ++ { 0x114c1, 0x0 }, ++ { 0x1114c1, 0x0 }, ++ { 0x2114c1, 0x0 }, ++ { 0x115c1, 0x0 }, ++ { 0x1115c1, 0x0 }, ++ { 0x2115c1, 0x0 }, ++ { 0x116c1, 0x0 }, ++ { 0x1116c1, 0x0 }, ++ { 0x2116c1, 0x0 }, ++ { 0x117c1, 0x0 }, ++ { 0x1117c1, 0x0 }, ++ { 0x2117c1, 0x0 }, ++ { 0x118c1, 0x0 }, ++ { 0x1118c1, 0x0 }, ++ { 0x2118c1, 0x0 }, ++ { 0x120c1, 0x0 }, ++ { 0x1120c1, 0x0 }, ++ { 0x2120c1, 0x0 }, ++ { 0x121c1, 0x0 }, ++ { 0x1121c1, 0x0 }, ++ { 0x2121c1, 0x0 }, ++ { 0x122c1, 0x0 }, ++ { 0x1122c1, 0x0 }, ++ { 0x2122c1, 0x0 }, ++ { 0x123c1, 0x0 }, ++ { 0x1123c1, 0x0 }, ++ { 0x2123c1, 0x0 }, ++ { 0x124c1, 0x0 }, ++ { 0x1124c1, 0x0 }, ++ { 0x2124c1, 0x0 }, ++ { 0x125c1, 0x0 }, ++ { 0x1125c1, 0x0 }, ++ { 0x2125c1, 0x0 }, ++ { 0x126c1, 0x0 }, ++ { 0x1126c1, 0x0 }, ++ { 0x2126c1, 0x0 }, ++ { 0x127c1, 0x0 }, ++ { 0x1127c1, 0x0 }, ++ { 0x2127c1, 0x0 }, ++ { 0x128c1, 0x0 }, ++ { 0x1128c1, 0x0 }, ++ { 0x2128c1, 0x0 }, ++ { 0x130c1, 0x0 }, ++ { 0x1130c1, 0x0 }, ++ { 0x2130c1, 0x0 }, ++ { 0x131c1, 0x0 }, ++ { 0x1131c1, 0x0 }, ++ { 0x2131c1, 0x0 }, ++ { 0x132c1, 0x0 }, ++ { 0x1132c1, 0x0 }, ++ { 0x2132c1, 0x0 }, ++ { 0x133c1, 0x0 }, ++ { 0x1133c1, 0x0 }, ++ { 0x2133c1, 0x0 }, ++ { 0x134c1, 0x0 }, ++ { 0x1134c1, 0x0 }, ++ { 0x2134c1, 0x0 }, ++ { 0x135c1, 0x0 }, ++ { 0x1135c1, 0x0 }, ++ { 0x2135c1, 0x0 }, ++ { 0x136c1, 0x0 }, ++ { 0x1136c1, 0x0 }, ++ { 0x2136c1, 0x0 }, ++ { 0x137c1, 0x0 }, ++ { 0x1137c1, 0x0 }, ++ { 0x2137c1, 0x0 }, ++ { 0x138c1, 0x0 }, ++ { 0x1138c1, 0x0 }, ++ { 0x2138c1, 0x0 }, ++ { 0x10020, 0x0 }, ++ { 0x110020, 0x0 }, ++ { 0x210020, 0x0 }, ++ { 0x11020, 0x0 }, ++ { 0x111020, 0x0 }, ++ { 0x211020, 0x0 }, ++ { 0x12020, 0x0 }, ++ { 0x112020, 0x0 }, ++ { 0x212020, 0x0 }, ++ { 0x13020, 0x0 }, ++ { 0x113020, 0x0 }, ++ { 0x213020, 0x0 }, ++ { 0x20072, 0x0 }, ++ { 0x20073, 0x0 }, ++ { 0x20074, 0x0 }, ++ { 0x100aa, 0x0 }, ++ { 0x110aa, 0x0 }, ++ { 0x120aa, 0x0 }, ++ { 0x130aa, 0x0 }, ++ { 0x20010, 0x0 }, ++ { 0x120010, 0x0 }, ++ { 0x220010, 0x0 }, ++ { 0x20011, 0x0 }, ++ { 0x120011, 0x0 }, ++ { 0x220011, 0x0 }, ++ { 0x100ae, 0x0 }, ++ { 0x1100ae, 0x0 }, ++ { 0x2100ae, 0x0 }, ++ { 0x100af, 0x0 }, ++ { 0x1100af, 0x0 }, ++ { 0x2100af, 0x0 }, ++ { 0x110ae, 0x0 }, ++ { 0x1110ae, 0x0 }, ++ { 0x2110ae, 0x0 }, ++ { 0x110af, 0x0 }, ++ { 0x1110af, 0x0 }, ++ { 0x2110af, 0x0 }, ++ { 0x120ae, 0x0 }, ++ { 0x1120ae, 0x0 }, ++ { 0x2120ae, 0x0 }, ++ { 0x120af, 0x0 }, ++ { 0x1120af, 0x0 }, ++ { 0x2120af, 0x0 }, ++ { 0x130ae, 0x0 }, ++ { 0x1130ae, 0x0 }, ++ { 0x2130ae, 0x0 }, ++ { 0x130af, 0x0 }, ++ { 0x1130af, 0x0 }, ++ { 0x2130af, 0x0 }, ++ { 0x20020, 0x0 }, ++ { 0x120020, 0x0 }, ++ { 0x220020, 0x0 }, ++ { 0x100a0, 0x0 }, ++ { 0x100a1, 0x0 }, ++ { 0x100a2, 0x0 }, ++ { 0x100a3, 0x0 }, ++ { 0x100a4, 0x0 }, ++ { 0x100a5, 0x0 }, ++ { 0x100a6, 0x0 }, ++ { 0x100a7, 0x0 }, ++ { 0x110a0, 0x0 }, ++ { 0x110a1, 0x0 }, ++ { 0x110a2, 0x0 }, ++ { 0x110a3, 0x0 }, ++ { 0x110a4, 0x0 }, ++ { 0x110a5, 0x0 }, ++ { 0x110a6, 0x0 }, ++ { 0x110a7, 0x0 }, ++ { 0x120a0, 0x0 }, ++ { 0x120a1, 0x0 }, ++ { 0x120a2, 0x0 }, ++ { 0x120a3, 0x0 }, ++ { 0x120a4, 0x0 }, ++ { 0x120a5, 0x0 }, ++ { 0x120a6, 0x0 }, ++ { 0x120a7, 0x0 }, ++ { 0x130a0, 0x0 }, ++ { 0x130a1, 0x0 }, ++ { 0x130a2, 0x0 }, ++ { 0x130a3, 0x0 }, ++ { 0x130a4, 0x0 }, ++ { 0x130a5, 0x0 }, ++ { 0x130a6, 0x0 }, ++ { 0x130a7, 0x0 }, ++ { 0x2007c, 0x0 }, ++ { 0x12007c, 0x0 }, ++ { 0x22007c, 0x0 }, ++ { 0x2007d, 0x0 }, ++ { 0x12007d, 0x0 }, ++ { 0x22007d, 0x0 }, ++ { 0x400fd, 0x0 }, ++ { 0x400c0, 0x0 }, ++ { 0x90201, 0x0 }, ++ { 0x190201, 0x0 }, ++ { 0x290201, 0x0 }, ++ { 0x90202, 0x0 }, ++ { 0x190202, 0x0 }, ++ { 0x290202, 0x0 }, ++ { 0x90203, 0x0 }, ++ { 0x190203, 0x0 }, ++ { 0x290203, 0x0 }, ++ { 0x90204, 0x0 }, ++ { 0x190204, 0x0 }, ++ { 0x290204, 0x0 }, ++ { 0x90205, 0x0 }, ++ { 0x190205, 0x0 }, ++ { 0x290205, 0x0 }, ++ { 0x90206, 0x0 }, ++ { 0x190206, 0x0 }, ++ { 0x290206, 0x0 }, ++ { 0x90207, 0x0 }, ++ { 0x190207, 0x0 }, ++ { 0x290207, 0x0 }, ++ { 0x90208, 0x0 }, ++ { 0x190208, 0x0 }, ++ { 0x290208, 0x0 }, ++ { 0x10062, 0x0 }, ++ { 0x10162, 0x0 }, ++ { 0x10262, 0x0 }, ++ { 0x10362, 0x0 }, ++ { 0x10462, 0x0 }, ++ { 0x10562, 0x0 }, ++ { 0x10662, 0x0 }, ++ { 0x10762, 0x0 }, ++ { 0x10862, 0x0 }, ++ { 0x11062, 0x0 }, ++ { 0x11162, 0x0 }, ++ { 0x11262, 0x0 }, ++ { 0x11362, 0x0 }, ++ { 0x11462, 0x0 }, ++ { 0x11562, 0x0 }, ++ { 0x11662, 0x0 }, ++ { 0x11762, 0x0 }, ++ { 0x11862, 0x0 }, ++ { 0x12062, 0x0 }, ++ { 0x12162, 0x0 }, ++ { 0x12262, 0x0 }, ++ { 0x12362, 0x0 }, ++ { 0x12462, 0x0 }, ++ { 0x12562, 0x0 }, ++ { 0x12662, 0x0 }, ++ { 0x12762, 0x0 }, ++ { 0x12862, 0x0 }, ++ { 0x13062, 0x0 }, ++ { 0x13162, 0x0 }, ++ { 0x13262, 0x0 }, ++ { 0x13362, 0x0 }, ++ { 0x13462, 0x0 }, ++ { 0x13562, 0x0 }, ++ { 0x13662, 0x0 }, ++ { 0x13762, 0x0 }, ++ { 0x13862, 0x0 }, ++ { 0x20077, 0x0 }, ++ { 0x10001, 0x0 }, ++ { 0x11001, 0x0 }, ++ { 0x12001, 0x0 }, ++ { 0x13001, 0x0 }, ++ { 0x10040, 0x0 }, ++ { 0x10140, 0x0 }, ++ { 0x10240, 0x0 }, ++ { 0x10340, 0x0 }, ++ { 0x10440, 0x0 }, ++ { 0x10540, 0x0 }, ++ { 0x10640, 0x0 }, ++ { 0x10740, 0x0 }, ++ { 0x10840, 0x0 }, ++ { 0x10030, 0x0 }, ++ { 0x10130, 0x0 }, ++ { 0x10230, 0x0 }, ++ { 0x10330, 0x0 }, ++ { 0x10430, 0x0 }, ++ { 0x10530, 0x0 }, ++ { 0x10630, 0x0 }, ++ { 0x10730, 0x0 }, ++ { 0x10830, 0x0 }, ++ { 0x11040, 0x0 }, ++ { 0x11140, 0x0 }, ++ { 0x11240, 0x0 }, ++ { 0x11340, 0x0 }, ++ { 0x11440, 0x0 }, ++ { 0x11540, 0x0 }, ++ { 0x11640, 0x0 }, ++ { 0x11740, 0x0 }, ++ { 0x11840, 0x0 }, ++ { 0x11030, 0x0 }, ++ { 0x11130, 0x0 }, ++ { 0x11230, 0x0 }, ++ { 0x11330, 0x0 }, ++ { 0x11430, 0x0 }, ++ { 0x11530, 0x0 }, ++ { 0x11630, 0x0 }, ++ { 0x11730, 0x0 }, ++ { 0x11830, 0x0 }, ++ { 0x12040, 0x0 }, ++ { 0x12140, 0x0 }, ++ { 0x12240, 0x0 }, ++ { 0x12340, 0x0 }, ++ { 0x12440, 0x0 }, ++ { 0x12540, 0x0 }, ++ { 0x12640, 0x0 }, ++ { 0x12740, 0x0 }, ++ { 0x12840, 0x0 }, ++ { 0x12030, 0x0 }, ++ { 0x12130, 0x0 }, ++ { 0x12230, 0x0 }, ++ { 0x12330, 0x0 }, ++ { 0x12430, 0x0 }, ++ { 0x12530, 0x0 }, ++ { 0x12630, 0x0 }, ++ { 0x12730, 0x0 }, ++ { 0x12830, 0x0 }, ++ { 0x13040, 0x0 }, ++ { 0x13140, 0x0 }, ++ { 0x13240, 0x0 }, ++ { 0x13340, 0x0 }, ++ { 0x13440, 0x0 }, ++ { 0x13540, 0x0 }, ++ { 0x13640, 0x0 }, ++ { 0x13740, 0x0 }, ++ { 0x13840, 0x0 }, ++ { 0x13030, 0x0 }, ++ { 0x13130, 0x0 }, ++ { 0x13230, 0x0 }, ++ { 0x13330, 0x0 }, ++ { 0x13430, 0x0 }, ++ { 0x13530, 0x0 }, ++ { 0x13630, 0x0 }, ++ { 0x13730, 0x0 }, ++ { 0x13830, 0x0 }, ++}; +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c +similarity index 58% +rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c +rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c +index f8e867695d..8ee4bafa52 100644 +--- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01050008.c ++++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01.c +@@ -10,7 +10,7 @@ + #include + #include + +-static struct dram_cfg_param ddr_ddrc_cfg[] = { ++static struct dram_cfg_param ddr_ddrc_cfg_01050008[] = { + /** Initialize DDRC registers **/ + {0x3d400304,0x1}, + {0x3d400030,0x1}, +@@ -117,6 +117,112 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = { + {0x3d400028,0x0}, + }; + ++static struct dram_cfg_param ddr_ddrc_cfg_01061010[] = { ++ /** Initialize DDRC registers **/ ++ {0x3d400304,0x1}, ++ {0x3d400030,0x1}, ++ {0x3d400000,0xa1080020}, ++ {0x3d400020,0x223}, ++ {0x3d400024,0x3a980}, ++ {0x3d400064,0x5b00d2}, ++ {0x3d4000d0,0xc00305ba}, ++ {0x3d4000d4,0x940000}, ++ {0x3d4000dc,0xd4002d}, ++ {0x3d4000e0,0x310000}, ++ {0x3d4000e8,0x66004d}, ++ {0x3d4000ec,0x16004d}, ++ {0x3d400100,0x191e1920}, ++ {0x3d400104,0x60630}, ++ {0x3d40010c,0xb0b000}, ++ {0x3d400110,0xe04080e}, ++ {0x3d400114,0x2040c0c}, ++ {0x3d400118,0x1010007}, ++ {0x3d40011c,0x401}, ++ {0x3d400130,0x20600}, ++ {0x3d400134,0xc100002}, ++ {0x3d400138,0xd8}, ++ {0x3d400144,0x96004b}, ++ {0x3d400180,0x2ee0017}, ++ {0x3d400184,0x2605b8e}, ++ {0x3d400188,0x0}, ++ {0x3d400190,0x497820a}, ++ {0x3d400194,0x80303}, ++ {0x3d4001b4,0x170a}, ++ {0x3d4001a0,0xe0400018}, ++ {0x3d4001a4,0xdf00e4}, ++ {0x3d4001a8,0x80000000}, ++ {0x3d4001b0,0x11}, ++ {0x3d4001c0,0x1}, ++ {0x3d4001c4,0x0}, ++ {0x3d4000f4,0xc99}, ++ {0x3d400108,0x70e1617}, ++ {0x3d400200,0x1f}, ++ {0x3d40020c,0x0}, ++ {0x3d400210,0x1f1f}, ++ {0x3d400204,0x80808}, ++ {0x3d400214,0x7070707}, ++ {0x3d400218,0x7070707}, ++ {0x3d400250,0x29001701}, ++ {0x3d400254,0x2c}, ++ {0x3d40025c,0x4000030}, ++ {0x3d400264,0x900093e7}, ++ {0x3d40026c,0x2005574}, ++ {0x3d400400,0x111}, ++ {0x3d400408,0x72ff}, ++ {0x3d400494,0x2100e07}, ++ {0x3d400498,0x620096}, ++ {0x3d40049c,0x1100e07}, ++ {0x3d4004a0,0xc8012c}, ++ {0x3d402020,0x21}, ++ {0x3d402024,0x7d00}, ++ {0x3d402050,0x20d040}, ++ {0x3d402064,0xc001c}, ++ {0x3d4020dc,0x840000}, ++ {0x3d4020e0,0x310000}, ++ {0x3d4020e8,0x66004d}, ++ {0x3d4020ec,0x16004d}, ++ {0x3d402100,0xa040305}, ++ {0x3d402104,0x30407}, ++ {0x3d402108,0x203060b}, ++ {0x3d40210c,0x505000}, ++ {0x3d402110,0x2040202}, ++ {0x3d402114,0x2030202}, ++ {0x3d402118,0x1010004}, ++ {0x3d40211c,0x301}, ++ {0x3d402130,0x20300}, ++ {0x3d402134,0xa100002}, ++ {0x3d402138,0x1d}, ++ {0x3d402144,0x14000a}, ++ {0x3d402180,0x640004}, ++ {0x3d402190,0x3818200}, ++ {0x3d402194,0x80303}, ++ {0x3d4021b4,0x100}, ++ {0x3d403020,0x21}, ++ {0x3d403024,0x1f40}, ++ {0x3d403050,0x20d040}, ++ {0x3d403064,0x30007}, ++ {0x3d4030dc,0x840000}, ++ {0x3d4030e0,0x310000}, ++ {0x3d4030e8,0x66004d}, ++ {0x3d4030ec,0x16004d}, ++ {0x3d403100,0xa010102}, ++ {0x3d403104,0x30404}, ++ {0x3d403108,0x203060b}, ++ {0x3d40310c,0x505000}, ++ {0x3d403110,0x2040202}, ++ {0x3d403114,0x2030202}, ++ {0x3d403118,0x1010004}, ++ {0x3d40311c,0x301}, ++ {0x3d403130,0x20300}, ++ {0x3d403134,0xa100002}, ++ {0x3d403138,0x8}, ++ {0x3d403144,0x50003}, ++ {0x3d403180,0x190004}, ++ {0x3d403190,0x3818200}, ++ {0x3d403194,0x80303}, ++ {0x3d4031b4,0x100}, ++ {0x3d400028,0x0}, ++}; + /* PHY Initialize Configuration */ + static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x100a0,0x0}, +@@ -321,728 +427,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x2200ca,0x24}, + }; + +-/* ddr phy trained csr */ +-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { +- { 0x200b2, 0x0 }, +- { 0x1200b2, 0x0 }, +- { 0x2200b2, 0x0 }, +- { 0x200cb, 0x0 }, +- { 0x10043, 0x0 }, +- { 0x110043, 0x0 }, +- { 0x210043, 0x0 }, +- { 0x10143, 0x0 }, +- { 0x110143, 0x0 }, +- { 0x210143, 0x0 }, +- { 0x11043, 0x0 }, +- { 0x111043, 0x0 }, +- { 0x211043, 0x0 }, +- { 0x11143, 0x0 }, +- { 0x111143, 0x0 }, +- { 0x211143, 0x0 }, +- { 0x12043, 0x0 }, +- { 0x112043, 0x0 }, +- { 0x212043, 0x0 }, +- { 0x12143, 0x0 }, +- { 0x112143, 0x0 }, +- { 0x212143, 0x0 }, +- { 0x13043, 0x0 }, +- { 0x113043, 0x0 }, +- { 0x213043, 0x0 }, +- { 0x13143, 0x0 }, +- { 0x113143, 0x0 }, +- { 0x213143, 0x0 }, +- { 0x80, 0x0 }, +- { 0x100080, 0x0 }, +- { 0x200080, 0x0 }, +- { 0x1080, 0x0 }, +- { 0x101080, 0x0 }, +- { 0x201080, 0x0 }, +- { 0x2080, 0x0 }, +- { 0x102080, 0x0 }, +- { 0x202080, 0x0 }, +- { 0x3080, 0x0 }, +- { 0x103080, 0x0 }, +- { 0x203080, 0x0 }, +- { 0x4080, 0x0 }, +- { 0x104080, 0x0 }, +- { 0x204080, 0x0 }, +- { 0x5080, 0x0 }, +- { 0x105080, 0x0 }, +- { 0x205080, 0x0 }, +- { 0x6080, 0x0 }, +- { 0x106080, 0x0 }, +- { 0x206080, 0x0 }, +- { 0x7080, 0x0 }, +- { 0x107080, 0x0 }, +- { 0x207080, 0x0 }, +- { 0x8080, 0x0 }, +- { 0x108080, 0x0 }, +- { 0x208080, 0x0 }, +- { 0x9080, 0x0 }, +- { 0x109080, 0x0 }, +- { 0x209080, 0x0 }, +- { 0x10080, 0x0 }, +- { 0x110080, 0x0 }, +- { 0x210080, 0x0 }, +- { 0x10180, 0x0 }, +- { 0x110180, 0x0 }, +- { 0x210180, 0x0 }, +- { 0x11080, 0x0 }, +- { 0x111080, 0x0 }, +- { 0x211080, 0x0 }, +- { 0x11180, 0x0 }, +- { 0x111180, 0x0 }, +- { 0x211180, 0x0 }, +- { 0x12080, 0x0 }, +- { 0x112080, 0x0 }, +- { 0x212080, 0x0 }, +- { 0x12180, 0x0 }, +- { 0x112180, 0x0 }, +- { 0x212180, 0x0 }, +- { 0x13080, 0x0 }, +- { 0x113080, 0x0 }, +- { 0x213080, 0x0 }, +- { 0x13180, 0x0 }, +- { 0x113180, 0x0 }, +- { 0x213180, 0x0 }, +- { 0x10081, 0x0 }, +- { 0x110081, 0x0 }, +- { 0x210081, 0x0 }, +- { 0x10181, 0x0 }, +- { 0x110181, 0x0 }, +- { 0x210181, 0x0 }, +- { 0x11081, 0x0 }, +- { 0x111081, 0x0 }, +- { 0x211081, 0x0 }, +- { 0x11181, 0x0 }, +- { 0x111181, 0x0 }, +- { 0x211181, 0x0 }, +- { 0x12081, 0x0 }, +- { 0x112081, 0x0 }, +- { 0x212081, 0x0 }, +- { 0x12181, 0x0 }, +- { 0x112181, 0x0 }, +- { 0x212181, 0x0 }, +- { 0x13081, 0x0 }, +- { 0x113081, 0x0 }, +- { 0x213081, 0x0 }, +- { 0x13181, 0x0 }, +- { 0x113181, 0x0 }, +- { 0x213181, 0x0 }, +- { 0x100d0, 0x0 }, +- { 0x1100d0, 0x0 }, +- { 0x2100d0, 0x0 }, +- { 0x101d0, 0x0 }, +- { 0x1101d0, 0x0 }, +- { 0x2101d0, 0x0 }, +- { 0x110d0, 0x0 }, +- { 0x1110d0, 0x0 }, +- { 0x2110d0, 0x0 }, +- { 0x111d0, 0x0 }, +- { 0x1111d0, 0x0 }, +- { 0x2111d0, 0x0 }, +- { 0x120d0, 0x0 }, +- { 0x1120d0, 0x0 }, +- { 0x2120d0, 0x0 }, +- { 0x121d0, 0x0 }, +- { 0x1121d0, 0x0 }, +- { 0x2121d0, 0x0 }, +- { 0x130d0, 0x0 }, +- { 0x1130d0, 0x0 }, +- { 0x2130d0, 0x0 }, +- { 0x131d0, 0x0 }, +- { 0x1131d0, 0x0 }, +- { 0x2131d0, 0x0 }, +- { 0x100d1, 0x0 }, +- { 0x1100d1, 0x0 }, +- { 0x2100d1, 0x0 }, +- { 0x101d1, 0x0 }, +- { 0x1101d1, 0x0 }, +- { 0x2101d1, 0x0 }, +- { 0x110d1, 0x0 }, +- { 0x1110d1, 0x0 }, +- { 0x2110d1, 0x0 }, +- { 0x111d1, 0x0 }, +- { 0x1111d1, 0x0 }, +- { 0x2111d1, 0x0 }, +- { 0x120d1, 0x0 }, +- { 0x1120d1, 0x0 }, +- { 0x2120d1, 0x0 }, +- { 0x121d1, 0x0 }, +- { 0x1121d1, 0x0 }, +- { 0x2121d1, 0x0 }, +- { 0x130d1, 0x0 }, +- { 0x1130d1, 0x0 }, +- { 0x2130d1, 0x0 }, +- { 0x131d1, 0x0 }, +- { 0x1131d1, 0x0 }, +- { 0x2131d1, 0x0 }, +- { 0x10068, 0x0 }, +- { 0x10168, 0x0 }, +- { 0x10268, 0x0 }, +- { 0x10368, 0x0 }, +- { 0x10468, 0x0 }, +- { 0x10568, 0x0 }, +- { 0x10668, 0x0 }, +- { 0x10768, 0x0 }, +- { 0x10868, 0x0 }, +- { 0x11068, 0x0 }, +- { 0x11168, 0x0 }, +- { 0x11268, 0x0 }, +- { 0x11368, 0x0 }, +- { 0x11468, 0x0 }, +- { 0x11568, 0x0 }, +- { 0x11668, 0x0 }, +- { 0x11768, 0x0 }, +- { 0x11868, 0x0 }, +- { 0x12068, 0x0 }, +- { 0x12168, 0x0 }, +- { 0x12268, 0x0 }, +- { 0x12368, 0x0 }, +- { 0x12468, 0x0 }, +- { 0x12568, 0x0 }, +- { 0x12668, 0x0 }, +- { 0x12768, 0x0 }, +- { 0x12868, 0x0 }, +- { 0x13068, 0x0 }, +- { 0x13168, 0x0 }, +- { 0x13268, 0x0 }, +- { 0x13368, 0x0 }, +- { 0x13468, 0x0 }, +- { 0x13568, 0x0 }, +- { 0x13668, 0x0 }, +- { 0x13768, 0x0 }, +- { 0x13868, 0x0 }, +- { 0x10069, 0x0 }, +- { 0x10169, 0x0 }, +- { 0x10269, 0x0 }, +- { 0x10369, 0x0 }, +- { 0x10469, 0x0 }, +- { 0x10569, 0x0 }, +- { 0x10669, 0x0 }, +- { 0x10769, 0x0 }, +- { 0x10869, 0x0 }, +- { 0x11069, 0x0 }, +- { 0x11169, 0x0 }, +- { 0x11269, 0x0 }, +- { 0x11369, 0x0 }, +- { 0x11469, 0x0 }, +- { 0x11569, 0x0 }, +- { 0x11669, 0x0 }, +- { 0x11769, 0x0 }, +- { 0x11869, 0x0 }, +- { 0x12069, 0x0 }, +- { 0x12169, 0x0 }, +- { 0x12269, 0x0 }, +- { 0x12369, 0x0 }, +- { 0x12469, 0x0 }, +- { 0x12569, 0x0 }, +- { 0x12669, 0x0 }, +- { 0x12769, 0x0 }, +- { 0x12869, 0x0 }, +- { 0x13069, 0x0 }, +- { 0x13169, 0x0 }, +- { 0x13269, 0x0 }, +- { 0x13369, 0x0 }, +- { 0x13469, 0x0 }, +- { 0x13569, 0x0 }, +- { 0x13669, 0x0 }, +- { 0x13769, 0x0 }, +- { 0x13869, 0x0 }, +- { 0x1008c, 0x0 }, +- { 0x11008c, 0x0 }, +- { 0x21008c, 0x0 }, +- { 0x1018c, 0x0 }, +- { 0x11018c, 0x0 }, +- { 0x21018c, 0x0 }, +- { 0x1108c, 0x0 }, +- { 0x11108c, 0x0 }, +- { 0x21108c, 0x0 }, +- { 0x1118c, 0x0 }, +- { 0x11118c, 0x0 }, +- { 0x21118c, 0x0 }, +- { 0x1208c, 0x0 }, +- { 0x11208c, 0x0 }, +- { 0x21208c, 0x0 }, +- { 0x1218c, 0x0 }, +- { 0x11218c, 0x0 }, +- { 0x21218c, 0x0 }, +- { 0x1308c, 0x0 }, +- { 0x11308c, 0x0 }, +- { 0x21308c, 0x0 }, +- { 0x1318c, 0x0 }, +- { 0x11318c, 0x0 } +- { 0x21318c, 0x0 }, +- { 0x1008d, 0x0 }, +- { 0x11008d, 0x0 }, +- { 0x21008d, 0x0 }, +- { 0x1018d, 0x0 }, +- { 0x11018d, 0x0 }, +- { 0x21018d, 0x0 }, +- { 0x1108d, 0x0 }, +- { 0x11108d, 0x0 }, +- { 0x21108d, 0x0 }, +- { 0x1118d, 0x0 }, +- { 0x11118d, 0x0 }, +- { 0x21118d, 0x0 }, +- { 0x1208d, 0x0 }, +- { 0x11208d, 0x0 }, +- { 0x21208d, 0x0 }, +- { 0x1218d, 0x0 }, +- { 0x11218d, 0x0 }, +- { 0x21218d, 0x0 }, +- { 0x1308d, 0x0 }, +- { 0x11308d, 0x0 }, +- { 0x21308d, 0x0 }, +- { 0x1318d, 0x0 }, +- { 0x11318d, 0x0 }, +- { 0x21318d, 0x0 }, +- { 0x100c0, 0x0 }, +- { 0x1100c0, 0x0 }, +- { 0x2100c0, 0x0 }, +- { 0x101c0, 0x0 }, +- { 0x1101c0, 0x0 }, +- { 0x2101c0, 0x0 }, +- { 0x102c0, 0x0 }, +- { 0x1102c0, 0x0 }, +- { 0x2102c0, 0x0 }, +- { 0x103c0, 0x0 }, +- { 0x1103c0, 0x0 }, +- { 0x2103c0, 0x0 }, +- { 0x104c0, 0x0 }, +- { 0x1104c0, 0x0 }, +- { 0x2104c0, 0x0 }, +- { 0x105c0, 0x0 }, +- { 0x1105c0, 0x0 }, +- { 0x2105c0, 0x0 }, +- { 0x106c0, 0x0 }, +- { 0x1106c0, 0x0 }, +- { 0x2106c0, 0x0 }, +- { 0x107c0, 0x0 }, +- { 0x1107c0, 0x0 }, +- { 0x2107c0, 0x0 }, +- { 0x108c0, 0x0 }, +- { 0x1108c0, 0x0 }, +- { 0x2108c0, 0x0 }, +- { 0x110c0, 0x0 }, +- { 0x1110c0, 0x0 }, +- { 0x2110c0, 0x0 }, +- { 0x111c0, 0x0 }, +- { 0x1111c0, 0x0 }, +- { 0x2111c0, 0x0 }, +- { 0x112c0, 0x0 }, +- { 0x1112c0, 0x0 }, +- { 0x2112c0, 0x0 }, +- { 0x113c0, 0x0 }, +- { 0x1113c0, 0x0 }, +- { 0x2113c0, 0x0 }, +- { 0x114c0, 0x0 }, +- { 0x1114c0, 0x0 }, +- { 0x2114c0, 0x0 }, +- { 0x115c0, 0x0 }, +- { 0x1115c0, 0x0 }, +- { 0x2115c0, 0x0 }, +- { 0x116c0, 0x0 }, +- { 0x1116c0, 0x0 }, +- { 0x2116c0, 0x0 }, +- { 0x117c0, 0x0 }, +- { 0x1117c0, 0x0 }, +- { 0x2117c0, 0x0 }, +- { 0x118c0, 0x0 }, +- { 0x1118c0, 0x0 }, +- { 0x2118c0, 0x0 }, +- { 0x120c0, 0x0 }, +- { 0x1120c0, 0x0 }, +- { 0x2120c0, 0x0 }, +- { 0x121c0, 0x0 }, +- { 0x1121c0, 0x0 }, +- { 0x2121c0, 0x0 }, +- { 0x122c0, 0x0 }, +- { 0x1122c0, 0x0 }, +- { 0x2122c0, 0x0 }, +- { 0x123c0, 0x0 }, +- { 0x1123c0, 0x0 }, +- { 0x2123c0, 0x0 }, +- { 0x124c0, 0x0 }, +- { 0x1124c0, 0x0 }, +- { 0x2124c0, 0x0 }, +- { 0x125c0, 0x0 }, +- { 0x1125c0, 0x0 }, +- { 0x2125c0, 0x0 }, +- { 0x126c0, 0x0 }, +- { 0x1126c0, 0x0 }, +- { 0x2126c0, 0x0 }, +- { 0x127c0, 0x0 }, +- { 0x1127c0, 0x0 }, +- { 0x2127c0, 0x0 }, +- { 0x128c0, 0x0 }, +- { 0x1128c0, 0x0 }, +- { 0x2128c0, 0x0 }, +- { 0x130c0, 0x0 }, +- { 0x1130c0, 0x0 }, +- { 0x2130c0, 0x0 }, +- { 0x131c0, 0x0 }, +- { 0x1131c0, 0x0 }, +- { 0x2131c0, 0x0 }, +- { 0x132c0, 0x0 }, +- { 0x1132c0, 0x0 }, +- { 0x2132c0, 0x0 }, +- { 0x133c0, 0x0 }, +- { 0x1133c0, 0x0 }, +- { 0x2133c0, 0x0 }, +- { 0x134c0, 0x0 }, +- { 0x1134c0, 0x0 }, +- { 0x2134c0, 0x0 }, +- { 0x135c0, 0x0 }, +- { 0x1135c0, 0x0 }, +- { 0x2135c0, 0x0 }, +- { 0x136c0, 0x0 }, +- { 0x1136c0, 0x0 }, +- { 0x2136c0, 0x0 }, +- { 0x137c0, 0x0 }, +- { 0x1137c0, 0x0 }, +- { 0x2137c0, 0x0 }, +- { 0x138c0, 0x0 }, +- { 0x1138c0, 0x0 }, +- { 0x2138c0, 0x0 }, +- { 0x100c1, 0x0 }, +- { 0x1100c1, 0x0 }, +- { 0x2100c1, 0x0 }, +- { 0x101c1, 0x0 }, +- { 0x1101c1, 0x0 }, +- { 0x2101c1, 0x0 }, +- { 0x102c1, 0x0 }, +- { 0x1102c1, 0x0 }, +- { 0x2102c1, 0x0 }, +- { 0x103c1, 0x0 }, +- { 0x1103c1, 0x0 }, +- { 0x2103c1, 0x0 }, +- { 0x104c1, 0x0 }, +- { 0x1104c1, 0x0 }, +- { 0x2104c1, 0x0 }, +- { 0x105c1, 0x0 }, +- { 0x1105c1, 0x0 }, +- { 0x2105c1, 0x0 }, +- { 0x106c1, 0x0 }, +- { 0x1106c1, 0x0 }, +- { 0x2106c1, 0x0 }, +- { 0x107c1, 0x0 }, +- { 0x1107c1, 0x0 }, +- { 0x2107c1, 0x0 }, +- { 0x108c1, 0x0 }, +- { 0x1108c1, 0x0 }, +- { 0x2108c1, 0x0 }, +- { 0x110c1, 0x0 }, +- { 0x1110c1, 0x0 }, +- { 0x2110c1, 0x0 }, +- { 0x111c1, 0x0 }, +- { 0x1111c1, 0x0 }, +- { 0x2111c1, 0x0 }, +- { 0x112c1, 0x0 }, +- { 0x1112c1, 0x0 }, +- { 0x2112c1, 0x0 }, +- { 0x113c1, 0x0 }, +- { 0x1113c1, 0x0 }, +- { 0x2113c1, 0x0 }, +- { 0x114c1, 0x0 }, +- { 0x1114c1, 0x0 }, +- { 0x2114c1, 0x0 }, +- { 0x115c1, 0x0 }, +- { 0x1115c1, 0x0 }, +- { 0x2115c1, 0x0 }, +- { 0x116c1, 0x0 }, +- { 0x1116c1, 0x0 }, +- { 0x2116c1, 0x0 }, +- { 0x117c1, 0x0 }, +- { 0x1117c1, 0x0 }, +- { 0x2117c1, 0x0 }, +- { 0x118c1, 0x0 }, +- { 0x1118c1, 0x0 }, +- { 0x2118c1, 0x0 }, +- { 0x120c1, 0x0 }, +- { 0x1120c1, 0x0 }, +- { 0x2120c1, 0x0 }, +- { 0x121c1, 0x0 }, +- { 0x1121c1, 0x0 }, +- { 0x2121c1, 0x0 }, +- { 0x122c1, 0x0 }, +- { 0x1122c1, 0x0 }, +- { 0x2122c1, 0x0 }, +- { 0x123c1, 0x0 }, +- { 0x1123c1, 0x0 }, +- { 0x2123c1, 0x0 }, +- { 0x124c1, 0x0 }, +- { 0x1124c1, 0x0 }, +- { 0x2124c1, 0x0 }, +- { 0x125c1, 0x0 }, +- { 0x1125c1, 0x0 }, +- { 0x2125c1, 0x0 }, +- { 0x126c1, 0x0 }, +- { 0x1126c1, 0x0 }, +- { 0x2126c1, 0x0 }, +- { 0x127c1, 0x0 }, +- { 0x1127c1, 0x0 }, +- { 0x2127c1, 0x0 }, +- { 0x128c1, 0x0 }, +- { 0x1128c1, 0x0 }, +- { 0x2128c1, 0x0 }, +- { 0x130c1, 0x0 }, +- { 0x1130c1, 0x0 }, +- { 0x2130c1, 0x0 }, +- { 0x131c1, 0x0 }, +- { 0x1131c1, 0x0 }, +- { 0x2131c1, 0x0 }, +- { 0x132c1, 0x0 }, +- { 0x1132c1, 0x0 }, +- { 0x2132c1, 0x0 }, +- { 0x133c1, 0x0 }, +- { 0x1133c1, 0x0 }, +- { 0x2133c1, 0x0 }, +- { 0x134c1, 0x0 }, +- { 0x1134c1, 0x0 }, +- { 0x2134c1, 0x0 }, +- { 0x135c1, 0x0 }, +- { 0x1135c1, 0x0 }, +- { 0x2135c1, 0x0 }, +- { 0x136c1, 0x0 }, +- { 0x1136c1, 0x0 }, +- { 0x2136c1, 0x0 }, +- { 0x137c1, 0x0 }, +- { 0x1137c1, 0x0 }, +- { 0x2137c1, 0x0 }, +- { 0x138c1, 0x0 }, +- { 0x1138c1, 0x0 }, +- { 0x2138c1, 0x0 }, +- { 0x10020, 0x0 }, +- { 0x110020, 0x0 }, +- { 0x210020, 0x0 }, +- { 0x11020, 0x0 }, +- { 0x111020, 0x0 }, +- { 0x211020, 0x0 }, +- { 0x12020, 0x0 }, +- { 0x112020, 0x0 }, +- { 0x212020, 0x0 }, +- { 0x13020, 0x0 }, +- { 0x113020, 0x0 }, +- { 0x213020, 0x0 }, +- { 0x20072, 0x0 }, +- { 0x20073, 0x0 }, +- { 0x20074, 0x0 }, +- { 0x100aa, 0x0 }, +- { 0x110aa, 0x0 }, +- { 0x120aa, 0x0 }, +- { 0x130aa, 0x0 }, +- { 0x20010, 0x0 }, +- { 0x120010, 0x0 }, +- { 0x220010, 0x0 }, +- { 0x20011, 0x0 }, +- { 0x120011, 0x0 }, +- { 0x220011, 0x0 }, +- { 0x100ae, 0x0 }, +- { 0x1100ae, 0x0 }, +- { 0x2100ae, 0x0 }, +- { 0x100af, 0x0 }, +- { 0x1100af, 0x0 }, +- { 0x2100af, 0x0 }, +- { 0x110ae, 0x0 }, +- { 0x1110ae, 0x0 }, +- { 0x2110ae, 0x0 }, +- { 0x110af, 0x0 }, +- { 0x1110af, 0x0 }, +- { 0x2110af, 0x0 }, +- { 0x120ae, 0x0 }, +- { 0x1120ae, 0x0 }, +- { 0x2120ae, 0x0 }, +- { 0x120af, 0x0 }, +- { 0x1120af, 0x0 }, +- { 0x2120af, 0x0 }, +- { 0x130ae, 0x0 }, +- { 0x1130ae, 0x0 }, +- { 0x2130ae, 0x0 }, +- { 0x130af, 0x0 }, +- { 0x1130af, 0x0 }, +- { 0x2130af, 0x0 }, +- { 0x20020, 0x0 }, +- { 0x120020, 0x0 }, +- { 0x220020, 0x0 }, +- { 0x100a0, 0x0 }, +- { 0x100a1, 0x0 }, +- { 0x100a2, 0x0 }, +- { 0x100a3, 0x0 }, +- { 0x100a4, 0x0 }, +- { 0x100a5, 0x0 }, +- { 0x100a6, 0x0 }, +- { 0x100a7, 0x0 }, +- { 0x110a0, 0x0 }, +- { 0x110a1, 0x0 }, +- { 0x110a2, 0x0 }, +- { 0x110a3, 0x0 }, +- { 0x110a4, 0x0 }, +- { 0x110a5, 0x0 }, +- { 0x110a6, 0x0 }, +- { 0x110a7, 0x0 }, +- { 0x120a0, 0x0 }, +- { 0x120a1, 0x0 }, +- { 0x120a2, 0x0 }, +- { 0x120a3, 0x0 }, +- { 0x120a4, 0x0 }, +- { 0x120a5, 0x0 }, +- { 0x120a6, 0x0 }, +- { 0x120a7, 0x0 }, +- { 0x130a0, 0x0 }, +- { 0x130a1, 0x0 }, +- { 0x130a2, 0x0 }, +- { 0x130a3, 0x0 }, +- { 0x130a4, 0x0 }, +- { 0x130a5, 0x0 }, +- { 0x130a6, 0x0 }, +- { 0x130a7, 0x0 }, +- { 0x2007c, 0x0 }, +- { 0x12007c, 0x0 }, +- { 0x22007c, 0x0 }, +- { 0x2007d, 0x0 }, +- { 0x12007d, 0x0 }, +- { 0x22007d, 0x0 }, +- { 0x400fd, 0x0 }, +- { 0x400c0, 0x0 }, +- { 0x90201, 0x0 }, +- { 0x190201, 0x0 }, +- { 0x290201, 0x0 }, +- { 0x90202, 0x0 }, +- { 0x190202, 0x0 }, +- { 0x290202, 0x0 }, +- { 0x90203, 0x0 }, +- { 0x190203, 0x0 }, +- { 0x290203, 0x0 }, +- { 0x90204, 0x0 }, +- { 0x190204, 0x0 }, +- { 0x290204, 0x0 }, +- { 0x90205, 0x0 }, +- { 0x190205, 0x0 }, +- { 0x290205, 0x0 }, +- { 0x90206, 0x0 }, +- { 0x190206, 0x0 }, +- { 0x290206, 0x0 }, +- { 0x90207, 0x0 }, +- { 0x190207, 0x0 }, +- { 0x290207, 0x0 }, +- { 0x90208, 0x0 }, +- { 0x190208, 0x0 }, +- { 0x290208, 0x0 }, +- { 0x10062, 0x0 }, +- { 0x10162, 0x0 }, +- { 0x10262, 0x0 }, +- { 0x10362, 0x0 }, +- { 0x10462, 0x0 }, +- { 0x10562, 0x0 }, +- { 0x10662, 0x0 }, +- { 0x10762, 0x0 }, +- { 0x10862, 0x0 }, +- { 0x11062, 0x0 }, +- { 0x11162, 0x0 }, +- { 0x11262, 0x0 }, +- { 0x11362, 0x0 }, +- { 0x11462, 0x0 }, +- { 0x11562, 0x0 }, +- { 0x11662, 0x0 }, +- { 0x11762, 0x0 }, +- { 0x11862, 0x0 }, +- { 0x12062, 0x0 }, +- { 0x12162, 0x0 }, +- { 0x12262, 0x0 }, +- { 0x12362, 0x0 }, +- { 0x12462, 0x0 }, +- { 0x12562, 0x0 }, +- { 0x12662, 0x0 }, +- { 0x12762, 0x0 }, +- { 0x12862, 0x0 }, +- { 0x13062, 0x0 }, +- { 0x13162, 0x0 }, +- { 0x13262, 0x0 }, +- { 0x13362, 0x0 }, +- { 0x13462, 0x0 }, +- { 0x13562, 0x0 }, +- { 0x13662, 0x0 }, +- { 0x13762, 0x0 }, +- { 0x13862, 0x0 }, +- { 0x20077, 0x0 }, +- { 0x10001, 0x0 }, +- { 0x11001, 0x0 }, +- { 0x12001, 0x0 }, +- { 0x13001, 0x0 }, +- { 0x10040, 0x0 }, +- { 0x10140, 0x0 }, +- { 0x10240, 0x0 }, +- { 0x10340, 0x0 }, +- { 0x10440, 0x0 }, +- { 0x10540, 0x0 }, +- { 0x10640, 0x0 }, +- { 0x10740, 0x0 }, +- { 0x10840, 0x0 }, +- { 0x10030, 0x0 }, +- { 0x10130, 0x0 }, +- { 0x10230, 0x0 }, +- { 0x10330, 0x0 }, +- { 0x10430, 0x0 }, +- { 0x10530, 0x0 }, +- { 0x10630, 0x0 }, +- { 0x10730, 0x0 }, +- { 0x10830, 0x0 }, +- { 0x11040, 0x0 }, +- { 0x11140, 0x0 }, +- { 0x11240, 0x0 }, +- { 0x11340, 0x0 }, +- { 0x11440, 0x0 }, +- { 0x11540, 0x0 }, +- { 0x11640, 0x0 }, +- { 0x11740, 0x0 }, +- { 0x11840, 0x0 }, +- { 0x11030, 0x0 }, +- { 0x11130, 0x0 }, +- { 0x11230, 0x0 }, +- { 0x11330, 0x0 }, +- { 0x11430, 0x0 }, +- { 0x11530, 0x0 }, +- { 0x11630, 0x0 }, +- { 0x11730, 0x0 }, +- { 0x11830, 0x0 }, +- { 0x12040, 0x0 }, +- { 0x12140, 0x0 }, +- { 0x12240, 0x0 }, +- { 0x12340, 0x0 }, +- { 0x12440, 0x0 }, +- { 0x12540, 0x0 }, +- { 0x12640, 0x0 }, +- { 0x12740, 0x0 }, +- { 0x12840, 0x0 }, +- { 0x12030, 0x0 }, +- { 0x12130, 0x0 }, +- { 0x12230, 0x0 }, +- { 0x12330, 0x0 }, +- { 0x12430, 0x0 }, +- { 0x12530, 0x0 }, +- { 0x12630, 0x0 }, +- { 0x12730, 0x0 }, +- { 0x12830, 0x0 }, +- { 0x13040, 0x0 }, +- { 0x13140, 0x0 }, +- { 0x13240, 0x0 }, +- { 0x13340, 0x0 }, +- { 0x13440, 0x0 }, +- { 0x13540, 0x0 }, +- { 0x13640, 0x0 }, +- { 0x13740, 0x0 }, +- { 0x13840, 0x0 }, +- { 0x13030, 0x0 }, +- { 0x13130, 0x0 }, +- { 0x13230, 0x0 }, +- { 0x13330, 0x0 }, +- { 0x13430, 0x0 }, +- { 0x13530, 0x0 }, +- { 0x13630, 0x0 }, +- { 0x13730, 0x0 }, +- { 0x13830, 0x0 }, +-}; + /* P0 message block paremeter for training firmware */ + static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, +@@ -1834,14 +1218,23 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + + /* ddr timing config params */ + struct dram_timing_info ucm_dram_timing_01050008 = { +- .ddrc_cfg = ddr_ddrc_cfg, +- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), ++ .ddrc_cfg = ddr_ddrc_cfg_01050008, ++ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_01050008), ++ .ddrphy_cfg = ddr_ddrphy_cfg, ++ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), ++ .fsp_msg = ddr_dram_fsp_msg, ++ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), ++ .ddrphy_pie = ddr_phy_pie, ++ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), ++ .fsp_table = { 3000, 400, 100, }, ++}; ++struct dram_timing_info ucm_dram_timing_01061010 = { ++ .ddrc_cfg = ddr_ddrc_cfg_01061010, ++ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_01061010), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), +- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, +- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100, }, +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c +deleted file mode 100644 +index 5609f5dcde..0000000000 +--- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_01061010.c ++++ /dev/null +@@ -1,1848 +0,0 @@ +-/* +- * Copyright 2018 NXP +- * +- * SPDX-License-Identifier: GPL-2.0+ +- * +- * Generated code from MX8M_DDR_tool +- * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga +- */ +- +-#include +-#include +- +-static struct dram_cfg_param ddr_ddrc_cfg[] = { +- /** Initialize DDRC registers **/ +- {0x3d400304,0x1}, +- {0x3d400030,0x1}, +- {0x3d400000,0xa1080020}, +- {0x3d400020,0x223}, +- {0x3d400024,0x3a980}, +- {0x3d400064,0x5b00d2}, +- {0x3d4000d0,0xc00305ba}, +- {0x3d4000d4,0x940000}, +- {0x3d4000dc,0xd4002d}, +- {0x3d4000e0,0x310000}, +- {0x3d4000e8,0x66004d}, +- {0x3d4000ec,0x16004d}, +- {0x3d400100,0x191e1920}, +- {0x3d400104,0x60630}, +- {0x3d40010c,0xb0b000}, +- {0x3d400110,0xe04080e}, +- {0x3d400114,0x2040c0c}, +- {0x3d400118,0x1010007}, +- {0x3d40011c,0x401}, +- {0x3d400130,0x20600}, +- {0x3d400134,0xc100002}, +- {0x3d400138,0xd8}, +- {0x3d400144,0x96004b}, +- {0x3d400180,0x2ee0017}, +- {0x3d400184,0x2605b8e}, +- {0x3d400188,0x0}, +- {0x3d400190,0x497820a}, +- {0x3d400194,0x80303}, +- {0x3d4001b4,0x170a}, +- {0x3d4001a0,0xe0400018}, +- {0x3d4001a4,0xdf00e4}, +- {0x3d4001a8,0x80000000}, +- {0x3d4001b0,0x11}, +- {0x3d4001c0,0x1}, +- {0x3d4001c4,0x0}, +- {0x3d4000f4,0xc99}, +- {0x3d400108,0x70e1617}, +- {0x3d400200,0x1f}, +- {0x3d40020c,0x0}, +- {0x3d400210,0x1f1f}, +- {0x3d400204,0x80808}, +- {0x3d400214,0x7070707}, +- {0x3d400218,0x7070707}, +- {0x3d400250,0x29001701}, +- {0x3d400254,0x2c}, +- {0x3d40025c,0x4000030}, +- {0x3d400264,0x900093e7}, +- {0x3d40026c,0x2005574}, +- {0x3d400400,0x111}, +- {0x3d400408,0x72ff}, +- {0x3d400494,0x2100e07}, +- {0x3d400498,0x620096}, +- {0x3d40049c,0x1100e07}, +- {0x3d4004a0,0xc8012c}, +- {0x3d402020,0x21}, +- {0x3d402024,0x7d00}, +- {0x3d402050,0x20d040}, +- {0x3d402064,0xc001c}, +- {0x3d4020dc,0x840000}, +- {0x3d4020e0,0x310000}, +- {0x3d4020e8,0x66004d}, +- {0x3d4020ec,0x16004d}, +- {0x3d402100,0xa040305}, +- {0x3d402104,0x30407}, +- {0x3d402108,0x203060b}, +- {0x3d40210c,0x505000}, +- {0x3d402110,0x2040202}, +- {0x3d402114,0x2030202}, +- {0x3d402118,0x1010004}, +- {0x3d40211c,0x301}, +- {0x3d402130,0x20300}, +- {0x3d402134,0xa100002}, +- {0x3d402138,0x1d}, +- {0x3d402144,0x14000a}, +- {0x3d402180,0x640004}, +- {0x3d402190,0x3818200}, +- {0x3d402194,0x80303}, +- {0x3d4021b4,0x100}, +- {0x3d403020,0x21}, +- {0x3d403024,0x1f40}, +- {0x3d403050,0x20d040}, +- {0x3d403064,0x30007}, +- {0x3d4030dc,0x840000}, +- {0x3d4030e0,0x310000}, +- {0x3d4030e8,0x66004d}, +- {0x3d4030ec,0x16004d}, +- {0x3d403100,0xa010102}, +- {0x3d403104,0x30404}, +- {0x3d403108,0x203060b}, +- {0x3d40310c,0x505000}, +- {0x3d403110,0x2040202}, +- {0x3d403114,0x2030202}, +- {0x3d403118,0x1010004}, +- {0x3d40311c,0x301}, +- {0x3d403130,0x20300}, +- {0x3d403134,0xa100002}, +- {0x3d403138,0x8}, +- {0x3d403144,0x50003}, +- {0x3d403180,0x190004}, +- {0x3d403190,0x3818200}, +- {0x3d403194,0x80303}, +- {0x3d4031b4,0x100}, +- {0x3d400028,0x0}, +-}; +- +-/* PHY Initialize Configuration */ +-static struct dram_cfg_param ddr_ddrphy_cfg[] = { +- {0x100a0,0x0}, +- {0x100a1,0x1}, +- {0x100a2,0x2}, +- {0x100a3,0x3}, +- {0x100a4,0x4}, +- {0x100a5,0x5}, +- {0x100a6,0x6}, +- {0x100a7,0x7}, +- {0x110a0,0x0}, +- {0x110a1,0x1}, +- {0x110a2,0x3}, +- {0x110a3,0x4}, +- {0x110a4,0x5}, +- {0x110a5,0x2}, +- {0x110a6,0x7}, +- {0x110a7,0x6}, +- {0x120a0,0x0}, +- {0x120a1,0x1}, +- {0x120a2,0x3}, +- {0x120a3,0x2}, +- {0x120a4,0x5}, +- {0x120a5,0x4}, +- {0x120a6,0x7}, +- {0x120a7,0x6}, +- {0x130a0,0x0}, +- {0x130a1,0x1}, +- {0x130a2,0x2}, +- {0x130a3,0x3}, +- {0x130a4,0x4}, +- {0x130a5,0x5}, +- {0x130a6,0x6}, +- {0x130a7,0x7}, +- {0x1005f,0x1ff}, +- {0x1015f,0x1ff}, +- {0x1105f,0x1ff}, +- {0x1115f,0x1ff}, +- {0x1205f,0x1ff}, +- {0x1215f,0x1ff}, +- {0x1305f,0x1ff}, +- {0x1315f,0x1ff}, +- {0x11005f,0x1ff}, +- {0x11015f,0x1ff}, +- {0x11105f,0x1ff}, +- {0x11115f,0x1ff}, +- {0x11205f,0x1ff}, +- {0x11215f,0x1ff}, +- {0x11305f,0x1ff}, +- {0x11315f,0x1ff}, +- {0x21005f,0x1ff}, +- {0x21015f,0x1ff}, +- {0x21105f,0x1ff}, +- {0x21115f,0x1ff}, +- {0x21205f,0x1ff}, +- {0x21215f,0x1ff}, +- {0x21305f,0x1ff}, +- {0x21315f,0x1ff}, +- {0x55,0x1ff}, +- {0x1055,0x1ff}, +- {0x2055,0x1ff}, +- {0x3055,0x1ff}, +- {0x4055,0x1ff}, +- {0x5055,0x1ff}, +- {0x6055,0x1ff}, +- {0x7055,0x1ff}, +- {0x8055,0x1ff}, +- {0x9055,0x1ff}, +- {0x200c5,0x19}, +- {0x1200c5,0x7}, +- {0x2200c5,0x7}, +- {0x2002e,0x2}, +- {0x12002e,0x2}, +- {0x22002e,0x2}, +- {0x90204,0x0}, +- {0x190204,0x0}, +- {0x290204,0x0}, +- {0x20024,0x1ab}, +- {0x2003a,0x0}, +- {0x120024,0x1ab}, +- {0x2003a,0x0}, +- {0x220024,0x1ab}, +- {0x2003a,0x0}, +- {0x20056,0x3}, +- {0x120056,0xa}, +- {0x220056,0xa}, +- {0x1004d,0xe00}, +- {0x1014d,0xe00}, +- {0x1104d,0xe00}, +- {0x1114d,0xe00}, +- {0x1204d,0xe00}, +- {0x1214d,0xe00}, +- {0x1304d,0xe00}, +- {0x1314d,0xe00}, +- {0x11004d,0xe00}, +- {0x11014d,0xe00}, +- {0x11104d,0xe00}, +- {0x11114d,0xe00}, +- {0x11204d,0xe00}, +- {0x11214d,0xe00}, +- {0x11304d,0xe00}, +- {0x11314d,0xe00}, +- {0x21004d,0xe00}, +- {0x21014d,0xe00}, +- {0x21104d,0xe00}, +- {0x21114d,0xe00}, +- {0x21204d,0xe00}, +- {0x21214d,0xe00}, +- {0x21304d,0xe00}, +- {0x21314d,0xe00}, +- {0x10049,0xeba}, +- {0x10149,0xeba}, +- {0x11049,0xeba}, +- {0x11149,0xeba}, +- {0x12049,0xeba}, +- {0x12149,0xeba}, +- {0x13049,0xeba}, +- {0x13149,0xeba}, +- {0x110049,0xeba}, +- {0x110149,0xeba}, +- {0x111049,0xeba}, +- {0x111149,0xeba}, +- {0x112049,0xeba}, +- {0x112149,0xeba}, +- {0x113049,0xeba}, +- {0x113149,0xeba}, +- {0x210049,0xeba}, +- {0x210149,0xeba}, +- {0x211049,0xeba}, +- {0x211149,0xeba}, +- {0x212049,0xeba}, +- {0x212149,0xeba}, +- {0x213049,0xeba}, +- {0x213149,0xeba}, +- {0x43,0x63}, +- {0x1043,0x63}, +- {0x2043,0x63}, +- {0x3043,0x63}, +- {0x4043,0x63}, +- {0x5043,0x63}, +- {0x6043,0x63}, +- {0x7043,0x63}, +- {0x8043,0x63}, +- {0x9043,0x63}, +- {0x20018,0x3}, +- {0x20075,0x4}, +- {0x20050,0x0}, +- {0x20008,0x2ee}, +- {0x120008,0x64}, +- {0x220008,0x19}, +- {0x20088,0x9}, +- {0x200b2,0xdc}, +- {0x10043,0x5a1}, +- {0x10143,0x5a1}, +- {0x11043,0x5a1}, +- {0x11143,0x5a1}, +- {0x12043,0x5a1}, +- {0x12143,0x5a1}, +- {0x13043,0x5a1}, +- {0x13143,0x5a1}, +- {0x1200b2,0xdc}, +- {0x110043,0x5a1}, +- {0x110143,0x5a1}, +- {0x111043,0x5a1}, +- {0x111143,0x5a1}, +- {0x112043,0x5a1}, +- {0x112143,0x5a1}, +- {0x113043,0x5a1}, +- {0x113143,0x5a1}, +- {0x2200b2,0xdc}, +- {0x210043,0x5a1}, +- {0x210143,0x5a1}, +- {0x211043,0x5a1}, +- {0x211143,0x5a1}, +- {0x212043,0x5a1}, +- {0x212143,0x5a1}, +- {0x213043,0x5a1}, +- {0x213143,0x5a1}, +- {0x200fa,0x1}, +- {0x1200fa,0x1}, +- {0x2200fa,0x1}, +- {0x20019,0x1}, +- {0x120019,0x1}, +- {0x220019,0x1}, +- {0x200f0,0x660}, +- {0x200f1,0x0}, +- {0x200f2,0x4444}, +- {0x200f3,0x8888}, +- {0x200f4,0x5665}, +- {0x200f5,0x0}, +- {0x200f6,0x0}, +- {0x200f7,0xf000}, +- {0x20025,0x0}, +- {0x2002d,0x0}, +- {0x12002d,0x0}, +- {0x22002d,0x0}, +- {0x200c7,0x21}, +- {0x1200c7,0x21}, +- {0x2200c7,0x21}, +- {0x200ca,0x24}, +- {0x1200ca,0x24}, +- {0x2200ca,0x24}, +-}; +- +-/* ddr phy trained csr */ +-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { +- { 0x200b2, 0x0 }, +- { 0x1200b2, 0x0 }, +- { 0x2200b2, 0x0 }, +- { 0x200cb, 0x0 }, +- { 0x10043, 0x0 }, +- { 0x110043, 0x0 }, +- { 0x210043, 0x0 }, +- { 0x10143, 0x0 }, +- { 0x110143, 0x0 }, +- { 0x210143, 0x0 }, +- { 0x11043, 0x0 }, +- { 0x111043, 0x0 }, +- { 0x211043, 0x0 }, +- { 0x11143, 0x0 }, +- { 0x111143, 0x0 }, +- { 0x211143, 0x0 }, +- { 0x12043, 0x0 }, +- { 0x112043, 0x0 }, +- { 0x212043, 0x0 }, +- { 0x12143, 0x0 }, +- { 0x112143, 0x0 }, +- { 0x212143, 0x0 }, +- { 0x13043, 0x0 }, +- { 0x113043, 0x0 }, +- { 0x213043, 0x0 }, +- { 0x13143, 0x0 }, +- { 0x113143, 0x0 }, +- { 0x213143, 0x0 }, +- { 0x80, 0x0 }, +- { 0x100080, 0x0 }, +- { 0x200080, 0x0 }, +- { 0x1080, 0x0 }, +- { 0x101080, 0x0 }, +- { 0x201080, 0x0 }, +- { 0x2080, 0x0 }, +- { 0x102080, 0x0 }, +- { 0x202080, 0x0 }, +- { 0x3080, 0x0 }, +- { 0x103080, 0x0 }, +- { 0x203080, 0x0 }, +- { 0x4080, 0x0 }, +- { 0x104080, 0x0 }, +- { 0x204080, 0x0 }, +- { 0x5080, 0x0 }, +- { 0x105080, 0x0 }, +- { 0x205080, 0x0 }, +- { 0x6080, 0x0 }, +- { 0x106080, 0x0 }, +- { 0x206080, 0x0 }, +- { 0x7080, 0x0 }, +- { 0x107080, 0x0 }, +- { 0x207080, 0x0 }, +- { 0x8080, 0x0 }, +- { 0x108080, 0x0 }, +- { 0x208080, 0x0 }, +- { 0x9080, 0x0 }, +- { 0x109080, 0x0 }, +- { 0x209080, 0x0 }, +- { 0x10080, 0x0 }, +- { 0x110080, 0x0 }, +- { 0x210080, 0x0 }, +- { 0x10180, 0x0 }, +- { 0x110180, 0x0 }, +- { 0x210180, 0x0 }, +- { 0x11080, 0x0 }, +- { 0x111080, 0x0 }, +- { 0x211080, 0x0 }, +- { 0x11180, 0x0 }, +- { 0x111180, 0x0 }, +- { 0x211180, 0x0 }, +- { 0x12080, 0x0 }, +- { 0x112080, 0x0 }, +- { 0x212080, 0x0 }, +- { 0x12180, 0x0 }, +- { 0x112180, 0x0 }, +- { 0x212180, 0x0 }, +- { 0x13080, 0x0 }, +- { 0x113080, 0x0 }, +- { 0x213080, 0x0 }, +- { 0x13180, 0x0 }, +- { 0x113180, 0x0 }, +- { 0x213180, 0x0 }, +- { 0x10081, 0x0 }, +- { 0x110081, 0x0 }, +- { 0x210081, 0x0 }, +- { 0x10181, 0x0 }, +- { 0x110181, 0x0 }, +- { 0x210181, 0x0 }, +- { 0x11081, 0x0 }, +- { 0x111081, 0x0 }, +- { 0x211081, 0x0 }, +- { 0x11181, 0x0 }, +- { 0x111181, 0x0 }, +- { 0x211181, 0x0 }, +- { 0x12081, 0x0 }, +- { 0x112081, 0x0 }, +- { 0x212081, 0x0 }, +- { 0x12181, 0x0 }, +- { 0x112181, 0x0 }, +- { 0x212181, 0x0 }, +- { 0x13081, 0x0 }, +- { 0x113081, 0x0 }, +- { 0x213081, 0x0 }, +- { 0x13181, 0x0 }, +- { 0x113181, 0x0 }, +- { 0x213181, 0x0 }, +- { 0x100d0, 0x0 }, +- { 0x1100d0, 0x0 }, +- { 0x2100d0, 0x0 }, +- { 0x101d0, 0x0 }, +- { 0x1101d0, 0x0 }, +- { 0x2101d0, 0x0 }, +- { 0x110d0, 0x0 }, +- { 0x1110d0, 0x0 }, +- { 0x2110d0, 0x0 }, +- { 0x111d0, 0x0 }, +- { 0x1111d0, 0x0 }, +- { 0x2111d0, 0x0 }, +- { 0x120d0, 0x0 }, +- { 0x1120d0, 0x0 }, +- { 0x2120d0, 0x0 }, +- { 0x121d0, 0x0 }, +- { 0x1121d0, 0x0 }, +- { 0x2121d0, 0x0 }, +- { 0x130d0, 0x0 }, +- { 0x1130d0, 0x0 }, +- { 0x2130d0, 0x0 }, +- { 0x131d0, 0x0 }, +- { 0x1131d0, 0x0 }, +- { 0x2131d0, 0x0 }, +- { 0x100d1, 0x0 }, +- { 0x1100d1, 0x0 }, +- { 0x2100d1, 0x0 }, +- { 0x101d1, 0x0 }, +- { 0x1101d1, 0x0 }, +- { 0x2101d1, 0x0 }, +- { 0x110d1, 0x0 }, +- { 0x1110d1, 0x0 }, +- { 0x2110d1, 0x0 }, +- { 0x111d1, 0x0 }, +- { 0x1111d1, 0x0 }, +- { 0x2111d1, 0x0 }, +- { 0x120d1, 0x0 }, +- { 0x1120d1, 0x0 }, +- { 0x2120d1, 0x0 }, +- { 0x121d1, 0x0 }, +- { 0x1121d1, 0x0 }, +- { 0x2121d1, 0x0 }, +- { 0x130d1, 0x0 }, +- { 0x1130d1, 0x0 }, +- { 0x2130d1, 0x0 }, +- { 0x131d1, 0x0 }, +- { 0x1131d1, 0x0 }, +- { 0x2131d1, 0x0 }, +- { 0x10068, 0x0 }, +- { 0x10168, 0x0 }, +- { 0x10268, 0x0 }, +- { 0x10368, 0x0 }, +- { 0x10468, 0x0 }, +- { 0x10568, 0x0 }, +- { 0x10668, 0x0 }, +- { 0x10768, 0x0 }, +- { 0x10868, 0x0 }, +- { 0x11068, 0x0 }, +- { 0x11168, 0x0 }, +- { 0x11268, 0x0 }, +- { 0x11368, 0x0 }, +- { 0x11468, 0x0 }, +- { 0x11568, 0x0 }, +- { 0x11668, 0x0 }, +- { 0x11768, 0x0 }, +- { 0x11868, 0x0 }, +- { 0x12068, 0x0 }, +- { 0x12168, 0x0 }, +- { 0x12268, 0x0 }, +- { 0x12368, 0x0 }, +- { 0x12468, 0x0 }, +- { 0x12568, 0x0 }, +- { 0x12668, 0x0 }, +- { 0x12768, 0x0 }, +- { 0x12868, 0x0 }, +- { 0x13068, 0x0 }, +- { 0x13168, 0x0 }, +- { 0x13268, 0x0 }, +- { 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0x0 }, +- { 0x290207, 0x0 }, +- { 0x90208, 0x0 }, +- { 0x190208, 0x0 }, +- { 0x290208, 0x0 }, +- { 0x10062, 0x0 }, +- { 0x10162, 0x0 }, +- { 0x10262, 0x0 }, +- { 0x10362, 0x0 }, +- { 0x10462, 0x0 }, +- { 0x10562, 0x0 }, +- { 0x10662, 0x0 }, +- { 0x10762, 0x0 }, +- { 0x10862, 0x0 }, +- { 0x11062, 0x0 }, +- { 0x11162, 0x0 }, +- { 0x11262, 0x0 }, +- { 0x11362, 0x0 }, +- { 0x11462, 0x0 }, +- { 0x11562, 0x0 }, +- { 0x11662, 0x0 }, +- { 0x11762, 0x0 }, +- { 0x11862, 0x0 }, +- { 0x12062, 0x0 }, +- { 0x12162, 0x0 }, +- { 0x12262, 0x0 }, +- { 0x12362, 0x0 }, +- { 0x12462, 0x0 }, +- { 0x12562, 0x0 }, +- { 0x12662, 0x0 }, +- { 0x12762, 0x0 }, +- { 0x12862, 0x0 }, +- { 0x13062, 0x0 }, +- { 0x13162, 0x0 }, +- { 0x13262, 0x0 }, +- { 0x13362, 0x0 }, +- { 0x13462, 0x0 }, +- { 0x13562, 0x0 }, +- { 0x13662, 0x0 }, +- { 0x13762, 0x0 }, +- { 0x13862, 0x0 }, +- { 0x20077, 0x0 }, +- { 0x10001, 0x0 }, +- { 0x11001, 0x0 }, +- { 0x12001, 0x0 }, +- { 0x13001, 0x0 }, +- { 0x10040, 0x0 }, +- { 0x10140, 0x0 }, +- { 0x10240, 0x0 }, +- { 0x10340, 0x0 }, +- { 0x10440, 0x0 }, +- { 0x10540, 0x0 }, +- { 0x10640, 0x0 }, +- { 0x10740, 0x0 }, +- { 0x10840, 0x0 }, +- { 0x10030, 0x0 }, +- { 0x10130, 0x0 }, +- { 0x10230, 0x0 }, +- { 0x10330, 0x0 }, +- { 0x10430, 0x0 }, +- { 0x10530, 0x0 }, +- { 0x10630, 0x0 }, +- { 0x10730, 0x0 }, +- { 0x10830, 0x0 }, +- { 0x11040, 0x0 }, +- { 0x11140, 0x0 }, +- { 0x11240, 0x0 }, +- { 0x11340, 0x0 }, +- { 0x11440, 0x0 }, +- { 0x11540, 0x0 }, +- { 0x11640, 0x0 }, +- { 0x11740, 0x0 }, +- { 0x11840, 0x0 }, +- { 0x11030, 0x0 }, +- { 0x11130, 0x0 }, +- { 0x11230, 0x0 }, +- { 0x11330, 0x0 }, +- { 0x11430, 0x0 }, +- { 0x11530, 0x0 }, +- { 0x11630, 0x0 }, +- { 0x11730, 0x0 }, +- { 0x11830, 0x0 }, +- { 0x12040, 0x0 }, +- { 0x12140, 0x0 }, +- { 0x12240, 0x0 }, +- { 0x12340, 0x0 }, +- { 0x12440, 0x0 }, +- { 0x12540, 0x0 }, +- { 0x12640, 0x0 }, +- { 0x12740, 0x0 }, +- { 0x12840, 0x0 }, +- { 0x12030, 0x0 }, +- { 0x12130, 0x0 }, +- { 0x12230, 0x0 }, +- { 0x12330, 0x0 }, +- { 0x12430, 0x0 }, +- { 0x12530, 0x0 }, +- { 0x12630, 0x0 }, +- { 0x12730, 0x0 }, +- { 0x12830, 0x0 }, +- { 0x13040, 0x0 }, +- { 0x13140, 0x0 }, +- { 0x13240, 0x0 }, +- { 0x13340, 0x0 }, +- { 0x13440, 0x0 }, +- { 0x13540, 0x0 }, +- { 0x13640, 0x0 }, +- { 0x13740, 0x0 }, +- { 0x13840, 0x0 }, +- { 0x13030, 0x0 }, +- { 0x13130, 0x0 }, +- { 0x13230, 0x0 }, +- { 0x13330, 0x0 }, +- { 0x13430, 0x0 }, +- { 0x13530, 0x0 }, +- { 0x13630, 0x0 }, +- { 0x13730, 0x0 }, +- { 0x13830, 0x0 }, +-}; +-/* P0 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp0_cfg[] = { +- {0xd0000, 0x0}, +- {0x54003,0xbb8}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x131f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x110}, +- {0x54019,0x2dd4}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x2dd4}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x1}, +- {0x54032,0xd400}, +- {0x54033,0x312d}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0xd400}, +- {0x54039,0x312d}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P1 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp1_cfg[] = { +- {0xd0000, 0x0}, +- {0x54002,0x101}, +- {0x54003,0x190}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x121f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x110}, +- {0x54019,0x84}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x84}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x1}, +- {0x54032,0x8400}, +- {0x54033,0x3100}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0x8400}, +- {0x54039,0x3100}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P2 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp2_cfg[] = { +- {0xd0000, 0x0}, +- {0x54002,0x102}, +- {0x54003,0x64}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x121f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x110}, +- {0x54019,0x84}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x84}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x1}, +- {0x54032,0x8400}, +- {0x54033,0x3100}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0x8400}, +- {0x54039,0x3100}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P0 2D message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { +- {0xd0000, 0x0}, +- {0x54003,0xbb8}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x61}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400f,0x100}, +- {0x54010,0x1f7f}, +- {0x54012,0x110}, +- {0x54019,0x2dd4}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x2dd4}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x1}, +- {0x54032,0xd400}, +- {0x54033,0x312d}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0xd400}, +- {0x54039,0x312d}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- { 0xd0000, 0x1 }, +-}; +- +-/* DRAM PHY init engine image */ +-static struct dram_cfg_param ddr_phy_pie[] = { +- {0xd0000, 0x0}, +- {0x90000,0x10}, +- {0x90001,0x400}, +- {0x90002,0x10e}, +- {0x90003,0x0}, +- {0x90004,0x0}, +- {0x90005,0x8}, +- {0x90029,0xb}, +- {0x9002a,0x480}, +- {0x9002b,0x109}, +- {0x9002c,0x8}, +- {0x9002d,0x448}, +- {0x9002e,0x139}, +- {0x9002f,0x8}, +- {0x90030,0x478}, +- {0x90031,0x109}, +- {0x90032,0x0}, +- {0x90033,0xe8}, +- {0x90034,0x109}, +- {0x90035,0x2}, +- {0x90036,0x10}, +- {0x90037,0x139}, +- {0x90038,0xf}, +- {0x90039,0x7c0}, +- {0x9003a,0x139}, +- {0x9003b,0x44}, +- {0x9003c,0x630}, +- {0x9003d,0x159}, +- {0x9003e,0x14f}, +- {0x9003f,0x630}, +- {0x90040,0x159}, +- {0x90041,0x47}, +- {0x90042,0x630}, +- {0x90043,0x149}, +- {0x90044,0x4f}, +- {0x90045,0x630}, +- {0x90046,0x179}, +- {0x90047,0x8}, +- {0x90048,0xe0}, +- {0x90049,0x109}, +- {0x9004a,0x0}, +- {0x9004b,0x7c8}, +- {0x9004c,0x109}, +- {0x9004d,0x0}, +- {0x9004e,0x1}, +- {0x9004f,0x8}, +- {0x90050,0x0}, +- {0x90051,0x45a}, +- {0x90052,0x9}, +- {0x90053,0x0}, +- {0x90054,0x448}, +- {0x90055,0x109}, +- {0x90056,0x40}, +- {0x90057,0x630}, +- {0x90058,0x179}, +- {0x90059,0x1}, +- {0x9005a,0x618}, +- {0x9005b,0x109}, +- {0x9005c,0x40c0}, +- {0x9005d,0x630}, +- {0x9005e,0x149}, +- {0x9005f,0x8}, +- {0x90060,0x4}, +- {0x90061,0x48}, +- {0x90062,0x4040}, +- {0x90063,0x630}, +- {0x90064,0x149}, +- {0x90065,0x0}, +- {0x90066,0x4}, +- {0x90067,0x48}, +- {0x90068,0x40}, +- {0x90069,0x630}, +- {0x9006a,0x149}, +- {0x9006b,0x10}, +- {0x9006c,0x4}, +- {0x9006d,0x18}, +- {0x9006e,0x0}, +- {0x9006f,0x4}, +- {0x90070,0x78}, +- {0x90071,0x549}, +- {0x90072,0x630}, +- {0x90073,0x159}, +- {0x90074,0xd49}, +- {0x90075,0x630}, +- {0x90076,0x159}, +- {0x90077,0x94a}, +- {0x90078,0x630}, +- {0x90079,0x159}, +- {0x9007a,0x441}, +- {0x9007b,0x630}, +- {0x9007c,0x149}, +- {0x9007d,0x42}, +- {0x9007e,0x630}, +- {0x9007f,0x149}, +- {0x90080,0x1}, +- {0x90081,0x630}, +- {0x90082,0x149}, +- {0x90083,0x0}, +- {0x90084,0xe0}, +- {0x90085,0x109}, +- {0x90086,0xa}, +- {0x90087,0x10}, +- {0x90088,0x109}, +- {0x90089,0x9}, +- {0x9008a,0x3c0}, +- {0x9008b,0x149}, +- {0x9008c,0x9}, +- {0x9008d,0x3c0}, +- {0x9008e,0x159}, +- {0x9008f,0x18}, +- {0x90090,0x10}, +- {0x90091,0x109}, +- {0x90092,0x0}, +- {0x90093,0x3c0}, +- {0x90094,0x109}, +- {0x90095,0x18}, +- {0x90096,0x4}, +- {0x90097,0x48}, +- {0x90098,0x18}, +- {0x90099,0x4}, +- {0x9009a,0x58}, +- {0x9009b,0xa}, +- {0x9009c,0x10}, +- {0x9009d,0x109}, +- {0x9009e,0x2}, +- {0x9009f,0x10}, +- {0x900a0,0x109}, +- {0x900a1,0x5}, +- {0x900a2,0x7c0}, +- {0x900a3,0x109}, +- {0x900a4,0x10}, +- {0x900a5,0x10}, +- {0x900a6,0x109}, +- {0x40000,0x811}, +- {0x40020,0x880}, +- {0x40040,0x0}, +- {0x40060,0x0}, +- {0x40001,0x4008}, +- {0x40021,0x83}, +- {0x40041,0x4f}, +- {0x40061,0x0}, +- {0x40002,0x4040}, +- {0x40022,0x83}, +- {0x40042,0x51}, +- {0x40062,0x0}, +- {0x40003,0x811}, +- {0x40023,0x880}, +- {0x40043,0x0}, +- {0x40063,0x0}, +- {0x40004,0x720}, +- {0x40024,0xf}, +- {0x40044,0x1740}, +- {0x40064,0x0}, +- {0x40005,0x16}, +- {0x40025,0x83}, +- {0x40045,0x4b}, +- {0x40065,0x0}, +- {0x40006,0x716}, +- {0x40026,0xf}, +- {0x40046,0x2001}, +- {0x40066,0x0}, +- {0x40007,0x716}, +- {0x40027,0xf}, +- {0x40047,0x2800}, +- {0x40067,0x0}, +- {0x40008,0x716}, +- {0x40028,0xf}, +- {0x40048,0xf00}, +- {0x40068,0x0}, +- {0x40009,0x720}, +- {0x40029,0xf}, +- {0x40049,0x1400}, +- {0x40069,0x0}, +- {0x4000a,0xe08}, +- {0x4002a,0xc15}, +- {0x4004a,0x0}, +- {0x4006a,0x0}, +- {0x4000b,0x623}, +- {0x4002b,0x15}, +- {0x4004b,0x0}, +- {0x4006b,0x0}, +- {0x4000c,0x4028}, +- {0x4002c,0x80}, +- {0x4004c,0x0}, +- {0x4006c,0x0}, +- {0x4000d,0xe08}, +- {0x4002d,0xc1a}, +- {0x4004d,0x0}, +- {0x4006d,0x0}, +- {0x4000e,0x623}, +- {0x4002e,0x1a}, +- {0x4004e,0x0}, +- {0x4006e,0x0}, +- {0x4000f,0x4040}, +- {0x4002f,0x80}, +- {0x4004f,0x0}, +- {0x4006f,0x0}, +- {0x40010,0x2604}, +- {0x40030,0x15}, +- {0x40050,0x0}, +- {0x40070,0x0}, +- {0x40011,0x708}, +- {0x40031,0x5}, +- {0x40051,0x0}, +- {0x40071,0x2002}, +- {0x40012,0x8}, +- {0x40032,0x80}, +- {0x40052,0x0}, +- {0x40072,0x0}, +- {0x40013,0x2604}, +- {0x40033,0x1a}, +- {0x40053,0x0}, +- {0x40073,0x0}, +- {0x40014,0x708}, +- {0x40034,0xa}, +- {0x40054,0x0}, +- {0x40074,0x2002}, +- {0x40015,0x4040}, +- {0x40035,0x80}, +- {0x40055,0x0}, +- {0x40075,0x0}, +- {0x40016,0x60a}, +- {0x40036,0x15}, +- {0x40056,0x1200}, +- {0x40076,0x0}, +- {0x40017,0x61a}, +- {0x40037,0x15}, +- {0x40057,0x1300}, +- {0x40077,0x0}, +- {0x40018,0x60a}, +- {0x40038,0x1a}, +- {0x40058,0x1200}, +- {0x40078,0x0}, +- {0x40019,0x642}, +- {0x40039,0x1a}, +- {0x40059,0x1300}, +- {0x40079,0x0}, +- {0x4001a,0x4808}, +- {0x4003a,0x880}, +- {0x4005a,0x0}, +- {0x4007a,0x0}, +- {0x900a7,0x0}, +- {0x900a8,0x790}, +- {0x900a9,0x11a}, +- {0x900aa,0x8}, +- {0x900ab,0x7aa}, +- {0x900ac,0x2a}, +- {0x900ad,0x10}, +- {0x900ae,0x7b2}, +- {0x900af,0x2a}, +- {0x900b0,0x0}, +- {0x900b1,0x7c8}, +- {0x900b2,0x109}, +- {0x900b3,0x10}, +- {0x900b4,0x2a8}, +- {0x900b5,0x129}, +- {0x900b6,0x8}, +- {0x900b7,0x370}, +- {0x900b8,0x129}, +- {0x900b9,0xa}, +- {0x900ba,0x3c8}, +- {0x900bb,0x1a9}, +- {0x900bc,0xc}, +- {0x900bd,0x408}, +- {0x900be,0x199}, +- {0x900bf,0x14}, +- {0x900c0,0x790}, +- {0x900c1,0x11a}, +- {0x900c2,0x8}, +- {0x900c3,0x4}, +- {0x900c4,0x18}, +- {0x900c5,0xe}, +- {0x900c6,0x408}, +- {0x900c7,0x199}, +- {0x900c8,0x8}, +- {0x900c9,0x8568}, +- {0x900ca,0x108}, +- {0x900cb,0x18}, +- {0x900cc,0x790}, +- {0x900cd,0x16a}, +- {0x900ce,0x8}, +- {0x900cf,0x1d8}, +- {0x900d0,0x169}, +- {0x900d1,0x10}, +- {0x900d2,0x8558}, +- {0x900d3,0x168}, +- {0x900d4,0x70}, +- {0x900d5,0x788}, +- {0x900d6,0x16a}, +- {0x900d7,0x1ff8}, +- {0x900d8,0x85a8}, +- {0x900d9,0x1e8}, +- {0x900da,0x50}, +- {0x900db,0x798}, +- {0x900dc,0x16a}, +- {0x900dd,0x60}, +- {0x900de,0x7a0}, +- {0x900df,0x16a}, +- {0x900e0,0x8}, +- {0x900e1,0x8310}, +- {0x900e2,0x168}, +- {0x900e3,0x8}, +- {0x900e4,0xa310}, +- {0x900e5,0x168}, +- {0x900e6,0xa}, +- {0x900e7,0x408}, +- {0x900e8,0x169}, +- {0x900e9,0x6e}, +- {0x900ea,0x0}, +- {0x900eb,0x68}, +- {0x900ec,0x0}, +- {0x900ed,0x408}, +- {0x900ee,0x169}, +- {0x900ef,0x0}, +- {0x900f0,0x8310}, +- {0x900f1,0x168}, +- {0x900f2,0x0}, +- {0x900f3,0xa310}, +- {0x900f4,0x168}, +- {0x900f5,0x1ff8}, +- {0x900f6,0x85a8}, +- {0x900f7,0x1e8}, +- {0x900f8,0x68}, +- {0x900f9,0x798}, +- {0x900fa,0x16a}, +- {0x900fb,0x78}, +- {0x900fc,0x7a0}, +- {0x900fd,0x16a}, +- {0x900fe,0x68}, +- {0x900ff,0x790}, +- {0x90100,0x16a}, +- {0x90101,0x8}, +- {0x90102,0x8b10}, +- {0x90103,0x168}, +- {0x90104,0x8}, +- {0x90105,0xab10}, +- {0x90106,0x168}, +- {0x90107,0xa}, +- {0x90108,0x408}, +- {0x90109,0x169}, +- {0x9010a,0x58}, +- {0x9010b,0x0}, +- {0x9010c,0x68}, +- {0x9010d,0x0}, +- {0x9010e,0x408}, +- {0x9010f,0x169}, +- {0x90110,0x0}, +- {0x90111,0x8b10}, +- {0x90112,0x168}, +- {0x90113,0x0}, +- {0x90114,0xab10}, +- {0x90115,0x168}, +- {0x90116,0x0}, +- {0x90117,0x1d8}, +- {0x90118,0x169}, +- {0x90119,0x80}, +- {0x9011a,0x790}, +- {0x9011b,0x16a}, +- {0x9011c,0x18}, +- {0x9011d,0x7aa}, +- {0x9011e,0x6a}, +- {0x9011f,0xa}, +- {0x90120,0x0}, +- {0x90121,0x1e9}, +- {0x90122,0x8}, +- {0x90123,0x8080}, +- {0x90124,0x108}, +- {0x90125,0xf}, +- {0x90126,0x408}, +- {0x90127,0x169}, +- {0x90128,0xc}, +- {0x90129,0x0}, +- {0x9012a,0x68}, +- {0x9012b,0x9}, +- {0x9012c,0x0}, +- {0x9012d,0x1a9}, +- {0x9012e,0x0}, +- {0x9012f,0x408}, +- {0x90130,0x169}, +- {0x90131,0x0}, +- {0x90132,0x8080}, +- {0x90133,0x108}, +- {0x90134,0x8}, +- {0x90135,0x7aa}, +- {0x90136,0x6a}, +- {0x90137,0x0}, +- {0x90138,0x8568}, +- {0x90139,0x108}, +- {0x9013a,0xb7}, +- {0x9013b,0x790}, +- {0x9013c,0x16a}, +- {0x9013d,0x1f}, +- {0x9013e,0x0}, +- {0x9013f,0x68}, +- {0x90140,0x8}, +- {0x90141,0x8558}, +- {0x90142,0x168}, +- {0x90143,0xf}, +- {0x90144,0x408}, +- {0x90145,0x169}, +- {0x90146,0xc}, +- {0x90147,0x0}, +- {0x90148,0x68}, +- {0x90149,0x0}, +- {0x9014a,0x408}, +- {0x9014b,0x169}, +- {0x9014c,0x0}, +- {0x9014d,0x8558}, +- {0x9014e,0x168}, +- {0x9014f,0x8}, +- {0x90150,0x3c8}, +- {0x90151,0x1a9}, +- {0x90152,0x3}, +- {0x90153,0x370}, +- {0x90154,0x129}, +- {0x90155,0x20}, +- {0x90156,0x2aa}, +- {0x90157,0x9}, +- {0x90158,0x0}, +- {0x90159,0x400}, +- {0x9015a,0x10e}, +- {0x9015b,0x8}, +- {0x9015c,0xe8}, +- {0x9015d,0x109}, +- {0x9015e,0x0}, +- {0x9015f,0x8140}, +- {0x90160,0x10c}, +- {0x90161,0x10}, +- {0x90162,0x8138}, +- {0x90163,0x10c}, +- {0x90164,0x8}, +- {0x90165,0x7c8}, +- {0x90166,0x101}, +- {0x90167,0x8}, +- {0x90168,0x0}, +- {0x90169,0x8}, +- {0x9016a,0x8}, +- {0x9016b,0x448}, +- {0x9016c,0x109}, +- {0x9016d,0xf}, +- {0x9016e,0x7c0}, +- {0x9016f,0x109}, +- {0x90170,0x0}, +- {0x90171,0xe8}, +- {0x90172,0x109}, +- {0x90173,0x47}, +- {0x90174,0x630}, +- {0x90175,0x109}, +- {0x90176,0x8}, +- {0x90177,0x618}, +- {0x90178,0x109}, +- {0x90179,0x8}, +- {0x9017a,0xe0}, +- {0x9017b,0x109}, +- {0x9017c,0x0}, +- {0x9017d,0x7c8}, +- {0x9017e,0x109}, +- {0x9017f,0x8}, +- {0x90180,0x8140}, +- {0x90181,0x10c}, +- {0x90182,0x0}, +- {0x90183,0x1}, +- {0x90184,0x8}, +- {0x90185,0x8}, +- {0x90186,0x4}, +- {0x90187,0x8}, +- {0x90188,0x8}, +- {0x90189,0x7c8}, +- {0x9018a,0x101}, +- {0x90006,0x0}, +- {0x90007,0x0}, +- {0x90008,0x8}, +- {0x90009,0x0}, +- {0x9000a,0x0}, +- {0x9000b,0x0}, +- {0xd00e7,0x400}, +- {0x90017,0x0}, +- {0x9001f,0x2a}, +- {0x90026,0x6a}, +- {0x400d0,0x0}, +- {0x400d1,0x101}, +- {0x400d2,0x105}, +- {0x400d3,0x107}, +- {0x400d4,0x10f}, +- {0x400d5,0x202}, +- {0x400d6,0x20a}, +- {0x400d7,0x20b}, +- {0x2003a,0x2}, +- {0x2000b,0x5d}, +- {0x2000c,0xbb}, +- {0x2000d,0x753}, +- {0x2000e,0x2c}, +- {0x12000b,0xc}, +- {0x12000c,0x19}, +- {0x12000d,0xfa}, +- {0x12000e,0x10}, +- {0x22000b,0x3}, +- {0x22000c,0x6}, +- {0x22000d,0x3e}, +- {0x22000e,0x10}, +- {0x9000c,0x0}, +- {0x9000d,0x173}, +- {0x9000e,0x60}, +- {0x9000f,0x6110}, +- {0x90010,0x2152}, +- {0x90011,0xdfbd}, +- {0x90012,0x60}, +- {0x90013,0x6152}, +- {0x20010,0x5a}, +- {0x20011,0x3}, +- {0x120010,0x5a}, +- {0x120011,0x3}, +- {0x220010,0x5a}, +- {0x220011,0x3}, +- {0x40080,0xe0}, +- {0x40081,0x12}, +- {0x40082,0xe0}, +- {0x40083,0x12}, +- {0x40084,0xe0}, +- {0x40085,0x12}, +- {0x140080,0xe0}, +- {0x140081,0x12}, +- {0x140082,0xe0}, +- {0x140083,0x12}, +- {0x140084,0xe0}, +- {0x140085,0x12}, +- {0x240080,0xe0}, +- {0x240081,0x12}, +- {0x240082,0xe0}, +- {0x240083,0x12}, +- {0x240084,0xe0}, +- {0x240085,0x12}, +- {0x400fd,0xf}, +- {0x10011,0x1}, +- {0x10012,0x1}, +- {0x10013,0x180}, +- {0x10018,0x1}, +- {0x10002,0x6209}, +- {0x100b2,0x1}, +- {0x101b4,0x1}, +- {0x102b4,0x1}, +- {0x103b4,0x1}, +- {0x104b4,0x1}, +- {0x105b4,0x1}, +- {0x106b4,0x1}, +- {0x107b4,0x1}, +- {0x108b4,0x1}, +- {0x11011,0x1}, +- {0x11012,0x1}, +- {0x11013,0x180}, +- {0x11018,0x1}, +- {0x11002,0x6209}, +- {0x110b2,0x1}, +- {0x111b4,0x1}, +- {0x112b4,0x1}, +- {0x113b4,0x1}, +- {0x114b4,0x1}, +- {0x115b4,0x1}, +- {0x116b4,0x1}, +- {0x117b4,0x1}, +- {0x118b4,0x1}, +- {0x12011,0x1}, +- {0x12012,0x1}, +- {0x12013,0x180}, +- {0x12018,0x1}, +- {0x12002,0x6209}, +- {0x120b2,0x1}, +- {0x121b4,0x1}, +- {0x122b4,0x1}, +- {0x123b4,0x1}, +- {0x124b4,0x1}, +- {0x125b4,0x1}, +- {0x126b4,0x1}, +- {0x127b4,0x1}, +- {0x128b4,0x1}, +- {0x13011,0x1}, +- {0x13012,0x1}, +- {0x13013,0x180}, +- {0x13018,0x1}, +- {0x13002,0x6209}, +- {0x130b2,0x1}, +- {0x131b4,0x1}, +- {0x132b4,0x1}, +- {0x133b4,0x1}, +- {0x134b4,0x1}, +- {0x135b4,0x1}, +- {0x136b4,0x1}, +- {0x137b4,0x1}, +- {0x138b4,0x1}, +- {0x2003a,0x2}, +- {0xc0080,0x2}, +- {0xd0000, 0x1} +-}; +- +-static struct dram_fsp_msg ddr_dram_fsp_msg[] = { +- { +- /* P0 3000mts 1D */ +- .drate = 3000, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp0_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), +- }, +- { +- /* P1 400mts 1D */ +- .drate = 400, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp1_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), +- }, +- { +- /* P2 100mts 1D */ +- .drate = 100, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp2_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), +- }, +- { +- /* P0 3000mts 2D */ +- .drate = 3000, +- .fw_type = FW_2D_IMAGE, +- .fsp_cfg = ddr_fsp0_2d_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), +- }, +-}; +- +-/* ddr timing config params */ +-struct dram_timing_info ucm_dram_timing_01061010 = { +- .ddrc_cfg = ddr_ddrc_cfg, +- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), +- .ddrphy_cfg = ddr_ddrphy_cfg, +- .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), +- .fsp_msg = ddr_dram_fsp_msg, +- .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), +- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, +- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), +- .ddrphy_pie = ddr_phy_pie, +- .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), +- .fsp_table = { 3000, 400, 100, }, +-}; +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c +similarity index 58% +rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c +rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c +index 5b091de47b..add39fb3f8 100644 +--- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05000010.c ++++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_05.c +@@ -321,728 +321,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x2200ca,0x24}, + }; + +-/* ddr phy trained csr */ +-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { +- { 0x200b2, 0x0 }, +- { 0x1200b2, 0x0 }, +- { 0x2200b2, 0x0 }, +- { 0x200cb, 0x0 }, +- { 0x10043, 0x0 }, +- { 0x110043, 0x0 }, +- { 0x210043, 0x0 }, +- { 0x10143, 0x0 }, +- { 0x110143, 0x0 }, +- { 0x210143, 0x0 }, +- { 0x11043, 0x0 }, +- { 0x111043, 0x0 }, +- { 0x211043, 0x0 }, +- { 0x11143, 0x0 }, +- { 0x111143, 0x0 }, +- { 0x211143, 0x0 }, +- { 0x12043, 0x0 }, +- { 0x112043, 0x0 }, +- { 0x212043, 0x0 }, +- { 0x12143, 0x0 }, +- { 0x112143, 0x0 }, +- { 0x212143, 0x0 }, +- { 0x13043, 0x0 }, +- { 0x113043, 0x0 }, +- { 0x213043, 0x0 }, +- { 0x13143, 0x0 }, +- { 0x113143, 0x0 }, +- { 0x213143, 0x0 }, +- { 0x80, 0x0 }, +- { 0x100080, 0x0 }, +- { 0x200080, 0x0 }, +- { 0x1080, 0x0 }, +- { 0x101080, 0x0 }, +- { 0x201080, 0x0 }, +- { 0x2080, 0x0 }, +- { 0x102080, 0x0 }, +- { 0x202080, 0x0 }, +- { 0x3080, 0x0 }, +- { 0x103080, 0x0 }, +- { 0x203080, 0x0 }, +- { 0x4080, 0x0 }, +- { 0x104080, 0x0 }, +- { 0x204080, 0x0 }, +- { 0x5080, 0x0 }, +- { 0x105080, 0x0 }, +- { 0x205080, 0x0 }, +- { 0x6080, 0x0 }, +- { 0x106080, 0x0 }, +- { 0x206080, 0x0 }, +- { 0x7080, 0x0 }, +- { 0x107080, 0x0 }, +- { 0x207080, 0x0 }, +- { 0x8080, 0x0 }, +- { 0x108080, 0x0 }, +- { 0x208080, 0x0 }, +- { 0x9080, 0x0 }, +- { 0x109080, 0x0 }, +- { 0x209080, 0x0 }, +- { 0x10080, 0x0 }, +- { 0x110080, 0x0 }, +- { 0x210080, 0x0 }, +- { 0x10180, 0x0 }, +- { 0x110180, 0x0 }, +- { 0x210180, 0x0 }, +- { 0x11080, 0x0 }, +- { 0x111080, 0x0 }, +- { 0x211080, 0x0 }, +- { 0x11180, 0x0 }, +- { 0x111180, 0x0 }, +- { 0x211180, 0x0 }, +- { 0x12080, 0x0 }, +- { 0x112080, 0x0 }, +- { 0x212080, 0x0 }, +- { 0x12180, 0x0 }, +- { 0x112180, 0x0 }, +- { 0x212180, 0x0 }, +- { 0x13080, 0x0 }, +- { 0x113080, 0x0 }, +- { 0x213080, 0x0 }, +- { 0x13180, 0x0 }, +- { 0x113180, 0x0 }, +- { 0x213180, 0x0 }, +- { 0x10081, 0x0 }, +- { 0x110081, 0x0 }, +- { 0x210081, 0x0 }, +- { 0x10181, 0x0 }, +- { 0x110181, 0x0 }, +- { 0x210181, 0x0 }, +- { 0x11081, 0x0 }, +- { 0x111081, 0x0 }, +- { 0x211081, 0x0 }, +- { 0x11181, 0x0 }, +- { 0x111181, 0x0 }, +- { 0x211181, 0x0 }, +- { 0x12081, 0x0 }, +- { 0x112081, 0x0 }, +- { 0x212081, 0x0 }, +- { 0x12181, 0x0 }, +- { 0x112181, 0x0 }, +- { 0x212181, 0x0 }, +- { 0x13081, 0x0 }, +- { 0x113081, 0x0 }, +- { 0x213081, 0x0 }, +- { 0x13181, 0x0 }, +- { 0x113181, 0x0 }, +- { 0x213181, 0x0 }, +- { 0x100d0, 0x0 }, +- { 0x1100d0, 0x0 }, +- { 0x2100d0, 0x0 }, +- { 0x101d0, 0x0 }, +- { 0x1101d0, 0x0 }, +- { 0x2101d0, 0x0 }, +- { 0x110d0, 0x0 }, +- { 0x1110d0, 0x0 }, +- { 0x2110d0, 0x0 }, +- { 0x111d0, 0x0 }, +- { 0x1111d0, 0x0 }, +- { 0x2111d0, 0x0 }, +- { 0x120d0, 0x0 }, +- { 0x1120d0, 0x0 }, +- { 0x2120d0, 0x0 }, +- { 0x121d0, 0x0 }, +- { 0x1121d0, 0x0 }, +- { 0x2121d0, 0x0 }, +- { 0x130d0, 0x0 }, +- { 0x1130d0, 0x0 }, +- { 0x2130d0, 0x0 }, +- { 0x131d0, 0x0 }, +- { 0x1131d0, 0x0 }, +- { 0x2131d0, 0x0 }, +- { 0x100d1, 0x0 }, +- { 0x1100d1, 0x0 }, +- { 0x2100d1, 0x0 }, +- { 0x101d1, 0x0 }, +- { 0x1101d1, 0x0 }, +- { 0x2101d1, 0x0 }, +- { 0x110d1, 0x0 }, +- { 0x1110d1, 0x0 }, +- { 0x2110d1, 0x0 }, +- { 0x111d1, 0x0 }, +- { 0x1111d1, 0x0 }, +- { 0x2111d1, 0x0 }, +- { 0x120d1, 0x0 }, +- { 0x1120d1, 0x0 }, +- { 0x2120d1, 0x0 }, +- { 0x121d1, 0x0 }, +- { 0x1121d1, 0x0 }, +- { 0x2121d1, 0x0 }, +- { 0x130d1, 0x0 }, +- { 0x1130d1, 0x0 }, +- { 0x2130d1, 0x0 }, +- { 0x131d1, 0x0 }, +- { 0x1131d1, 0x0 }, +- { 0x2131d1, 0x0 }, +- { 0x10068, 0x0 }, +- { 0x10168, 0x0 }, +- { 0x10268, 0x0 }, +- { 0x10368, 0x0 }, +- { 0x10468, 0x0 }, +- { 0x10568, 0x0 }, +- { 0x10668, 0x0 }, +- { 0x10768, 0x0 }, +- { 0x10868, 0x0 }, +- { 0x11068, 0x0 }, +- { 0x11168, 0x0 }, +- { 0x11268, 0x0 }, +- { 0x11368, 0x0 }, +- { 0x11468, 0x0 }, +- { 0x11568, 0x0 }, +- { 0x11668, 0x0 }, +- { 0x11768, 0x0 }, +- { 0x11868, 0x0 }, +- { 0x12068, 0x0 }, +- { 0x12168, 0x0 }, +- { 0x12268, 0x0 }, +- { 0x12368, 0x0 }, +- { 0x12468, 0x0 }, +- { 0x12568, 0x0 }, +- { 0x12668, 0x0 }, +- { 0x12768, 0x0 }, +- { 0x12868, 0x0 }, +- { 0x13068, 0x0 }, +- { 0x13168, 0x0 }, +- { 0x13268, 0x0 }, +- { 0x13368, 0x0 }, +- { 0x13468, 0x0 }, +- { 0x13568, 0x0 }, +- { 0x13668, 0x0 }, +- { 0x13768, 0x0 }, +- { 0x13868, 0x0 }, +- { 0x10069, 0x0 }, +- { 0x10169, 0x0 }, +- { 0x10269, 0x0 }, +- { 0x10369, 0x0 }, +- { 0x10469, 0x0 }, +- { 0x10569, 0x0 }, +- { 0x10669, 0x0 }, +- { 0x10769, 0x0 }, +- { 0x10869, 0x0 }, +- { 0x11069, 0x0 }, +- { 0x11169, 0x0 }, +- { 0x11269, 0x0 }, +- { 0x11369, 0x0 }, +- { 0x11469, 0x0 }, +- { 0x11569, 0x0 }, +- { 0x11669, 0x0 }, +- { 0x11769, 0x0 }, +- { 0x11869, 0x0 }, +- { 0x12069, 0x0 }, +- { 0x12169, 0x0 }, +- { 0x12269, 0x0 }, +- { 0x12369, 0x0 }, +- { 0x12469, 0x0 }, +- { 0x12569, 0x0 }, +- { 0x12669, 0x0 }, +- { 0x12769, 0x0 }, +- { 0x12869, 0x0 }, +- { 0x13069, 0x0 }, +- { 0x13169, 0x0 }, +- { 0x13269, 0x0 }, +- { 0x13369, 0x0 }, +- { 0x13469, 0x0 }, +- { 0x13569, 0x0 }, +- { 0x13669, 0x0 }, +- { 0x13769, 0x0 }, +- { 0x13869, 0x0 }, +- { 0x1008c, 0x0 }, +- { 0x11008c, 0x0 }, +- { 0x21008c, 0x0 }, +- { 0x1018c, 0x0 }, +- { 0x11018c, 0x0 }, +- { 0x21018c, 0x0 }, +- { 0x1108c, 0x0 }, +- { 0x11108c, 0x0 }, +- { 0x21108c, 0x0 }, +- { 0x1118c, 0x0 }, +- { 0x11118c, 0x0 }, +- { 0x21118c, 0x0 }, +- { 0x1208c, 0x0 }, +- { 0x11208c, 0x0 }, +- { 0x21208c, 0x0 }, +- { 0x1218c, 0x0 }, +- { 0x11218c, 0x0 }, +- { 0x21218c, 0x0 }, +- { 0x1308c, 0x0 }, +- { 0x11308c, 0x0 }, +- { 0x21308c, 0x0 }, +- { 0x1318c, 0x0 }, +- { 0x11318c, 0x0 }, +- { 0x21318c, 0x0 }, +- { 0x1008d, 0x0 }, +- { 0x11008d, 0x0 }, +- { 0x21008d, 0x0 }, +- { 0x1018d, 0x0 }, +- { 0x11018d, 0x0 }, +- { 0x21018d, 0x0 }, +- { 0x1108d, 0x0 }, +- { 0x11108d, 0x0 }, +- { 0x21108d, 0x0 }, +- { 0x1118d, 0x0 }, +- { 0x11118d, 0x0 }, +- { 0x21118d, 0x0 }, +- { 0x1208d, 0x0 }, +- { 0x11208d, 0x0 }, +- { 0x21208d, 0x0 }, +- { 0x1218d, 0x0 }, +- { 0x11218d, 0x0 }, +- { 0x21218d, 0x0 }, +- { 0x1308d, 0x0 }, +- { 0x11308d, 0x0 }, +- { 0x21308d, 0x0 }, +- { 0x1318d, 0x0 }, +- { 0x11318d, 0x0 }, +- { 0x21318d, 0x0 }, +- { 0x100c0, 0x0 }, +- { 0x1100c0, 0x0 }, +- { 0x2100c0, 0x0 }, +- { 0x101c0, 0x0 }, +- { 0x1101c0, 0x0 }, +- { 0x2101c0, 0x0 }, +- { 0x102c0, 0x0 }, +- { 0x1102c0, 0x0 }, +- { 0x2102c0, 0x0 }, +- { 0x103c0, 0x0 }, +- { 0x1103c0, 0x0 }, +- { 0x2103c0, 0x0 }, +- { 0x104c0, 0x0 }, +- { 0x1104c0, 0x0 }, +- { 0x2104c0, 0x0 }, +- { 0x105c0, 0x0 }, +- { 0x1105c0, 0x0 }, +- { 0x2105c0, 0x0 }, +- { 0x106c0, 0x0 }, +- { 0x1106c0, 0x0 }, +- { 0x2106c0, 0x0 }, +- { 0x107c0, 0x0 }, +- { 0x1107c0, 0x0 }, +- { 0x2107c0, 0x0 }, +- { 0x108c0, 0x0 }, +- { 0x1108c0, 0x0 }, +- { 0x2108c0, 0x0 }, +- { 0x110c0, 0x0 }, +- { 0x1110c0, 0x0 }, +- { 0x2110c0, 0x0 }, +- { 0x111c0, 0x0 }, +- { 0x1111c0, 0x0 }, +- { 0x2111c0, 0x0 }, +- { 0x112c0, 0x0 }, +- { 0x1112c0, 0x0 }, +- { 0x2112c0, 0x0 }, +- { 0x113c0, 0x0 }, +- { 0x1113c0, 0x0 }, +- { 0x2113c0, 0x0 }, +- { 0x114c0, 0x0 }, +- { 0x1114c0, 0x0 }, +- { 0x2114c0, 0x0 }, +- { 0x115c0, 0x0 }, +- { 0x1115c0, 0x0 }, +- { 0x2115c0, 0x0 }, +- { 0x116c0, 0x0 }, +- { 0x1116c0, 0x0 }, +- { 0x2116c0, 0x0 }, +- { 0x117c0, 0x0 }, +- { 0x1117c0, 0x0 }, +- { 0x2117c0, 0x0 }, +- { 0x118c0, 0x0 }, +- { 0x1118c0, 0x0 }, +- { 0x2118c0, 0x0 }, +- { 0x120c0, 0x0 }, +- { 0x1120c0, 0x0 }, +- { 0x2120c0, 0x0 }, +- { 0x121c0, 0x0 }, +- { 0x1121c0, 0x0 }, +- { 0x2121c0, 0x0 }, +- { 0x122c0, 0x0 }, +- { 0x1122c0, 0x0 }, +- { 0x2122c0, 0x0 }, +- { 0x123c0, 0x0 }, +- { 0x1123c0, 0x0 }, +- { 0x2123c0, 0x0 }, +- { 0x124c0, 0x0 }, +- { 0x1124c0, 0x0 }, +- { 0x2124c0, 0x0 }, +- { 0x125c0, 0x0 }, +- { 0x1125c0, 0x0 }, +- { 0x2125c0, 0x0 }, +- { 0x126c0, 0x0 }, +- { 0x1126c0, 0x0 }, +- { 0x2126c0, 0x0 }, +- { 0x127c0, 0x0 }, +- { 0x1127c0, 0x0 }, +- { 0x2127c0, 0x0 }, +- { 0x128c0, 0x0 }, +- { 0x1128c0, 0x0 }, +- { 0x2128c0, 0x0 }, +- { 0x130c0, 0x0 }, +- { 0x1130c0, 0x0 }, +- { 0x2130c0, 0x0 }, +- { 0x131c0, 0x0 }, +- { 0x1131c0, 0x0 }, +- { 0x2131c0, 0x0 }, +- { 0x132c0, 0x0 }, +- { 0x1132c0, 0x0 }, +- { 0x2132c0, 0x0 }, +- { 0x133c0, 0x0 }, +- { 0x1133c0, 0x0 }, +- { 0x2133c0, 0x0 }, +- { 0x134c0, 0x0 }, +- { 0x1134c0, 0x0 }, +- { 0x2134c0, 0x0 }, +- { 0x135c0, 0x0 }, +- { 0x1135c0, 0x0 }, +- { 0x2135c0, 0x0 }, +- { 0x136c0, 0x0 }, +- { 0x1136c0, 0x0 }, +- { 0x2136c0, 0x0 }, +- { 0x137c0, 0x0 }, +- { 0x1137c0, 0x0 }, +- { 0x2137c0, 0x0 }, +- { 0x138c0, 0x0 }, +- { 0x1138c0, 0x0 }, +- { 0x2138c0, 0x0 }, +- { 0x100c1, 0x0 }, +- { 0x1100c1, 0x0 }, +- { 0x2100c1, 0x0 }, +- { 0x101c1, 0x0 }, +- { 0x1101c1, 0x0 }, +- { 0x2101c1, 0x0 }, +- { 0x102c1, 0x0 }, +- { 0x1102c1, 0x0 }, +- { 0x2102c1, 0x0 }, +- { 0x103c1, 0x0 }, +- { 0x1103c1, 0x0 }, +- { 0x2103c1, 0x0 }, +- { 0x104c1, 0x0 }, +- { 0x1104c1, 0x0 }, +- { 0x2104c1, 0x0 }, +- { 0x105c1, 0x0 }, +- { 0x1105c1, 0x0 }, +- { 0x2105c1, 0x0 }, +- { 0x106c1, 0x0 }, +- { 0x1106c1, 0x0 }, +- { 0x2106c1, 0x0 }, +- { 0x107c1, 0x0 }, +- { 0x1107c1, 0x0 }, +- { 0x2107c1, 0x0 }, +- { 0x108c1, 0x0 }, +- { 0x1108c1, 0x0 }, +- { 0x2108c1, 0x0 }, +- { 0x110c1, 0x0 }, +- { 0x1110c1, 0x0 }, +- { 0x2110c1, 0x0 }, +- { 0x111c1, 0x0 }, +- { 0x1111c1, 0x0 }, +- { 0x2111c1, 0x0 }, +- { 0x112c1, 0x0 }, +- { 0x1112c1, 0x0 }, +- { 0x2112c1, 0x0 }, +- { 0x113c1, 0x0 }, +- { 0x1113c1, 0x0 }, +- { 0x2113c1, 0x0 }, +- { 0x114c1, 0x0 }, +- { 0x1114c1, 0x0 }, +- { 0x2114c1, 0x0 }, +- { 0x115c1, 0x0 }, +- { 0x1115c1, 0x0 }, +- { 0x2115c1, 0x0 }, +- { 0x116c1, 0x0 }, +- { 0x1116c1, 0x0 }, +- { 0x2116c1, 0x0 }, +- { 0x117c1, 0x0 }, +- { 0x1117c1, 0x0 }, +- { 0x2117c1, 0x0 }, +- { 0x118c1, 0x0 }, +- { 0x1118c1, 0x0 }, +- { 0x2118c1, 0x0 }, +- { 0x120c1, 0x0 }, +- { 0x1120c1, 0x0 }, +- { 0x2120c1, 0x0 }, +- { 0x121c1, 0x0 }, +- { 0x1121c1, 0x0 }, +- { 0x2121c1, 0x0 }, +- { 0x122c1, 0x0 }, +- { 0x1122c1, 0x0 }, +- { 0x2122c1, 0x0 }, +- { 0x123c1, 0x0 }, +- { 0x1123c1, 0x0 }, +- { 0x2123c1, 0x0 }, +- { 0x124c1, 0x0 }, +- { 0x1124c1, 0x0 }, +- { 0x2124c1, 0x0 }, +- { 0x125c1, 0x0 }, +- { 0x1125c1, 0x0 }, +- { 0x2125c1, 0x0 }, +- { 0x126c1, 0x0 }, +- { 0x1126c1, 0x0 }, +- { 0x2126c1, 0x0 }, +- { 0x127c1, 0x0 }, +- { 0x1127c1, 0x0 }, +- { 0x2127c1, 0x0 }, +- { 0x128c1, 0x0 }, +- { 0x1128c1, 0x0 }, +- { 0x2128c1, 0x0 }, +- { 0x130c1, 0x0 }, +- { 0x1130c1, 0x0 }, +- { 0x2130c1, 0x0 }, +- { 0x131c1, 0x0 }, +- { 0x1131c1, 0x0 }, +- { 0x2131c1, 0x0 }, +- { 0x132c1, 0x0 }, +- { 0x1132c1, 0x0 }, +- { 0x2132c1, 0x0 }, +- { 0x133c1, 0x0 }, +- { 0x1133c1, 0x0 }, +- { 0x2133c1, 0x0 }, +- { 0x134c1, 0x0 }, +- { 0x1134c1, 0x0 }, +- { 0x2134c1, 0x0 }, +- { 0x135c1, 0x0 }, +- { 0x1135c1, 0x0 }, +- { 0x2135c1, 0x0 }, +- { 0x136c1, 0x0 }, +- { 0x1136c1, 0x0 }, +- { 0x2136c1, 0x0 }, +- { 0x137c1, 0x0 }, +- { 0x1137c1, 0x0 }, +- { 0x2137c1, 0x0 }, +- { 0x138c1, 0x0 }, +- { 0x1138c1, 0x0 }, +- { 0x2138c1, 0x0 }, +- { 0x10020, 0x0 }, +- { 0x110020, 0x0 }, +- { 0x210020, 0x0 }, +- { 0x11020, 0x0 }, +- { 0x111020, 0x0 }, +- { 0x211020, 0x0 }, +- { 0x12020, 0x0 }, +- { 0x112020, 0x0 }, +- { 0x212020, 0x0 }, +- { 0x13020, 0x0 }, +- { 0x113020, 0x0 }, +- { 0x213020, 0x0 }, +- { 0x20072, 0x0 }, +- { 0x20073, 0x0 }, +- { 0x20074, 0x0 }, +- { 0x100aa, 0x0 }, +- { 0x110aa, 0x0 }, +- { 0x120aa, 0x0 }, +- { 0x130aa, 0x0 }, +- { 0x20010, 0x0 }, +- { 0x120010, 0x0 }, +- { 0x220010, 0x0 }, +- { 0x20011, 0x0 }, +- { 0x120011, 0x0 }, +- { 0x220011, 0x0 }, +- { 0x100ae, 0x0 }, +- { 0x1100ae, 0x0 }, +- { 0x2100ae, 0x0 }, +- { 0x100af, 0x0 }, +- { 0x1100af, 0x0 }, +- { 0x2100af, 0x0 }, +- { 0x110ae, 0x0 }, +- { 0x1110ae, 0x0 }, +- { 0x2110ae, 0x0 }, +- { 0x110af, 0x0 }, +- { 0x1110af, 0x0 }, +- { 0x2110af, 0x0 }, +- { 0x120ae, 0x0 }, +- { 0x1120ae, 0x0 }, +- { 0x2120ae, 0x0 }, +- { 0x120af, 0x0 }, +- { 0x1120af, 0x0 }, +- { 0x2120af, 0x0 }, +- { 0x130ae, 0x0 }, +- { 0x1130ae, 0x0 }, +- { 0x2130ae, 0x0 }, +- { 0x130af, 0x0 }, +- { 0x1130af, 0x0 }, +- { 0x2130af, 0x0 }, +- { 0x20020, 0x0 }, +- { 0x120020, 0x0 }, +- { 0x220020, 0x0 }, +- { 0x100a0, 0x0 }, +- { 0x100a1, 0x0 }, +- { 0x100a2, 0x0 }, +- { 0x100a3, 0x0 }, +- { 0x100a4, 0x0 }, +- { 0x100a5, 0x0 }, +- { 0x100a6, 0x0 }, +- { 0x100a7, 0x0 }, +- { 0x110a0, 0x0 }, +- { 0x110a1, 0x0 }, +- { 0x110a2, 0x0 }, +- { 0x110a3, 0x0 }, +- { 0x110a4, 0x0 }, +- { 0x110a5, 0x0 }, +- { 0x110a6, 0x0 }, +- { 0x110a7, 0x0 }, +- { 0x120a0, 0x0 }, +- { 0x120a1, 0x0 }, +- { 0x120a2, 0x0 }, +- { 0x120a3, 0x0 }, +- { 0x120a4, 0x0 }, +- { 0x120a5, 0x0 }, +- { 0x120a6, 0x0 }, +- { 0x120a7, 0x0 }, +- { 0x130a0, 0x0 }, +- { 0x130a1, 0x0 }, +- { 0x130a2, 0x0 }, +- { 0x130a3, 0x0 }, +- { 0x130a4, 0x0 }, +- { 0x130a5, 0x0 }, +- { 0x130a6, 0x0 }, +- { 0x130a7, 0x0 }, +- { 0x2007c, 0x0 }, +- { 0x12007c, 0x0 }, +- { 0x22007c, 0x0 }, +- { 0x2007d, 0x0 }, +- { 0x12007d, 0x0 }, +- { 0x22007d, 0x0 }, +- { 0x400fd, 0x0 }, +- { 0x400c0, 0x0 }, +- { 0x90201, 0x0 }, +- { 0x190201, 0x0 }, +- { 0x290201, 0x0 }, +- { 0x90202, 0x0 }, +- { 0x190202, 0x0 }, +- { 0x290202, 0x0 }, +- { 0x90203, 0x0 }, +- { 0x190203, 0x0 }, +- { 0x290203, 0x0 }, +- { 0x90204, 0x0 }, +- { 0x190204, 0x0 }, +- { 0x290204, 0x0 }, +- { 0x90205, 0x0 }, +- { 0x190205, 0x0 }, +- { 0x290205, 0x0 }, +- { 0x90206, 0x0 }, +- { 0x190206, 0x0 }, +- { 0x290206, 0x0 }, +- { 0x90207, 0x0 }, +- { 0x190207, 0x0 }, +- { 0x290207, 0x0 }, +- { 0x90208, 0x0 }, +- { 0x190208, 0x0 }, +- { 0x290208, 0x0 }, +- { 0x10062, 0x0 }, +- { 0x10162, 0x0 }, +- { 0x10262, 0x0 }, +- { 0x10362, 0x0 }, +- { 0x10462, 0x0 }, +- { 0x10562, 0x0 }, +- { 0x10662, 0x0 }, +- { 0x10762, 0x0 }, +- { 0x10862, 0x0 }, +- { 0x11062, 0x0 }, +- { 0x11162, 0x0 }, +- { 0x11262, 0x0 }, +- { 0x11362, 0x0 }, +- { 0x11462, 0x0 }, +- { 0x11562, 0x0 }, +- { 0x11662, 0x0 }, +- { 0x11762, 0x0 }, +- { 0x11862, 0x0 }, +- { 0x12062, 0x0 }, +- { 0x12162, 0x0 }, +- { 0x12262, 0x0 }, +- { 0x12362, 0x0 }, +- { 0x12462, 0x0 }, +- { 0x12562, 0x0 }, +- { 0x12662, 0x0 }, +- { 0x12762, 0x0 }, +- { 0x12862, 0x0 }, +- { 0x13062, 0x0 }, +- { 0x13162, 0x0 }, +- { 0x13262, 0x0 }, +- { 0x13362, 0x0 }, +- { 0x13462, 0x0 }, +- { 0x13562, 0x0 }, +- { 0x13662, 0x0 }, +- { 0x13762, 0x0 }, +- { 0x13862, 0x0 }, +- { 0x20077, 0x0 }, +- { 0x10001, 0x0 }, +- { 0x11001, 0x0 }, +- { 0x12001, 0x0 }, +- { 0x13001, 0x0 }, +- { 0x10040, 0x0 }, +- { 0x10140, 0x0 }, +- { 0x10240, 0x0 }, +- { 0x10340, 0x0 }, +- { 0x10440, 0x0 }, +- { 0x10540, 0x0 }, +- { 0x10640, 0x0 }, +- { 0x10740, 0x0 }, +- { 0x10840, 0x0 }, +- { 0x10030, 0x0 }, +- { 0x10130, 0x0 }, +- { 0x10230, 0x0 }, +- { 0x10330, 0x0 }, +- { 0x10430, 0x0 }, +- { 0x10530, 0x0 }, +- { 0x10630, 0x0 }, +- { 0x10730, 0x0 }, +- { 0x10830, 0x0 }, +- { 0x11040, 0x0 }, +- { 0x11140, 0x0 }, +- { 0x11240, 0x0 }, +- { 0x11340, 0x0 }, +- { 0x11440, 0x0 }, +- { 0x11540, 0x0 }, +- { 0x11640, 0x0 }, +- { 0x11740, 0x0 }, +- { 0x11840, 0x0 }, +- { 0x11030, 0x0 }, +- { 0x11130, 0x0 }, +- { 0x11230, 0x0 }, +- { 0x11330, 0x0 }, +- { 0x11430, 0x0 }, +- { 0x11530, 0x0 }, +- { 0x11630, 0x0 }, +- { 0x11730, 0x0 }, +- { 0x11830, 0x0 }, +- { 0x12040, 0x0 }, +- { 0x12140, 0x0 }, +- { 0x12240, 0x0 }, +- { 0x12340, 0x0 }, +- { 0x12440, 0x0 }, +- { 0x12540, 0x0 }, +- { 0x12640, 0x0 }, +- { 0x12740, 0x0 }, +- { 0x12840, 0x0 }, +- { 0x12030, 0x0 }, +- { 0x12130, 0x0 }, +- { 0x12230, 0x0 }, +- { 0x12330, 0x0 }, +- { 0x12430, 0x0 }, +- { 0x12530, 0x0 }, +- { 0x12630, 0x0 }, +- { 0x12730, 0x0 }, +- { 0x12830, 0x0 }, +- { 0x13040, 0x0 }, +- { 0x13140, 0x0 }, +- { 0x13240, 0x0 }, +- { 0x13340, 0x0 }, +- { 0x13440, 0x0 }, +- { 0x13540, 0x0 }, +- { 0x13640, 0x0 }, +- { 0x13740, 0x0 }, +- { 0x13840, 0x0 }, +- { 0x13030, 0x0 }, +- { 0x13130, 0x0 }, +- { 0x13230, 0x0 }, +- { 0x13330, 0x0 }, +- { 0x13430, 0x0 }, +- { 0x13530, 0x0 }, +- { 0x13630, 0x0 }, +- { 0x13730, 0x0 }, +- { 0x13830, 0x0 }, +-}; + /* P0 message block paremeter for training firmware */ + static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, +@@ -1840,8 +1118,6 @@ struct dram_timing_info ucm_dram_timing_05000010 = { + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), +- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, +- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 2400, 400, 100, }, +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c +similarity index 58% +rename from board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c +rename to board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c +index d57d19d155..e6c47fc445 100644 +--- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff020008.c ++++ b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff.c +@@ -10,7 +10,114 @@ + #include + #include + +-static struct dram_cfg_param ddr_ddrc_cfg[] = { ++static struct dram_cfg_param ddr_ddrc_cfg_ff000110[] = { ++ /** Initialize DDRC registers **/ ++ {0x3d400304,0x1}, ++ {0x3d400030,0x1}, ++ {0x3d400000,0xa3080020}, ++ {0x3d400020,0x223}, ++ {0x3d400024,0x3a980}, ++ {0x3d400064,0x5b00d2}, ++ {0x3d4000d0,0xc00305ba}, ++ {0x3d4000d4,0x940000}, ++ {0x3d4000dc,0xd4002d}, ++ {0x3d4000e0,0x310000}, ++ {0x3d4000e8,0x66004d}, ++ {0x3d4000ec,0x16004d}, ++ {0x3d400100,0x191e1920}, ++ {0x3d400104,0x60630}, ++ {0x3d40010c,0xb0b000}, ++ {0x3d400110,0xe04080e}, ++ {0x3d400114,0x2040c0c}, ++ {0x3d400118,0x1010007}, ++ {0x3d40011c,0x401}, ++ {0x3d400130,0x20600}, ++ {0x3d400134,0xc100002}, ++ {0x3d400138,0xd8}, ++ {0x3d400144,0x96004b}, ++ {0x3d400180,0x2ee0017}, ++ {0x3d400184,0x2605b8e}, ++ {0x3d400188,0x0}, ++ {0x3d400190,0x497820a}, ++ {0x3d400194,0x80303}, ++ {0x3d4001b4,0x170a}, ++ {0x3d4001a0,0xe0400018}, ++ {0x3d4001a4,0xdf00e4}, ++ {0x3d4001a8,0x80000000}, ++ {0x3d4001b0,0x11}, ++ {0x3d4001c0,0x1}, ++ {0x3d4001c4,0x0}, ++ {0x3d4000f4,0xc99}, ++ {0x3d400108,0x70e1617}, ++ {0x3d400200,0x17}, ++ {0x3d40020c,0x0}, ++ {0x3d400210,0x1f1f}, ++ {0x3d400204,0x80808}, ++ {0x3d400214,0x7070707}, ++ {0x3d400218,0x7070707}, ++ {0x3d400250,0x29001701}, ++ {0x3d400254,0x2c}, ++ {0x3d40025c,0x4000030}, ++ {0x3d400264,0x900093e7}, ++ {0x3d40026c,0x2005574}, ++ {0x3d400400,0x111}, ++ {0x3d400408,0x72ff}, ++ {0x3d400494,0x2100e07}, ++ {0x3d400498,0x620096}, ++ {0x3d40049c,0x1100e07}, ++ {0x3d4004a0,0xc8012c}, ++ {0x3d402020,0x21}, ++ {0x3d402024,0x7d00}, ++ {0x3d402050,0x20d040}, ++ {0x3d402064,0xc001c}, ++ {0x3d4020dc,0x840000}, ++ {0x3d4020e0,0x310000}, ++ {0x3d4020e8,0x66004d}, ++ {0x3d4020ec,0x16004d}, ++ {0x3d402100,0xa040305}, ++ {0x3d402104,0x30407}, ++ {0x3d402108,0x203060b}, ++ {0x3d40210c,0x505000}, ++ {0x3d402110,0x2040202}, ++ {0x3d402114,0x2030202}, ++ {0x3d402118,0x1010004}, ++ {0x3d40211c,0x301}, ++ {0x3d402130,0x20300}, ++ {0x3d402134,0xa100002}, ++ {0x3d402138,0x1d}, ++ {0x3d402144,0x14000a}, ++ {0x3d402180,0x640004}, ++ {0x3d402190,0x3818200}, ++ {0x3d402194,0x80303}, ++ {0x3d4021b4,0x100}, ++ {0x3d403020,0x21}, ++ {0x3d403024,0x1f40}, ++ {0x3d403050,0x20d040}, ++ {0x3d403064,0x30007}, ++ {0x3d4030dc,0x840000}, ++ {0x3d4030e0,0x310000}, ++ {0x3d4030e8,0x66004d}, ++ {0x3d4030ec,0x16004d}, ++ {0x3d403100,0xa010102}, ++ {0x3d403104,0x30404}, ++ {0x3d403108,0x203060b}, ++ {0x3d40310c,0x505000}, ++ {0x3d403110,0x2040202}, ++ {0x3d403114,0x2030202}, ++ {0x3d403118,0x1010004}, ++ {0x3d40311c,0x301}, ++ {0x3d403130,0x20300}, ++ {0x3d403134,0xa100002}, ++ {0x3d403138,0x8}, ++ {0x3d403144,0x50003}, ++ {0x3d403180,0x190004}, ++ {0x3d403190,0x3818200}, ++ {0x3d403194,0x80303}, ++ {0x3d4031b4,0x100}, ++ {0x3d400028,0x0}, ++}; ++ ++static struct dram_cfg_param ddr_ddrc_cfg_ff020008[] = { + /** Initialize DDRC registers **/ + {0x3d400304,0x1}, + {0x3d400030,0x1}, +@@ -321,728 +428,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x2200ca,0x24}, + }; + +-/* ddr phy trained csr */ +-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { +- { 0x200b2, 0x0 }, +- { 0x1200b2, 0x0 }, +- { 0x2200b2, 0x0 }, +- { 0x200cb, 0x0 }, +- { 0x10043, 0x0 }, +- { 0x110043, 0x0 }, +- { 0x210043, 0x0 }, +- { 0x10143, 0x0 }, +- { 0x110143, 0x0 }, +- { 0x210143, 0x0 }, +- { 0x11043, 0x0 }, +- { 0x111043, 0x0 }, +- { 0x211043, 0x0 }, +- { 0x11143, 0x0 }, +- { 0x111143, 0x0 }, +- { 0x211143, 0x0 }, +- { 0x12043, 0x0 }, +- { 0x112043, 0x0 }, +- { 0x212043, 0x0 }, +- { 0x12143, 0x0 }, +- { 0x112143, 0x0 }, +- { 0x212143, 0x0 }, +- { 0x13043, 0x0 }, +- { 0x113043, 0x0 }, +- { 0x213043, 0x0 }, +- { 0x13143, 0x0 }, +- { 0x113143, 0x0 }, +- { 0x213143, 0x0 }, +- { 0x80, 0x0 }, +- { 0x100080, 0x0 }, +- { 0x200080, 0x0 }, +- { 0x1080, 0x0 }, +- { 0x101080, 0x0 }, +- { 0x201080, 0x0 }, +- { 0x2080, 0x0 }, +- { 0x102080, 0x0 }, +- { 0x202080, 0x0 }, +- { 0x3080, 0x0 }, +- { 0x103080, 0x0 }, +- { 0x203080, 0x0 }, +- { 0x4080, 0x0 }, +- { 0x104080, 0x0 }, +- { 0x204080, 0x0 }, +- { 0x5080, 0x0 }, +- { 0x105080, 0x0 }, +- { 0x205080, 0x0 }, +- { 0x6080, 0x0 }, +- { 0x106080, 0x0 }, +- { 0x206080, 0x0 }, +- { 0x7080, 0x0 }, +- { 0x107080, 0x0 }, +- { 0x207080, 0x0 }, +- { 0x8080, 0x0 }, +- { 0x108080, 0x0 }, +- { 0x208080, 0x0 }, +- { 0x9080, 0x0 }, +- { 0x109080, 0x0 }, +- { 0x209080, 0x0 }, +- { 0x10080, 0x0 }, +- { 0x110080, 0x0 }, +- { 0x210080, 0x0 }, +- { 0x10180, 0x0 }, +- { 0x110180, 0x0 }, +- { 0x210180, 0x0 }, +- { 0x11080, 0x0 }, +- { 0x111080, 0x0 }, +- { 0x211080, 0x0 }, +- { 0x11180, 0x0 }, +- { 0x111180, 0x0 }, +- { 0x211180, 0x0 }, +- { 0x12080, 0x0 }, +- { 0x112080, 0x0 }, +- { 0x212080, 0x0 }, +- { 0x12180, 0x0 }, +- { 0x112180, 0x0 }, +- { 0x212180, 0x0 }, +- { 0x13080, 0x0 }, +- { 0x113080, 0x0 }, +- { 0x213080, 0x0 }, +- { 0x13180, 0x0 }, +- { 0x113180, 0x0 }, +- { 0x213180, 0x0 }, +- { 0x10081, 0x0 }, +- { 0x110081, 0x0 }, +- { 0x210081, 0x0 }, +- { 0x10181, 0x0 }, +- { 0x110181, 0x0 }, +- { 0x210181, 0x0 }, +- { 0x11081, 0x0 }, +- { 0x111081, 0x0 }, +- { 0x211081, 0x0 }, +- { 0x11181, 0x0 }, +- { 0x111181, 0x0 }, +- { 0x211181, 0x0 }, +- { 0x12081, 0x0 }, +- { 0x112081, 0x0 }, +- { 0x212081, 0x0 }, +- { 0x12181, 0x0 }, +- { 0x112181, 0x0 }, +- { 0x212181, 0x0 }, +- { 0x13081, 0x0 }, +- { 0x113081, 0x0 }, +- { 0x213081, 0x0 }, +- { 0x13181, 0x0 }, +- { 0x113181, 0x0 }, +- { 0x213181, 0x0 }, +- { 0x100d0, 0x0 }, +- { 0x1100d0, 0x0 }, +- { 0x2100d0, 0x0 }, +- { 0x101d0, 0x0 }, +- { 0x1101d0, 0x0 }, +- { 0x2101d0, 0x0 }, +- { 0x110d0, 0x0 }, +- { 0x1110d0, 0x0 }, +- { 0x2110d0, 0x0 }, +- { 0x111d0, 0x0 }, +- { 0x1111d0, 0x0 }, +- { 0x2111d0, 0x0 }, +- { 0x120d0, 0x0 }, +- { 0x1120d0, 0x0 }, +- { 0x2120d0, 0x0 }, +- { 0x121d0, 0x0 }, +- { 0x1121d0, 0x0 }, +- { 0x2121d0, 0x0 }, +- { 0x130d0, 0x0 }, +- { 0x1130d0, 0x0 }, +- { 0x2130d0, 0x0 }, +- { 0x131d0, 0x0 }, +- { 0x1131d0, 0x0 }, +- { 0x2131d0, 0x0 }, +- { 0x100d1, 0x0 }, +- { 0x1100d1, 0x0 }, +- { 0x2100d1, 0x0 }, +- { 0x101d1, 0x0 }, +- { 0x1101d1, 0x0 }, +- { 0x2101d1, 0x0 }, +- { 0x110d1, 0x0 }, +- { 0x1110d1, 0x0 }, +- { 0x2110d1, 0x0 }, +- { 0x111d1, 0x0 }, +- { 0x1111d1, 0x0 }, +- { 0x2111d1, 0x0 }, +- { 0x120d1, 0x0 }, +- { 0x1120d1, 0x0 }, +- { 0x2120d1, 0x0 }, +- { 0x121d1, 0x0 }, +- { 0x1121d1, 0x0 }, +- { 0x2121d1, 0x0 }, +- { 0x130d1, 0x0 }, +- { 0x1130d1, 0x0 }, +- { 0x2130d1, 0x0 }, +- { 0x131d1, 0x0 }, +- { 0x1131d1, 0x0 }, +- { 0x2131d1, 0x0 }, +- { 0x10068, 0x0 }, +- { 0x10168, 0x0 }, +- { 0x10268, 0x0 }, +- { 0x10368, 0x0 }, +- { 0x10468, 0x0 }, +- { 0x10568, 0x0 }, +- { 0x10668, 0x0 }, +- { 0x10768, 0x0 }, +- { 0x10868, 0x0 }, +- { 0x11068, 0x0 }, +- { 0x11168, 0x0 }, +- { 0x11268, 0x0 }, +- { 0x11368, 0x0 }, +- { 0x11468, 0x0 }, +- { 0x11568, 0x0 }, +- { 0x11668, 0x0 }, +- { 0x11768, 0x0 }, +- { 0x11868, 0x0 }, +- { 0x12068, 0x0 }, +- { 0x12168, 0x0 }, +- { 0x12268, 0x0 }, +- { 0x12368, 0x0 }, +- { 0x12468, 0x0 }, +- { 0x12568, 0x0 }, +- { 0x12668, 0x0 }, +- { 0x12768, 0x0 }, +- { 0x12868, 0x0 }, +- { 0x13068, 0x0 }, +- { 0x13168, 0x0 }, +- { 0x13268, 0x0 }, +- { 0x13368, 0x0 }, +- { 0x13468, 0x0 }, +- { 0x13568, 0x0 }, +- { 0x13668, 0x0 }, +- { 0x13768, 0x0 }, +- { 0x13868, 0x0 }, +- { 0x10069, 0x0 }, +- { 0x10169, 0x0 }, +- { 0x10269, 0x0 }, +- { 0x10369, 0x0 }, +- { 0x10469, 0x0 }, +- { 0x10569, 0x0 }, +- { 0x10669, 0x0 }, +- { 0x10769, 0x0 }, +- { 0x10869, 0x0 }, +- { 0x11069, 0x0 }, +- { 0x11169, 0x0 }, +- { 0x11269, 0x0 }, +- { 0x11369, 0x0 }, +- { 0x11469, 0x0 }, +- { 0x11569, 0x0 }, +- { 0x11669, 0x0 }, +- { 0x11769, 0x0 }, +- { 0x11869, 0x0 }, +- { 0x12069, 0x0 }, +- { 0x12169, 0x0 }, +- { 0x12269, 0x0 }, +- { 0x12369, 0x0 }, +- { 0x12469, 0x0 }, +- { 0x12569, 0x0 }, +- { 0x12669, 0x0 }, +- { 0x12769, 0x0 }, +- { 0x12869, 0x0 }, +- { 0x13069, 0x0 }, +- { 0x13169, 0x0 }, +- { 0x13269, 0x0 }, +- { 0x13369, 0x0 }, +- { 0x13469, 0x0 }, +- { 0x13569, 0x0 }, +- { 0x13669, 0x0 }, +- { 0x13769, 0x0 }, +- { 0x13869, 0x0 }, +- { 0x1008c, 0x0 }, +- { 0x11008c, 0x0 }, +- { 0x21008c, 0x0 }, +- { 0x1018c, 0x0 }, +- { 0x11018c, 0x0 }, +- { 0x21018c, 0x0 }, +- { 0x1108c, 0x0 }, +- { 0x11108c, 0x0 }, +- { 0x21108c, 0x0 }, +- { 0x1118c, 0x0 }, +- { 0x11118c, 0x0 }, +- { 0x21118c, 0x0 }, +- { 0x1208c, 0x0 }, +- { 0x11208c, 0x0 }, +- { 0x21208c, 0x0 }, +- { 0x1218c, 0x0 }, +- { 0x11218c, 0x0 }, +- { 0x21218c, 0x0 }, +- { 0x1308c, 0x0 }, +- { 0x11308c, 0x0 }, +- { 0x21308c, 0x0 }, +- { 0x1318c, 0x0 }, +- { 0x11318c, 0x0 }, +- { 0x21318c, 0x0 }, +- { 0x1008d, 0x0 }, +- { 0x11008d, 0x0 }, +- { 0x21008d, 0x0 }, +- { 0x1018d, 0x0 }, +- { 0x11018d, 0x0 }, +- { 0x21018d, 0x0 }, +- { 0x1108d, 0x0 }, +- { 0x11108d, 0x0 }, +- { 0x21108d, 0x0 }, +- { 0x1118d, 0x0 }, +- { 0x11118d, 0x0 }, +- { 0x21118d, 0x0 }, +- { 0x1208d, 0x0 }, +- { 0x11208d, 0x0 }, +- { 0x21208d, 0x0 }, +- { 0x1218d, 0x0 }, +- { 0x11218d, 0x0 }, +- { 0x21218d, 0x0 }, +- { 0x1308d, 0x0 }, +- { 0x11308d, 0x0 }, +- { 0x21308d, 0x0 }, +- { 0x1318d, 0x0 }, +- { 0x11318d, 0x0 }, +- { 0x21318d, 0x0 }, +- { 0x100c0, 0x0 }, +- { 0x1100c0, 0x0 }, +- { 0x2100c0, 0x0 }, +- { 0x101c0, 0x0 }, +- { 0x1101c0, 0x0 }, +- { 0x2101c0, 0x0 }, +- { 0x102c0, 0x0 }, +- { 0x1102c0, 0x0 }, +- { 0x2102c0, 0x0 }, +- { 0x103c0, 0x0 }, +- { 0x1103c0, 0x0 }, +- { 0x2103c0, 0x0 }, +- { 0x104c0, 0x0 }, +- { 0x1104c0, 0x0 }, +- { 0x2104c0, 0x0 }, +- { 0x105c0, 0x0 }, +- { 0x1105c0, 0x0 }, +- { 0x2105c0, 0x0 }, +- { 0x106c0, 0x0 }, +- { 0x1106c0, 0x0 }, +- { 0x2106c0, 0x0 }, +- { 0x107c0, 0x0 }, +- { 0x1107c0, 0x0 }, +- { 0x2107c0, 0x0 }, +- { 0x108c0, 0x0 }, +- { 0x1108c0, 0x0 }, +- { 0x2108c0, 0x0 }, +- { 0x110c0, 0x0 }, +- { 0x1110c0, 0x0 }, +- { 0x2110c0, 0x0 }, +- { 0x111c0, 0x0 }, +- { 0x1111c0, 0x0 }, +- { 0x2111c0, 0x0 }, +- { 0x112c0, 0x0 }, +- { 0x1112c0, 0x0 }, +- { 0x2112c0, 0x0 }, +- { 0x113c0, 0x0 }, +- { 0x1113c0, 0x0 }, +- { 0x2113c0, 0x0 }, +- { 0x114c0, 0x0 }, +- { 0x1114c0, 0x0 }, +- { 0x2114c0, 0x0 }, +- { 0x115c0, 0x0 }, +- { 0x1115c0, 0x0 }, +- { 0x2115c0, 0x0 }, +- { 0x116c0, 0x0 }, +- { 0x1116c0, 0x0 }, +- { 0x2116c0, 0x0 }, +- { 0x117c0, 0x0 }, +- { 0x1117c0, 0x0 }, +- { 0x2117c0, 0x0 }, +- { 0x118c0, 0x0 }, +- { 0x1118c0, 0x0 }, +- { 0x2118c0, 0x0 }, +- { 0x120c0, 0x0 }, +- { 0x1120c0, 0x0 }, +- { 0x2120c0, 0x0 }, +- { 0x121c0, 0x0 }, +- { 0x1121c0, 0x0 }, +- { 0x2121c0, 0x0 }, +- { 0x122c0, 0x0 }, +- { 0x1122c0, 0x0 }, +- { 0x2122c0, 0x0 }, +- { 0x123c0, 0x0 }, +- { 0x1123c0, 0x0 }, +- { 0x2123c0, 0x0 }, +- { 0x124c0, 0x0 }, +- { 0x1124c0, 0x0 }, +- { 0x2124c0, 0x0 }, +- { 0x125c0, 0x0 }, +- { 0x1125c0, 0x0 }, +- { 0x2125c0, 0x0 }, +- { 0x126c0, 0x0 }, +- { 0x1126c0, 0x0 }, +- { 0x2126c0, 0x0 }, +- { 0x127c0, 0x0 }, +- { 0x1127c0, 0x0 }, +- { 0x2127c0, 0x0 }, +- { 0x128c0, 0x0 }, +- { 0x1128c0, 0x0 }, +- { 0x2128c0, 0x0 }, +- { 0x130c0, 0x0 }, +- { 0x1130c0, 0x0 }, +- { 0x2130c0, 0x0 }, +- { 0x131c0, 0x0 }, +- { 0x1131c0, 0x0 }, +- { 0x2131c0, 0x0 }, +- { 0x132c0, 0x0 }, +- { 0x1132c0, 0x0 }, +- { 0x2132c0, 0x0 }, +- { 0x133c0, 0x0 }, +- { 0x1133c0, 0x0 }, +- { 0x2133c0, 0x0 }, +- { 0x134c0, 0x0 }, +- { 0x1134c0, 0x0 }, +- { 0x2134c0, 0x0 }, +- { 0x135c0, 0x0 }, +- { 0x1135c0, 0x0 }, +- { 0x2135c0, 0x0 }, +- { 0x136c0, 0x0 }, +- { 0x1136c0, 0x0 }, +- { 0x2136c0, 0x0 }, +- { 0x137c0, 0x0 }, +- { 0x1137c0, 0x0 }, +- { 0x2137c0, 0x0 }, +- { 0x138c0, 0x0 }, +- { 0x1138c0, 0x0 }, +- { 0x2138c0, 0x0 }, +- { 0x100c1, 0x0 }, +- { 0x1100c1, 0x0 }, +- { 0x2100c1, 0x0 }, +- { 0x101c1, 0x0 }, +- { 0x1101c1, 0x0 }, +- { 0x2101c1, 0x0 }, +- { 0x102c1, 0x0 }, +- { 0x1102c1, 0x0 }, +- { 0x2102c1, 0x0 }, +- { 0x103c1, 0x0 }, +- { 0x1103c1, 0x0 }, +- { 0x2103c1, 0x0 }, +- { 0x104c1, 0x0 }, +- { 0x1104c1, 0x0 }, +- { 0x2104c1, 0x0 }, +- { 0x105c1, 0x0 }, +- { 0x1105c1, 0x0 }, +- { 0x2105c1, 0x0 }, +- { 0x106c1, 0x0 }, +- { 0x1106c1, 0x0 }, +- { 0x2106c1, 0x0 }, +- { 0x107c1, 0x0 }, +- { 0x1107c1, 0x0 }, +- { 0x2107c1, 0x0 }, +- { 0x108c1, 0x0 }, +- { 0x1108c1, 0x0 }, +- { 0x2108c1, 0x0 }, +- { 0x110c1, 0x0 }, +- { 0x1110c1, 0x0 }, +- { 0x2110c1, 0x0 }, +- { 0x111c1, 0x0 }, +- { 0x1111c1, 0x0 }, +- { 0x2111c1, 0x0 }, +- { 0x112c1, 0x0 }, +- { 0x1112c1, 0x0 }, +- { 0x2112c1, 0x0 }, +- { 0x113c1, 0x0 }, +- { 0x1113c1, 0x0 }, +- { 0x2113c1, 0x0 }, +- { 0x114c1, 0x0 }, +- { 0x1114c1, 0x0 }, +- { 0x2114c1, 0x0 }, +- { 0x115c1, 0x0 }, +- { 0x1115c1, 0x0 }, +- { 0x2115c1, 0x0 }, +- { 0x116c1, 0x0 }, +- { 0x1116c1, 0x0 }, +- { 0x2116c1, 0x0 }, +- { 0x117c1, 0x0 }, +- { 0x1117c1, 0x0 }, +- { 0x2117c1, 0x0 }, +- { 0x118c1, 0x0 }, +- { 0x1118c1, 0x0 }, +- { 0x2118c1, 0x0 }, +- { 0x120c1, 0x0 }, +- { 0x1120c1, 0x0 }, +- { 0x2120c1, 0x0 }, +- { 0x121c1, 0x0 }, +- { 0x1121c1, 0x0 }, +- { 0x2121c1, 0x0 }, +- { 0x122c1, 0x0 }, +- { 0x1122c1, 0x0 }, +- { 0x2122c1, 0x0 }, +- { 0x123c1, 0x0 }, +- { 0x1123c1, 0x0 }, +- { 0x2123c1, 0x0 }, +- { 0x124c1, 0x0 }, +- { 0x1124c1, 0x0 }, +- { 0x2124c1, 0x0 }, +- { 0x125c1, 0x0 }, +- { 0x1125c1, 0x0 }, +- { 0x2125c1, 0x0 }, +- { 0x126c1, 0x0 }, +- { 0x1126c1, 0x0 }, +- { 0x2126c1, 0x0 }, +- { 0x127c1, 0x0 }, +- { 0x1127c1, 0x0 }, +- { 0x2127c1, 0x0 }, +- { 0x128c1, 0x0 }, +- { 0x1128c1, 0x0 }, +- { 0x2128c1, 0x0 }, +- { 0x130c1, 0x0 }, +- { 0x1130c1, 0x0 }, +- { 0x2130c1, 0x0 }, +- { 0x131c1, 0x0 }, +- { 0x1131c1, 0x0 }, +- { 0x2131c1, 0x0 }, +- { 0x132c1, 0x0 }, +- { 0x1132c1, 0x0 }, +- { 0x2132c1, 0x0 }, +- { 0x133c1, 0x0 }, +- { 0x1133c1, 0x0 }, +- { 0x2133c1, 0x0 }, +- { 0x134c1, 0x0 }, +- { 0x1134c1, 0x0 }, +- { 0x2134c1, 0x0 }, +- { 0x135c1, 0x0 }, +- { 0x1135c1, 0x0 }, +- { 0x2135c1, 0x0 }, +- { 0x136c1, 0x0 }, +- { 0x1136c1, 0x0 }, +- { 0x2136c1, 0x0 }, +- { 0x137c1, 0x0 }, +- { 0x1137c1, 0x0 }, +- { 0x2137c1, 0x0 }, +- { 0x138c1, 0x0 }, +- { 0x1138c1, 0x0 }, +- { 0x2138c1, 0x0 }, +- { 0x10020, 0x0 }, +- { 0x110020, 0x0 }, +- { 0x210020, 0x0 }, +- { 0x11020, 0x0 }, +- { 0x111020, 0x0 }, +- { 0x211020, 0x0 }, +- { 0x12020, 0x0 }, +- { 0x112020, 0x0 }, +- { 0x212020, 0x0 }, +- { 0x13020, 0x0 }, +- { 0x113020, 0x0 }, +- { 0x213020, 0x0 }, +- { 0x20072, 0x0 }, +- { 0x20073, 0x0 }, +- { 0x20074, 0x0 }, +- { 0x100aa, 0x0 }, +- { 0x110aa, 0x0 }, +- { 0x120aa, 0x0 }, +- { 0x130aa, 0x0 }, +- { 0x20010, 0x0 }, +- { 0x120010, 0x0 }, +- { 0x220010, 0x0 }, +- { 0x20011, 0x0 }, +- { 0x120011, 0x0 }, +- { 0x220011, 0x0 }, +- { 0x100ae, 0x0 }, +- { 0x1100ae, 0x0 }, +- { 0x2100ae, 0x0 }, +- { 0x100af, 0x0 }, +- { 0x1100af, 0x0 }, +- { 0x2100af, 0x0 }, +- { 0x110ae, 0x0 }, +- { 0x1110ae, 0x0 }, +- { 0x2110ae, 0x0 }, +- { 0x110af, 0x0 }, +- { 0x1110af, 0x0 }, +- { 0x2110af, 0x0 }, +- { 0x120ae, 0x0 }, +- { 0x1120ae, 0x0 }, +- { 0x2120ae, 0x0 }, +- { 0x120af, 0x0 }, +- { 0x1120af, 0x0 }, +- { 0x2120af, 0x0 }, +- { 0x130ae, 0x0 }, +- { 0x1130ae, 0x0 }, +- { 0x2130ae, 0x0 }, +- { 0x130af, 0x0 }, +- { 0x1130af, 0x0 }, +- { 0x2130af, 0x0 }, +- { 0x20020, 0x0 }, +- { 0x120020, 0x0 }, +- { 0x220020, 0x0 }, +- { 0x100a0, 0x0 }, +- { 0x100a1, 0x0 }, +- { 0x100a2, 0x0 }, +- { 0x100a3, 0x0 }, +- { 0x100a4, 0x0 }, +- { 0x100a5, 0x0 }, +- { 0x100a6, 0x0 }, +- { 0x100a7, 0x0 }, +- { 0x110a0, 0x0 }, +- { 0x110a1, 0x0 }, +- { 0x110a2, 0x0 }, +- { 0x110a3, 0x0 }, +- { 0x110a4, 0x0 }, +- { 0x110a5, 0x0 }, +- { 0x110a6, 0x0 }, +- { 0x110a7, 0x0 }, +- { 0x120a0, 0x0 }, +- { 0x120a1, 0x0 }, +- { 0x120a2, 0x0 }, +- { 0x120a3, 0x0 }, +- { 0x120a4, 0x0 }, +- { 0x120a5, 0x0 }, +- { 0x120a6, 0x0 }, +- { 0x120a7, 0x0 }, +- { 0x130a0, 0x0 }, +- { 0x130a1, 0x0 }, +- { 0x130a2, 0x0 }, +- { 0x130a3, 0x0 }, +- { 0x130a4, 0x0 }, +- { 0x130a5, 0x0 }, +- { 0x130a6, 0x0 }, +- { 0x130a7, 0x0 }, +- { 0x2007c, 0x0 }, +- { 0x12007c, 0x0 }, +- { 0x22007c, 0x0 }, +- { 0x2007d, 0x0 }, +- { 0x12007d, 0x0 }, +- { 0x22007d, 0x0 }, +- { 0x400fd, 0x0 }, +- { 0x400c0, 0x0 }, +- { 0x90201, 0x0 }, +- { 0x190201, 0x0 }, +- { 0x290201, 0x0 }, +- { 0x90202, 0x0 }, +- { 0x190202, 0x0 }, +- { 0x290202, 0x0 }, +- { 0x90203, 0x0 }, +- { 0x190203, 0x0 }, +- { 0x290203, 0x0 }, +- { 0x90204, 0x0 }, +- { 0x190204, 0x0 }, +- { 0x290204, 0x0 }, +- { 0x90205, 0x0 }, +- { 0x190205, 0x0 }, +- { 0x290205, 0x0 }, +- { 0x90206, 0x0 }, +- { 0x190206, 0x0 }, +- { 0x290206, 0x0 }, +- { 0x90207, 0x0 }, +- { 0x190207, 0x0 }, +- { 0x290207, 0x0 }, +- { 0x90208, 0x0 }, +- { 0x190208, 0x0 }, +- { 0x290208, 0x0 }, +- { 0x10062, 0x0 }, +- { 0x10162, 0x0 }, +- { 0x10262, 0x0 }, +- { 0x10362, 0x0 }, +- { 0x10462, 0x0 }, +- { 0x10562, 0x0 }, +- { 0x10662, 0x0 }, +- { 0x10762, 0x0 }, +- { 0x10862, 0x0 }, +- { 0x11062, 0x0 }, +- { 0x11162, 0x0 }, +- { 0x11262, 0x0 }, +- { 0x11362, 0x0 }, +- { 0x11462, 0x0 }, +- { 0x11562, 0x0 }, +- { 0x11662, 0x0 }, +- { 0x11762, 0x0 }, +- { 0x11862, 0x0 }, +- { 0x12062, 0x0 }, +- { 0x12162, 0x0 }, +- { 0x12262, 0x0 }, +- { 0x12362, 0x0 }, +- { 0x12462, 0x0 }, +- { 0x12562, 0x0 }, +- { 0x12662, 0x0 }, +- { 0x12762, 0x0 }, +- { 0x12862, 0x0 }, +- { 0x13062, 0x0 }, +- { 0x13162, 0x0 }, +- { 0x13262, 0x0 }, +- { 0x13362, 0x0 }, +- { 0x13462, 0x0 }, +- { 0x13562, 0x0 }, +- { 0x13662, 0x0 }, +- { 0x13762, 0x0 }, +- { 0x13862, 0x0 }, +- { 0x20077, 0x0 }, +- { 0x10001, 0x0 }, +- { 0x11001, 0x0 }, +- { 0x12001, 0x0 }, +- { 0x13001, 0x0 }, +- { 0x10040, 0x0 }, +- { 0x10140, 0x0 }, +- { 0x10240, 0x0 }, +- { 0x10340, 0x0 }, +- { 0x10440, 0x0 }, +- { 0x10540, 0x0 }, +- { 0x10640, 0x0 }, +- { 0x10740, 0x0 }, +- { 0x10840, 0x0 }, +- { 0x10030, 0x0 }, +- { 0x10130, 0x0 }, +- { 0x10230, 0x0 }, +- { 0x10330, 0x0 }, +- { 0x10430, 0x0 }, +- { 0x10530, 0x0 }, +- { 0x10630, 0x0 }, +- { 0x10730, 0x0 }, +- { 0x10830, 0x0 }, +- { 0x11040, 0x0 }, +- { 0x11140, 0x0 }, +- { 0x11240, 0x0 }, +- { 0x11340, 0x0 }, +- { 0x11440, 0x0 }, +- { 0x11540, 0x0 }, +- { 0x11640, 0x0 }, +- { 0x11740, 0x0 }, +- { 0x11840, 0x0 }, +- { 0x11030, 0x0 }, +- { 0x11130, 0x0 }, +- { 0x11230, 0x0 }, +- { 0x11330, 0x0 }, +- { 0x11430, 0x0 }, +- { 0x11530, 0x0 }, +- { 0x11630, 0x0 }, +- { 0x11730, 0x0 }, +- { 0x11830, 0x0 }, +- { 0x12040, 0x0 }, +- { 0x12140, 0x0 }, +- { 0x12240, 0x0 }, +- { 0x12340, 0x0 }, +- { 0x12440, 0x0 }, +- { 0x12540, 0x0 }, +- { 0x12640, 0x0 }, +- { 0x12740, 0x0 }, +- { 0x12840, 0x0 }, +- { 0x12030, 0x0 }, +- { 0x12130, 0x0 }, +- { 0x12230, 0x0 }, +- { 0x12330, 0x0 }, +- { 0x12430, 0x0 }, +- { 0x12530, 0x0 }, +- { 0x12630, 0x0 }, +- { 0x12730, 0x0 }, +- { 0x12830, 0x0 }, +- { 0x13040, 0x0 }, +- { 0x13140, 0x0 }, +- { 0x13240, 0x0 }, +- { 0x13340, 0x0 }, +- { 0x13440, 0x0 }, +- { 0x13540, 0x0 }, +- { 0x13640, 0x0 }, +- { 0x13740, 0x0 }, +- { 0x13840, 0x0 }, +- { 0x13030, 0x0 }, +- { 0x13130, 0x0 }, +- { 0x13230, 0x0 }, +- { 0x13330, 0x0 }, +- { 0x13430, 0x0 }, +- { 0x13530, 0x0 }, +- { 0x13630, 0x0 }, +- { 0x13730, 0x0 }, +- { 0x13830, 0x0 }, +-}; + /* P0 message block paremeter for training firmware */ + static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, +@@ -1833,15 +1218,25 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + }; + + /* ddr timing config params */ ++struct dram_timing_info ucm_dram_timing_ff000110 = { ++ .ddrc_cfg = ddr_ddrc_cfg_ff000110, ++ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_ff000110), ++ .ddrphy_cfg = ddr_ddrphy_cfg, ++ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), ++ .fsp_msg = ddr_dram_fsp_msg, ++ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), ++ .ddrphy_pie = ddr_phy_pie, ++ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), ++ .fsp_table = { 3000, 400, 100, }, ++}; ++ + struct dram_timing_info ucm_dram_timing_ff020008 = { +- .ddrc_cfg = ddr_ddrc_cfg, +- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), ++ .ddrc_cfg = ddr_ddrc_cfg_ff020008, ++ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_ff020008), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), +- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, +- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100, }, +diff --git a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c b/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c +deleted file mode 100644 +index a210a3e972..0000000000 +--- a/board/compulab/plat/imx8mm/ddr/lpddr4_timing_ff000110.c ++++ /dev/null +@@ -1,1848 +0,0 @@ +-/* +- * Copyright 2018 NXP +- * +- * SPDX-License-Identifier: GPL-2.0+ +- * +- * Generated code from MX8M_DDR_tool +- * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga +- */ +- +-#include +-#include +- +-static struct dram_cfg_param ddr_ddrc_cfg[] = { +- /** Initialize DDRC registers **/ +- {0x3d400304,0x1}, +- {0x3d400030,0x1}, +- {0x3d400000,0xa3080020}, +- {0x3d400020,0x223}, +- {0x3d400024,0x3a980}, +- {0x3d400064,0x5b00d2}, +- {0x3d4000d0,0xc00305ba}, +- {0x3d4000d4,0x940000}, +- {0x3d4000dc,0xd4002d}, +- {0x3d4000e0,0x310000}, +- {0x3d4000e8,0x66004d}, +- {0x3d4000ec,0x16004d}, +- {0x3d400100,0x191e1920}, +- {0x3d400104,0x60630}, +- {0x3d40010c,0xb0b000}, +- {0x3d400110,0xe04080e}, +- {0x3d400114,0x2040c0c}, +- {0x3d400118,0x1010007}, +- {0x3d40011c,0x401}, +- {0x3d400130,0x20600}, +- {0x3d400134,0xc100002}, +- {0x3d400138,0xd8}, +- {0x3d400144,0x96004b}, +- {0x3d400180,0x2ee0017}, +- {0x3d400184,0x2605b8e}, +- {0x3d400188,0x0}, +- {0x3d400190,0x497820a}, +- {0x3d400194,0x80303}, +- {0x3d4001b4,0x170a}, +- {0x3d4001a0,0xe0400018}, +- {0x3d4001a4,0xdf00e4}, +- {0x3d4001a8,0x80000000}, +- {0x3d4001b0,0x11}, +- {0x3d4001c0,0x1}, +- {0x3d4001c4,0x0}, +- {0x3d4000f4,0xc99}, +- {0x3d400108,0x70e1617}, +- {0x3d400200,0x17}, +- {0x3d40020c,0x0}, +- {0x3d400210,0x1f1f}, +- {0x3d400204,0x80808}, +- {0x3d400214,0x7070707}, +- {0x3d400218,0x7070707}, +- {0x3d400250,0x29001701}, +- {0x3d400254,0x2c}, +- {0x3d40025c,0x4000030}, +- {0x3d400264,0x900093e7}, +- {0x3d40026c,0x2005574}, +- {0x3d400400,0x111}, +- {0x3d400408,0x72ff}, +- {0x3d400494,0x2100e07}, +- {0x3d400498,0x620096}, +- {0x3d40049c,0x1100e07}, +- {0x3d4004a0,0xc8012c}, +- {0x3d402020,0x21}, +- {0x3d402024,0x7d00}, +- {0x3d402050,0x20d040}, +- {0x3d402064,0xc001c}, +- {0x3d4020dc,0x840000}, +- {0x3d4020e0,0x310000}, +- {0x3d4020e8,0x66004d}, +- {0x3d4020ec,0x16004d}, +- {0x3d402100,0xa040305}, +- {0x3d402104,0x30407}, +- {0x3d402108,0x203060b}, +- {0x3d40210c,0x505000}, +- {0x3d402110,0x2040202}, +- {0x3d402114,0x2030202}, +- {0x3d402118,0x1010004}, +- {0x3d40211c,0x301}, +- {0x3d402130,0x20300}, +- {0x3d402134,0xa100002}, +- {0x3d402138,0x1d}, +- {0x3d402144,0x14000a}, +- {0x3d402180,0x640004}, +- {0x3d402190,0x3818200}, +- {0x3d402194,0x80303}, +- {0x3d4021b4,0x100}, +- {0x3d403020,0x21}, +- {0x3d403024,0x1f40}, +- {0x3d403050,0x20d040}, +- {0x3d403064,0x30007}, +- {0x3d4030dc,0x840000}, +- {0x3d4030e0,0x310000}, +- {0x3d4030e8,0x66004d}, +- {0x3d4030ec,0x16004d}, +- {0x3d403100,0xa010102}, +- {0x3d403104,0x30404}, +- {0x3d403108,0x203060b}, +- {0x3d40310c,0x505000}, +- {0x3d403110,0x2040202}, +- {0x3d403114,0x2030202}, +- {0x3d403118,0x1010004}, +- {0x3d40311c,0x301}, +- {0x3d403130,0x20300}, +- {0x3d403134,0xa100002}, +- {0x3d403138,0x8}, +- {0x3d403144,0x50003}, +- {0x3d403180,0x190004}, +- {0x3d403190,0x3818200}, +- {0x3d403194,0x80303}, +- {0x3d4031b4,0x100}, +- {0x3d400028,0x0}, +-}; +- +-/* PHY Initialize Configuration */ +-static struct dram_cfg_param ddr_ddrphy_cfg[] = { +- {0x100a0,0x0}, +- {0x100a1,0x1}, +- {0x100a2,0x2}, +- {0x100a3,0x3}, +- {0x100a4,0x4}, +- {0x100a5,0x5}, +- {0x100a6,0x6}, +- {0x100a7,0x7}, +- {0x110a0,0x0}, +- {0x110a1,0x1}, +- {0x110a2,0x3}, +- {0x110a3,0x4}, +- {0x110a4,0x5}, +- {0x110a5,0x2}, +- {0x110a6,0x7}, +- {0x110a7,0x6}, +- {0x120a0,0x0}, +- {0x120a1,0x1}, +- {0x120a2,0x3}, +- {0x120a3,0x2}, +- {0x120a4,0x5}, +- {0x120a5,0x4}, +- {0x120a6,0x7}, +- {0x120a7,0x6}, +- {0x130a0,0x0}, +- {0x130a1,0x1}, +- {0x130a2,0x2}, +- {0x130a3,0x3}, +- {0x130a4,0x4}, +- {0x130a5,0x5}, +- {0x130a6,0x6}, +- {0x130a7,0x7}, +- {0x1005f,0x1ff}, +- {0x1015f,0x1ff}, +- {0x1105f,0x1ff}, +- {0x1115f,0x1ff}, +- {0x1205f,0x1ff}, +- {0x1215f,0x1ff}, +- {0x1305f,0x1ff}, +- {0x1315f,0x1ff}, +- {0x11005f,0x1ff}, +- {0x11015f,0x1ff}, +- {0x11105f,0x1ff}, +- {0x11115f,0x1ff}, +- {0x11205f,0x1ff}, +- {0x11215f,0x1ff}, +- {0x11305f,0x1ff}, +- {0x11315f,0x1ff}, +- {0x21005f,0x1ff}, +- {0x21015f,0x1ff}, +- {0x21105f,0x1ff}, +- {0x21115f,0x1ff}, +- {0x21205f,0x1ff}, +- {0x21215f,0x1ff}, +- {0x21305f,0x1ff}, +- {0x21315f,0x1ff}, +- {0x55,0x1ff}, +- {0x1055,0x1ff}, +- {0x2055,0x1ff}, +- {0x3055,0x1ff}, +- {0x4055,0x1ff}, +- {0x5055,0x1ff}, +- {0x6055,0x1ff}, +- {0x7055,0x1ff}, +- {0x8055,0x1ff}, +- {0x9055,0x1ff}, +- {0x200c5,0x19}, +- {0x1200c5,0x7}, +- {0x2200c5,0x7}, +- {0x2002e,0x2}, +- {0x12002e,0x2}, +- {0x22002e,0x2}, +- {0x90204,0x0}, +- {0x190204,0x0}, +- {0x290204,0x0}, +- {0x20024,0x1ab}, +- {0x2003a,0x0}, +- {0x120024,0x1ab}, +- {0x2003a,0x0}, +- {0x220024,0x1ab}, +- {0x2003a,0x0}, +- {0x20056,0x3}, +- {0x120056,0xa}, +- {0x220056,0xa}, +- {0x1004d,0xe00}, +- {0x1014d,0xe00}, +- {0x1104d,0xe00}, +- {0x1114d,0xe00}, +- {0x1204d,0xe00}, +- {0x1214d,0xe00}, +- {0x1304d,0xe00}, +- {0x1314d,0xe00}, +- {0x11004d,0xe00}, +- {0x11014d,0xe00}, +- {0x11104d,0xe00}, +- {0x11114d,0xe00}, +- {0x11204d,0xe00}, +- {0x11214d,0xe00}, +- {0x11304d,0xe00}, +- {0x11314d,0xe00}, +- {0x21004d,0xe00}, +- {0x21014d,0xe00}, +- {0x21104d,0xe00}, +- {0x21114d,0xe00}, +- {0x21204d,0xe00}, +- {0x21214d,0xe00}, +- {0x21304d,0xe00}, +- {0x21314d,0xe00}, +- {0x10049,0xeba}, +- {0x10149,0xeba}, +- {0x11049,0xeba}, +- {0x11149,0xeba}, +- {0x12049,0xeba}, +- {0x12149,0xeba}, +- {0x13049,0xeba}, +- {0x13149,0xeba}, +- {0x110049,0xeba}, +- {0x110149,0xeba}, +- {0x111049,0xeba}, +- {0x111149,0xeba}, +- {0x112049,0xeba}, +- {0x112149,0xeba}, +- {0x113049,0xeba}, +- {0x113149,0xeba}, +- {0x210049,0xeba}, +- {0x210149,0xeba}, +- {0x211049,0xeba}, +- {0x211149,0xeba}, +- {0x212049,0xeba}, +- {0x212149,0xeba}, +- {0x213049,0xeba}, +- {0x213149,0xeba}, +- {0x43,0x63}, +- {0x1043,0x63}, +- {0x2043,0x63}, +- {0x3043,0x63}, +- {0x4043,0x63}, +- {0x5043,0x63}, +- {0x6043,0x63}, +- {0x7043,0x63}, +- {0x8043,0x63}, +- {0x9043,0x63}, +- {0x20018,0x3}, +- {0x20075,0x4}, +- {0x20050,0x0}, +- {0x20008,0x2ee}, +- {0x120008,0x64}, +- {0x220008,0x19}, +- {0x20088,0x9}, +- {0x200b2,0xdc}, +- {0x10043,0x5a1}, +- {0x10143,0x5a1}, +- {0x11043,0x5a1}, +- {0x11143,0x5a1}, +- {0x12043,0x5a1}, +- {0x12143,0x5a1}, +- {0x13043,0x5a1}, +- {0x13143,0x5a1}, +- {0x1200b2,0xdc}, +- {0x110043,0x5a1}, +- {0x110143,0x5a1}, +- {0x111043,0x5a1}, +- {0x111143,0x5a1}, +- {0x112043,0x5a1}, +- {0x112143,0x5a1}, +- {0x113043,0x5a1}, +- {0x113143,0x5a1}, +- {0x2200b2,0xdc}, +- {0x210043,0x5a1}, +- {0x210143,0x5a1}, +- {0x211043,0x5a1}, +- {0x211143,0x5a1}, +- {0x212043,0x5a1}, +- {0x212143,0x5a1}, +- {0x213043,0x5a1}, +- {0x213143,0x5a1}, +- {0x200fa,0x1}, +- {0x1200fa,0x1}, +- {0x2200fa,0x1}, +- {0x20019,0x1}, +- {0x120019,0x1}, +- {0x220019,0x1}, +- {0x200f0,0x660}, +- {0x200f1,0x0}, +- {0x200f2,0x4444}, +- {0x200f3,0x8888}, +- {0x200f4,0x5665}, +- {0x200f5,0x0}, +- {0x200f6,0x0}, +- {0x200f7,0xf000}, +- {0x20025,0x0}, +- {0x2002d,0x0}, +- {0x12002d,0x0}, +- {0x22002d,0x0}, +- {0x200c7,0x21}, +- {0x1200c7,0x21}, +- {0x2200c7,0x21}, +- {0x200ca,0x24}, +- {0x1200ca,0x24}, +- {0x2200ca,0x24}, +-}; +- +-/* ddr phy trained csr */ +-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { +- { 0x200b2, 0x0 }, +- { 0x1200b2, 0x0 }, +- { 0x2200b2, 0x0 }, +- { 0x200cb, 0x0 }, +- { 0x10043, 0x0 }, +- { 0x110043, 0x0 }, +- { 0x210043, 0x0 }, +- { 0x10143, 0x0 }, +- { 0x110143, 0x0 }, +- { 0x210143, 0x0 }, +- { 0x11043, 0x0 }, +- { 0x111043, 0x0 }, +- { 0x211043, 0x0 }, +- { 0x11143, 0x0 }, +- { 0x111143, 0x0 }, +- { 0x211143, 0x0 }, +- { 0x12043, 0x0 }, +- { 0x112043, 0x0 }, +- { 0x212043, 0x0 }, +- { 0x12143, 0x0 }, +- { 0x112143, 0x0 }, +- { 0x212143, 0x0 }, +- { 0x13043, 0x0 }, +- { 0x113043, 0x0 }, +- { 0x213043, 0x0 }, +- { 0x13143, 0x0 }, +- { 0x113143, 0x0 }, +- { 0x213143, 0x0 }, +- { 0x80, 0x0 }, +- { 0x100080, 0x0 }, +- { 0x200080, 0x0 }, +- { 0x1080, 0x0 }, +- { 0x101080, 0x0 }, +- { 0x201080, 0x0 }, +- { 0x2080, 0x0 }, +- { 0x102080, 0x0 }, +- { 0x202080, 0x0 }, +- { 0x3080, 0x0 }, +- { 0x103080, 0x0 }, +- { 0x203080, 0x0 }, +- { 0x4080, 0x0 }, +- { 0x104080, 0x0 }, +- { 0x204080, 0x0 }, +- { 0x5080, 0x0 }, +- { 0x105080, 0x0 }, +- { 0x205080, 0x0 }, +- { 0x6080, 0x0 }, +- { 0x106080, 0x0 }, +- { 0x206080, 0x0 }, +- { 0x7080, 0x0 }, +- { 0x107080, 0x0 }, +- { 0x207080, 0x0 }, +- { 0x8080, 0x0 }, +- { 0x108080, 0x0 }, +- { 0x208080, 0x0 }, +- { 0x9080, 0x0 }, +- { 0x109080, 0x0 }, +- { 0x209080, 0x0 }, +- { 0x10080, 0x0 }, +- { 0x110080, 0x0 }, +- { 0x210080, 0x0 }, +- { 0x10180, 0x0 }, +- { 0x110180, 0x0 }, +- { 0x210180, 0x0 }, +- { 0x11080, 0x0 }, +- { 0x111080, 0x0 }, +- { 0x211080, 0x0 }, +- { 0x11180, 0x0 }, +- { 0x111180, 0x0 }, +- { 0x211180, 0x0 }, +- { 0x12080, 0x0 }, +- { 0x112080, 0x0 }, +- { 0x212080, 0x0 }, +- { 0x12180, 0x0 }, +- { 0x112180, 0x0 }, +- { 0x212180, 0x0 }, +- { 0x13080, 0x0 }, +- { 0x113080, 0x0 }, +- { 0x213080, 0x0 }, +- { 0x13180, 0x0 }, +- { 0x113180, 0x0 }, +- { 0x213180, 0x0 }, +- { 0x10081, 0x0 }, +- { 0x110081, 0x0 }, +- { 0x210081, 0x0 }, +- { 0x10181, 0x0 }, +- { 0x110181, 0x0 }, +- { 0x210181, 0x0 }, +- { 0x11081, 0x0 }, +- { 0x111081, 0x0 }, +- { 0x211081, 0x0 }, +- { 0x11181, 0x0 }, +- { 0x111181, 0x0 }, +- { 0x211181, 0x0 }, +- { 0x12081, 0x0 }, +- { 0x112081, 0x0 }, +- { 0x212081, 0x0 }, +- { 0x12181, 0x0 }, +- { 0x112181, 0x0 }, +- { 0x212181, 0x0 }, +- { 0x13081, 0x0 }, +- { 0x113081, 0x0 }, +- { 0x213081, 0x0 }, +- { 0x13181, 0x0 }, +- { 0x113181, 0x0 }, +- { 0x213181, 0x0 }, +- { 0x100d0, 0x0 }, +- { 0x1100d0, 0x0 }, +- { 0x2100d0, 0x0 }, +- { 0x101d0, 0x0 }, +- { 0x1101d0, 0x0 }, +- { 0x2101d0, 0x0 }, +- { 0x110d0, 0x0 }, +- { 0x1110d0, 0x0 }, +- { 0x2110d0, 0x0 }, +- { 0x111d0, 0x0 }, +- { 0x1111d0, 0x0 }, +- { 0x2111d0, 0x0 }, +- { 0x120d0, 0x0 }, +- { 0x1120d0, 0x0 }, +- { 0x2120d0, 0x0 }, +- { 0x121d0, 0x0 }, +- { 0x1121d0, 0x0 }, +- { 0x2121d0, 0x0 }, +- { 0x130d0, 0x0 }, +- { 0x1130d0, 0x0 }, +- { 0x2130d0, 0x0 }, +- { 0x131d0, 0x0 }, +- { 0x1131d0, 0x0 }, +- { 0x2131d0, 0x0 }, +- { 0x100d1, 0x0 }, +- { 0x1100d1, 0x0 }, +- { 0x2100d1, 0x0 }, +- { 0x101d1, 0x0 }, +- { 0x1101d1, 0x0 }, +- { 0x2101d1, 0x0 }, +- { 0x110d1, 0x0 }, +- { 0x1110d1, 0x0 }, +- { 0x2110d1, 0x0 }, +- { 0x111d1, 0x0 }, +- { 0x1111d1, 0x0 }, +- { 0x2111d1, 0x0 }, +- { 0x120d1, 0x0 }, +- { 0x1120d1, 0x0 }, +- { 0x2120d1, 0x0 }, +- { 0x121d1, 0x0 }, +- { 0x1121d1, 0x0 }, +- { 0x2121d1, 0x0 }, +- { 0x130d1, 0x0 }, +- { 0x1130d1, 0x0 }, +- { 0x2130d1, 0x0 }, +- { 0x131d1, 0x0 }, +- { 0x1131d1, 0x0 }, +- { 0x2131d1, 0x0 }, +- { 0x10068, 0x0 }, +- { 0x10168, 0x0 }, +- { 0x10268, 0x0 }, +- { 0x10368, 0x0 }, +- { 0x10468, 0x0 }, +- { 0x10568, 0x0 }, +- { 0x10668, 0x0 }, +- { 0x10768, 0x0 }, +- { 0x10868, 0x0 }, +- { 0x11068, 0x0 }, +- { 0x11168, 0x0 }, +- { 0x11268, 0x0 }, +- { 0x11368, 0x0 }, +- { 0x11468, 0x0 }, +- { 0x11568, 0x0 }, +- { 0x11668, 0x0 }, +- { 0x11768, 0x0 }, +- { 0x11868, 0x0 }, +- { 0x12068, 0x0 }, +- { 0x12168, 0x0 }, +- { 0x12268, 0x0 }, +- { 0x12368, 0x0 }, +- { 0x12468, 0x0 }, +- { 0x12568, 0x0 }, +- { 0x12668, 0x0 }, +- { 0x12768, 0x0 }, +- { 0x12868, 0x0 }, +- { 0x13068, 0x0 }, +- { 0x13168, 0x0 }, +- { 0x13268, 0x0 }, +- { 0x13368, 0x0 }, +- { 0x13468, 0x0 }, +- { 0x13568, 0x0 }, +- { 0x13668, 0x0 }, +- { 0x13768, 0x0 }, +- { 0x13868, 0x0 }, +- { 0x10069, 0x0 }, +- { 0x10169, 0x0 }, +- { 0x10269, 0x0 }, +- { 0x10369, 0x0 }, +- { 0x10469, 0x0 }, +- { 0x10569, 0x0 }, +- { 0x10669, 0x0 }, +- { 0x10769, 0x0 }, +- { 0x10869, 0x0 }, +- { 0x11069, 0x0 }, +- { 0x11169, 0x0 }, +- { 0x11269, 0x0 }, +- { 0x11369, 0x0 }, +- { 0x11469, 0x0 }, +- { 0x11569, 0x0 }, +- { 0x11669, 0x0 }, +- { 0x11769, 0x0 }, +- { 0x11869, 0x0 }, +- { 0x12069, 0x0 }, +- { 0x12169, 0x0 }, +- { 0x12269, 0x0 }, +- { 0x12369, 0x0 }, +- { 0x12469, 0x0 }, +- { 0x12569, 0x0 }, +- { 0x12669, 0x0 }, +- { 0x12769, 0x0 }, +- { 0x12869, 0x0 }, +- { 0x13069, 0x0 }, +- { 0x13169, 0x0 }, +- { 0x13269, 0x0 }, +- { 0x13369, 0x0 }, +- { 0x13469, 0x0 }, +- { 0x13569, 0x0 }, +- { 0x13669, 0x0 }, +- { 0x13769, 0x0 }, +- { 0x13869, 0x0 }, +- { 0x1008c, 0x0 }, +- { 0x11008c, 0x0 }, +- { 0x21008c, 0x0 }, +- { 0x1018c, 0x0 }, +- { 0x11018c, 0x0 }, +- { 0x21018c, 0x0 }, +- { 0x1108c, 0x0 }, +- { 0x11108c, 0x0 }, +- { 0x21108c, 0x0 }, +- { 0x1118c, 0x0 }, +- { 0x11118c, 0x0 }, +- { 0x21118c, 0x0 }, +- { 0x1208c, 0x0 }, +- { 0x11208c, 0x0 }, +- { 0x21208c, 0x0 }, +- { 0x1218c, 0x0 }, +- { 0x11218c, 0x0 }, +- { 0x21218c, 0x0 }, +- { 0x1308c, 0x0 }, +- { 0x11308c, 0x0 }, +- { 0x21308c, 0x0 }, +- { 0x1318c, 0x0 }, +- { 0x11318c, 0x0 }, +- { 0x21318c, 0x0 }, +- { 0x1008d, 0x0 }, +- { 0x11008d, 0x0 }, +- { 0x21008d, 0x0 }, +- { 0x1018d, 0x0 }, +- { 0x11018d, 0x0 }, +- { 0x21018d, 0x0 }, +- { 0x1108d, 0x0 }, +- { 0x11108d, 0x0 }, +- { 0x21108d, 0x0 }, +- { 0x1118d, 0x0 }, +- { 0x11118d, 0x0 }, +- { 0x21118d, 0x0 }, +- { 0x1208d, 0x0 }, +- { 0x11208d, 0x0 }, +- { 0x21208d, 0x0 }, +- { 0x1218d, 0x0 }, +- { 0x11218d, 0x0 }, +- { 0x21218d, 0x0 }, +- { 0x1308d, 0x0 }, +- { 0x11308d, 0x0 }, +- { 0x21308d, 0x0 }, +- { 0x1318d, 0x0 }, +- { 0x11318d, 0x0 }, +- { 0x21318d, 0x0 }, +- { 0x100c0, 0x0 }, +- { 0x1100c0, 0x0 }, +- { 0x2100c0, 0x0 }, +- { 0x101c0, 0x0 }, +- { 0x1101c0, 0x0 }, +- { 0x2101c0, 0x0 }, +- { 0x102c0, 0x0 }, +- { 0x1102c0, 0x0 }, +- { 0x2102c0, 0x0 }, +- { 0x103c0, 0x0 }, +- { 0x1103c0, 0x0 }, +- { 0x2103c0, 0x0 }, +- { 0x104c0, 0x0 }, +- { 0x1104c0, 0x0 }, +- { 0x2104c0, 0x0 }, +- { 0x105c0, 0x0 }, +- { 0x1105c0, 0x0 }, +- { 0x2105c0, 0x0 }, +- { 0x106c0, 0x0 }, +- { 0x1106c0, 0x0 }, +- { 0x2106c0, 0x0 }, +- { 0x107c0, 0x0 }, +- { 0x1107c0, 0x0 }, +- { 0x2107c0, 0x0 }, +- { 0x108c0, 0x0 }, +- { 0x1108c0, 0x0 }, +- { 0x2108c0, 0x0 }, +- { 0x110c0, 0x0 }, +- { 0x1110c0, 0x0 }, +- { 0x2110c0, 0x0 }, +- { 0x111c0, 0x0 }, +- { 0x1111c0, 0x0 }, +- { 0x2111c0, 0x0 }, +- { 0x112c0, 0x0 }, +- { 0x1112c0, 0x0 }, +- { 0x2112c0, 0x0 }, +- { 0x113c0, 0x0 }, +- { 0x1113c0, 0x0 }, +- { 0x2113c0, 0x0 }, +- { 0x114c0, 0x0 }, +- { 0x1114c0, 0x0 }, +- { 0x2114c0, 0x0 }, +- { 0x115c0, 0x0 }, +- { 0x1115c0, 0x0 }, +- { 0x2115c0, 0x0 }, +- { 0x116c0, 0x0 }, +- { 0x1116c0, 0x0 }, +- { 0x2116c0, 0x0 }, +- { 0x117c0, 0x0 }, +- { 0x1117c0, 0x0 }, +- { 0x2117c0, 0x0 }, +- { 0x118c0, 0x0 }, +- { 0x1118c0, 0x0 }, +- { 0x2118c0, 0x0 }, +- { 0x120c0, 0x0 }, +- { 0x1120c0, 0x0 }, +- { 0x2120c0, 0x0 }, +- { 0x121c0, 0x0 }, +- { 0x1121c0, 0x0 }, +- { 0x2121c0, 0x0 }, +- { 0x122c0, 0x0 }, +- { 0x1122c0, 0x0 }, +- { 0x2122c0, 0x0 }, +- { 0x123c0, 0x0 }, +- { 0x1123c0, 0x0 }, +- { 0x2123c0, 0x0 }, +- { 0x124c0, 0x0 }, +- { 0x1124c0, 0x0 }, +- { 0x2124c0, 0x0 }, +- { 0x125c0, 0x0 }, +- { 0x1125c0, 0x0 }, +- { 0x2125c0, 0x0 }, +- { 0x126c0, 0x0 }, +- { 0x1126c0, 0x0 }, +- { 0x2126c0, 0x0 }, +- { 0x127c0, 0x0 }, +- { 0x1127c0, 0x0 }, +- { 0x2127c0, 0x0 }, +- { 0x128c0, 0x0 }, +- { 0x1128c0, 0x0 }, +- { 0x2128c0, 0x0 }, +- { 0x130c0, 0x0 }, +- { 0x1130c0, 0x0 }, +- { 0x2130c0, 0x0 }, +- { 0x131c0, 0x0 }, +- { 0x1131c0, 0x0 }, +- { 0x2131c0, 0x0 }, +- { 0x132c0, 0x0 }, +- { 0x1132c0, 0x0 }, +- { 0x2132c0, 0x0 }, +- { 0x133c0, 0x0 }, +- { 0x1133c0, 0x0 }, +- { 0x2133c0, 0x0 }, +- { 0x134c0, 0x0 }, +- { 0x1134c0, 0x0 }, +- { 0x2134c0, 0x0 }, +- { 0x135c0, 0x0 }, +- { 0x1135c0, 0x0 }, +- { 0x2135c0, 0x0 }, +- { 0x136c0, 0x0 }, +- { 0x1136c0, 0x0 }, +- { 0x2136c0, 0x0 }, +- { 0x137c0, 0x0 }, +- { 0x1137c0, 0x0 }, +- { 0x2137c0, 0x0 }, +- { 0x138c0, 0x0 }, +- { 0x1138c0, 0x0 }, +- { 0x2138c0, 0x0 }, +- { 0x100c1, 0x0 }, +- { 0x1100c1, 0x0 }, +- { 0x2100c1, 0x0 }, +- { 0x101c1, 0x0 }, +- { 0x1101c1, 0x0 }, +- { 0x2101c1, 0x0 }, +- { 0x102c1, 0x0 }, +- { 0x1102c1, 0x0 }, +- { 0x2102c1, 0x0 }, +- { 0x103c1, 0x0 }, +- { 0x1103c1, 0x0 }, +- { 0x2103c1, 0x0 }, +- { 0x104c1, 0x0 }, +- { 0x1104c1, 0x0 }, +- { 0x2104c1, 0x0 }, +- { 0x105c1, 0x0 }, +- { 0x1105c1, 0x0 }, +- { 0x2105c1, 0x0 }, +- { 0x106c1, 0x0 }, +- { 0x1106c1, 0x0 }, +- { 0x2106c1, 0x0 }, +- { 0x107c1, 0x0 }, +- { 0x1107c1, 0x0 }, +- { 0x2107c1, 0x0 }, +- { 0x108c1, 0x0 }, +- { 0x1108c1, 0x0 }, +- { 0x2108c1, 0x0 }, +- { 0x110c1, 0x0 }, +- { 0x1110c1, 0x0 }, +- { 0x2110c1, 0x0 }, +- { 0x111c1, 0x0 }, +- { 0x1111c1, 0x0 }, +- { 0x2111c1, 0x0 }, +- { 0x112c1, 0x0 }, +- { 0x1112c1, 0x0 }, +- { 0x2112c1, 0x0 }, +- { 0x113c1, 0x0 }, +- { 0x1113c1, 0x0 }, +- { 0x2113c1, 0x0 }, +- { 0x114c1, 0x0 }, +- { 0x1114c1, 0x0 }, +- { 0x2114c1, 0x0 }, +- { 0x115c1, 0x0 }, +- { 0x1115c1, 0x0 }, +- { 0x2115c1, 0x0 }, +- { 0x116c1, 0x0 }, +- { 0x1116c1, 0x0 }, +- { 0x2116c1, 0x0 }, +- { 0x117c1, 0x0 }, +- { 0x1117c1, 0x0 }, +- { 0x2117c1, 0x0 }, +- { 0x118c1, 0x0 }, +- { 0x1118c1, 0x0 }, +- { 0x2118c1, 0x0 }, +- { 0x120c1, 0x0 }, +- { 0x1120c1, 0x0 }, +- { 0x2120c1, 0x0 }, +- { 0x121c1, 0x0 }, +- { 0x1121c1, 0x0 }, +- { 0x2121c1, 0x0 }, +- { 0x122c1, 0x0 }, +- { 0x1122c1, 0x0 }, +- { 0x2122c1, 0x0 }, +- { 0x123c1, 0x0 }, +- { 0x1123c1, 0x0 }, +- { 0x2123c1, 0x0 }, +- { 0x124c1, 0x0 }, +- { 0x1124c1, 0x0 }, +- { 0x2124c1, 0x0 }, +- { 0x125c1, 0x0 }, +- { 0x1125c1, 0x0 }, +- { 0x2125c1, 0x0 }, +- { 0x126c1, 0x0 }, +- { 0x1126c1, 0x0 }, +- { 0x2126c1, 0x0 }, +- { 0x127c1, 0x0 }, +- { 0x1127c1, 0x0 }, +- { 0x2127c1, 0x0 }, +- { 0x128c1, 0x0 }, +- { 0x1128c1, 0x0 }, +- { 0x2128c1, 0x0 }, +- { 0x130c1, 0x0 }, +- { 0x1130c1, 0x0 }, +- { 0x2130c1, 0x0 }, +- { 0x131c1, 0x0 }, +- { 0x1131c1, 0x0 }, +- { 0x2131c1, 0x0 }, +- { 0x132c1, 0x0 }, +- { 0x1132c1, 0x0 }, +- { 0x2132c1, 0x0 }, +- { 0x133c1, 0x0 }, +- { 0x1133c1, 0x0 }, +- { 0x2133c1, 0x0 }, +- { 0x134c1, 0x0 }, +- { 0x1134c1, 0x0 }, +- { 0x2134c1, 0x0 }, +- { 0x135c1, 0x0 }, +- { 0x1135c1, 0x0 }, +- { 0x2135c1, 0x0 }, +- { 0x136c1, 0x0 }, +- { 0x1136c1, 0x0 }, +- { 0x2136c1, 0x0 }, +- { 0x137c1, 0x0 }, +- { 0x1137c1, 0x0 }, +- { 0x2137c1, 0x0 }, +- { 0x138c1, 0x0 }, +- { 0x1138c1, 0x0 }, +- { 0x2138c1, 0x0 }, +- { 0x10020, 0x0 }, +- { 0x110020, 0x0 }, +- { 0x210020, 0x0 }, +- { 0x11020, 0x0 }, +- { 0x111020, 0x0 }, +- { 0x211020, 0x0 }, +- { 0x12020, 0x0 }, +- { 0x112020, 0x0 }, +- { 0x212020, 0x0 }, +- { 0x13020, 0x0 }, +- { 0x113020, 0x0 }, +- { 0x213020, 0x0 }, +- { 0x20072, 0x0 }, +- { 0x20073, 0x0 }, +- { 0x20074, 0x0 }, +- { 0x100aa, 0x0 }, +- { 0x110aa, 0x0 }, +- { 0x120aa, 0x0 }, +- { 0x130aa, 0x0 }, +- { 0x20010, 0x0 }, +- { 0x120010, 0x0 }, +- { 0x220010, 0x0 }, +- { 0x20011, 0x0 }, +- { 0x120011, 0x0 }, +- { 0x220011, 0x0 }, +- { 0x100ae, 0x0 }, +- { 0x1100ae, 0x0 }, +- { 0x2100ae, 0x0 }, +- { 0x100af, 0x0 }, +- { 0x1100af, 0x0 }, +- { 0x2100af, 0x0 }, +- { 0x110ae, 0x0 }, +- { 0x1110ae, 0x0 }, +- { 0x2110ae, 0x0 }, +- { 0x110af, 0x0 }, +- { 0x1110af, 0x0 }, +- { 0x2110af, 0x0 }, +- { 0x120ae, 0x0 }, +- { 0x1120ae, 0x0 }, +- { 0x2120ae, 0x0 }, +- { 0x120af, 0x0 }, +- { 0x1120af, 0x0 }, +- { 0x2120af, 0x0 }, +- { 0x130ae, 0x0 }, +- { 0x1130ae, 0x0 }, +- { 0x2130ae, 0x0 }, +- { 0x130af, 0x0 }, +- { 0x1130af, 0x0 }, +- { 0x2130af, 0x0 }, +- { 0x20020, 0x0 }, +- { 0x120020, 0x0 }, +- { 0x220020, 0x0 }, +- { 0x100a0, 0x0 }, +- { 0x100a1, 0x0 }, +- { 0x100a2, 0x0 }, +- { 0x100a3, 0x0 }, +- { 0x100a4, 0x0 }, +- { 0x100a5, 0x0 }, +- { 0x100a6, 0x0 }, +- { 0x100a7, 0x0 }, +- { 0x110a0, 0x0 }, +- { 0x110a1, 0x0 }, +- { 0x110a2, 0x0 }, +- { 0x110a3, 0x0 }, +- { 0x110a4, 0x0 }, +- { 0x110a5, 0x0 }, +- { 0x110a6, 0x0 }, +- { 0x110a7, 0x0 }, +- { 0x120a0, 0x0 }, +- { 0x120a1, 0x0 }, +- { 0x120a2, 0x0 }, +- { 0x120a3, 0x0 }, +- { 0x120a4, 0x0 }, +- { 0x120a5, 0x0 }, +- { 0x120a6, 0x0 }, +- { 0x120a7, 0x0 }, +- { 0x130a0, 0x0 }, +- { 0x130a1, 0x0 }, +- { 0x130a2, 0x0 }, +- { 0x130a3, 0x0 }, +- { 0x130a4, 0x0 }, +- { 0x130a5, 0x0 }, +- { 0x130a6, 0x0 }, +- { 0x130a7, 0x0 }, +- { 0x2007c, 0x0 }, +- { 0x12007c, 0x0 }, +- { 0x22007c, 0x0 }, +- { 0x2007d, 0x0 }, +- { 0x12007d, 0x0 }, +- { 0x22007d, 0x0 }, +- { 0x400fd, 0x0 }, +- { 0x400c0, 0x0 }, +- { 0x90201, 0x0 }, +- { 0x190201, 0x0 }, +- { 0x290201, 0x0 }, +- { 0x90202, 0x0 }, +- { 0x190202, 0x0 }, +- { 0x290202, 0x0 }, +- { 0x90203, 0x0 }, +- { 0x190203, 0x0 }, +- { 0x290203, 0x0 }, +- { 0x90204, 0x0 }, +- { 0x190204, 0x0 }, +- { 0x290204, 0x0 }, +- { 0x90205, 0x0 }, +- { 0x190205, 0x0 }, +- { 0x290205, 0x0 }, +- { 0x90206, 0x0 }, +- { 0x190206, 0x0 }, +- { 0x290206, 0x0 }, +- { 0x90207, 0x0 }, +- { 0x190207, 0x0 }, +- { 0x290207, 0x0 }, +- { 0x90208, 0x0 }, +- { 0x190208, 0x0 }, +- { 0x290208, 0x0 }, +- { 0x10062, 0x0 }, +- { 0x10162, 0x0 }, +- { 0x10262, 0x0 }, +- { 0x10362, 0x0 }, +- { 0x10462, 0x0 }, +- { 0x10562, 0x0 }, +- { 0x10662, 0x0 }, +- { 0x10762, 0x0 }, +- { 0x10862, 0x0 }, +- { 0x11062, 0x0 }, +- { 0x11162, 0x0 }, +- { 0x11262, 0x0 }, +- { 0x11362, 0x0 }, +- { 0x11462, 0x0 }, +- { 0x11562, 0x0 }, +- { 0x11662, 0x0 }, +- { 0x11762, 0x0 }, +- { 0x11862, 0x0 }, +- { 0x12062, 0x0 }, +- { 0x12162, 0x0 }, +- { 0x12262, 0x0 }, +- { 0x12362, 0x0 }, +- { 0x12462, 0x0 }, +- { 0x12562, 0x0 }, +- { 0x12662, 0x0 }, +- { 0x12762, 0x0 }, +- { 0x12862, 0x0 }, +- { 0x13062, 0x0 }, +- { 0x13162, 0x0 }, +- { 0x13262, 0x0 }, +- { 0x13362, 0x0 }, +- { 0x13462, 0x0 }, +- { 0x13562, 0x0 }, +- { 0x13662, 0x0 }, +- { 0x13762, 0x0 }, +- { 0x13862, 0x0 }, +- { 0x20077, 0x0 }, +- { 0x10001, 0x0 }, +- { 0x11001, 0x0 }, +- { 0x12001, 0x0 }, +- { 0x13001, 0x0 }, +- { 0x10040, 0x0 }, +- { 0x10140, 0x0 }, +- { 0x10240, 0x0 }, +- { 0x10340, 0x0 }, +- { 0x10440, 0x0 }, +- { 0x10540, 0x0 }, +- { 0x10640, 0x0 }, +- { 0x10740, 0x0 }, +- { 0x10840, 0x0 }, +- { 0x10030, 0x0 }, +- { 0x10130, 0x0 }, +- { 0x10230, 0x0 }, +- { 0x10330, 0x0 }, +- { 0x10430, 0x0 }, +- { 0x10530, 0x0 }, +- { 0x10630, 0x0 }, +- { 0x10730, 0x0 }, +- { 0x10830, 0x0 }, +- { 0x11040, 0x0 }, +- { 0x11140, 0x0 }, +- { 0x11240, 0x0 }, +- { 0x11340, 0x0 }, +- { 0x11440, 0x0 }, +- { 0x11540, 0x0 }, +- { 0x11640, 0x0 }, +- { 0x11740, 0x0 }, +- { 0x11840, 0x0 }, +- { 0x11030, 0x0 }, +- { 0x11130, 0x0 }, +- { 0x11230, 0x0 }, +- { 0x11330, 0x0 }, +- { 0x11430, 0x0 }, +- { 0x11530, 0x0 }, +- { 0x11630, 0x0 }, +- { 0x11730, 0x0 }, +- { 0x11830, 0x0 }, +- { 0x12040, 0x0 }, +- { 0x12140, 0x0 }, +- { 0x12240, 0x0 }, +- { 0x12340, 0x0 }, +- { 0x12440, 0x0 }, +- { 0x12540, 0x0 }, +- { 0x12640, 0x0 }, +- { 0x12740, 0x0 }, +- { 0x12840, 0x0 }, +- { 0x12030, 0x0 }, +- { 0x12130, 0x0 }, +- { 0x12230, 0x0 }, +- { 0x12330, 0x0 }, +- { 0x12430, 0x0 }, +- { 0x12530, 0x0 }, +- { 0x12630, 0x0 }, +- { 0x12730, 0x0 }, +- { 0x12830, 0x0 }, +- { 0x13040, 0x0 }, +- { 0x13140, 0x0 }, +- { 0x13240, 0x0 }, +- { 0x13340, 0x0 }, +- { 0x13440, 0x0 }, +- { 0x13540, 0x0 }, +- { 0x13640, 0x0 }, +- { 0x13740, 0x0 }, +- { 0x13840, 0x0 }, +- { 0x13030, 0x0 }, +- { 0x13130, 0x0 }, +- { 0x13230, 0x0 }, +- { 0x13330, 0x0 }, +- { 0x13430, 0x0 }, +- { 0x13530, 0x0 }, +- { 0x13630, 0x0 }, +- { 0x13730, 0x0 }, +- { 0x13830, 0x0 }, +-}; +-/* P0 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp0_cfg[] = { +- {0xd0000, 0x0}, +- {0x54003,0xbb8}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x131f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x310}, +- {0x54019,0x2dd4}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x2dd4}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x3}, +- {0x54032,0xd400}, +- {0x54033,0x312d}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0xd400}, +- {0x54039,0x312d}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P1 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp1_cfg[] = { +- {0xd0000, 0x0}, +- {0x54002,0x101}, +- {0x54003,0x190}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x121f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x310}, +- {0x54019,0x84}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x84}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x3}, +- {0x54032,0x8400}, +- {0x54033,0x3100}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0x8400}, +- {0x54039,0x3100}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P2 message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp2_cfg[] = { +- {0xd0000, 0x0}, +- {0x54002,0x102}, +- {0x54003,0x64}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x121f}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400d,0x100}, +- {0x54012,0x310}, +- {0x54019,0x84}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x84}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x3}, +- {0x54032,0x8400}, +- {0x54033,0x3100}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0x8400}, +- {0x54039,0x3100}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- {0xd0000, 0x1}, +-}; +- +- +-/* P0 2D message block paremeter for training firmware */ +-static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { +- {0xd0000, 0x0}, +- {0x54003,0xbb8}, +- {0x54004,0x2}, +- {0x54005,0x2228}, +- {0x54006,0x11}, +- {0x54008,0x61}, +- {0x54009,0xc8}, +- {0x5400b,0x2}, +- {0x5400f,0x100}, +- {0x54010,0x1f7f}, +- {0x54012,0x310}, +- {0x54019,0x2dd4}, +- {0x5401a,0x31}, +- {0x5401b,0x4d66}, +- {0x5401c,0x4d00}, +- {0x5401e,0x16}, +- {0x5401f,0x2dd4}, +- {0x54020,0x31}, +- {0x54021,0x4d66}, +- {0x54022,0x4d00}, +- {0x54024,0x16}, +- {0x5402b,0x1000}, +- {0x5402c,0x3}, +- {0x54032,0xd400}, +- {0x54033,0x312d}, +- {0x54034,0x6600}, +- {0x54035,0x4d}, +- {0x54036,0x4d}, +- {0x54037,0x1600}, +- {0x54038,0xd400}, +- {0x54039,0x312d}, +- {0x5403a,0x6600}, +- {0x5403b,0x4d}, +- {0x5403c,0x4d}, +- {0x5403d,0x1600}, +- { 0xd0000, 0x1 }, +-}; +- +-/* DRAM PHY init engine image */ +-static struct dram_cfg_param ddr_phy_pie[] = { +- {0xd0000, 0x0}, +- {0x90000,0x10}, +- {0x90001,0x400}, +- {0x90002,0x10e}, +- {0x90003,0x0}, +- {0x90004,0x0}, +- {0x90005,0x8}, +- {0x90029,0xb}, +- {0x9002a,0x480}, +- {0x9002b,0x109}, +- {0x9002c,0x8}, +- {0x9002d,0x448}, +- {0x9002e,0x139}, +- {0x9002f,0x8}, +- {0x90030,0x478}, +- {0x90031,0x109}, +- {0x90032,0x0}, +- {0x90033,0xe8}, +- {0x90034,0x109}, +- {0x90035,0x2}, +- {0x90036,0x10}, +- {0x90037,0x139}, +- {0x90038,0xf}, +- {0x90039,0x7c0}, +- {0x9003a,0x139}, +- {0x9003b,0x44}, +- {0x9003c,0x630}, +- {0x9003d,0x159}, +- {0x9003e,0x14f}, +- {0x9003f,0x630}, +- {0x90040,0x159}, +- {0x90041,0x47}, +- {0x90042,0x630}, +- {0x90043,0x149}, +- {0x90044,0x4f}, +- {0x90045,0x630}, +- {0x90046,0x179}, +- {0x90047,0x8}, +- {0x90048,0xe0}, +- {0x90049,0x109}, +- {0x9004a,0x0}, +- {0x9004b,0x7c8}, +- {0x9004c,0x109}, +- {0x9004d,0x0}, +- {0x9004e,0x1}, +- {0x9004f,0x8}, +- {0x90050,0x0}, +- {0x90051,0x45a}, +- {0x90052,0x9}, +- {0x90053,0x0}, +- {0x90054,0x448}, +- {0x90055,0x109}, +- {0x90056,0x40}, +- {0x90057,0x630}, +- {0x90058,0x179}, +- {0x90059,0x1}, +- {0x9005a,0x618}, +- {0x9005b,0x109}, +- {0x9005c,0x40c0}, +- {0x9005d,0x630}, +- {0x9005e,0x149}, +- {0x9005f,0x8}, +- {0x90060,0x4}, +- {0x90061,0x48}, +- {0x90062,0x4040}, +- {0x90063,0x630}, +- {0x90064,0x149}, +- {0x90065,0x0}, +- {0x90066,0x4}, +- {0x90067,0x48}, +- {0x90068,0x40}, +- {0x90069,0x630}, +- {0x9006a,0x149}, +- {0x9006b,0x10}, +- {0x9006c,0x4}, +- {0x9006d,0x18}, +- {0x9006e,0x0}, +- {0x9006f,0x4}, +- {0x90070,0x78}, +- {0x90071,0x549}, +- {0x90072,0x630}, +- {0x90073,0x159}, +- {0x90074,0xd49}, +- {0x90075,0x630}, +- {0x90076,0x159}, +- {0x90077,0x94a}, +- {0x90078,0x630}, +- {0x90079,0x159}, +- {0x9007a,0x441}, +- {0x9007b,0x630}, +- {0x9007c,0x149}, +- {0x9007d,0x42}, +- {0x9007e,0x630}, +- {0x9007f,0x149}, +- {0x90080,0x1}, +- {0x90081,0x630}, +- {0x90082,0x149}, +- {0x90083,0x0}, +- {0x90084,0xe0}, +- {0x90085,0x109}, +- {0x90086,0xa}, +- {0x90087,0x10}, +- {0x90088,0x109}, +- {0x90089,0x9}, +- {0x9008a,0x3c0}, +- {0x9008b,0x149}, +- {0x9008c,0x9}, +- {0x9008d,0x3c0}, +- {0x9008e,0x159}, +- {0x9008f,0x18}, +- {0x90090,0x10}, +- {0x90091,0x109}, +- {0x90092,0x0}, +- {0x90093,0x3c0}, +- {0x90094,0x109}, +- {0x90095,0x18}, +- {0x90096,0x4}, +- {0x90097,0x48}, +- {0x90098,0x18}, +- {0x90099,0x4}, +- {0x9009a,0x58}, +- {0x9009b,0xa}, +- {0x9009c,0x10}, +- {0x9009d,0x109}, +- {0x9009e,0x2}, +- {0x9009f,0x10}, +- {0x900a0,0x109}, +- {0x900a1,0x5}, +- {0x900a2,0x7c0}, +- {0x900a3,0x109}, +- {0x900a4,0x10}, +- {0x900a5,0x10}, +- {0x900a6,0x109}, +- {0x40000,0x811}, +- {0x40020,0x880}, +- {0x40040,0x0}, +- {0x40060,0x0}, +- {0x40001,0x4008}, +- {0x40021,0x83}, +- {0x40041,0x4f}, +- {0x40061,0x0}, +- {0x40002,0x4040}, +- {0x40022,0x83}, +- {0x40042,0x51}, +- {0x40062,0x0}, +- {0x40003,0x811}, +- {0x40023,0x880}, +- {0x40043,0x0}, +- {0x40063,0x0}, +- {0x40004,0x720}, +- {0x40024,0xf}, +- {0x40044,0x1740}, +- {0x40064,0x0}, +- {0x40005,0x16}, +- {0x40025,0x83}, +- {0x40045,0x4b}, +- {0x40065,0x0}, +- {0x40006,0x716}, +- {0x40026,0xf}, +- {0x40046,0x2001}, +- {0x40066,0x0}, +- {0x40007,0x716}, +- {0x40027,0xf}, +- {0x40047,0x2800}, +- {0x40067,0x0}, +- {0x40008,0x716}, +- {0x40028,0xf}, +- {0x40048,0xf00}, +- {0x40068,0x0}, +- {0x40009,0x720}, +- {0x40029,0xf}, +- {0x40049,0x1400}, +- {0x40069,0x0}, +- {0x4000a,0xe08}, +- {0x4002a,0xc15}, +- {0x4004a,0x0}, +- {0x4006a,0x0}, +- {0x4000b,0x623}, +- {0x4002b,0x15}, +- {0x4004b,0x0}, +- {0x4006b,0x0}, +- {0x4000c,0x4028}, +- {0x4002c,0x80}, +- {0x4004c,0x0}, +- {0x4006c,0x0}, +- {0x4000d,0xe08}, +- {0x4002d,0xc1a}, +- {0x4004d,0x0}, +- {0x4006d,0x0}, +- {0x4000e,0x623}, +- {0x4002e,0x1a}, +- {0x4004e,0x0}, +- {0x4006e,0x0}, +- {0x4000f,0x4040}, +- {0x4002f,0x80}, +- {0x4004f,0x0}, +- {0x4006f,0x0}, +- {0x40010,0x2604}, +- {0x40030,0x15}, +- {0x40050,0x0}, +- {0x40070,0x0}, +- {0x40011,0x708}, +- {0x40031,0x5}, +- {0x40051,0x0}, +- {0x40071,0x2002}, +- {0x40012,0x8}, +- {0x40032,0x80}, +- {0x40052,0x0}, +- {0x40072,0x0}, +- {0x40013,0x2604}, +- {0x40033,0x1a}, +- {0x40053,0x0}, +- {0x40073,0x0}, +- {0x40014,0x708}, +- {0x40034,0xa}, +- {0x40054,0x0}, +- {0x40074,0x2002}, +- {0x40015,0x4040}, +- {0x40035,0x80}, +- {0x40055,0x0}, +- {0x40075,0x0}, +- {0x40016,0x60a}, +- {0x40036,0x15}, +- {0x40056,0x1200}, +- {0x40076,0x0}, +- {0x40017,0x61a}, +- {0x40037,0x15}, +- {0x40057,0x1300}, +- {0x40077,0x0}, +- {0x40018,0x60a}, +- {0x40038,0x1a}, +- {0x40058,0x1200}, +- {0x40078,0x0}, +- {0x40019,0x642}, +- {0x40039,0x1a}, +- {0x40059,0x1300}, +- {0x40079,0x0}, +- {0x4001a,0x4808}, +- {0x4003a,0x880}, +- {0x4005a,0x0}, +- {0x4007a,0x0}, +- {0x900a7,0x0}, +- {0x900a8,0x790}, +- {0x900a9,0x11a}, +- {0x900aa,0x8}, +- {0x900ab,0x7aa}, +- {0x900ac,0x2a}, +- {0x900ad,0x10}, +- {0x900ae,0x7b2}, +- {0x900af,0x2a}, +- {0x900b0,0x0}, +- {0x900b1,0x7c8}, +- {0x900b2,0x109}, +- {0x900b3,0x10}, +- {0x900b4,0x2a8}, +- {0x900b5,0x129}, +- {0x900b6,0x8}, +- {0x900b7,0x370}, +- {0x900b8,0x129}, +- {0x900b9,0xa}, +- {0x900ba,0x3c8}, +- {0x900bb,0x1a9}, +- {0x900bc,0xc}, +- {0x900bd,0x408}, +- {0x900be,0x199}, +- {0x900bf,0x14}, +- {0x900c0,0x790}, +- {0x900c1,0x11a}, +- {0x900c2,0x8}, +- {0x900c3,0x4}, +- {0x900c4,0x18}, +- {0x900c5,0xe}, +- {0x900c6,0x408}, +- {0x900c7,0x199}, +- {0x900c8,0x8}, +- {0x900c9,0x8568}, +- {0x900ca,0x108}, +- {0x900cb,0x18}, +- {0x900cc,0x790}, +- {0x900cd,0x16a}, +- {0x900ce,0x8}, +- {0x900cf,0x1d8}, +- {0x900d0,0x169}, +- {0x900d1,0x10}, +- {0x900d2,0x8558}, +- {0x900d3,0x168}, +- {0x900d4,0x70}, +- {0x900d5,0x788}, +- {0x900d6,0x16a}, +- {0x900d7,0x1ff8}, +- {0x900d8,0x85a8}, +- {0x900d9,0x1e8}, +- {0x900da,0x50}, +- {0x900db,0x798}, +- {0x900dc,0x16a}, +- {0x900dd,0x60}, +- {0x900de,0x7a0}, +- {0x900df,0x16a}, +- {0x900e0,0x8}, +- {0x900e1,0x8310}, +- {0x900e2,0x168}, +- {0x900e3,0x8}, +- {0x900e4,0xa310}, +- {0x900e5,0x168}, +- {0x900e6,0xa}, +- {0x900e7,0x408}, +- {0x900e8,0x169}, +- {0x900e9,0x6e}, +- {0x900ea,0x0}, +- {0x900eb,0x68}, +- {0x900ec,0x0}, +- {0x900ed,0x408}, +- {0x900ee,0x169}, +- {0x900ef,0x0}, +- {0x900f0,0x8310}, +- {0x900f1,0x168}, +- {0x900f2,0x0}, +- {0x900f3,0xa310}, +- {0x900f4,0x168}, +- {0x900f5,0x1ff8}, +- {0x900f6,0x85a8}, +- {0x900f7,0x1e8}, +- {0x900f8,0x68}, +- {0x900f9,0x798}, +- {0x900fa,0x16a}, +- {0x900fb,0x78}, +- {0x900fc,0x7a0}, +- {0x900fd,0x16a}, +- {0x900fe,0x68}, +- {0x900ff,0x790}, +- {0x90100,0x16a}, +- {0x90101,0x8}, +- {0x90102,0x8b10}, +- {0x90103,0x168}, +- {0x90104,0x8}, +- {0x90105,0xab10}, +- {0x90106,0x168}, +- {0x90107,0xa}, +- {0x90108,0x408}, +- {0x90109,0x169}, +- {0x9010a,0x58}, +- {0x9010b,0x0}, +- {0x9010c,0x68}, +- {0x9010d,0x0}, +- {0x9010e,0x408}, +- {0x9010f,0x169}, +- {0x90110,0x0}, +- {0x90111,0x8b10}, +- {0x90112,0x168}, +- {0x90113,0x0}, +- {0x90114,0xab10}, +- {0x90115,0x168}, +- {0x90116,0x0}, +- {0x90117,0x1d8}, +- {0x90118,0x169}, +- {0x90119,0x80}, +- {0x9011a,0x790}, +- {0x9011b,0x16a}, +- {0x9011c,0x18}, +- {0x9011d,0x7aa}, +- {0x9011e,0x6a}, +- {0x9011f,0xa}, +- {0x90120,0x0}, +- {0x90121,0x1e9}, +- {0x90122,0x8}, +- {0x90123,0x8080}, +- {0x90124,0x108}, +- {0x90125,0xf}, +- {0x90126,0x408}, +- {0x90127,0x169}, +- {0x90128,0xc}, +- {0x90129,0x0}, +- {0x9012a,0x68}, +- {0x9012b,0x9}, +- {0x9012c,0x0}, +- {0x9012d,0x1a9}, +- {0x9012e,0x0}, +- {0x9012f,0x408}, +- {0x90130,0x169}, +- {0x90131,0x0}, +- {0x90132,0x8080}, +- {0x90133,0x108}, +- {0x90134,0x8}, +- {0x90135,0x7aa}, +- {0x90136,0x6a}, +- {0x90137,0x0}, +- {0x90138,0x8568}, +- {0x90139,0x108}, +- {0x9013a,0xb7}, +- {0x9013b,0x790}, +- {0x9013c,0x16a}, +- {0x9013d,0x1f}, +- {0x9013e,0x0}, +- {0x9013f,0x68}, +- {0x90140,0x8}, +- {0x90141,0x8558}, +- {0x90142,0x168}, +- {0x90143,0xf}, +- {0x90144,0x408}, +- {0x90145,0x169}, +- {0x90146,0xc}, +- {0x90147,0x0}, +- {0x90148,0x68}, +- {0x90149,0x0}, +- {0x9014a,0x408}, +- {0x9014b,0x169}, +- {0x9014c,0x0}, +- {0x9014d,0x8558}, +- {0x9014e,0x168}, +- {0x9014f,0x8}, +- {0x90150,0x3c8}, +- {0x90151,0x1a9}, +- {0x90152,0x3}, +- {0x90153,0x370}, +- {0x90154,0x129}, +- {0x90155,0x20}, +- {0x90156,0x2aa}, +- {0x90157,0x9}, +- {0x90158,0x0}, +- {0x90159,0x400}, +- {0x9015a,0x10e}, +- {0x9015b,0x8}, +- {0x9015c,0xe8}, +- {0x9015d,0x109}, +- {0x9015e,0x0}, +- {0x9015f,0x8140}, +- {0x90160,0x10c}, +- {0x90161,0x10}, +- {0x90162,0x8138}, +- {0x90163,0x10c}, +- {0x90164,0x8}, +- {0x90165,0x7c8}, +- {0x90166,0x101}, +- {0x90167,0x8}, +- {0x90168,0x0}, +- {0x90169,0x8}, +- {0x9016a,0x8}, +- {0x9016b,0x448}, +- {0x9016c,0x109}, +- {0x9016d,0xf}, +- {0x9016e,0x7c0}, +- {0x9016f,0x109}, +- {0x90170,0x0}, +- {0x90171,0xe8}, +- {0x90172,0x109}, +- {0x90173,0x47}, +- {0x90174,0x630}, +- {0x90175,0x109}, +- {0x90176,0x8}, +- {0x90177,0x618}, +- {0x90178,0x109}, +- {0x90179,0x8}, +- {0x9017a,0xe0}, +- {0x9017b,0x109}, +- {0x9017c,0x0}, +- {0x9017d,0x7c8}, +- {0x9017e,0x109}, +- {0x9017f,0x8}, +- {0x90180,0x8140}, +- {0x90181,0x10c}, +- {0x90182,0x0}, +- {0x90183,0x1}, +- {0x90184,0x8}, +- {0x90185,0x8}, +- {0x90186,0x4}, +- {0x90187,0x8}, +- {0x90188,0x8}, +- {0x90189,0x7c8}, +- {0x9018a,0x101}, +- {0x90006,0x0}, +- {0x90007,0x0}, +- {0x90008,0x8}, +- {0x90009,0x0}, +- {0x9000a,0x0}, +- {0x9000b,0x0}, +- {0xd00e7,0x400}, +- {0x90017,0x0}, +- {0x9001f,0x2a}, +- {0x90026,0x6a}, +- {0x400d0,0x0}, +- {0x400d1,0x101}, +- {0x400d2,0x105}, +- {0x400d3,0x107}, +- {0x400d4,0x10f}, +- {0x400d5,0x202}, +- {0x400d6,0x20a}, +- {0x400d7,0x20b}, +- {0x2003a,0x2}, +- {0x2000b,0x5d}, +- {0x2000c,0xbb}, +- {0x2000d,0x753}, +- {0x2000e,0x2c}, +- {0x12000b,0xc}, +- {0x12000c,0x19}, +- {0x12000d,0xfa}, +- {0x12000e,0x10}, +- {0x22000b,0x3}, +- {0x22000c,0x6}, +- {0x22000d,0x3e}, +- {0x22000e,0x10}, +- {0x9000c,0x0}, +- {0x9000d,0x173}, +- {0x9000e,0x60}, +- {0x9000f,0x6110}, +- {0x90010,0x2152}, +- {0x90011,0xdfbd}, +- {0x90012,0x60}, +- {0x90013,0x6152}, +- {0x20010,0x5a}, +- {0x20011,0x3}, +- {0x120010,0x5a}, +- {0x120011,0x3}, +- {0x220010,0x5a}, +- {0x220011,0x3}, +- {0x40080,0xe0}, +- {0x40081,0x12}, +- {0x40082,0xe0}, +- {0x40083,0x12}, +- {0x40084,0xe0}, +- {0x40085,0x12}, +- {0x140080,0xe0}, +- {0x140081,0x12}, +- {0x140082,0xe0}, +- {0x140083,0x12}, +- {0x140084,0xe0}, +- {0x140085,0x12}, +- {0x240080,0xe0}, +- {0x240081,0x12}, +- {0x240082,0xe0}, +- {0x240083,0x12}, +- {0x240084,0xe0}, +- {0x240085,0x12}, +- {0x400fd,0xf}, +- {0x10011,0x1}, +- {0x10012,0x1}, +- {0x10013,0x180}, +- {0x10018,0x1}, +- {0x10002,0x6209}, +- {0x100b2,0x1}, +- {0x101b4,0x1}, +- {0x102b4,0x1}, +- {0x103b4,0x1}, +- {0x104b4,0x1}, +- {0x105b4,0x1}, +- {0x106b4,0x1}, +- {0x107b4,0x1}, +- {0x108b4,0x1}, +- {0x11011,0x1}, +- {0x11012,0x1}, +- {0x11013,0x180}, +- {0x11018,0x1}, +- {0x11002,0x6209}, +- {0x110b2,0x1}, +- {0x111b4,0x1}, +- {0x112b4,0x1}, +- {0x113b4,0x1}, +- {0x114b4,0x1}, +- {0x115b4,0x1}, +- {0x116b4,0x1}, +- {0x117b4,0x1}, +- {0x118b4,0x1}, +- {0x12011,0x1}, +- {0x12012,0x1}, +- {0x12013,0x180}, +- {0x12018,0x1}, +- {0x12002,0x6209}, +- {0x120b2,0x1}, +- {0x121b4,0x1}, +- {0x122b4,0x1}, +- {0x123b4,0x1}, +- {0x124b4,0x1}, +- {0x125b4,0x1}, +- {0x126b4,0x1}, +- {0x127b4,0x1}, +- {0x128b4,0x1}, +- {0x13011,0x1}, +- {0x13012,0x1}, +- {0x13013,0x180}, +- {0x13018,0x1}, +- {0x13002,0x6209}, +- {0x130b2,0x1}, +- {0x131b4,0x1}, +- {0x132b4,0x1}, +- {0x133b4,0x1}, +- {0x134b4,0x1}, +- {0x135b4,0x1}, +- {0x136b4,0x1}, +- {0x137b4,0x1}, +- {0x138b4,0x1}, +- {0x2003a,0x2}, +- {0xc0080,0x2}, +- {0xd0000, 0x1} +-}; +- +-static struct dram_fsp_msg ddr_dram_fsp_msg[] = { +- { +- /* P0 3000mts 1D */ +- .drate = 3000, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp0_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), +- }, +- { +- /* P1 400mts 1D */ +- .drate = 400, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp1_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), +- }, +- { +- /* P2 100mts 1D */ +- .drate = 100, +- .fw_type = FW_1D_IMAGE, +- .fsp_cfg = ddr_fsp2_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), +- }, +- { +- /* P0 3000mts 2D */ +- .drate = 3000, +- .fw_type = FW_2D_IMAGE, +- .fsp_cfg = ddr_fsp0_2d_cfg, +- .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), +- }, +-}; +- +-/* ddr timing config params */ +-struct dram_timing_info ucm_dram_timing_ff000110 = { +- .ddrc_cfg = ddr_ddrc_cfg, +- .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), +- .ddrphy_cfg = ddr_ddrphy_cfg, +- .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), +- .fsp_msg = ddr_dram_fsp_msg, +- .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), +- .ddrphy_trained_csr = ddr_ddrphy_trained_csr, +- .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), +- .ddrphy_pie = ddr_phy_pie, +- .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), +- .fsp_table = { 3000, 400, 100, }, +-}; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0097-spl-Add-SDP-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0097-spl-Add-SDP-support.patch new file mode 100644 index 0000000..4fbe7ff --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0097-spl-Add-SDP-support.patch @@ -0,0 +1,111 @@ +From e0536d2283a9ca7512b927a527d2f9778ad25e99 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 17 Oct 2021 21:23:39 +0300 +Subject: [PATCH 097/126] spl: Add SDP support + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/spl/spl.c | 16 ++++++++++++++++ + configs/cl-imx8m-mini_defconfig | 11 +++++++++-- + include/configs/cpl-imx8m-mini.h | 4 ++-- + 3 files changed, 27 insertions(+), 4 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/spl/spl.c b/board/compulab/plat/imx8mm/spl/spl.c +index c82d59ab1e..03783d1e8b 100644 +--- a/board/compulab/plat/imx8mm/spl/spl.c ++++ b/board/compulab/plat/imx8mm/spl/spl.c +@@ -22,10 +22,23 @@ + #include + #include + #include ++#include + #include "ddr/ddr.h" + + DECLARE_GLOBAL_DATA_PTR; + ++static int _board_phy_mode=USB_INIT_HOST; ++ ++int board_usb_phy_mode(int port) ++{ ++ return _board_phy_mode; ++} ++ ++static void board_soft_otg(void) ++{ ++ _board_phy_mode=USB_INIT_DEVICE; ++} ++ + int spl_board_boot_device(enum boot_device boot_dev_spl) + { + switch (boot_dev_spl) { +@@ -35,6 +48,9 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) + case SD3_BOOT: + case MMC3_BOOT: + return BOOT_DEVICE_MMC2; ++ case USB_BOOT: ++ board_soft_otg(); ++ return BOOT_DEVICE_BOARD; + default: + return BOOT_DEVICE_NONE; + } +diff --git a/configs/cl-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig +index b54110b42f..88c1a8e1bc 100644 +--- a/configs/cl-imx8m-mini_defconfig ++++ b/configs/cl-imx8m-mini_defconfig +@@ -25,6 +25,9 @@ CONFIG_BOARD_EARLY_INIT_F=y + CONFIG_SPL_BOARD_INIT=y + CONFIG_SPL_SEPARATE_BSS=y + CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_SPL_USB_HOST_SUPPORT=y ++CONFIG_SPL_USB_GADGET=y ++CONFIG_SPL_USB_SDP_SUPPORT=y + CONFIG_HUSH_PARSER=y + CONFIG_SYS_PROMPT="u-boot=> " + # CONFIG_BOOTM_NETBSD is not set +@@ -46,7 +49,6 @@ CONFIG_CMD_EXT2=y + CONFIG_CMD_EXT4=y + CONFIG_CMD_FAT=y + CONFIG_CMD_FS_GENERIC=y +-CONFIG_EFI_PARTITION=y + CONFIG_OF_CONTROL=y + CONFIG_ENV_IS_IN_MMC=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y +@@ -55,6 +57,10 @@ CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_CLK_COMPOSITE_CCF=y + CONFIG_CLK_IMX8MM=y ++CONFIG_USB_FUNCTION_FASTBOOT=y ++CONFIG_FASTBOOT_BUF_ADDR=0x42800000 ++CONFIG_FASTBOOT_BUF_SIZE=0x40000000 ++CONFIG_FASTBOOT_FLASH=y + CONFIG_MXC_GPIO=y + CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y +@@ -86,7 +92,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 + CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + CONFIG_CI_UDC=y + CONFIG_SDP_LOADADDR=0x40400000 +-CONFIG_USB_GADGET_DOWNLOAD=y ++# CONFIG_DM_USB_GADGET is not set ++CONFIG_USB_FUNCTION_SDP=y + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX88179=y + CONFIG_DM_VIDEO=y +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index a65d86e253..9ef84842d0 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -94,8 +94,8 @@ + "\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffff\0" \ +- "emmc_dev=1\0" \ +- "sd_dev=0\0" \ ++ "emmc_dev=2\0" \ ++ "sd_dev=1\0" \ + "bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then "\ + "booti ${loadaddr} ${initrd_addr} ${fdt_addr};"\ + "else echo \"Run fastboot ...\"; fastboot 0; fi\0" \ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0098-spl-Enable-Samsung-4G-DRAM-0x01061010.patch b/recipes-bsp/u-boot/compulab/imx8mm/0098-spl-Enable-Samsung-4G-DRAM-0x01061010.patch new file mode 100644 index 0000000..fdd6af8 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0098-spl-Enable-Samsung-4G-DRAM-0x01061010.patch @@ -0,0 +1,27 @@ +From 51c827c2ab54049119f3a27f447f0604d837cb07 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 1 Nov 2021 22:06:18 +0200 +Subject: [PATCH 098/126] spl: Enable Samsung 4G DRAM 0x01061010 + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/ddr/ddr.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 5d2d883d23..7c4a2de077 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -77,7 +77,8 @@ static const struct lpddr4_desc lpddr4_array[] = { + #else + { .name = "Nanya", .id = 0x05000010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_05000010}, + #endif +- { .name = "Samsung", .id = 0x01061010, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, ++ { .name = "Samsung", .id = 0x01061010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, ++ { .name = "Samsung", .id = 0x01061010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0099-Enable-DDR-Alliance-1G-0x01050008.patch b/recipes-bsp/u-boot/compulab/imx8mm/0099-Enable-DDR-Alliance-1G-0x01050008.patch new file mode 100644 index 0000000..39a3331 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0099-Enable-DDR-Alliance-1G-0x01050008.patch @@ -0,0 +1,25 @@ +From 998974bccbabb35017a15e84a47d68d088c62a86 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 3 Nov 2021 23:49:18 +0200 +Subject: [PATCH 099/126] Enable DDR Alliance 1G 0x01050008 + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/ddr/ddr.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/board/compulab/plat/imx8mm/ddr/ddr.c b/board/compulab/plat/imx8mm/ddr/ddr.c +index 7c4a2de077..cf964e56bb 100644 +--- a/board/compulab/plat/imx8mm/ddr/ddr.c ++++ b/board/compulab/plat/imx8mm/ddr/ddr.c +@@ -81,6 +81,7 @@ static const struct lpddr4_desc lpddr4_array[] = { + { .name = "Samsung", .id = 0x01061010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Samsung", .id = 0x01050008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Samsung", .id = 0x01060008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, ++ { .name = "Alliance", .id = 0x52000008, .subind = 0xff, .size = 1024, .count = 1, .timing = &ucm_dram_timing_01050008}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x04, .size = 4096, .count = 1, .timing = &ucm_dram_timing_ff000110}, + { .name = "Kingston", .id = 0xff000010, .subind = 0x02, .size = 2048, .count = 1, .timing = &ucm_dram_timing_01061010}, + { .name = "Micron", .id = 0xff020008, .subind = 0xff, .size = 2048, .count = 1, .timing = &ucm_dram_timing_ff020008}, +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0100-make-Add-wrapper-for-compound-config.patch b/recipes-bsp/u-boot/compulab/imx8mm/0100-make-Add-wrapper-for-compound-config.patch new file mode 100644 index 0000000..993974e --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0100-make-Add-wrapper-for-compound-config.patch @@ -0,0 +1,26 @@ +From 953be0eebb526c193f7181c0ae8fd440169d0f95 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 22 Dec 2021 16:58:13 +0200 +Subject: [PATCH 100/126] make: Add wrapper for compound config + +Signed-off-by: Kirill Kapranov +--- + defconfig.mk | 6 ++++++ + 1 file changed, 6 insertions(+) + create mode 100644 defconfig.mk + +diff --git a/defconfig.mk b/defconfig.mk +new file mode 100644 +index 0000000000..e164ba2655 +--- /dev/null ++++ b/defconfig.mk +@@ -0,0 +1,6 @@ ++.DEFAULT: compound_defconfig ++compound_defconfig: ++ scripts/kconfig/merge_config.sh -O configs/ -m configs/cl-imx8m-mini_defconfig configs/${MACHINE}.config ++ mv configs/.config configs/${MACHINE}_defconfig ++ $(MAKE) -f Makefile ${MACHINE}_defconfig ++ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch new file mode 100644 index 0000000..1663d96 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0101-compulab-imx8mm-Add-binman-support.patch @@ -0,0 +1,279 @@ +From 1402a42529e24b7f8a2524fe2b2db22ed2ba784f Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Dec 2021 18:46:24 +0200 +Subject: [PATCH 101/126] compulab: imx8mm: Add binman support + +Signed-off-by: Valentin Raevsky +--- + arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi | 147 +++++++++++++++++++++ + arch/arm/dts/cpl-imx8m-mini.dtsi | 1 + + arch/arm/mach-imx/Makefile | 13 +- + arch/arm/mach-imx/imx8m/Kconfig | 3 + + board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg | 9 ++ + configs/cl-imx8m-mini_defconfig | 4 +- + 6 files changed, 169 insertions(+), 8 deletions(-) + create mode 100644 arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi + create mode 100644 board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg + +diff --git a/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi b/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi +new file mode 100644 +index 0000000000..63bb7a7d72 +--- /dev/null ++++ b/arch/arm/dts/cpl-imx8m-mini-u-boot.dtsi +@@ -0,0 +1,147 @@ ++/* ++ * Copyright 2021 CompuLab ++ */ ++ ++/ { ++ binman: binman { ++ multiple-images; ++ }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; ++}; ++ ++&binman { ++ u-boot-spl-ddr { ++ filename = "u-boot-spl-ddr.bin"; ++ pad-byte = <0xff>; ++ align-size = <4>; ++ align = <4>; ++ ++ u-boot-spl { ++ align-end = <4>; ++ }; ++ ++ blob_1: blob-ext@1 { ++ filename = "lpddr4_pmu_train_1d_imem.bin"; ++ size = <0x8000>; ++ }; ++ ++ blob_2: blob-ext@2 { ++ filename = "lpddr4_pmu_train_1d_dmem.bin"; ++ size = <0x4000>; ++ }; ++ ++ blob_3: blob-ext@3 { ++ filename = "lpddr4_pmu_train_2d_imem.bin"; ++ size = <0x8000>; ++ }; ++ ++ blob_4: blob-ext@4 { ++ filename = "lpddr4_pmu_train_2d_dmem.bin"; ++ size = <0x4000>; ++ }; ++ }; ++ ++ flash { ++ filename = "spl.bin"; ++ ++ mkimage { ++ args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; ++ ++ blob { ++ filename = "u-boot-spl-ddr.bin"; ++ }; ++ }; ++ }; ++ ++ itb { ++ filename = "u-boot.itb"; ++ ++ fit { ++ description = "Configuration to load ATF before U-Boot"; ++ #address-cells = <1>; ++ fit,external-offset = ; ++ ++ images { ++ uboot { ++ description = "U-Boot (64-bit)"; ++ type = "standalone"; ++ arch = "arm64"; ++ compression = "none"; ++ load = ; ++ ++ uboot_blob: blob-ext { ++ filename = "u-boot-nodtb.bin"; ++ }; ++ }; ++ ++ atf { ++ description = "ARM Trusted Firmware"; ++ type = "firmware"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <0x920000>; ++ entry = <0x920000>; ++ ++ atf_blob: blob-ext { ++ filename = "bl31.bin"; ++ }; ++ }; ++ ++ tee { ++ description = "TEE firmware"; ++ type = "firmware"; ++ arch = "arm64"; ++ compression = "none"; ++ load = <0x56000000>; ++ entry = <0x56000000>; ++ ++ tee_blob: blob-ext { ++ filename = "tee.bin"; ++ }; ++ }; ++ ++ fdt { ++ description = "NAME"; ++ type = "flat_dt"; ++ compression = "none"; ++ ++ uboot_fdt_blob: blob-ext { ++ filename = "u-boot.dtb"; ++ }; ++ }; ++ }; ++ ++ configurations { ++ default = "conf"; ++ ++ conf { ++ description = "NAME"; ++ firmware = "uboot"; ++ loadables = "atf", "tee"; ++ fdt = "fdt"; ++ }; ++ }; ++ }; ++ }; ++ ++ imx-boot { ++ filename = "flash.bin"; ++ pad-byte = <0x00>; ++ ++ spl: blob-ext@1 { ++ filename = "spl.bin"; ++ offset = <0x0>; ++ }; ++ ++ uboot: blob-ext@2 { ++ filename = "u-boot.itb"; ++ offset = <0x57c00>; ++ }; ++ }; ++}; +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index 98cdae0d22..921b657f95 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -14,6 +14,7 @@ + + #include + #include "imx8mm.dtsi" ++#include "cpl-imx8m-mini-u-boot.dtsi" + + / { + chosen { +diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile +index 6ba353360b..a068b5aedf 100644 +--- a/arch/arm/mach-imx/Makefile ++++ b/arch/arm/mach-imx/Makefile +@@ -131,8 +131,7 @@ endif + DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi) + else ifeq ($(CONFIG_ARCH_IMX8M), y) + IMAGE_TYPE := imx8mimage +-IMX8M_DEPFILES := $(srctree)/tools/imx8m_image.sh +-DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG);if [ -f spl/u-boot-spl.cfgout ]; then $(IMX8M_DEPFILES) spl/u-boot-spl.cfgout 0; echo $$?; fi) ++DEPFILE_EXISTS := 0 + else + IMAGE_TYPE := imximage + DEPFILE_EXISTS := 0 +@@ -207,16 +206,18 @@ endif + + ifdef CONFIG_ARM64 + ifeq ($(CONFIG_ARCH_IMX8M), y) +-SPL: ++ ++SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE + + MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout \ + -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE) + flash.bin: MKIMAGEOUTPUT = flash.log + ++spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE ++ $(Q)mkdir -p $(dir $@) ++ $(call if_changed_dep,cpp_cfg) ++ + spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE +-ifeq ($(DEPFILE_EXISTS),0) +- $(IMX8M_DEPFILES) spl/u-boot-spl.cfgout 1 +-endif + + flash.bin: spl/u-boot-spl-ddr.bin u-boot.itb FORCE + $(call if_changed,mkimage) +diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig +index eac80a9989..08f5c5f039 100644 +--- a/arch/arm/mach-imx/imx8m/Kconfig ++++ b/arch/arm/mach-imx/imx8m/Kconfig +@@ -263,18 +263,21 @@ config TARGET_PHYCORE_IMX8MP + config TARGET_UCM_IMX8M_MINI + bool "CompuLab ucm-imx8m-mini" + select IMX8MM ++ select BINMAN + select SUPPORT_SPL + select IMX8M_LPDDR4 + + config TARGET_MCM_IMX8M_MINI + bool "CompuLab mcm-imx8m-mini" + select IMX8MM ++ select BINMAN + select SUPPORT_SPL + select IMX8M_LPDDR4 + + config TARGET_IOT_GATE_IMX8 + bool "CompuLab iot-gate-imx8" + select IMX8MM ++ select BINMAN + select SUPPORT_SPL + select IMX8M_LPDDR4 + +diff --git a/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg b/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg +new file mode 100644 +index 0000000000..b89092a559 +--- /dev/null ++++ b/board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg +@@ -0,0 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2021 NXP ++ */ ++ ++#define __ASSEMBLY__ ++ ++BOOT_FROM sd ++LOADER mkimage.flash.mkimage 0x7E1000 +diff --git a/configs/cl-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig +index 88c1a8e1bc..465522740b 100644 +--- a/configs/cl-imx8m-mini_defconfig ++++ b/configs/cl-imx8m-mini_defconfig +@@ -15,9 +15,9 @@ CONFIG_SPL_TEXT_BASE=0x7E1000 + CONFIG_FIT=y + CONFIG_FIT_EXTERNAL_OFFSET=0x3000 + CONFIG_SPL_LOAD_FIT=y +-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" ++# CONFIG_USE_SPL_FIT_GENERATOR is not set + CONFIG_OF_SYSTEM_SETUP=y +-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" ++CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/plat/imx8mm/imximage-8mm-lpddr4.cfg" + CONFIG_CONSOLE_MUX=y + CONFIG_BOARD_LATE_INIT=y + CONFIG_ARCH_MISC_INIT=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0102-defconfig-Enable-EFI_LOADER.patch b/recipes-bsp/u-boot/compulab/imx8mm/0102-defconfig-Enable-EFI_LOADER.patch new file mode 100644 index 0000000..f3bc542 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0102-defconfig-Enable-EFI_LOADER.patch @@ -0,0 +1,24 @@ +From a49ef120a82b2b7abbeb9a50c9ba5fdf0dddf38c Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Sun, 26 Dec 2021 16:41:16 +0200 +Subject: [PATCH 102/126] defconfig: Enable EFI_LOADER + +Signed-off-by: Valentin Raevsky +--- + configs/cl-imx8m-mini_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/configs/cl-imx8m-mini_defconfig b/configs/cl-imx8m-mini_defconfig +index 465522740b..a0442bf493 100644 +--- a/configs/cl-imx8m-mini_defconfig ++++ b/configs/cl-imx8m-mini_defconfig +@@ -103,6 +103,5 @@ CONFIG_VIDEO_IMX_SEC_DSI=y + CONFIG_EXT4_WRITE=y + CONFIG_FAT_WRITE=y + CONFIG_OF_LIBFDT_OVERLAY=y +-# CONFIG_EFI_LOADER is not set + CONFIG_LED=y + CONFIG_LED_GPIO=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0103-core-Add-EPFNOSUPPORT-handeler.patch b/recipes-bsp/u-boot/compulab/imx8mm/0103-core-Add-EPFNOSUPPORT-handeler.patch new file mode 100644 index 0000000..d3302cf --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0103-core-Add-EPFNOSUPPORT-handeler.patch @@ -0,0 +1,28 @@ +From 2a6551c7cb3d7259651b0b18efe49096ecd7ce41 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Sun, 26 Dec 2021 16:41:58 +0200 +Subject: [PATCH 103/126] core: Add EPFNOSUPPORT handeler + +Signed-off-by: Valentin Raevsky +--- + drivers/core/lists.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/core/lists.c b/drivers/core/lists.c +index e214306b90..38a6ada5f8 100644 +--- a/drivers/core/lists.c ++++ b/drivers/core/lists.c +@@ -248,6 +248,10 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, + log_debug("Driver '%s' refuses to bind\n", entry->name); + continue; + } ++ if (ret == -EPFNOSUPPORT) { ++ log_debug("Driver '%s' not supported\n", entry->name); ++ continue; ++ } + if (ret) { + dm_warn("Error binding driver '%s': %d\n", entry->name, + ret); +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0104-cpl-imx8m-mini-dts-remove-unrelevant-sections.patch b/recipes-bsp/u-boot/compulab/imx8mm/0104-cpl-imx8m-mini-dts-remove-unrelevant-sections.patch new file mode 100644 index 0000000..cfef4cb --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0104-cpl-imx8m-mini-dts-remove-unrelevant-sections.patch @@ -0,0 +1,231 @@ +From ab436599c6eeb8d87dc73851d32bc668a0505229 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 29 Dec 2021 17:43:37 +0200 +Subject: [PATCH 104/126] cpl-imx8m-mini: dts: remove unrelevant sections + +The file cpl-imx8m-mini.dtsi should include information regarding the +UCM-iMX8M-Mini module. + +Remove all the sections that are not relevant to the UCM-iMX8M-Mini +module. + +Signed-off-by: Uri Mashiach +--- + arch/arm/dts/cpl-imx8m-mini.dtsi | 148 --------------------------------------- + 1 file changed, 148 deletions(-) + +diff --git a/arch/arm/dts/cpl-imx8m-mini.dtsi b/arch/arm/dts/cpl-imx8m-mini.dtsi +index 921b657f95..248bdac51d 100644 +--- a/arch/arm/dts/cpl-imx8m-mini.dtsi ++++ b/arch/arm/dts/cpl-imx8m-mini.dtsi +@@ -44,26 +44,6 @@ + default-state = "on"; + }; + }; +- +- dsi_host: dsi-host { +- compatible = "samsung,sec-mipi-dsi"; +- status = "okay"; +- }; +- +- ili9881c_panel { +- compatible = "startek,ili9881c"; +- reset-gpio = <&pca9555 6 GPIO_ACTIVE_LOW>; +- dsi-lanes = <4>; +- panel-width-mm = <63>; +- panel-height-mm = <115>; +- status = "okay"; +- +- port { +- ili9881c_from_dsim: endpoint { +- remote-endpoint = <&ili9881c_to_dsim>; +- }; +- }; +- }; + }; + + &iomuxc { +@@ -73,7 +53,6 @@ + cpl-imx8m-mini { + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 + MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140 + MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140 + >; +@@ -99,18 +78,6 @@ + >; + }; + +- pinctrl_flexspi0: flexspi0grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4 +- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84 +- +- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84 +- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84 +- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84 +- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84 +- >; +- }; +- + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 +@@ -145,59 +112,6 @@ + >; + }; + +- +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 +- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 +- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 +- >; +- }; +- +- pinctrl_usdhc2_gpio: usdhc2grpgpio { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 +- MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 +- >; +- }; +- +- pinctrl_usdhc2: usdhc2grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 +@@ -265,13 +179,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +- +- pca9555:pca9555@20 { +- compatible = "nxp,pca9555"; +- gpio-controller; +- #gpio-cells = <2>; +- reg = <0x20>; +- }; + }; + + &i2c2 { +@@ -437,24 +344,6 @@ + status = "disabled"; + }; + +-&lcdif { +- display = <&display0>; +- status = "okay"; +- display0: display@0 { +- bits-per-pixel = <24>; +- bus-width = <24>; +- }; +-}; +- +-&mipi_dsi { +- status = "okay"; +- port@1 { +- ili9881c_to_dsim: endpoint { +- remote-endpoint = <&ili9881c_from_dsim>; +- }; +- }; +-}; +- + &fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; +@@ -477,25 +366,6 @@ + }; + }; + +-&uart3 { /* console */ +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart3>; +- status = "okay"; +-}; +- +-&usdhc2 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; +- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; +- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; +- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; +- bus-width = <4>; +- fsl,wp-controller; +- vmmc-supply = <®_usdhc2_vmmc>; +- no-1-8-v; +- status = "okay"; +-}; +- + &usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; +@@ -517,11 +387,6 @@ + arm-supply = <&buck2_reg>; + }; + +-&usbotg1 { +- dr_mode = "otg"; +- status = "okay"; +-}; +- + &usbotg2 { + dr_mode = "host"; + status = "okay"; +@@ -533,16 +398,3 @@ + &cpu_crit0 { + temperature = <115000>; + }; +- +-&lcdif { +- enable_polarity_low; +- /delete-property/ assigned-clocks; +- /delete-property/ assigned-clock-parents; +- /delete-property/ assigned-clock-rates; +-}; +- +-&mipi_dsi { +- /delete-property/ assigned-clocks; +- /delete-property/ assigned-clock-parents; +- /delete-property/ assigned-clock-rates; +-}; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0105-iot-gate-imx8-remove-driver-reset-functions.patch b/recipes-bsp/u-boot/compulab/imx8mm/0105-iot-gate-imx8-remove-driver-reset-functions.patch new file mode 100644 index 0000000..3d1e76f --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0105-iot-gate-imx8-remove-driver-reset-functions.patch @@ -0,0 +1,33 @@ +From 38c7411ba00661435ca66096eca8b5506550453b Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 11:00:16 +0200 +Subject: [PATCH 105/126] iot-gate-imx8: remove driver reset functions + +Signed-off-by: Uri Mashiach +--- + configs/iot-gate-imx8.config | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +index af0eed3983..f0b1f1caff 100644 +--- a/configs/iot-gate-imx8.config ++++ b/configs/iot-gate-imx8.config +@@ -1,12 +1,11 @@ + CONFIG_TARGET_IOT_GATE_IMX8=y +-CONFIG_DEFAULT_DTB="sb-iotgimx8-can.dtb" + CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" + CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" + CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" + CONFIG_DM_PCA953X=n +-CONFIG_DM_RESET=y +-CONFIG_SYSRESET=y +-CONFIG_SYSRESET_PSCI=y ++# CONFIG_DM_RESET is not set ++# CONFIG_SYSRESET is not set ++# CONFIG_SYSRESET_PSCI is not set + CONFIG_DM_VIDEO=n + CONFIG_SYS_WHITE_ON_BLACK=n + CONFIG_VIDEO_LCD_STARTEK_ILI9881C=n +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0106-iot-gate-imx8-dts-set-MMC1-voltage-to-1.8V.patch b/recipes-bsp/u-boot/compulab/imx8mm/0106-iot-gate-imx8-dts-set-MMC1-voltage-to-1.8V.patch new file mode 100644 index 0000000..1485bb6 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0106-iot-gate-imx8-dts-set-MMC1-voltage-to-1.8V.patch @@ -0,0 +1,52 @@ +From d5c3959954ffb8a7f9697bdf7b31980c8b68ce04 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 2 Aug 2020 14:10:10 +0300 +Subject: [PATCH 106/126] iot-gate-imx8: dts: set MMC1 voltage to 1.8V + +Signed-off-by: Uri Mashiach +--- + arch/arm/dts/iot-gate-imx8.dts | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/arch/arm/dts/iot-gate-imx8.dts b/arch/arm/dts/iot-gate-imx8.dts +index 6b6b2d69c7..fcaf9d0915 100644 +--- a/arch/arm/dts/iot-gate-imx8.dts ++++ b/arch/arm/dts/iot-gate-imx8.dts +@@ -29,6 +29,21 @@ + regulator-boot-on; + enable-active-high; + }; ++ ++ reg_usdhc2_vqmmc: regulator-usdhc2_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "usdhc2_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default"; ++ mmc-ddr-1_8v; ++ non-removable; ++ vqmmc-supply = <®_usdhc2_vqmmc>; + }; + + &usbotg1 { +@@ -40,6 +55,12 @@ + + &iomuxc { + sb-iotgimx8 { ++ pinctrl_usdhc2_gpio: usdhc2grpgpio { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ >; ++ }; ++ + pinctl_usb_gpio: usb_gpio_grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00 +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0107-iot-gate-imx8-usb-VBUS-enable-fix.patch b/recipes-bsp/u-boot/compulab/imx8mm/0107-iot-gate-imx8-usb-VBUS-enable-fix.patch new file mode 100644 index 0000000..419de8d --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0107-iot-gate-imx8-usb-VBUS-enable-fix.patch @@ -0,0 +1,57 @@ +From 5f656bdea51b83d0157693f691e2e9e569cba2e2 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Mon, 3 Aug 2020 14:06:48 +0300 +Subject: [PATCH 107/126] iot-gate-imx8: usb: VBUS enable fix + +The VBUS is enabled during the USB start process. +Some of the devices are not detected during the USB start process. + +Resolve the issue by enabling the VBUS before the USB start process. + +Signed-off-by: Uri Mashiach +--- + arch/arm/dts/iot-gate-imx8.dts | 16 ++++++++++------ + 1 file changed, 10 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/dts/iot-gate-imx8.dts b/arch/arm/dts/iot-gate-imx8.dts +index fcaf9d0915..46e304be78 100644 +--- a/arch/arm/dts/iot-gate-imx8.dts ++++ b/arch/arm/dts/iot-gate-imx8.dts +@@ -47,24 +47,28 @@ + }; + + &usbotg1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctl_usb_gpio>; ++ vbus-supply = <®_vusb_5v>; + dr_mode = "host"; + status = "okay"; + }; + + &iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ + sb-iotgimx8 { +- pinctrl_usdhc2_gpio: usdhc2grpgpio { ++ pinctrl_hog: hoggrp { + fsl,pins = < +- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ /* USB VBUS enable GPIO */ ++ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00 + >; + }; + +- pinctl_usb_gpio: usb_gpio_grp { ++ pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < +- MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00 ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 + >; + }; ++ + }; + }; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0108-imx8mm-enable-global-functions-implementation-in-sub.patch b/recipes-bsp/u-boot/compulab/imx8mm/0108-imx8mm-enable-global-functions-implementation-in-sub.patch new file mode 100644 index 0000000..787caf9 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0108-imx8mm-enable-global-functions-implementation-in-sub.patch @@ -0,0 +1,66 @@ +From d3e9f0489e8592ba87a2d1e3c06544fa74b9b706 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 11:12:13 +0200 +Subject: [PATCH 108/126] imx8mm: enable global functions implementation in + sub-projects + +Some of the global U-Boot function are implemented in the imx8mm board +file. +Add the ability to add sub-project code to the global functions. +The following global function was updated: +ft_board_setup +board_late_init + +Signed-off-by: Uri Mashiach +--- + board/compulab/plat/imx8mm/board/board.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index e0d10a87f7..871e7ecedb 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -138,11 +138,17 @@ static int fdt_set_env_addr(void *blob) + return 0; + } + ++__weak int sub_ft_board_setup(void *blob, struct bd_info *bd) ++{ ++ return 0; ++} ++ + int ft_board_setup(void *blob, struct bd_info *bd) + { + fdt_set_env_addr(blob); + fdt_set_sn(blob); +- return 0; ++ ++ return sub_ft_board_setup(blob, bd); + } + #endif + +@@ -373,6 +379,11 @@ static void board_bootdev_init(void) + env_set_ulong("bootdev", bootdev); + } + ++__weak int sub_board_late_init(void) ++{ ++ return 0; ++} ++ + int board_late_init(void) + { + int ret; +@@ -386,7 +397,8 @@ int board_late_init(void) + if (ret < 0) + printf("%s: Can't set MAC address\n", __func__); + +- return 0; ++ ret = sub_board_late_init(); ++ return ret; + } + + #ifdef CONFIG_FSL_FASTBOOT +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0109-iot-gate-imx8-RS485-232-selection.patch b/recipes-bsp/u-boot/compulab/imx8mm/0109-iot-gate-imx8-RS485-232-selection.patch new file mode 100644 index 0000000..a33b318 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0109-iot-gate-imx8-RS485-232-selection.patch @@ -0,0 +1,118 @@ +From 16ab9d36d92404c3c84c4573b9594a8fb8d2fd2b Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 30 Aug 2020 15:09:32 +0300 +Subject: [PATCH 109/126] iot-gate-imx8: RS485/232 selection + +The default operation mode of UART1 is RS485. +Update the operation mode of UART1 to RS232 if the U-Boot environment +"uart1_mode" is set to "rs232". + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 91 ++++++++++++++++++++++++++++ + 1 file changed, 91 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 6cafc259e9..78ed8bbf43 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -26,5 +26,96 @@ + #include + #include + #include ++#include + + DECLARE_GLOBAL_DATA_PTR; ++ ++#ifdef CONFIG_OF_BOARD_SETUP ++#define IOT_GATE_IMX8_DTB_UART1_MODE_GPIO_RS232 {0x29000000, \ ++0x1a000000, 0x01000000} ++#define IOT_GATE_IMX8_DTB_PINCTRL_UART1 { \ ++/* MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX */ \ ++0xb4010000, 0x1c040000, 0xf4040000, 0x04000000, 0x03000000, 0x40010000, \ ++/* MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX */ \ ++0xb0010000, 0x18040000, 0x00000000, 0x04000000, 0x00000000, 0x40010000, \ ++/* MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B */ \ ++0xbc010000, 0x24040000, 0x00000000, 0x04000000, 0x00000000, 0x40010000, \ ++/* MX8MM_IOMUXC_SAI2_RXD0_UART1_DTE_RTS_B */ \ ++0xb8010000, 0x20040000, 0xf0040000, 0x04000000, 0x02000000, 0x40010000 \ ++} ++#define IOT_GATE_IMX8_DTB_PATH_UART1_MODE "/regulator-uart1-mode" ++#define IOT_GATE_IMX8_DTB_PATH_UART1 "/soc@0/bus@30800000/serial@30860000" ++#define IOT_GATE_IMX8_DTB_PATH_PINCTRL_UART1 \ ++"/soc@0/bus@30000000/pinctrl@30330000/sb-iotgimx8/uart1grp" ++/* ++ * iot_gate_imx8_update_uart1_node() - update the device tree node uart1 ++ * The node is updated according to the requested UART mode: RS485 or RS232. ++ * ++ * @blob: ptr to device tree ++ */ ++static void iot_gate_imx8_update_uart1_node(void *blob) ++{ ++ int ret, nodeoffset; ++ char *env_uart_mode = env_get("uart_mode"); ++ u32 prop_data_gpio[] = IOT_GATE_IMX8_DTB_UART1_MODE_GPIO_RS232; ++ u32 prop_data_pinctrl_uart1[] = IOT_GATE_IMX8_DTB_PINCTRL_UART1; ++ ++ if (env_uart_mode == NULL || strcmp(env_uart_mode, "rs232")) ++ return; ++ ++ /* Update node regulator-uart1-mode */ ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE, "gpio", ++ prop_data_gpio, sizeof(prop_data_gpio), 0); ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE, "enable-active-low", ++ NULL, 0, 1); ++ nodeoffset = fdt_path_offset(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE); ++ if (nodeoffset < 0) { ++ printf("%s: failed to locate the offset of the node uart1 mode " ++ "regulator\n", __func__); ++ return; ++ } ++ ret = fdt_delprop(blob, nodeoffset, "enable-active-high"); ++ if (ret) ++ printf("%s: failed to delete property enable-active-high\n", ++ __func__); ++ ++ /* Update node uart1 */ ++ nodeoffset = fdt_path_offset(blob, IOT_GATE_IMX8_DTB_PATH_UART1); ++ if (nodeoffset < 0) { ++ printf("%s: failed to locate the offset of node uart1\n", ++ __func__); ++ return; ++ } ++ ret = fdt_delprop(blob, nodeoffset, "linux,rs485-enabled-at-boot-time"); ++ if (ret) ++ printf("%s: failed to delete property " ++ "linux,rs485-enabled-at-boot-time\n", __func__); ++ ret = fdt_delprop(blob, nodeoffset, "rts-gpios"); ++ if (ret) ++ printf("%s: failed to delete property rts-gpios\n", __func__); ++ ret = fdt_delprop(blob, nodeoffset, "rs485-rts-active-high"); ++ if (ret) ++ printf("%s: failed to delete property rs485-rts-active-high\n", __func__); ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART1, "fsl,uart-has-rtscts", ++ NULL, 0, 1); ++ ++ /* Update node pinctrl_uart1 */ ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_PINCTRL_UART1, ++ "fsl,pins", prop_data_pinctrl_uart1, 96, 0); ++} ++ ++/* ++ * sub_ft_board_setup() - IOT-GATE-iMX8 implementation of ft_board_setup ++ * ++ * @blob: ptr to device tree ++ * @bd: board information record ++ */ ++int sub_ft_board_setup(void *blob, struct bd_info *bd) ++{ ++ int ret=0; ++ ++ iot_gate_imx8_update_uart1_node(blob);/* Update dtb node uart1 */ ++ ++ return ret; ++} ++#endif /* CONFIG_OF_BOARD_SETUP */ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0110-iot-gate-imx8-add-extension-board-support.patch b/recipes-bsp/u-boot/compulab/imx8mm/0110-iot-gate-imx8-add-extension-board-support.patch new file mode 100644 index 0000000..27510a6 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0110-iot-gate-imx8-add-extension-board-support.patch @@ -0,0 +1,340 @@ +From 68d98ded0e9267daa77339f9aebd73f642b74b70 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 16 Aug 2020 16:56:47 +0300 +Subject: [PATCH 110/126] iot-gate-imx8: add extension board support + +Add the following features to support the extension board: +* Enable I2C 4 +* Enable the I2C GPIO extender. +* U-Boot pinmux configuration according to the detected extension board. +* Automatic kernel device tree selection. +* Kernel device tree update according to the detected extension board + configuration + +Signed-off-by: Uri Mashiach +--- + arch/arm/dts/iot-gate-imx8.dts | 21 +++ + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 249 +++++++++++++++++++++++++++ + configs/iot-gate-imx8.config | 2 + + 3 files changed, 272 insertions(+) + +diff --git a/arch/arm/dts/iot-gate-imx8.dts b/arch/arm/dts/iot-gate-imx8.dts +index 46e304be78..cf1629d10c 100644 +--- a/arch/arm/dts/iot-gate-imx8.dts ++++ b/arch/arm/dts/iot-gate-imx8.dts +@@ -39,6 +39,20 @@ + }; + }; + ++&i2c4 {/* Expansion connector I2C */ ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ gpio@22 { ++ compatible = "nxp,pca9555"; ++ reg = <0x22>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++}; ++ + &usdhc2 { + pinctrl-names = "default"; + mmc-ddr-1_8v; +@@ -64,6 +78,13 @@ + >; + }; + ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 78ed8bbf43..345a2e9063 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -30,7 +30,251 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++/* IOT_GATE-iMX8 extension boards ID */ ++typedef enum { ++ IOT_GATE_EXT_EMPTY, /* No extension */ ++ IOT_GATE_EXT_CAN, /* CAN bus */ ++ IOT_GATE_EXT_IED, /* Bridge */ ++} iot_gate_imx8_ext; ++ ++/* Sevice tree blob per extention board */ ++#define IOT_GATE_IMX8_DTB_NAME_SIZE 20 ++static char iot_gate_imx8_dtb[][IOT_GATE_IMX8_DTB_NAME_SIZE] = { ++ "sb-iotgimx8.dtb", ++ "sb-iotgimx8-can.dtb", ++ "sb-iotgimx8-ied.dtb", ++}; ++ ++#define IOT_GATE_IMX8_EXT_I2C 3 /* I2C ID of the extension board */ ++#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM 0x54 /* I2C address of the EEPROM */ ++#define IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO 0x22 /* I2C address of the GPIO ++ extender */ ++static int iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; /* Extension board ID */ ++/* ++ * iot_gate_imx8_detect_ext() - extended board detection ++ * The detection is done according to the detected I2C devices. ++ */ ++static void iot_gate_imx8_detect_ext(void) ++{ ++ int ret; ++ struct udevice *i2c_bus, *i2c_dev; ++ ++ ret = uclass_get_device_by_seq(UCLASS_I2C, IOT_GATE_IMX8_EXT_I2C, ++ &i2c_bus); ++ if (ret) { ++ printf("%s: Failed getting i2c device\n", __func__); ++ return; ++ } ++ ++ ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM, 0, ++ &i2c_dev); ++ if (ret) ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; ++ else {/* Only the bridge extension includes the GPIO extender */ ++ ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO, 0, ++ &i2c_dev); ++ if (ret) /* GPIO extender not detected */ ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_CAN; ++ else ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_IED; ++ ++ } ++} ++ ++#define IOT_GATE_IMX8_ENV_FDT_FILE "fdt_file" ++/* ++ * iot_gate_imx8_select_dtb() - select the kernel device tree blob ++ * The device tree blob is selected according to the detected extended board. ++ */ ++static void iot_gate_imx8_select_dtb(void) ++{ ++ char *env_fdt_file = env_get(IOT_GATE_IMX8_ENV_FDT_FILE); ++ ++ if (env_fdt_file == NULL) ++ env_set(IOT_GATE_IMX8_ENV_FDT_FILE, ++ iot_gate_imx8_dtb[iot_gate_imx8_ext_id]); ++} ++ ++static iomux_v3_cfg_t const iot_gate_imx8_ext_ied_pads[] = { ++ IMX8MM_PAD_NAND_ALE_GPIO3_IO0 | MUX_PAD_CTRL(PAD_CTL_PE), ++ IMX8MM_PAD_NAND_CE0_B_GPIO3_IO1 | MUX_PAD_CTRL(PAD_CTL_PE), ++ IMX8MM_PAD_NAND_DATA00_GPIO3_IO6 | MUX_PAD_CTRL(PAD_CTL_PE), ++ IMX8MM_PAD_NAND_DATA01_GPIO3_IO7 | MUX_PAD_CTRL(PAD_CTL_PE), ++ IMX8MM_PAD_NAND_DATA02_GPIO3_IO8 | MUX_PAD_CTRL(PAD_CTL_PE), ++ IMX8MM_PAD_NAND_DATA03_GPIO3_IO9 | MUX_PAD_CTRL(PAD_CTL_PE), ++}; ++/* Extension board bridge GPIOs */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_I0 IMX_GPIO_NR(3, 0) /* IN 0 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_I1 IMX_GPIO_NR(3, 1) /* IN 1 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_I2 IMX_GPIO_NR(3, 6) /* IN 2 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_I3 IMX_GPIO_NR(3, 7) /* IN 3 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_O0 IMX_GPIO_NR(3, 8) /* OUT 0 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_O1 IMX_GPIO_NR(3, 9) /* OUT 1 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_O2 IMX_GPIO_NR(6, 9) /* OUT 2 */ ++#define IOT_GATE_IMX8_GPIO_EXT_IED_O3 IMX_GPIO_NR(6, 10)/* OUT 3 */ ++/* ++ * iot_gate_imx8_update_pinmux() - update the pinmux ++ * Update the pinmux according to the detected extended board. ++ */ ++static void iot_gate_imx8_update_pinmux(void) ++{ ++ if (iot_gate_imx8_ext_id != IOT_GATE_EXT_IED) ++ return; ++ ++ imx_iomux_v3_setup_multiple_pads(iot_gate_imx8_ext_ied_pads, ++ ARRAY_SIZE(iot_gate_imx8_ext_ied_pads)); ++ ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I0, "ied-di4o4_i0"); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I0); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I1, "ied-di4o4_i1"); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I1); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I2, "ied-di4o4_i2"); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I2); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I3, "ied-di4o4_i3"); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I3); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O0, "ied-di4o4_o0"); ++ gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O0, 0); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O1, "ied-di4o4_o1"); ++ gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O1, 0); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O2, "ied-di4o4_o2"); ++ gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O2, 0); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O3, "ied-di4o4_o3"); ++ gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O3, 0); ++} ++ ++/* ++ * sub_board_late_init() - IOT-GATE-iMX8 implementation of board_late_init ++ */ ++int sub_board_late_init(void) ++{ ++ iot_gate_imx8_detect_ext(); /* Extended board detection */ ++ iot_gate_imx8_select_dtb(); /* Kernel device tree blob selection */ ++ iot_gate_imx8_update_pinmux(); ++ return 0; ++} ++ + #ifdef CONFIG_OF_BOARD_SETUP ++#define IOT_GATE_IMX8_GPIO_S0B0 IMX_GPIO_NR(6, 0) /* Slot ID slot 0 bit 0 */ ++#define IOT_GATE_IMX8_GPIO_S0B1 IMX_GPIO_NR(6, 1) /* Slot ID slot 0 bit 1 */ ++#define IOT_GATE_IMX8_GPIO_S0B2 IMX_GPIO_NR(6, 2) /* Slot ID slot 0 bit 2 */ ++#define IOT_GATE_IMX8_GPIO_S1B0 IMX_GPIO_NR(6, 3) /* Slot ID slot 1 bit 0 */ ++#define IOT_GATE_IMX8_GPIO_S1B1 IMX_GPIO_NR(6, 4) /* Slot ID slot 1 bit 1 */ ++#define IOT_GATE_IMX8_GPIO_S1B2 IMX_GPIO_NR(6, 5) /* Slot ID slot 1 bit 2 */ ++#define IOT_GATE_IMX8_GPIO_S2B0 IMX_GPIO_NR(6, 6) /* Slot ID slot 2 bit 0 */ ++#define IOT_GATE_IMX8_GPIO_S2B1 IMX_GPIO_NR(6, 7) /* Slot ID slot 2 bit 1 */ ++#define IOT_GATE_IMX8_GPIO_S2B2 IMX_GPIO_NR(6, 8) /* Slot ID slot 2 bit 2 */ ++#define IOT_GATE_IMX8_CARD_ID_EMPTY 0 /* card id - uninhabited */ ++#define IOT_GATE_IMX8_CARD_ID_DI4O4 1 /* Card ID - IED-DI4O4 */ ++#define IOT_GATE_IMX8_CARD_ID_RS_485 2 /* Card ID - IED-RS485 */ ++#define IOT_GATE_IMX8_CARD_ID_CAN 4 /* Card ID - IED-CAN */ ++#define IOT_GATE_IMX8_CARD_ID_RS_232 6 /* Card ID - IED-RS232 */ ++#define IOT_GATE_IMX8_DTB_PATH_UART2 "/soc@0/bus@30800000/serial@30890000" ++#define IOT_GATE_IMX8_DTB_PATH_UART4 "/soc@0/bus@30800000/serial@30a60000" ++#define IOT_GATE_IMX8_DTB_PATH_ECSPI2 "/soc@0/bus@30800000/spi@30830000" ++#define IOT_GATE_IMX8_DTB_PATH_ECSPI3 "/soc@0/bus@30800000/spi@30840000" ++/* ++ * iot_gate_imx8_update_ext_ied() ++ * Update device tree of the extended board IED-BASE. ++ * The device tree is updated according to the detected sub modules. ++ * ++ * @blob: ptr to device tree ++ * ++ * Return 0 for success, 1 for failure. ++ */ ++static int iot_gate_imx8_update_ext_ied(void *blob) ++{ ++ int revision; ++ ++ if (iot_gate_imx8_ext_id != IOT_GATE_EXT_IED) ++ return 0; ++ ++ /* ID GPIO initializations */ ++ if (gpio_request(IOT_GATE_IMX8_GPIO_S0B0, "id_s0b0") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S0B1, "id_s0b1") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S0B2, "id_s0b2") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S1B0, "id_s1b0") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S1B1, "id_s1b1") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S1B2, "id_s1b2") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S2B0, "id_s2b0") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S2B1, "id_s2b1") || ++ gpio_request(IOT_GATE_IMX8_GPIO_S2B2, "id_s2b2")) { ++ printf("%s: ID GPIO request failure\n", __func__); ++ return 1; ++ } ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B0); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B1); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B2); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B0); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B1); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B2); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B0); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B1); ++ gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B2); ++ ++ /* Get slot 0 card ID */ ++ revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S0B0) | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S0B1) << 1 | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S0B2) << 2; ++ /* Slot 0 device tree blob manipulation */ ++ switch (revision) ++ { ++ case IOT_GATE_IMX8_CARD_ID_EMPTY: ++ break; ++ case IOT_GATE_IMX8_CARD_ID_RS_485: ++ case IOT_GATE_IMX8_CARD_ID_RS_232: ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART2, "status", ++ "okay", sizeof("okay"), 1); ++ break; ++ case IOT_GATE_IMX8_CARD_ID_CAN: ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI2, "status", ++ "okay", sizeof("okay"), 1); ++ break; ++ default: ++ printf("%s: invalid slot 0 card ID: %d\n", __func__, revision); ++ return 1; ++ } ++ ++ /* Get slot 1 card ID */ ++ revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S1B0) | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S1B1) << 1 | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S1B2) << 2; ++ /* Slot 0 device tree blob manipulation */ ++ switch (revision) ++ { ++ case IOT_GATE_IMX8_CARD_ID_EMPTY: ++ break; ++ case IOT_GATE_IMX8_CARD_ID_RS_485: ++ case IOT_GATE_IMX8_CARD_ID_RS_232: ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART4, "status", ++ "okay", sizeof("okay"), 1); ++ break; ++ case IOT_GATE_IMX8_CARD_ID_CAN: ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI3, "status", ++ "okay", sizeof("okay"), 1); ++ break; ++ default: ++ printf("%s: invalid slot 1 card ID: %d\n", __func__, revision); ++ return 1; ++ } ++ ++ /* Get slot 2 card ID */ ++ revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S2B0) | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S2B1) << 1 | ++ gpio_get_value(IOT_GATE_IMX8_GPIO_S2B2) << 2; ++ /* Slot 0 device tree blob manipulation */ ++ switch (revision) ++ { ++ case IOT_GATE_IMX8_CARD_ID_EMPTY: ++ case IOT_GATE_IMX8_CARD_ID_DI4O4: ++ break; ++ default: ++ printf("%s: invalid slot 2 card ID: %d\n", __func__, revision); ++ return 1; ++ } ++ ++ return 0; ++} ++ + #define IOT_GATE_IMX8_DTB_UART1_MODE_GPIO_RS232 {0x29000000, \ + 0x1a000000, 0x01000000} + #define IOT_GATE_IMX8_DTB_PINCTRL_UART1 { \ +@@ -115,6 +359,11 @@ int sub_ft_board_setup(void *blob, struct bd_info *bd) + int ret=0; + + iot_gate_imx8_update_uart1_node(blob);/* Update dtb node uart1 */ ++ /* Update device tree of the extended board IED-BASE */ ++ ret = iot_gate_imx8_update_ext_ied(blob); ++ if (ret) ++ printf("%s: Failt to Update device tree of the extended boarda " ++ "IED-BASE\n", __func__); + + return ret; + } +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +index f0b1f1caff..cd722b89cf 100644 +--- a/configs/iot-gate-imx8.config ++++ b/configs/iot-gate-imx8.config +@@ -12,3 +12,5 @@ CONFIG_VIDEO_LCD_STARTEK_ILI9881C=n + CONFIG_VIDEO_IMX_SEC_DSI=n + CONFIG_LED=n + CONFIG_LED_GPIO=n ++CONFIG_CMD_PCA953X=y ++CONFIG_DM_PCA953X=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0111-iot-gate-imx8-update-boot-sequence.patch b/recipes-bsp/u-boot/compulab/imx8mm/0111-iot-gate-imx8-update-boot-sequence.patch new file mode 100644 index 0000000..00df27b --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0111-iot-gate-imx8-update-boot-sequence.patch @@ -0,0 +1,66 @@ +From c3e5aafe7b9f442eb4e052982c1ae3f6328c6979 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 16 Aug 2020 18:35:03 +0300 +Subject: [PATCH 111/126] iot-gate-imx8: update boot sequence + +Remove the SD card from the boot sequence. +Remove the network boot option. +Add boot messages. + +Signed-off-by: Uri Mashiach +--- + include/configs/iot-gate-imx8.h | 41 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 41 insertions(+) + +diff --git a/include/configs/iot-gate-imx8.h b/include/configs/iot-gate-imx8.h +index b3d6082a66..158f1c2aa0 100644 +--- a/include/configs/iot-gate-imx8.h ++++ b/include/configs/iot-gate-imx8.h +@@ -13,3 +13,44 @@ + #include "ucm-imx8m-mini_android.h" + #endif + #endif ++ ++#undef CONFIG_EXTRA_ENV_SETTINGS ++#undef CONFIG_BOOTCOMMAND ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ CONFIG_MFG_ENV_SETTINGS \ ++ "autoload=off\0" \ ++ "script=boot.scr\0" \ ++ "image=Image\0" \ ++ "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ ++ "fdt_addr=0x43000000\0" \ ++ "fdt_high=0xffffffffffffffff\0" \ ++ "initrd_high=0xffffffffffffffff\0" \ ++ "root_opt=rootwait rw\0" \ ++ "emmc_ul=setenv boot_dev_str eMMC; run boot_try_msg; " \ ++ "setenv iface mmc; setenv dev 2; setenv part 1;" \ ++ "setenv bootargs console=${console} root=/dev/mmcblk2p2 " \ ++ "${root_opt};\0" \ ++ "usb_ul=setenv boot_dev_str USB; run boot_try_msg; usb reset; " \ ++ "setenv iface usb; setenv dev 0; setenv part 1; " \ ++ "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ ++ "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ ++ "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ ++ "ulfdt=load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file};\0" \ ++ "bootscript=echo Running bootscript from ${boot_dev_str} ...; " \ ++ "source;\0" \ ++ "boot_try_msg=echo Trying to boot from ${boot_dev_str} ...;\0" ++#define CONFIG_BOOTCOMMAND \ ++ "for src in usb_ul emmc_ul; do " \ ++ "run ${src}; " \ ++ "if run ulbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run ulimage; then " \ ++ "if run ulfdt; then " \ ++ "echo Booting from ${boot_dev_str} script ...; " \ ++ "booti ${loadaddr} - ${fdt_addr}; " \ ++ "fi; " \ ++ "fi; " \ ++ "fi; " \ ++ "done; " +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0112-iot-gate-imx8-prevent-network-interfaces-rename.patch b/recipes-bsp/u-boot/compulab/imx8mm/0112-iot-gate-imx8-prevent-network-interfaces-rename.patch new file mode 100644 index 0000000..2972e5d --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0112-iot-gate-imx8-prevent-network-interfaces-rename.patch @@ -0,0 +1,50 @@ +From b749f8c3d8d0960c482b06f8ca90f59df00c5f55 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 30 Aug 2020 17:57:47 +0300 +Subject: [PATCH 112/126] iot-gate-imx8: prevent network interfaces rename + +Some of the Linux distributions are renaming the network interfaces +according to parameters like MAC address. + +Add a flag, to bootargs, to prevent the network interface rename. + +Signed-off-by: Uri Mashiach +--- + include/configs/iot-gate-imx8.h | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/include/configs/iot-gate-imx8.h b/include/configs/iot-gate-imx8.h +index 158f1c2aa0..9774949456 100644 +--- a/include/configs/iot-gate-imx8.h ++++ b/include/configs/iot-gate-imx8.h +@@ -17,23 +17,24 @@ + #undef CONFIG_EXTRA_ENV_SETTINGS + #undef CONFIG_BOOTCOMMAND + ++#define ENV_CONSOLE console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200 + #define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "autoload=off\0" \ + "script=boot.scr\0" \ + "image=Image\0" \ +- "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ + "fdt_addr=0x43000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "root_opt=rootwait rw\0" \ ++ "bootargs_common="__stringify(ENV_CONSOLE)" net.ifnames=0\0" \ + "emmc_ul=setenv boot_dev_str eMMC; run boot_try_msg; " \ + "setenv iface mmc; setenv dev 2; setenv part 1;" \ +- "setenv bootargs console=${console} root=/dev/mmcblk2p2 " \ ++ "setenv bootargs ${bootargs_common} root=/dev/mmcblk2p2 " \ + "${root_opt};\0" \ + "usb_ul=setenv boot_dev_str USB; run boot_try_msg; usb reset; " \ + "setenv iface usb; setenv dev 0; setenv part 1; " \ +- "setenv bootargs console=${console} root=/dev/sda2 ${root_opt};\0" \ ++ "setenv bootargs ${bootargs_common} root=/dev/sda2 ${root_opt};\0" \ + "ulbootscript=load ${iface} ${dev}:${part} ${loadaddr} ${script};\0" \ + "ulimage=load ${iface} ${dev}:${part} ${loadaddr} ${image}\0" \ + "ulfdt=load ${iface} ${dev}:${part} ${fdt_addr} ${fdt_file};\0" \ +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0113-iot-gate-imx8-update-prompt.patch b/recipes-bsp/u-boot/compulab/imx8mm/0113-iot-gate-imx8-update-prompt.patch new file mode 100644 index 0000000..882c4aa --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0113-iot-gate-imx8-update-prompt.patch @@ -0,0 +1,22 @@ +From 70e1dffa05d26cfcdae6a1aaa068c50e21537a48 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 11:52:26 +0200 +Subject: [PATCH 113/126] iot-gate-imx8: update prompt + +Signed-off-by: Uri Mashiach +--- + configs/iot-gate-imx8.config | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +index cd722b89cf..22d8f731e6 100644 +--- a/configs/iot-gate-imx8.config ++++ b/configs/iot-gate-imx8.config +@@ -14,3 +14,4 @@ CONFIG_LED=n + CONFIG_LED_GPIO=n + CONFIG_CMD_PCA953X=y + CONFIG_DM_PCA953X=y ++CONFIG_SYS_PROMPT="IOT-GATE-iMX8 => " +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0114-imx8mm-enable-prompt-update-in-sub-projects.patch b/recipes-bsp/u-boot/compulab/imx8mm/0114-imx8mm-enable-prompt-update-in-sub-projects.patch new file mode 100644 index 0000000..d47a4bb --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0114-imx8mm-enable-prompt-update-in-sub-projects.patch @@ -0,0 +1,26 @@ +From 5409c59351b40122304dccfa1131967d5108cb3d Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 16 Aug 2020 19:03:16 +0300 +Subject: [PATCH 114/126] imx8mm: enable prompt update in sub-projects + +Signed-off-by: Uri Mashiach +--- + include/configs/cpl-imx8m-mini.h | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index 9ef84842d0..33ff188614 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -202,8 +202,6 @@ + #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR + + /* Monitor Command Prompt */ +-#undef CONFIG_SYS_PROMPT +-#define CONFIG_SYS_PROMPT "u-boot=> " + #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + #define CONFIG_SYS_CBSIZE 2048 + #define CONFIG_SYS_MAXARGS 64 +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0115-iot-gate-imx8-hide-temperature-message.patch b/recipes-bsp/u-boot/compulab/imx8mm/0115-iot-gate-imx8-hide-temperature-message.patch new file mode 100644 index 0000000..d114f10 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0115-iot-gate-imx8-hide-temperature-message.patch @@ -0,0 +1,39 @@ +From e752fb5b7a8f227c8b18076d631d48225e712e1f Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 12:09:26 +0200 +Subject: [PATCH 115/126] iot-gate-imx8: hide temperature message + +The temperature message is generated during the U-Boot boot. + +Signed-off-by: Uri Mashiach +--- + arch/arm/mach-imx/cpu.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c +index 7fd58af068..334807db8d 100644 +--- a/arch/arm/mach-imx/cpu.c ++++ b/arch/arm/mach-imx/cpu.c +@@ -210,7 +210,8 @@ int print_cpuinfo(void) + + cpurev = get_cpu_rev(); + +-#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU) ++#if !defined(CONFIG_TARGET_IOT_GATE_IMX8) && \ ++ (defined(CONFIG_IMX_THERMAL) || defined(CONFIG_NXP_TMU)) + struct udevice *thermal_dev; + int cpu_tmp, minc, maxc, ret; + +@@ -233,7 +234,8 @@ int print_cpuinfo(void) + mxc_get_clock(MXC_ARM_CLK) / 1000000); + #endif + +-#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU) ++#if !defined(CONFIG_TARGET_IOT_GATE_IMX8) && \ ++ (defined(CONFIG_IMX_THERMAL) || defined(CONFIG_NXP_TMU)) + puts("CPU: "); + switch (get_cpu_temp_grade(&minc, &maxc)) { + case TEMP_AUTOMOTIVE: +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0116-iot-gate-imx8-fix-UART1-mode-GPIO.patch b/recipes-bsp/u-boot/compulab/imx8mm/0116-iot-gate-imx8-fix-UART1-mode-GPIO.patch new file mode 100644 index 0000000..e406f09 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0116-iot-gate-imx8-fix-UART1-mode-GPIO.patch @@ -0,0 +1,34 @@ +From 29a6255d7077ca2d839d93577f5bbdb7b67c9ab8 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 16 Sep 2020 16:19:44 +0300 +Subject: [PATCH 116/126] iot-gate-imx8: fix UART1 mode GPIO + +The operation mode of UART1 (RS232/RS485) is determined by the value of +a GPIO. The GPIO number is updated with the polarity of the GPIO. + +Verify that the GPIO number is not modified during the value update +operation. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 345a2e9063..d3a3e18223 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -308,6 +308,10 @@ static void iot_gate_imx8_update_uart1_node(void *blob) + return; + + /* Update node regulator-uart1-mode */ ++ prop_data_gpio[0]= ++ fdt_getprop_u32_default(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE, ++ "gpio", 0); ++ prop_data_gpio[0] = cpu_to_fdt32(prop_data_gpio[0]); + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE, "gpio", + prop_data_gpio, sizeof(prop_data_gpio), 0); + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_UART1_MODE, "enable-active-low", +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0117-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch b/recipes-bsp/u-boot/compulab/imx8mm/0117-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch new file mode 100644 index 0000000..734b1e6 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0117-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch @@ -0,0 +1,44 @@ +From c98f4f37f297c28014df78a57694806e84772bf0 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 8 Dec 2020 14:01:07 +0200 +Subject: [PATCH 117/126] iot-gate-imx8: add support for the IE-TPM module + +Module description: +TPM 2.0, implemented with Infineon SLB9670. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index d3a3e18223..bfac5b5ce8 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -166,6 +166,7 @@ int sub_board_late_init(void) + #define IOT_GATE_IMX8_CARD_ID_EMPTY 0 /* card id - uninhabited */ + #define IOT_GATE_IMX8_CARD_ID_DI4O4 1 /* Card ID - IED-DI4O4 */ + #define IOT_GATE_IMX8_CARD_ID_RS_485 2 /* Card ID - IED-RS485 */ ++#define IOT_GATE_IMX8_CARD_ID_TPM 3 /* Card ID - IED-TPM */ + #define IOT_GATE_IMX8_CARD_ID_CAN 4 /* Card ID - IED-CAN */ + #define IOT_GATE_IMX8_CARD_ID_RS_232 6 /* Card ID - IED-RS232 */ + #define IOT_GATE_IMX8_DTB_PATH_UART2 "/soc@0/bus@30800000/serial@30890000" +@@ -226,6 +227,7 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + "okay", sizeof("okay"), 1); + break; + case IOT_GATE_IMX8_CARD_ID_CAN: ++ case IOT_GATE_IMX8_CARD_ID_TPM: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI2, "status", + "okay", sizeof("okay"), 1); + break; +@@ -249,6 +251,7 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + "okay", sizeof("okay"), 1); + break; + case IOT_GATE_IMX8_CARD_ID_CAN: ++ case IOT_GATE_IMX8_CARD_ID_TPM: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI3, "status", + "okay", sizeof("okay"), 1); + break; +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0118-iot-gate-imx8-add-support-for-the-IE-POE-extension-b.patch b/recipes-bsp/u-boot/compulab/imx8mm/0118-iot-gate-imx8-add-support-for-the-IE-POE-extension-b.patch new file mode 100644 index 0000000..6b12b4a --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0118-iot-gate-imx8-add-support-for-the-IE-POE-extension-b.patch @@ -0,0 +1,79 @@ +From 0763d8ed25fbc8fd1e151f6893315a44adbaeae7 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 9 Dec 2020 11:41:49 +0200 +Subject: [PATCH 118/126] iot-gate-imx8: add support for the IE-POE extension + board + +The IE-POE extension board is detected by EEPROM address of 0x52. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 30 ++++++++++++++++++---------- + 1 file changed, 20 insertions(+), 10 deletions(-) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index bfac5b5ce8..7bfc78d96a 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -35,18 +35,22 @@ typedef enum { + IOT_GATE_EXT_EMPTY, /* No extension */ + IOT_GATE_EXT_CAN, /* CAN bus */ + IOT_GATE_EXT_IED, /* Bridge */ ++ IOT_GATE_EXT_POE, /* POE */ + } iot_gate_imx8_ext; + + /* Sevice tree blob per extention board */ +-#define IOT_GATE_IMX8_DTB_NAME_SIZE 20 ++#define IOT_GATE_IMX8_DTB_NAME_SIZE 21 + static char iot_gate_imx8_dtb[][IOT_GATE_IMX8_DTB_NAME_SIZE] = { + "sb-iotgimx8.dtb", + "sb-iotgimx8-can.dtb", + "sb-iotgimx8-ied.dtb", ++ "sb-iotgimx8-poed.dtb", + }; + + #define IOT_GATE_IMX8_EXT_I2C 3 /* I2C ID of the extension board */ + #define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM 0x54 /* I2C address of the EEPROM */ ++/* I2C address of the EEPROM in the POE extension */ ++#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE 0x52 + #define IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO 0x22 /* I2C address of the GPIO + extender */ + static int iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; /* Extension board ID */ +@@ -66,19 +70,25 @@ static void iot_gate_imx8_detect_ext(void) + return; + } + ++ ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE, 0, ++ &i2c_dev); ++ if (!ret) { ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_POE; ++ return; ++ } + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM, 0, + &i2c_dev); +- if (ret) ++ if (ret){ + iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; +- else {/* Only the bridge extension includes the GPIO extender */ +- ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO, 0, +- &i2c_dev); +- if (ret) /* GPIO extender not detected */ +- iot_gate_imx8_ext_id = IOT_GATE_EXT_CAN; +- else +- iot_gate_imx8_ext_id = IOT_GATE_EXT_IED; +- ++ return; + } ++ /* Only the bridge extension includes the GPIO extender */ ++ ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO, 0, ++ &i2c_dev); ++ if (ret) /* GPIO extender not detected */ ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_CAN; ++ else /* GPIO extender detected */ ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_IED; + } + + #define IOT_GATE_IMX8_ENV_FDT_FILE "fdt_file" +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0119-iot-gate-imx8-update-support-for-the-IE-TPM-module.patch b/recipes-bsp/u-boot/compulab/imx8mm/0119-iot-gate-imx8-update-support-for-the-IE-TPM-module.patch new file mode 100644 index 0000000..e1dddb2 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0119-iot-gate-imx8-update-support-for-the-IE-TPM-module.patch @@ -0,0 +1,61 @@ +From 723db998bf43ac37aa41850f0068ce5368d14eed Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 24 Jan 2021 14:09:29 +0200 +Subject: [PATCH 119/126] iot-gate-imx8: update support for the IE-TPM module + +The CAN and the TPM modules are 2 alternatives in slots A and B for the +SPI. +If CAN or TPM module is detected: +* The relevant SPI bus node is enabled in the device tree. +* The relevant TPM to CAN node is enabled in the device tree. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 7bfc78d96a..925f75807d 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -183,6 +183,11 @@ int sub_board_late_init(void) + #define IOT_GATE_IMX8_DTB_PATH_UART4 "/soc@0/bus@30800000/serial@30a60000" + #define IOT_GATE_IMX8_DTB_PATH_ECSPI2 "/soc@0/bus@30800000/spi@30830000" + #define IOT_GATE_IMX8_DTB_PATH_ECSPI3 "/soc@0/bus@30800000/spi@30840000" ++#define IOT_GATE_IMX8_DTB_PATH_CAN0 "/soc@0/bus@30800000/spi@30830000/can@0" ++#define IOT_GATE_IMX8_DTB_PATH_CAN1 "/soc@0/bus@30800000/spi@30840000/can@0" ++#define IOT_GATE_IMX8_DTB_PATH_TPM0 "/soc@0/bus@30800000/spi@30830000/tpm@0" ++#define IOT_GATE_IMX8_DTB_PATH_TPM1 "/soc@0/bus@30800000/spi@30840000/tpm@0" ++ + /* + * iot_gate_imx8_update_ext_ied() + * Update device tree of the extended board IED-BASE. +@@ -240,6 +245,12 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + case IOT_GATE_IMX8_CARD_ID_TPM: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI2, "status", + "okay", sizeof("okay"), 1); ++ if (revision == IOT_GATE_IMX8_CARD_ID_CAN) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_CAN0, "status", ++ "okay", sizeof("okay"), 1); ++ else if (revision == IOT_GATE_IMX8_CARD_ID_TPM) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_TPM0, "status", ++ "okay", sizeof("okay"), 1); + break; + default: + printf("%s: invalid slot 0 card ID: %d\n", __func__, revision); +@@ -264,6 +275,12 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + case IOT_GATE_IMX8_CARD_ID_TPM: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI3, "status", + "okay", sizeof("okay"), 1); ++ if (revision == IOT_GATE_IMX8_CARD_ID_CAN) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_CAN1, "status", ++ "okay", sizeof("okay"), 1); ++ else if (revision == IOT_GATE_IMX8_CARD_ID_TPM) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_TPM1, "status", ++ "okay", sizeof("okay"), 1); + break; + default: + printf("%s: invalid slot 1 card ID: %d\n", __func__, revision); +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0120-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch b/recipes-bsp/u-boot/compulab/imx8mm/0120-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch new file mode 100644 index 0000000..c3f41d0 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0120-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch @@ -0,0 +1,78 @@ +From ef7428759ef535ef5283e7ab9fca8d8af3a7a96a Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 24 Jan 2021 14:42:07 +0200 +Subject: [PATCH 120/126] iot-gate-imx8: add support for the IE-CL420 module + +The IE-CL420 implements one channel ADC. + +The CAN, TPM and the CL420 modules are 3 alternatives in the board +IED-BASE, slots A and B for the SPI bus. +If CAN, TPM or CL420 module is detected: +* The relevant SPI bus node is enabled in the device tree. +* The relevant TPM, CAN, or ADC node is enabled in the device tree. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 925f75807d..06771c0e84 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -178,6 +178,7 @@ int sub_board_late_init(void) + #define IOT_GATE_IMX8_CARD_ID_RS_485 2 /* Card ID - IED-RS485 */ + #define IOT_GATE_IMX8_CARD_ID_TPM 3 /* Card ID - IED-TPM */ + #define IOT_GATE_IMX8_CARD_ID_CAN 4 /* Card ID - IED-CAN */ ++#define IOT_GATE_IMX8_CARD_ID_CL420 5 /* Card ID - IED-CL420 */ + #define IOT_GATE_IMX8_CARD_ID_RS_232 6 /* Card ID - IED-RS232 */ + #define IOT_GATE_IMX8_DTB_PATH_UART2 "/soc@0/bus@30800000/serial@30890000" + #define IOT_GATE_IMX8_DTB_PATH_UART4 "/soc@0/bus@30800000/serial@30a60000" +@@ -187,6 +188,8 @@ int sub_board_late_init(void) + #define IOT_GATE_IMX8_DTB_PATH_CAN1 "/soc@0/bus@30800000/spi@30840000/can@0" + #define IOT_GATE_IMX8_DTB_PATH_TPM0 "/soc@0/bus@30800000/spi@30830000/tpm@0" + #define IOT_GATE_IMX8_DTB_PATH_TPM1 "/soc@0/bus@30800000/spi@30840000/tpm@0" ++#define IOT_GATE_IMX8_DTB_PATH_ADC0 "/soc@0/bus@30800000/spi@30830000/adc@0" ++#define IOT_GATE_IMX8_DTB_PATH_ADC1 "/soc@0/bus@30800000/spi@30840000/adc@0" + + /* + * iot_gate_imx8_update_ext_ied() +@@ -243,6 +246,7 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + break; + case IOT_GATE_IMX8_CARD_ID_CAN: + case IOT_GATE_IMX8_CARD_ID_TPM: ++ case IOT_GATE_IMX8_CARD_ID_CL420: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI2, "status", + "okay", sizeof("okay"), 1); + if (revision == IOT_GATE_IMX8_CARD_ID_CAN) +@@ -251,6 +255,9 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + else if (revision == IOT_GATE_IMX8_CARD_ID_TPM) + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_TPM0, "status", + "okay", sizeof("okay"), 1); ++ else if (revision == IOT_GATE_IMX8_CARD_ID_CL420) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ADC0, "status", ++ "okay", sizeof("okay"), 1); + break; + default: + printf("%s: invalid slot 0 card ID: %d\n", __func__, revision); +@@ -273,6 +280,7 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + break; + case IOT_GATE_IMX8_CARD_ID_CAN: + case IOT_GATE_IMX8_CARD_ID_TPM: ++ case IOT_GATE_IMX8_CARD_ID_CL420: + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ECSPI3, "status", + "okay", sizeof("okay"), 1); + if (revision == IOT_GATE_IMX8_CARD_ID_CAN) +@@ -281,6 +289,9 @@ static int iot_gate_imx8_update_ext_ied(void *blob) + else if (revision == IOT_GATE_IMX8_CARD_ID_TPM) + do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_TPM1, "status", + "okay", sizeof("okay"), 1); ++ else if (revision == IOT_GATE_IMX8_CARD_ID_CL420) ++ do_fixup_by_path(blob, IOT_GATE_IMX8_DTB_PATH_ADC1, "status", ++ "okay", sizeof("okay"), 1); + break; + default: + printf("%s: invalid slot 1 card ID: %d\n", __func__, revision); +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0121-iot-gate-imx8-add-support-for-the-POEv2-module.patch b/recipes-bsp/u-boot/compulab/imx8mm/0121-iot-gate-imx8-add-support-for-the-POEv2-module.patch new file mode 100644 index 0000000..a6fae61 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0121-iot-gate-imx8-add-support-for-the-POEv2-module.patch @@ -0,0 +1,98 @@ +From 0bb2585f8bcc062bf3de225f3074447f1b5919df Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 12 May 2021 10:58:28 +0300 +Subject: [PATCH 121/126] iot-gate-imx8: add support for the POEv2 module + +The POE module implements a USB to Ethernet. +A USB MUX on the baseboard is set to route one of the USB interfaces to +the module, disabling one of the external USB interfaces. + +Signed-off-by: Uri Mashiach +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 30 ++++++++++++++++++++++++++-- + 1 file changed, 28 insertions(+), 2 deletions(-) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index 06771c0e84..ea183f4b09 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -36,21 +36,24 @@ typedef enum { + IOT_GATE_EXT_CAN, /* CAN bus */ + IOT_GATE_EXT_IED, /* Bridge */ + IOT_GATE_EXT_POE, /* POE */ ++ IOT_GATE_EXT_POEV2, /* POEv2 */ + } iot_gate_imx8_ext; + + /* Sevice tree blob per extention board */ +-#define IOT_GATE_IMX8_DTB_NAME_SIZE 21 ++#define IOT_GATE_IMX8_DTB_NAME_SIZE 25 + static char iot_gate_imx8_dtb[][IOT_GATE_IMX8_DTB_NAME_SIZE] = { + "sb-iotgimx8.dtb", + "sb-iotgimx8-can.dtb", + "sb-iotgimx8-ied.dtb", + "sb-iotgimx8-poed.dtb", ++ "sb-iotgimx8-poedv2.dtb", + }; + + #define IOT_GATE_IMX8_EXT_I2C 3 /* I2C ID of the extension board */ + #define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM 0x54 /* I2C address of the EEPROM */ + /* I2C address of the EEPROM in the POE extension */ +-#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE 0x52 ++#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE 0x50 ++#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POEV2 0x51 + #define IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO 0x22 /* I2C address of the GPIO + extender */ + static int iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; /* Extension board ID */ +@@ -76,6 +79,14 @@ static void iot_gate_imx8_detect_ext(void) + iot_gate_imx8_ext_id = IOT_GATE_EXT_POE; + return; + } ++ ++ ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POEV2, 0, ++ &i2c_dev); ++ if (!ret) { ++ iot_gate_imx8_ext_id = IOT_GATE_EXT_POEV2; ++ return; ++ } ++ + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM, 0, + &i2c_dev); + if (ret){ +@@ -113,6 +124,10 @@ static iomux_v3_cfg_t const iot_gate_imx8_ext_ied_pads[] = { + IMX8MM_PAD_NAND_DATA02_GPIO3_IO8 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_DATA03_GPIO3_IO9 | MUX_PAD_CTRL(PAD_CTL_PE), + }; ++static iomux_v3_cfg_t const iot_gate_imx8_ext_poev2_pads[] = { ++ IMX8MM_PAD_SAI3_TXD_GPIO5_IO1 | MUX_PAD_CTRL(PAD_CTL_PE | ++ PAD_CTL_PUE), ++}; + /* Extension board bridge GPIOs */ + #define IOT_GATE_IMX8_GPIO_EXT_IED_I0 IMX_GPIO_NR(3, 0) /* IN 0 */ + #define IOT_GATE_IMX8_GPIO_EXT_IED_I1 IMX_GPIO_NR(3, 1) /* IN 1 */ +@@ -122,12 +137,23 @@ static iomux_v3_cfg_t const iot_gate_imx8_ext_ied_pads[] = { + #define IOT_GATE_IMX8_GPIO_EXT_IED_O1 IMX_GPIO_NR(3, 9) /* OUT 1 */ + #define IOT_GATE_IMX8_GPIO_EXT_IED_O2 IMX_GPIO_NR(6, 9) /* OUT 2 */ + #define IOT_GATE_IMX8_GPIO_EXT_IED_O3 IMX_GPIO_NR(6, 10)/* OUT 3 */ ++/* Extension board POE GPIOs */ ++#define IOT_GATE_IMX8_GPIO_EXT_POE_MUX IMX_GPIO_NR(5, 1)/* USB_MUX */ + /* + * iot_gate_imx8_update_pinmux() - update the pinmux + * Update the pinmux according to the detected extended board. + */ + static void iot_gate_imx8_update_pinmux(void) + { ++ if (iot_gate_imx8_ext_id == IOT_GATE_EXT_POEV2) { ++ imx_iomux_v3_setup_multiple_pads(iot_gate_imx8_ext_poev2_pads, ++ ARRAY_SIZE(iot_gate_imx8_ext_poev2_pads)); ++ gpio_request(IOT_GATE_IMX8_GPIO_EXT_POE_MUX, "poev2_usb-mux"); ++ /* Update USB MUX state */ ++ gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_POE_MUX, 1); ++ ++ return; ++ } + if (iot_gate_imx8_ext_id != IOT_GATE_EXT_IED) + return; + +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0122-iot-gate-imx8-enable-USB-to-Ethernet-driver-SMSC-LAN.patch b/recipes-bsp/u-boot/compulab/imx8mm/0122-iot-gate-imx8-enable-USB-to-Ethernet-driver-SMSC-LAN.patch new file mode 100644 index 0000000..d50452d --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0122-iot-gate-imx8-enable-USB-to-Ethernet-driver-SMSC-LAN.patch @@ -0,0 +1,26 @@ +From 9b96cc5ac3ea204f39a5ccafd96b842585a9b50c Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 12:35:01 +0200 +Subject: [PATCH 122/126] iot-gate-imx8: enable USB to Ethernet driver SMSC + LAN95xx + +The relevant interfaces are used in the baseboard and in the POEv2 +extension module. + +Signed-off-by: Uri Mashiach +--- + configs/iot-gate-imx8.config | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +index 22d8f731e6..d92f2866f8 100644 +--- a/configs/iot-gate-imx8.config ++++ b/configs/iot-gate-imx8.config +@@ -15,3 +15,4 @@ CONFIG_LED_GPIO=n + CONFIG_CMD_PCA953X=y + CONFIG_DM_PCA953X=y + CONFIG_SYS_PROMPT="IOT-GATE-iMX8 => " ++CONFIG_USB_ETHER_SMSC95XX=y +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0123-cmd-eeprom-fix-disregarding-of-the-i2c_bus-parameter.patch b/recipes-bsp/u-boot/compulab/imx8mm/0123-cmd-eeprom-fix-disregarding-of-the-i2c_bus-parameter.patch new file mode 100644 index 0000000..fd0b428 --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0123-cmd-eeprom-fix-disregarding-of-the-i2c_bus-parameter.patch @@ -0,0 +1,275 @@ +From 36a4e6d6d41a1072021f6b1501a87812e5d8843b Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 30 Dec 2021 10:51:48 +0200 +Subject: [PATCH 123/126] cmd: eeprom: fix disregarding of the i2c_bus + parameter + +The eeprom commands are disregarding the i2c_bus parameter if +CONFIG_SYS_I2C_EEPROM_BUS is defined - setting the i2c bus to +CONFIG_SYS_I2C_EEPROM_BUS. + +Add parameter set_bus to the functions eeprom_read() and +eeprom_write(). +If set_bus parameter equals 1, the functions operation remains the +same. +If set_bus parameter equals 0, the functions doesn't set the i2c bus. + +Signed-off-by: Uri Mashiach +--- + board/corscience/tricorder/tricorder-eeprom.c | 6 ++---- + board/freescale/mpc8323erdb/mpc8323erdb.c | 3 ++- + board/kosagi/novena/novena.c | 3 ++- + board/softing/vining_fpga/socfpga.c | 3 ++- + cmd/eeprom.c | 24 +++++++++++++----------- + env/eeprom.c | 22 ++++++++++------------ + include/configs/tam3517-common.h | 3 ++- + include/eeprom.h | 10 ++++++---- + 8 files changed, 39 insertions(+), 35 deletions(-) + +diff --git a/board/corscience/tricorder/tricorder-eeprom.c b/board/corscience/tricorder/tricorder-eeprom.c +index 192af304d9..0968fc5734 100644 +--- a/board/corscience/tricorder/tricorder-eeprom.c ++++ b/board/corscience/tricorder/tricorder-eeprom.c +@@ -167,15 +167,13 @@ int tricorder_eeprom_write(unsigned devaddr, const char *name, + print_buffer(0, &eeprom, 1, sizeof(eeprom), 16); + #endif + +- eeprom_init(CONFIG_SYS_EEPROM_BUS_NUM); +- + ret = eeprom_write(devaddr, 0, (unsigned char *)&eeprom, +- TRICORDER_EEPROM_SIZE); ++ TRICORDER_EEPROM_SIZE, CONFIG_SYS_EEPROM_BUS_NUM); + if (ret) + printf("Tricorder: Could not write EEPROM content!\n"); + + ret = eeprom_read(devaddr, 0, (unsigned char *)&eeprom_verify, +- TRICORDER_EEPROM_SIZE); ++ TRICORDER_EEPROM_SIZE, CONFIG_SYS_EEPROM_BUS_NUM); + if (ret) + printf("Tricorder: Could not read EEPROM content!\n"); + +diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c +index cef3216a6f..0d11ef25a8 100644 +--- a/board/freescale/mpc8323erdb/mpc8323erdb.c ++++ b/board/freescale/mpc8323erdb/mpc8323erdb.c +@@ -204,7 +204,8 @@ int mac_read_from_eeprom(void) + unsigned char enetvar[32]; + + /* Read MAC addresses from EEPROM */ +- if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_MAC_OFFSET, buf, 28)) { ++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_MAC_OFFSET, ++ buf, 28, , CONFIG_SYS_EEPROM_BUS_NUM)) { + printf("\nEEPROM @ 0x%02x read FAILED!!!\n", + CONFIG_SYS_I2C_EEPROM_ADDR); + } else { +diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c +index 0e1b4a0a46..3379f87270 100644 +--- a/board/kosagi/novena/novena.c ++++ b/board/kosagi/novena/novena.c +@@ -214,7 +214,8 @@ int misc_init_r(void) + } + + /* EEPROM is at address 0x56. */ +- ret = eeprom_read(0x56, 0, datap, sizeof(data)); ++ ret = eeprom_read(0x56, 0, datap, sizeof(data), ++ CONFIG_SYS_EEPROM_BUS_NUM); + if (ret) { + puts("Cannot read I2C EEPROM.\n"); + return 0; +diff --git a/board/softing/vining_fpga/socfpga.c b/board/softing/vining_fpga/socfpga.c +index aaedf03450..393c78e074 100644 +--- a/board/softing/vining_fpga/socfpga.c ++++ b/board/softing/vining_fpga/socfpga.c +@@ -59,7 +59,8 @@ int misc_init_r(void) + int ret; + + /* EEPROM is at address 0x50 (at bus CONFIG_SYS_EEPROM_BUS_NUM). */ +- ret = eeprom_read(0x50, 0, data, sizeof(data)); ++ ret = eeprom_read(0x50, 0, data, sizeof(data), ++ CONFIG_SYS_EEPROM_BUS_NUM); + if (ret) { + puts("Cannot read I2C EEPROM.\n"); + return 0; +diff --git a/cmd/eeprom.c b/cmd/eeprom.c +index b3fd37c827..bbd50a14fa 100644 +--- a/cmd/eeprom.c ++++ b/cmd/eeprom.c +@@ -162,7 +162,7 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen, + } + + static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer, +- unsigned cnt, bool read) ++ unsigned cnt, bool read, int set_bus) + { + unsigned end = offset + cnt; + unsigned alen, len; +@@ -170,7 +170,8 @@ static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer, + uchar addr[3]; + + #if defined(CONFIG_SYS_I2C_EEPROM_BUS) +- eeprom_init(CONFIG_SYS_I2C_EEPROM_BUS); ++ if (set_bus) ++ eeprom_init(CONFIG_SYS_I2C_EEPROM_BUS); + #endif + + while (offset < end) { +@@ -190,18 +191,19 @@ static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer, + return rcode; + } + +-int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) ++int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt, ++ int set_bus) + { + /* + * Read data until done or would cross a page boundary. + * We must write the address again when changing pages + * because the next page may be in a different device. + */ +- return eeprom_rw(dev_addr, offset, buffer, cnt, 1); ++ return eeprom_rw(dev_addr, offset, buffer, cnt, 1, set_bus); + } + + int eeprom_write(unsigned dev_addr, unsigned offset, +- uchar *buffer, unsigned cnt) ++ uchar *buffer, unsigned cnt, int set_bus) + { + int ret; + +@@ -212,7 +214,7 @@ int eeprom_write(unsigned dev_addr, unsigned offset, + * We must write the address again when changing pages + * because the address counter only increments within a page. + */ +- ret = eeprom_rw(dev_addr, offset, buffer, cnt, 0); ++ ret = eeprom_rw(dev_addr, offset, buffer, cnt, 0, set_bus); + + eeprom_write_enable(dev_addr, 0); + return ret; +@@ -316,26 +318,25 @@ static int eeprom_execute_command(enum eeprom_action action, int i2c_bus, + + if (action == EEPROM_ACTION_INVALID) + return CMD_RET_USAGE; +- + eeprom_init(i2c_bus); + if (action == EEPROM_READ) { + printf(fmt, i2c_addr, "read", addr, off, cnt); + +- rcode = eeprom_read(i2c_addr, off, (uchar *)addr, cnt); ++ rcode = eeprom_read(i2c_addr, off, (uchar *)addr, cnt, 0); + + puts("done\n"); + return rcode; + } else if (action == EEPROM_WRITE) { + printf(fmt, i2c_addr, "write", addr, off, cnt); + +- rcode = eeprom_write(i2c_addr, off, (uchar *)addr, cnt); ++ rcode = eeprom_write(i2c_addr, off, (uchar *)addr, cnt, 0); + + puts("done\n"); + return rcode; + } + + #ifdef CONFIG_CMD_EEPROM_LAYOUT +- rcode = eeprom_read(i2c_addr, 0, eeprom_buf, CONFIG_SYS_EEPROM_SIZE); ++ rcode = eeprom_read(i2c_addr, 0, eeprom_buf, CONFIG_SYS_EEPROM_SIZE, 0); + if (rcode < 0) + return rcode; + +@@ -349,7 +350,8 @@ static int eeprom_execute_command(enum eeprom_action action, int i2c_bus, + + layout.update(&layout, key, value); + +- rcode = eeprom_write(i2c_addr, 0, layout.data, CONFIG_SYS_EEPROM_SIZE); ++ rcode = eeprom_write(i2c_addr, 0, layout.data, CONFIG_SYS_EEPROM_SIZE, ++ 0); + #endif + + return rcode; +diff --git a/env/eeprom.c b/env/eeprom.c +index 1f36917a00..f30387877c 100644 +--- a/env/eeprom.c ++++ b/env/eeprom.c +@@ -31,14 +31,13 @@ static int eeprom_bus_read(unsigned dev_addr, unsigned offset, + #if defined(CONFIG_I2C_ENV_EEPROM_BUS) + int old_bus = i2c_get_bus_num(); + +- if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS) +- i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS); +-#endif +- +- rcode = eeprom_read(dev_addr, offset, buffer, cnt); ++ rcode = eeprom_read(dev_addr, offset, buffer, cnt, ++ CONFIG_I2C_ENV_EEPROM_BUS); + +-#if defined(CONFIG_I2C_ENV_EEPROM_BUS) + i2c_set_bus_num(old_bus); ++#else ++ rcode = eeprom_read(dev_addr, offset, buffer, cnt, ++ CONFIG_SYS_EEPROM_BUS_NUM); + #endif + + return rcode; +@@ -51,14 +50,13 @@ static int eeprom_bus_write(unsigned dev_addr, unsigned offset, + #if defined(CONFIG_I2C_ENV_EEPROM_BUS) + int old_bus = i2c_get_bus_num(); + +- if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS) +- i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS); +-#endif +- +- rcode = eeprom_write(dev_addr, offset, buffer, cnt); ++ rcode = eeprom_write(dev_addr, offset, buffer, cnt, ++ CONFIG_I2C_ENV_EEPROM_BUS); + +-#if defined(CONFIG_I2C_ENV_EEPROM_BUS) + i2c_set_bus_num(old_bus); ++#else ++ rcode = eeprom_write(dev_addr, offset, buffer, cnt, ++ CONFIG_SYS_EEPROM_BUS_NUM); + #endif + + return rcode; +diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h +index afc9adbe12..834f04b513 100644 +--- a/include/configs/tam3517-common.h ++++ b/include/configs/tam3517-common.h +@@ -251,7 +251,8 @@ struct tam3517_module_info { + do { \ + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ + if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ +- (void *)info, sizeof(*info))) \ ++ (void *)info, sizeof(*info), \ ++ CONFIG_SYS_EEPROM_BUS_NUM)) \ + ret = 1; \ + else \ + ret = 0; \ +diff --git a/include/eeprom.h b/include/eeprom.h +index 6820844cea..31a0872858 100644 +--- a/include/eeprom.h ++++ b/include/eeprom.h +@@ -9,16 +9,18 @@ + + #if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM) + void eeprom_init(int bus); +-int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt); +-int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); ++int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt, ++ int set_bus); ++int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt, ++ int set_bus); + #else + /* + * Some EEPROM code is depecated because it used the legacy I2C interface. Add + * some macros here so we don't have to touch every one of those uses + */ + #define eeprom_init(bus) +-#define eeprom_read(dev_addr, offset, buffer, cnt) (-ENOSYS) +-#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS) ++#define eeprom_read(dev_addr, offset, buffer, cnt, set_bus) (-ENOSYS) ++#define eeprom_write(dev_addr, offset, buffer, cnt, set_bus) (-ENOSYS) + #endif + + #if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0124-Enable-SoC-info-export-via-fdt.patch b/recipes-bsp/u-boot/compulab/imx8mm/0124-Enable-SoC-info-export-via-fdt.patch new file mode 100644 index 0000000..b968aab --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0124-Enable-SoC-info-export-via-fdt.patch @@ -0,0 +1,59 @@ +From 6af40f74ed179d5e10181b69c515b02baf304d06 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Tue, 1 Feb 2022 17:45:23 +0200 +Subject: [PATCH 124/126] Enable SoC info export via fdt + +Store the SOC type and revision in the following device tree nodes: +soc.info/imx.type +soc.info/imx.rev + +Signed-off-by: Kirill Kapranov +--- + board/compulab/iot-gate-imx8/iot-gate-imx8.c | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +diff --git a/board/compulab/iot-gate-imx8/iot-gate-imx8.c b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +index ea183f4b09..95924884c5 100644 +--- a/board/compulab/iot-gate-imx8/iot-gate-imx8.c ++++ b/board/compulab/iot-gate-imx8/iot-gate-imx8.c +@@ -420,6 +420,29 @@ static void iot_gate_imx8_update_uart1_node(void *blob) + } + + /* ++ * iot_gate_imx8_fdt_set_soc_info() - store SOC information in the device tree ++ * ++ * @blob: ptr to device tree ++ */ ++static int iot_gate_imx8_fdt_set_soc_info(void *blob) ++{ ++ char tmp[128]; ++ u32 cpurev = get_cpu_rev(); ++ ++ int nodeoff = fdt_add_subnode(blob, 0, "soc.info"); ++ if(0 > nodeoff) ++ return nodeoff; ++ ++ fdt_setprop(blob, nodeoff, "imx.type", tmp, ++ sprintf(tmp, "i.MX%s", get_imx_type ++ ((cpurev & 0x1FF000) >> 12))); ++ fdt_setprop(blob, nodeoff, "imx.rev", tmp, ++ sprintf(tmp, "%d.%d", (cpurev & 0x000F0) >>4, cpurev & 0x0000F)); ++ ++ return 0; ++} ++ ++/* + * sub_ft_board_setup() - IOT-GATE-iMX8 implementation of ft_board_setup + * + * @blob: ptr to device tree +@@ -429,6 +452,7 @@ int sub_ft_board_setup(void *blob, struct bd_info *bd) + { + int ret=0; + ++ iot_gate_imx8_fdt_set_soc_info(blob); + iot_gate_imx8_update_uart1_node(blob);/* Update dtb node uart1 */ + /* Update device tree of the extended board IED-BASE */ + ret = iot_gate_imx8_update_ext_ied(blob); +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0125-imx8mm-net-enable-phy-Realtek-RTL8211E.patch b/recipes-bsp/u-boot/compulab/imx8mm/0125-imx8mm-net-enable-phy-Realtek-RTL8211E.patch new file mode 100644 index 0000000..68cdeaf --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0125-imx8mm-net-enable-phy-Realtek-RTL8211E.patch @@ -0,0 +1,173 @@ +From 7a23850a2821866294f1d2b59cbd4270b95faef1 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 7 Mar 2022 17:58:02 +0200 +Subject: [PATCH 125/126] imx8mm: net: enable phy Realtek RTL8211E + +Developed the infrastructure for further enablement of an ethernet phy. +Phy's ID is read directly from the phy to distinguish vendor/model and apply +an appropriate tuning. + +TBD: support of multiple phys on single bus shall be added. + +Signed-off-by: Kirill Kapranov +--- + board/compulab/plat/imx8mm/board/board.c | 104 ++++++++++++++++++++++++++++--- + include/configs/cpl-imx8m-mini.h | 2 +- + 2 files changed, 97 insertions(+), 9 deletions(-) + +diff --git a/board/compulab/plat/imx8mm/board/board.c b/board/compulab/plat/imx8mm/board/board.c +index 871e7ecedb..8dd0dc28f5 100644 +--- a/board/compulab/plat/imx8mm/board/board.c ++++ b/board/compulab/plat/imx8mm/board/board.c +@@ -35,11 +35,14 @@ + #include "ddr/ddr.h" + #include "common/eeprom.h" + #include "common/rtc.h" ++#include ++#include + + DECLARE_GLOBAL_DATA_PTR; + + static int env_dev = -1; + static int env_part= -1; ++static int fec_phyaddr = -1; + + #ifdef CONFIG_BOARD_POSTCLK_INIT + int board_postclk_init(void) +@@ -143,10 +146,23 @@ __weak int sub_ft_board_setup(void *blob, struct bd_info *bd) + return 0; + } + ++#define FDT_PHYADDR "/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0" ++#define FLIP_32B(val) (((val>>24)&0xff) | ((val<<8)&0xff0000) | ((val>>8)&0xff00) | ((val<<24)&0xff000000)) ++static int fdt_set_fec_phy_addr(void *blob) ++{ ++ if(0 > fec_phyaddr) ++ return -EINVAL; ++ ++ u32 val = FLIP_32B(fec_phyaddr); ++ return fdt_find_and_setprop ++ (blob, FDT_PHYADDR, "reg", (const void*)&val, sizeof(val), 0); ++} ++ + int ft_board_setup(void *blob, struct bd_info *bd) + { + fdt_set_env_addr(blob); + fdt_set_sn(blob); ++ fdt_set_fec_phy_addr(blob); + + return sub_ft_board_setup(blob, bd); + } +@@ -211,16 +227,88 @@ static int setup_fec(void) + return set_clk_enet(ENET_125MHZ); + } + ++/* These are specifc ID, purposed to distiguish between PHY vendors. ++These values are not equal to real vendors' OUI (half of MAC address) */ ++#define OUI_PHY_ATHEROS 0x1374 ++#define OUI_PHY_REALTEK 0x0732 ++ + int board_phy_config(struct phy_device *phydev) + { +- /* enable rgmii rxc skew and phy mode select to RGMII copper */ +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); +- +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); ++ int phyid1, phyid2; ++ unsigned int model, rev, oui; ++ unsigned int reg; ++ ++ phyid1 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID1); ++ if(0 > phyid1) { ++ printf("%s: PHYID1 registry read fail %i\n", __func__, phyid1); ++ return phyid1; ++ } ++ ++ phyid2 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID2); ++ if(0 > phyid2) { ++ printf("%s: PHYID2 registry read fail %i\n", __func__, phyid2); ++ return phyid2; ++ } ++ ++ reg = phyid2 | phyid1 << 16; ++ if(0xffff == reg) { ++ printf("%s: There is no device @%i\n", __func__, phydev->addr); ++ return -ENODEV; ++ } ++ ++ rev = reg & 0xf; ++ reg >>= 4; ++ model = reg & 0x3f; ++ reg >>=6; ++ oui = reg; ++ debug("%s: PHY @0x%x OUI 0x%06x model 0x%x rev 0x%x\n", ++ __func__, phydev->addr, oui, model, rev); ++ ++ switch (oui) { ++ case OUI_PHY_ATHEROS: ++ /* enable rgmii rxc skew and phy mode select to RGMII copper */ ++ printf("phy: AR803x@%x\t", phydev->addr); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); ++ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); ++ break; ++ case OUI_PHY_REALTEK: ++ printf("phy: RTL8211E@%x\t", phydev->addr); ++ /** RTL8211E-VB-CG - add TX and RX delay */ ++ unsigned short val; ++ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x07); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0xa4); ++ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1c); ++ val |= (0x1 << 13) | (0x1 << 12) | (0x1 << 11); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1c, val); ++ /*LEDs:*/ ++ /* set to extension page */ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0007); ++ /* extension Page44 */ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x002c); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1c, 0x0430);//LCR ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1a, 0x0010);//LACR ++ /* To disable EEE LED mode (blinking .4s/2s) */ ++ /* extension Page5 */ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x0005); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x05, 0x8b82);//magic const ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x06, 0x052b);//magic const ++ ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x00);// Back to Page0 ++ ++ break; ++ default: ++ printf("%s: ERROR: unknown PHY @0x%x OUI 0x%06x model 0x%x rev 0x%x\n", ++ __func__, phydev->addr, oui, model, rev); ++ return -ENOSYS; ++ } ++ ++ fec_phyaddr = phydev->addr; + + if (phydev->drv->config) + phydev->drv->config(phydev); +diff --git a/include/configs/cpl-imx8m-mini.h b/include/configs/cpl-imx8m-mini.h +index 33ff188614..0215f04210 100644 +--- a/include/configs/cpl-imx8m-mini.h ++++ b/include/configs/cpl-imx8m-mini.h +@@ -74,7 +74,7 @@ + #define CONFIG_ETHPRIME "FEC" + + #define CONFIG_FEC_XCV_TYPE RGMII +-#define CONFIG_FEC_MXC_PHYADDR 0 ++#define CONFIG_FEC_MXC_PHYADDR -1 //Auto search of PHY on MII + #define FEC_QUIRK_ENET_MAC + + #define CONFIG_PHY_GIGE +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0126-iot-gate-imx8-release-2020.04-iot-gate-imx8-3.0.patch b/recipes-bsp/u-boot/compulab/imx8mm/0126-iot-gate-imx8-release-2020.04-iot-gate-imx8-3.0.patch new file mode 100644 index 0000000..b75766e --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0126-iot-gate-imx8-release-2020.04-iot-gate-imx8-3.0.patch @@ -0,0 +1,24 @@ +From add6279250b10336de0feb9a374ee466d9f32652 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 9 Dec 2021 12:40:04 +0200 +Subject: [PATCH 126/126] iot-gate-imx8: release 2020.04-iot-gate-imx8-3.0 + +Signed-off-by: Uri Mashiach +--- + configs/iot-gate-imx8.config | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configs/iot-gate-imx8.config b/configs/iot-gate-imx8.config +index d92f2866f8..ebaa232b88 100644 +--- a/configs/iot-gate-imx8.config ++++ b/configs/iot-gate-imx8.config +@@ -1,5 +1,5 @@ + CONFIG_TARGET_IOT_GATE_IMX8=y +-CONFIG_LOCALVERSION="-iot-gate-imx8-1.0" ++CONFIG_LOCALVERSION="-iot-gate-imx8-3.0" + CONFIG_DEFAULT_FDT_FILE="sb-iotgimx8-can.dtb" + CONFIG_DEFAULT_DEVICE_TREE="iot-gate-imx8" + CONFIG_DM_PCA953X=n +-- +2.11.0 + diff --git a/recipes-bsp/u-boot/u-boot-compulab-env.inc b/recipes-bsp/u-boot/u-boot-compulab-env.inc index 3e6a86e..cf050de 100644 --- a/recipes-bsp/u-boot/u-boot-compulab-env.inc +++ b/recipes-bsp/u-boot/u-boot-compulab-env.inc @@ -1,18 +1,10 @@ INSTALL_DIR = "/usr/local/bin" -SRC_URI_append += "\ - file://cl_setenv \ -" - -do_install_append () { +do_install:append () { install -d ${D}/etc/ install -m 0644 ${S}/tools/env/fw_env.config ${D}/etc/fw_env.config - - install -d ${D}/${INSTALL_DIR} - install -m 0755 ${WORKDIR}/cl_setenv ${D}/${INSTALL_DIR}/cl_setenv } -FILES_${PN}-env += "/etc/* ${INSTALL_DIR}/*" -RDEPENDS_${PN}-env += "bash" -RPROVIDES_${PN}-env += "${PN}-env" +FILES:${PN}-env += "/etc/* ${INSTALL_DIR}/*" +RDEPENDS:${PN}-env += "bash" diff --git a/recipes-bsp/u-boot/u-boot-compulab-fw-utils.main b/recipes-bsp/u-boot/u-boot-compulab-fw-utils.main new file mode 100644 index 0000000..df1b3a1 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab-fw-utils.main @@ -0,0 +1,50 @@ +SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities" +SECTION = "bootloaders" +DEPENDS = "flex-native bison-native mtd-utils" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263" + +require u-boot-compulab_${PV}.inc + +S = "${WORKDIR}/git" + +require u-boot-compulab.inc + +INSANE_SKIP_${PN} = "already-stripped" +EXTRA_OEMAKE_class-target = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${CC} ${CFLAGS} ${LDFLAGS}" HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}" V=1' +EXTRA_OEMAKE_class-cross = 'HOSTCC="${CC} ${CFLAGS} ${LDFLAGS}" V=1' + +inherit uboot-config + +do_compile () { + oe_runmake ${UBOOT_MACHINE} + oe_runmake envtools +} + +do_install () { + install -d ${D}${base_sbindir} + install -d ${D}${sysconfdir} + install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_printenv + install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_setenv + install -m 0644 ${S}/tools/env/fw_env.config ${D}${sysconfdir}/fw_env.config +} + +do_install_class-cross () { + install -d ${D}${bindir_cross} + install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_printenv + install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_setenv +} + +SYSROOT_DIRS:append_class-cross = " ${bindir_cross}" + +PACKAGE_ARCH = "${MACHINE_ARCH}" +BBCLASSEXTEND = "cross" + +RDEPENDS_${PN} += "bash" + +FILES_${PN} = "/sbin/* /etc/*" + +RPROVIDES_${PN} += "u-boot-fw-utils" + +require u-boot-fw-utils.inc diff --git a/recipes-bsp/u-boot/u-boot-compulab-fw-utils_2021.04.bb b/recipes-bsp/u-boot/u-boot-compulab-fw-utils_2021.04.bb new file mode 100644 index 0000000..64c5ed9 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab-fw-utils_2021.04.bb @@ -0,0 +1,50 @@ +SUMMARY = "U-Boot bootloader fw_printenv/setenv utilities" +SECTION = "bootloaders" +DEPENDS = "flex-native bison-native mtd-utils" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263" + +require u-boot-compulab_${PV}.inc + +S = "${WORKDIR}/git" + +require u-boot-compulab.inc + +INSANE_SKIP_${PN} = "already-stripped" +EXTRA_OEMAKE_class-target = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${CC} ${CFLAGS} ${LDFLAGS}" HOSTCC="${BUILD_CC} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}" V=1' +EXTRA_OEMAKE_class-cross = 'HOSTCC="${CC} ${CFLAGS} ${LDFLAGS}" V=1' + +inherit uboot-config + +do_compile () { + oe_runmake ${UBOOT_MACHINE} + oe_runmake envtools +} + +do_install () { + install -d ${D}${base_sbindir} + install -d ${D}${sysconfdir} + install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_printenv + install -m 755 ${S}/tools/env/fw_printenv ${D}${base_sbindir}/fw_setenv + install -m 0644 ${S}/tools/env/fw_env.config ${D}${sysconfdir}/fw_env.config +} + +do_install_class-cross () { + install -d ${D}${bindir_cross} + install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_printenv + install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_setenv +} + +SYSROOT_DIRS:append:class-cross = " ${bindir_cross}" + +PACKAGE_ARCH = "${MACHINE_ARCH}" +BBCLASSEXTEND = "cross" + +RDEPENDS_${PN} += "bash" + +FILES_${PN} = "/sbin/* /etc/*" + +RPROVIDES_${PN} += "u-boot-fw-utils" + +require u-boot-fw-utils.inc diff --git a/recipes-bsp/u-boot/u-boot-compulab.inc b/recipes-bsp/u-boot/u-boot-compulab.inc index bd34480..bacce3c 100644 --- a/recipes-bsp/u-boot/u-boot-compulab.inc +++ b/recipes-bsp/u-boot/u-boot-compulab.inc @@ -1,9 +1,7 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/compulab/imx8mm:" +FILESEXTRAPATHS:prepend = "${THISDIR}/compulab/imx8mm:" require compulab/imx8mm.inc -do_compile_prepend() { - if [ ${BUILD_REPRODUCIBLE_BINARIES} -eq 1 ];then - export SOURCE_DATE_EPOCH=$(date +%s) - fi +do_compile:prepend() { + export SOURCE_DATE_EPOCH=$(date +%s) } diff --git a/recipes-bsp/u-boot/u-boot-compulab.main b/recipes-bsp/u-boot/u-boot-compulab.main new file mode 100644 index 0000000..101f759 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab.main @@ -0,0 +1,51 @@ +DESCRIPTION = "CompuLab i.MX8 U-Boot" +require recipes-bsp/u-boot/u-boot.inc + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +PROVIDES += "u-boot" +DEPENDS:append = " dtc-native" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263" + +require u-boot-compulab_${PV}.inc + +DEPENDS += "flex-native bison-native bc-native dtc-native" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +inherit fsl-u-boot-localversion + +LOCALVERSION = "-compulab" + +BOOT_TOOLS = "imx-boot-tools" + +do_deploy:append () { + return 1 + # Deploy u-boot-nodtb.bin and fsl-imx8mq-XX.dtb, to be packaged in boot binary by imx-boot + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${DEPLOYDIR}/${BOOT_TOOLS} + install -m 0777 ${B}/${config}/arch/arm/dts/${UBOOT_DTB_NAME} ${DEPLOYDIR}/${BOOT_TOOLS} + install -m 0777 ${B}/${config}/u-boot-nodtb.bin ${DEPLOYDIR}/${BOOT_TOOLS}/u-boot-nodtb.bin-${MACHINE}-${UBOOT_CONFIG} + fi + done + unset j + done + unset i + fi + +} + +require u-boot-compulab-env.inc + +PACKAGE_ARCH = "${MACHINE_ARCH}" +UBOOT_NAME_mx8 = "u-boot-${MACHINE}.bin-${UBOOT_CONFIG}" diff --git a/recipes-bsp/u-boot/u-boot-compulab_%.bbappend b/recipes-bsp/u-boot/u-boot-compulab_%.bbappend new file mode 100644 index 0000000..415cfc8 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab_%.bbappend @@ -0,0 +1 @@ +require u-boot-compulab.inc diff --git a/recipes-bsp/u-boot/u-boot-compulab_2021.04.bb b/recipes-bsp/u-boot/u-boot-compulab_2021.04.bb new file mode 100644 index 0000000..7fd4bef --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab_2021.04.bb @@ -0,0 +1,50 @@ +DESCRIPTION = "CompuLab i.MX8 U-Boot" +require recipes-bsp/u-boot/u-boot.inc + +FILESEXTRAPATHS:prepend = "${THISDIR}/files:" + +PROVIDES += "u-boot" +DEPENDS:append = " dtc-native" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263" + +require u-boot-compulab_${PV}.inc + +DEPENDS += "flex-native bison-native bc-native dtc-native" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +inherit fsl-u-boot-localversion + +LOCALVERSION = "-compulab" + +BOOT_TOOLS = "imx-boot-tools" + +do_deploy:append () { + # Deploy u-boot-nodtb.bin and fsl-imx8mq-XX.dtb, to be packaged in boot binary by imx-boot + if [ -n "${UBOOT_CONFIG}" ] + then + for config in ${UBOOT_MACHINE}; do + i=$(expr $i + 1); + for type in ${UBOOT_CONFIG}; do + j=$(expr $j + 1); + if [ $j -eq $i ] + then + install -d ${DEPLOYDIR}/${BOOT_TOOLS} + install -m 0777 ${B}/${config}/arch/arm/dts/${UBOOT_DTB_NAME} ${DEPLOYDIR}/${BOOT_TOOLS} + install -m 0777 ${B}/${config}/u-boot-nodtb.bin ${DEPLOYDIR}/${BOOT_TOOLS}/u-boot-nodtb.bin-${MACHINE}-${UBOOT_CONFIG} + fi + done + unset j + done + unset i + fi + +} + +require u-boot-compulab-env.inc + +PACKAGE_ARCH = "${MACHINE_ARCH}" +UBOOT_NAME_mx8 = "u-boot-${MACHINE}.bin-${UBOOT_CONFIG}" diff --git a/recipes-bsp/u-boot/u-boot-compulab_2021.04.inc b/recipes-bsp/u-boot/u-boot-compulab_2021.04.inc new file mode 100644 index 0000000..5f6765f --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-compulab_2021.04.inc @@ -0,0 +1,12 @@ +SRCBRANCH = "lf_v2021.04" +SRC_URI = "git://source.codeaurora.org/external/imx/uboot-imx.git;protocol=https;branch=${SRCBRANCH}" +SRCREV = "263b27e076a0f6e5dcc80227a235f0af73718342" + +do_configure:prepend () { + # Merge common defconfig with specific fraggment to get specific defconfig + local CONFDIR=configs + cd ${S} + scripts/kconfig/merge_config.sh -O ${CONFDIR}/ -m ${CONFDIR}/cl-imx8m-mini_defconfig ${CONFDIR}/${MACHINE}.config + mv ${CONFDIR}/.config ${CONFDIR}/${MACHINE}_defconfig + cd - +} diff --git a/recipes-bsp/u-boot/u-boot-fw-utils.inc b/recipes-bsp/u-boot/u-boot-fw-utils.inc index 4cd30d8..c5729ae 100644 --- a/recipes-bsp/u-boot/u-boot-fw-utils.inc +++ b/recipes-bsp/u-boot/u-boot-fw-utils.inc @@ -1,8 +1,8 @@ -SRC_URI_append += "\ +SRC_URI:append = "\ file://cl_setenv \ " -do_install_append () { +do_install:append () { install -d ${D}/sbin install -m 0755 ${WORKDIR}/cl_setenv ${D}/sbin/ } diff --git a/recipes-bsp/u-boot/u-boot-fw-utils_2021.04.bb b/recipes-bsp/u-boot/u-boot-fw-utils_2021.04.bb index 6840fd4..b68d781 100644 --- a/recipes-bsp/u-boot/u-boot-fw-utils_2021.04.bb +++ b/recipes-bsp/u-boot/u-boot-fw-utils_2021.04.bb @@ -42,7 +42,7 @@ do_install_class-cross () { install -m 755 ${S}/tools/env/fw_printenv ${D}${bindir_cross}/fw_setenv } -SYSROOT_DIRS_append_class-cross = " ${bindir_cross}" +SYSROOT_DIRS:append_class-cross = " ${bindir_cross}" PACKAGE_ARCH = "${MACHINE_ARCH}" BBCLASSEXTEND = "cross" diff --git a/recipes-bsp/u-boot/u-boot-imx_%.bbappend b/recipes-bsp/u-boot/u-boot-imx_%.bbappend index 75d40f1..ec73cf8 100644 --- a/recipes-bsp/u-boot/u-boot-imx_%.bbappend +++ b/recipes-bsp/u-boot/u-boot-imx_%.bbappend @@ -1,7 +1,7 @@ require u-boot-compulab.inc require u-boot-compulab-env.inc -do_configure_prepend () { +do_configure:prepend () { # Merge common defconfig with specific fraggment to get specific defconfig local CONFDIR=configs cd ${S} diff --git a/recipes-kernel/linux/compulab/imx8mm.inc b/recipes-kernel/linux/compulab/imx8mm.inc index c3f237c..21f5f4d 100644 --- a/recipes-kernel/linux/compulab/imx8mm.inc +++ b/recipes-kernel/linux/compulab/imx8mm.inc @@ -1,59 +1,89 @@ -SRC_URI_append = " \ - file://0001-imx8m-mini-add-basic-support.patch \ - file://0002-dts-Fix-usdhc1-properties.patch \ - file://0003-defconfig-Delete-some-unnecessary-drivers.patch \ - file://0004-ucm-imx8m-mini-dts-remove-phy-supply.patch \ - file://0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch \ - file://0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch \ - file://0007-dts-Fix-pmic-interrupt-configuration.patch \ - file://0008-defconfig-Enable-regualtor.patch \ - file://0009-eeprom-Add-w25q16-support.patch \ - file://0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch \ - file://0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch \ - file://0012-ucm-imx8m-mini-dts-Cleaning.patch \ - file://0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch \ - file://0014-rtc-abx80x-Enable-SQW-output.patch \ - file://0015-rtc-abx80x-Enable-XT-digital-calibration.patch \ - file://0016-rtc-abx80x-Calibrate-RTC.patch \ - file://0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch \ - file://0018-dts-Fix-ldo1-ldo2-voltage.patch \ - file://0019-ucm-imx8m-mini-dts-Fix-rtc-enumeration-order.patch \ - file://0020-rtc-abx80x-Improve-sqw-generation.patch \ - file://0021-rtc-abx80x-Improve-xt_calibration.patch \ - file://0022-rtc-abx80x-Add-sqw-binding-doc.patch \ - file://0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch \ - file://0024-arm64-dts-imx8mm-specify-dma-ranges.patch \ - file://0025-defconfig-Disable-fw-user-loader-helper.patch \ - file://0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch \ - file://0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch \ - file://0028-Remove-unnecessary-stuff.patch \ - file://0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch \ - file://0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch \ - file://0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch \ - file://0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch \ - file://0033-ucm-dts-Fix-voltage-on-USDHC1.patch \ - file://0034-ucm-defconfig-Clean-regulators.patch \ - file://0035-ucm-defconfig-Enable-rfkill.patch \ - file://0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch \ - file://0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch \ - file://0038-dts-Enable-ov5640-camera-and-VPU.patch \ - file://0039-ucm-Enable-wm8731-audiocodec.patch \ - file://0040-ucm-imx8m-mini-Fix-iwlwifi.patch \ - file://0041-drm-Panel-fix.patch \ - file://0042-snd-Fix-resource-management.patch \ - file://0043-config-Fix-build-time-warnings.patch \ - file://0044-defconfig-Break-down-to-common-and-specific-parts.patch \ - file://0045-dtb-Add-mcm-device-trees.patch \ - file://0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch \ - file://0047-defconfig-Fix-mipi-csi-camera.patch \ - file://0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch \ - file://0049-mcm-dts-Calibrate-RTC.patch \ - file://0050-mcm-dts-Reorder-DTS.patch \ - file://0051-mcm-imx8m-mini-dts-Fix-rtc-enumeration-order.patch \ - file://0052-mcm-imx8m-mini-defconfig-Enable-CAN-mcp251x.patch \ - file://0053-dts-phy-Eliminate-excessive-reset.patch \ - file://0054-LOCALVERSION-2.2.1.patch \ - file://0055-dts-defconfig-Fix-cpufreq-sysfs-attr-disappearance.patch \ - file://0056-dts-Enable-rpmsg.patch \ -" - +SRC_URI:append = " \ + file://0001-imx8m-mini-add-basic-support.patch \ + file://0002-dts-Fix-usdhc1-properties.patch \ + file://0003-defconfig-Delete-some-unnecessary-drivers.patch \ + file://0004-ucm-imx8m-mini-dts-remove-phy-supply.patch \ + file://0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch \ + file://0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch \ + file://0007-dts-Fix-pmic-interrupt-configuration.patch \ + file://0008-defconfig-Enable-regualtor.patch \ + file://0009-eeprom-Add-w25q16-support.patch \ + file://0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch \ + file://0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch \ + file://0012-ucm-imx8m-mini-dts-Cleaning.patch \ + file://0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch \ + file://0014-rtc-abx80x-Enable-SQW-output.patch \ + file://0015-rtc-abx80x-Enable-XT-digital-calibration.patch \ + file://0016-rtc-abx80x-Calibrate-RTC.patch \ + file://0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch \ + file://0018-dts-Fix-ldo1-ldo2-voltage.patch \ + file://0019-dts-Fix-rtc-enumeration-order.patch \ + file://0020-rtc-abx80x-Improve-sqw-generation.patch \ + file://0021-rtc-abx80x-Improve-xt_calibration.patch \ + file://0022-rtc-abx80x-Add-sqw-binding-doc.patch \ + file://0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch \ + file://0024-arm64-dts-imx8mm-specify-dma-ranges.patch \ + file://0025-defconfig-Disable-fw-user-loader-helper.patch \ + file://0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch \ + file://0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch \ + file://0028-Remove-unnecessary-stuff.patch \ + file://0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch \ + file://0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch \ + file://0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch \ + file://0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch \ + file://0033-ucm-dts-Fix-voltage-on-USDHC1.patch \ + file://0034-ucm-defconfig-Clean-regulators.patch \ + file://0035-ucm-defconfig-Enable-rfkill.patch \ + file://0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch \ + file://0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch \ + file://0038-dts-Enable-ov5640-camera-and-VPU.patch \ + file://0039-ucm-dts-Enable-wm8731-audiocodec.patch \ + file://0040-ucm-imx8m-mini-Fix-iwlwifi.patch \ + file://0041-drm-Panel-fix.patch \ + file://0042-snd-Fix-resource-management.patch \ + file://0043-config-Fix-build-time-warnings.patch \ + file://0044-defconfig-Break-down-to-common-and-specific-parts.patch \ + file://0045-dtb-Add-mcm-device-trees.patch \ + file://0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch \ + file://0047-defconfig-Fix-mipi-csi-camera.patch \ + file://0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch \ + file://0049-mcm-dts-Calibrate-RTC.patch \ + file://0050-mcm-dts-Reorder-DTS.patch \ + file://0051-serial-imx-allow-passing-rs485-options.patch \ + file://0052-mcm-imx8m-mini-remove-the-local-rpmsg-support.patch \ + file://0053-ucm-imx8m-mini-dts-rearrange-components.patch \ + file://0054-iot-gate-imx8-dts-add-support-for-the-IOT-GATE-iMX8.patch \ + file://0055-iot-gate-imx8-config-Update-device-config.patch \ + file://0056-iot-gate-imx8-can-dts-increase-frequency-of-SPI-inte.patch \ + file://0057-encx24j600-add-device-tree-support.patch \ + file://0058-iot-gate-imx8-add-support-for-the-IE-POE-board.patch \ + file://0059-iot-gate-imx8-dts-add-CAN-bus-RX-interrupt.patch \ + file://0060-iio-adc-Add-Maxim-MAX11108-driver.patch \ + file://0061-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch \ + file://0062-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch \ + file://0063-iot-gate-imx8-set-system-time-from-RTC-on-startup.patch \ + file://0064-iot-gate-imx8-dts-add-M4-support.patch \ + file://0065-iot-gate-imx8-dts-add-support-for-the-POEv2-module.patch \ + file://0066-iot-gate-imx8-integrate-the-USB-to-Ethernet-drivers-.patch \ + file://0067-iot-gate-imx8-enable-the-nftables-feature.patch \ + file://0068-iot-gate-imx8-enable-Bluetooth-features.patch \ + file://0069-iot-gate-imx8-dts-add-wakeup-sources.patch \ + file://0070-iot-gate-imx8-enable-setting-the-RTC-time-based-on-N.patch \ + file://0071-iot-gate-imx8-can-enable-Broadcast-Manager-CAN-Proto.patch \ + file://0072-iot-gate-imx8-dts-disable-USB-over-current-messages.patch \ + file://0073-iot-gate-imx8-disable-regulator-debug.patch \ + file://0074-iot-gate-imx8-iio-enable-standalone-triggers.patch \ + file://0075-iot-gate-imx8-add-Moby-compatibility.patch \ + file://0076-mmc-dts-fix-mmc1-initialization.patch \ + file://0077-ucm-imx8m-mini-dts-phy-eliminate-excessive-reset.patch \ + file://0078-iot-gate-imx8-release-3.0.patch \ + file://0079-iot-gate-imx8-dts-M4-support-update.patch \ + file://0080-iot-gate-imx8-M4-support-update.patch \ + file://0081-iot-gate-imx8-release-3.1.patch \ + file://0082-dts-Fix-usb-power-supply-reset.patch \ + file://0083-defconfig-Disable-Cadence-DRM.patch \ + file://0084-dts-defconfig-Fix-cpufreq-sysfs-attr-disappearance.patch \ + file://0085-defconfig-add-iot-gate-imx8.patch \ + file://0999-firmware-Add-the-brcm-firmware-to-the.patch \ + file://defconfig \ + " diff --git a/recipes-kernel/linux/compulab/imx8mm/0001-imx8m-mini-add-basic-support.patch b/recipes-kernel/linux/compulab/imx8mm/0001-imx8m-mini-add-basic-support.patch index 484c985..e15ef65 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0001-imx8m-mini-add-basic-support.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0001-imx8m-mini-add-basic-support.patch @@ -1,17 +1,17 @@ -From 9ce7736dcade83cce5b4204cbe786a168510e15e Mon Sep 17 00:00:00 2001 +From 828a11cbd33eb88c9900eb3c8f02054cc40b1043 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 15 Jun 2020 15:14:46 +0300 -Subject: [PATCH 01/35] imx8m-mini: add basic support +Subject: [PATCH 01/82] imx8m-mini: add basic support The first working build of Linux 5.4.3 for Compulab ucm-imx8m-mini Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/Makefile | 1 + - arch/arm64/boot/dts/compulab/Makefile | 5 + - arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 41 + - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts | 603 +++++++++++ - arch/arm64/configs/ucm-imx8m-mini_defconfig | 1059 ++++++++++++++++++++ + arch/arm64/boot/dts/Makefile | 1 + + arch/arm64/boot/dts/compulab/Makefile | 5 + + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 41 + + .../boot/dts/compulab/ucm-imx8m-mini.dts | 603 ++++++++++ + arch/arm64/configs/ucm-imx8m-mini_defconfig | 1059 +++++++++++++++++ 5 files changed, 1709 insertions(+) create mode 100644 arch/arm64/boot/dts/compulab/Makefile create mode 100644 arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi @@ -19,10 +19,10 @@ Signed-off-by: Kirill Kapranov create mode 100644 arch/arm64/configs/ucm-imx8m-mini_defconfig diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile -index f19b762c008d..bdebb522f633 100644 +index 639e01a4d855..2c0e4db6e60c 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile -@@ -10,6 +10,7 @@ subdir-y += arm +@@ -11,6 +11,7 @@ subdir-y += arm subdir-y += bitmain subdir-y += broadcom subdir-y += cavium @@ -1763,5 +1763,5 @@ index 000000000000..63f0f2076b04 +# CONFIG_FTRACE is not set +CONFIG_MEMTEST=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0002-dts-Fix-usdhc1-properties.patch b/recipes-kernel/linux/compulab/imx8mm/0002-dts-Fix-usdhc1-properties.patch index 92cc750..4c34a5d 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0002-dts-Fix-usdhc1-properties.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0002-dts-Fix-usdhc1-properties.patch @@ -1,7 +1,7 @@ -From ebca06d320645d72e4af19f40feb6c25d7104d9b Mon Sep 17 00:00:00 2001 +From 973aa9e40b47e10b7133af9bca1f00856f9d3d67 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 21 Jun 2020 20:50:45 +0300 -Subject: [PATCH 02/35] dts: Fix usdhc1 properties +Subject: [PATCH 02/82] dts: Fix usdhc1 properties Define WP GPIO, add no-1-8-v. @@ -60,5 +60,5 @@ index 9db7b4b4ab17..8df796e4a246 100644 vmmc-supply = <®_usdhc2_vmmc>; status = "okay"; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0003-defconfig-Delete-some-unnecessary-drivers.patch b/recipes-kernel/linux/compulab/imx8mm/0003-defconfig-Delete-some-unnecessary-drivers.patch index 662b7fe..98ce587 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0003-defconfig-Delete-some-unnecessary-drivers.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0003-defconfig-Delete-some-unnecessary-drivers.patch @@ -1,11 +1,11 @@ -From f35cee98c0ff5e7cc43f1b03a33afc3c76bbcbe9 Mon Sep 17 00:00:00 2001 +From c763a3ac87820a040eb1e4288eb9ecec9c556489 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 21 Jun 2020 22:00:13 +0300 -Subject: [PATCH 03/35] defconfig: Delete some unnecessary drivers +Subject: [PATCH 03/82] defconfig: Delete some unnecessary drivers Signed-off-by: Kirill Kapranov --- - arch/arm64/configs/ucm-imx8m-mini_defconfig | 99 +++++++++++++++-------------- + arch/arm64/configs/ucm-imx8m-mini_defconfig | 99 +++++++++++---------- 1 file changed, 50 insertions(+), 49 deletions(-) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -148,5 +148,5 @@ index 63f0f2076b04..2455d062c73a 100644 # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_SOUND=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0004-ucm-imx8m-mini-dts-remove-phy-supply.patch b/recipes-kernel/linux/compulab/imx8mm/0004-ucm-imx8m-mini-dts-remove-phy-supply.patch index 2472666..cb45300 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0004-ucm-imx8m-mini-dts-remove-phy-supply.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0004-ucm-imx8m-mini-dts-remove-phy-supply.patch @@ -1,7 +1,7 @@ -From e6557e375aaea7bc84442499ace9165523fb430f Mon Sep 17 00:00:00 2001 +From 3b943ad5a181b59c546affa2a369275c9e726d18 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Tue, 5 Feb 2019 17:39:39 +0200 -Subject: [PATCH 04/35] ucm-imx8m-mini: dts: remove phy-supply +Subject: [PATCH 04/82] ucm-imx8m-mini: dts: remove phy-supply Signed-off-by: Valentin Raevsky --- @@ -39,5 +39,5 @@ index 8df796e4a246..aa8900e91a90 100644 fsl,rgmii_rxc_dly; status = "okay"; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch b/recipes-kernel/linux/compulab/imx8mm/0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch index 079eb7c..a5c9637 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0005-ucm-imx8m-mini-dts-Enable-onboard-LED.patch @@ -1,7 +1,7 @@ -From 884a7472692628cb786f73b66174d257f00f7df1 Mon Sep 17 00:00:00 2001 +From c417924234794be5c71649fa3c90dfed96003a89 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Wed, 13 Feb 2019 21:43:15 +0200 -Subject: [PATCH 05/35] ucm-imx8m-mini: dts: Enable onboard LED +Subject: [PATCH 05/82] ucm-imx8m-mini: dts: Enable onboard LED Enable onboard LED and set 'Heartbeat' as its default trigger. @@ -31,5 +31,5 @@ index aa8900e91a90..a4c8661889d1 100644 compatible = "regulator-fixed"; regulator-name = "VSD_3V3"; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch b/recipes-kernel/linux/compulab/imx8mm/0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch index 423d0c0..1c38101 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0006-ucm-imx8m-mini-dts-Enable-onboard-EEPROM.patch @@ -1,7 +1,7 @@ -From 3863693de6163bc7020b9ae1591ee14292c94980 Mon Sep 17 00:00:00 2001 +From be679a64b4e56e6cf3c8a1868e44c78ca3b348ea Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 14 Feb 2019 17:42:19 +0200 -Subject: [PATCH 06/35] ucm-imx8m-mini:dts: Enable onboard EEPROM +Subject: [PATCH 06/82] ucm-imx8m-mini:dts: Enable onboard EEPROM Enable onboard EEPROM type of Atmel 24c08 at 0x50@i2c2. @@ -28,5 +28,5 @@ index a4c8661889d1..7f20b5a30622 100644 &i2c3 { -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0007-dts-Fix-pmic-interrupt-configuration.patch b/recipes-kernel/linux/compulab/imx8mm/0007-dts-Fix-pmic-interrupt-configuration.patch index 16103e1..310c478 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0007-dts-Fix-pmic-interrupt-configuration.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0007-dts-Fix-pmic-interrupt-configuration.patch @@ -1,7 +1,7 @@ -From 5af376daabfd9493582d5686ae567eb3ee3566ae Mon Sep 17 00:00:00 2001 +From ea7fe44c09dc6a956bd9c19f41411dd2042bf967 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 25 Jun 2020 18:40:59 +0300 -Subject: [PATCH 07/35] dts: Fix pmic interrupt configuration +Subject: [PATCH 07/82] dts: Fix pmic interrupt configuration Signed-off-by: Kirill Kapranov --- @@ -24,5 +24,5 @@ index 7f20b5a30622..ac67d1416edc 100644 gpo { rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */ -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0008-defconfig-Enable-regualtor.patch b/recipes-kernel/linux/compulab/imx8mm/0008-defconfig-Enable-regualtor.patch index 1e202f6..1eb45ef 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0008-defconfig-Enable-regualtor.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0008-defconfig-Enable-regualtor.patch @@ -1,7 +1,7 @@ -From 3d7af6894e08e2e4c83286e9cafec149d08f31b3 Mon Sep 17 00:00:00 2001 +From 8eb2250d9c153913a359166d6521a421f806c4e1 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 25 Jun 2020 22:28:04 +0300 -Subject: [PATCH 08/35] defconfig: Enable regualtor +Subject: [PATCH 08/82] defconfig: Enable regualtor Enable CONFIG_REGULATOR in order to CONFIG_REGULATOR_FIXED_VOLTAGE has its effect. @@ -45,5 +45,5 @@ index 2455d062c73a..4ac6f9cf91ec 100644 CONFIG_RC_DECODERS=y CONFIG_RC_DEVICES=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0009-eeprom-Add-w25q16-support.patch b/recipes-kernel/linux/compulab/imx8mm/0009-eeprom-Add-w25q16-support.patch index 76539c5..0ed1916 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0009-eeprom-Add-w25q16-support.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0009-eeprom-Add-w25q16-support.patch @@ -1,7 +1,7 @@ -From 9789df1cc3c994a2b595a0b21f9479db5effaa5b Mon Sep 17 00:00:00 2001 +From e7b86ace39b9816e3ccf14f56c921fb6b08a18d0 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 13 Aug 2021 23:54:10 +0300 -Subject: [PATCH 9/9] eeprom: Add w25q16 support +Subject: [PATCH 09/82] eeprom: Add w25q16 support Signed-off-by: Kirill Kapranov --- @@ -9,10 +9,10 @@ Signed-off-by: Kirill Kapranov 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c -index e5dfa786f190..ed2ab898f2c7 100644 +index 96573f61caf5..5fd7865a4aab 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c -@@ -52,6 +52,7 @@ static const struct flash_info winbond_parts[] = { +@@ -51,6 +51,7 @@ static const struct flash_info winbond_parts[] = { { "w25q20cl", INFO(0xef4012, 0, 64 * 1024, 4, SECT_4K) }, { "w25q20bw", INFO(0xef5012, 0, 64 * 1024, 4, SECT_4K) }, { "w25q20ew", INFO(0xef6012, 0, 64 * 1024, 4, SECT_4K) }, diff --git a/recipes-kernel/linux/compulab/imx8mm/0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch b/recipes-kernel/linux/compulab/imx8mm/0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch index 58feafc..e91fb8a 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0010-ucm-imx8m-mini-defconf-dt-Migrate-to-kernel-5.4.24.patch @@ -1,14 +1,14 @@ -From 9b2c747c1af2ef03aff5d5619109129bb28f4565 Mon Sep 17 00:00:00 2001 +From 5d4395943ca9a88461fb490ea7514f1943f6b9a0 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 19 Mar 2021 22:36:14 +0200 -Subject: [PATCH 10/35] ucm-imx8m-mini:defconf+dt:Migrate to kernel 5.4.24 +Subject: [PATCH 10/82] ucm-imx8m-mini:defconf+dt:Migrate to kernel 5.4.24 Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 151 +++- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts | 592 +-------------- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 842 +++++++++++++++++++++ - arch/arm64/configs/ucm-imx8m-mini_defconfig | 556 +++++--------- + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 151 +++- + .../boot/dts/compulab/ucm-imx8m-mini.dts | 592 +----------- + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 842 ++++++++++++++++++ + arch/arm64/configs/ucm-imx8m-mini_defconfig | 556 ++++-------- 4 files changed, 1164 insertions(+), 977 deletions(-) create mode 100644 arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi @@ -1635,7 +1635,7 @@ index 000000000000..fce8cbeaada9 + temperature = <115000>; +}; diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index 4ac6f9cf91ec..b2cf1065805b 100644 +index 4ac6f9cf91ec..e753a9b2fc93 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -27,42 +27,9 @@ CONFIG_USER_NS=y @@ -2696,5 +2696,5 @@ index 4ac6f9cf91ec..b2cf1065805b 100644 +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y +CONFIG_CORESIGHT_SOURCE_ETM4X=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch b/recipes-kernel/linux/compulab/imx8mm/0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch index 4dfb8b7..bfdde93 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0011-ucm-imx8m-mini-dts-Fix-PMIC-node.patch @@ -1,11 +1,11 @@ -From 75fbc7c84583ba425320b1f90d8dc8baa69dce9f Mon Sep 17 00:00:00 2001 +From 48e8b57b928503d74ca5ceeaf543207dbeb346ac Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 17 Aug 2020 21:40:09 +0300 -Subject: [PATCH 11/35] ucm-imx8m-mini:dts: Fix PMIC node +Subject: [PATCH 11/82] ucm-imx8m-mini:dts: Fix PMIC node Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 91 ++++++++++-------------- + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 91 ++++++++----------- 1 file changed, 36 insertions(+), 55 deletions(-) diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi @@ -192,5 +192,5 @@ index fce8cbeaada9..1a499c1ed570 100644 regulator-max-microvolt = <3300000>; }; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0012-ucm-imx8m-mini-dts-Cleaning.patch b/recipes-kernel/linux/compulab/imx8mm/0012-ucm-imx8m-mini-dts-Cleaning.patch index e6dcee0..39d6564 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0012-ucm-imx8m-mini-dts-Cleaning.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0012-ucm-imx8m-mini-dts-Cleaning.patch @@ -1,11 +1,11 @@ -From 5399a29686ea39e7e1c0422645b78c9aebb4e5a4 Mon Sep 17 00:00:00 2001 +From 1725a4c0c975479d27a065965bd8cb234048c6b9 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 17 Aug 2020 21:41:46 +0300 -Subject: [PATCH 12/35] ucm-imx8m-mini:dts: Cleaning +Subject: [PATCH 12/82] ucm-imx8m-mini:dts: Cleaning Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 68 ------------------------ + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 68 ------------------- 1 file changed, 68 deletions(-) diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi @@ -95,5 +95,5 @@ index 1a499c1ed570..138b677180e7 100644 status = "okay"; }; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch b/recipes-kernel/linux/compulab/imx8mm/0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch index 98f31f3..7a3316c 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0013-ucm-imx8m-mini-dts-Update-PCIe-node.patch @@ -1,7 +1,7 @@ -From d617ce8d2aa2b1dd7d4947cdfa68e147d55b9cc2 Mon Sep 17 00:00:00 2001 +From 34afc1067946e798ff8cbdc0956b72fab153146d Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 18 Aug 2020 18:14:40 +0300 -Subject: [PATCH 13/35] ucm-imx8m-mini:dts: Update PCIe node +Subject: [PATCH 13/82] ucm-imx8m-mini:dts: Update PCIe node Update the PCIe description in accordance with the updated PCIe driver @@ -56,5 +56,5 @@ index 138b677180e7..20de6bd871f9 100644 wlreg_on: wlregon-regulator { compatible = "regulator-fixed"; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0014-rtc-abx80x-Enable-SQW-output.patch b/recipes-kernel/linux/compulab/imx8mm/0014-rtc-abx80x-Enable-SQW-output.patch index b801f3e..cbf7c6c 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0014-rtc-abx80x-Enable-SQW-output.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0014-rtc-abx80x-Enable-SQW-output.patch @@ -1,18 +1,18 @@ -From 78e0f007584c1f26d6f09e7e4d01e19c305d62a1 Mon Sep 17 00:00:00 2001 +From 54b2d50aba41f3dccaeb57f265bf3913d108e8a9 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov -Date: Tue, 25 Aug 2020 21:36:21 +0300 -Subject: [PATCH 14/35] rtc:abx80x: Enable SQW output +Date: Sun, 15 Jan 2023 22:37:37 +0200 +Subject: [PATCH 14/82] rtc:abx80x: Enable SQW output Signed-off-by: Kirill Kapranov --- - drivers/rtc/rtc-abx80x.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++++ + drivers/rtc/rtc-abx80x.c | 95 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c -index 73830670a41f..7f66bdd2868e 100644 +index 9b0138d07232..a48815be1bfa 100644 --- a/drivers/rtc/rtc-abx80x.c +++ b/drivers/rtc/rtc-abx80x.c -@@ -50,6 +50,10 @@ +@@ -51,6 +51,10 @@ #define ABX8XX_IRQ_AIE BIT(2) #define ABX8XX_IRQ_IM_1_4 (0x3 << 5) @@ -23,7 +23,7 @@ index 73830670a41f..7f66bdd2868e 100644 #define ABX8XX_REG_CD_TIMER_CTL 0x18 #define ABX8XX_REG_OSC 0x1c -@@ -487,9 +491,94 @@ static ssize_t oscillator_show(struct device *dev, +@@ -486,9 +490,94 @@ static ssize_t oscillator_show(struct device *dev, static DEVICE_ATTR_RW(oscillator); @@ -118,7 +118,7 @@ index 73830670a41f..7f66bdd2868e 100644 NULL, }; -@@ -685,6 +774,7 @@ static int abx80x_probe(struct i2c_client *client, +@@ -686,6 +775,7 @@ static int abx80x_probe(struct i2c_client *client, unsigned int lot; unsigned int wafer; unsigned int uid; @@ -126,7 +126,7 @@ index 73830670a41f..7f66bdd2868e 100644 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) return -ENODEV; -@@ -804,6 +894,9 @@ static int abx80x_probe(struct i2c_client *client, +@@ -800,6 +890,9 @@ static int abx80x_probe(struct i2c_client *client, abx80x_enable_trickle_charger(client, trickle_cfg); } @@ -136,15 +136,15 @@ index 73830670a41f..7f66bdd2868e 100644 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL, BIT(2)); if (err) -@@ -847,6 +940,8 @@ static int abx80x_probe(struct i2c_client *client, +@@ -843,6 +936,8 @@ static int abx80x_probe(struct i2c_client *client, err); return err; } + else + dev_err(&client->dev, "CCCCreate sysfs group: %d\n", 0); - return rtc_register_device(priv->rtc); + return devm_rtc_register_device(priv->rtc); } -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0015-rtc-abx80x-Enable-XT-digital-calibration.patch b/recipes-kernel/linux/compulab/imx8mm/0015-rtc-abx80x-Enable-XT-digital-calibration.patch index fb315fa..93d47b6 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0015-rtc-abx80x-Enable-XT-digital-calibration.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0015-rtc-abx80x-Enable-XT-digital-calibration.patch @@ -1,18 +1,18 @@ -From 5f796913bd6607ff1276059380c0f83a519fff41 Mon Sep 17 00:00:00 2001 +From 53951d9307ae5de23533030fec5ffb86e20fa855 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 5 Nov 2020 18:41:55 +0200 -Subject: [PATCH 15/35] rtc:abx80x: Enable XT digital calibration +Subject: [PATCH 15/82] rtc:abx80x: Enable XT digital calibration Signed-off-by: Kirill Kapranov --- - drivers/rtc/rtc-abx80x.c | 232 ++++++++++++++++++++++++++++++++++++++--------- + drivers/rtc/rtc-abx80x.c | 232 +++++++++++++++++++++++++++++++-------- 1 file changed, 188 insertions(+), 44 deletions(-) diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c -index 7f66bdd2868e..0bd45a2e4a93 100644 +index a48815be1bfa..b2f1cc7f0c0f 100644 --- a/drivers/rtc/rtc-abx80x.c +++ b/drivers/rtc/rtc-abx80x.c -@@ -16,57 +16,64 @@ +@@ -17,57 +17,64 @@ #include #include @@ -120,7 +120,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 #define ABX8XX_REG_WDT 0x1b #define ABX8XX_WDT_WDS BIT(7) -@@ -99,6 +106,7 @@ struct abx80x_cap { +@@ -100,6 +107,7 @@ struct abx80x_cap { u16 pn; bool has_tc; bool has_wdog; @@ -128,7 +128,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 }; static struct abx80x_cap abx80x_caps[] = { -@@ -109,7 +117,7 @@ static struct abx80x_cap abx80x_caps[] = { +@@ -110,7 +118,7 @@ static struct abx80x_cap abx80x_caps[] = { [AB1801] = {.pn = 0x1801}, [AB1803] = {.pn = 0x1803}, [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, @@ -137,7 +137,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, [ABX80X] = {.pn = 0} }; -@@ -491,6 +499,132 @@ static ssize_t oscillator_show(struct device *dev, +@@ -490,6 +498,132 @@ static ssize_t oscillator_show(struct device *dev, static DEVICE_ATTR_RW(oscillator); @@ -270,7 +270,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 #define SQFS_COUNT (1 << ABX8XX_REG_SQW_MODE_BITS) static char const *const SQFS[SQFS_COUNT] = { "1_century", "32768_Hz", "8192_Hz", "4096_Hz", "2048_Hz", "1024_Hz", "512_Hz", "256_Hz", -@@ -579,6 +713,7 @@ static struct attribute *rtc_calib_attrs[] = { +@@ -578,6 +712,7 @@ static struct attribute *rtc_calib_attrs[] = { &dev_attr_autocalibration.attr, &dev_attr_oscillator.attr, &dev_attr_sqw.attr, @@ -278,7 +278,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 NULL, }; -@@ -775,6 +910,7 @@ static int abx80x_probe(struct i2c_client *client, +@@ -776,6 +911,7 @@ static int abx80x_probe(struct i2c_client *client, unsigned int wafer; unsigned int uid; const char *sqw_mode_name; @@ -286,7 +286,7 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) return -ENODEV; -@@ -894,6 +1030,14 @@ static int abx80x_probe(struct i2c_client *client, +@@ -890,6 +1026,14 @@ static int abx80x_probe(struct i2c_client *client, abx80x_enable_trickle_charger(client, trickle_cfg); } @@ -302,5 +302,5 @@ index 7f66bdd2868e..0bd45a2e4a93 100644 sqw_set(client, sqw_mode_name); -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0016-rtc-abx80x-Calibrate-RTC.patch b/recipes-kernel/linux/compulab/imx8mm/0016-rtc-abx80x-Calibrate-RTC.patch index 201ef73..f646b67 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0016-rtc-abx80x-Calibrate-RTC.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0016-rtc-abx80x-Calibrate-RTC.patch @@ -1,7 +1,7 @@ -From 5dc234f7e4c96b5d62a8813e7ffbac22f5f313ad Mon Sep 17 00:00:00 2001 +From b43b101bc80827770e033bf36374433c9b2a6659 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Wed, 26 Aug 2020 16:10:12 +0300 -Subject: [PATCH 16/35] rtc:abx80x: Calibrate RTC +Subject: [PATCH 16/82] rtc:abx80x: Calibrate RTC Signed-off-by: Kirill Kapranov --- @@ -22,5 +22,5 @@ index 20de6bd871f9..72b792219968 100644 }; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch b/recipes-kernel/linux/compulab/imx8mm/0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch index 5507c5e..5b3339d 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0017-ucm-dts-Fix-no-1-8-v-for-mmc2.patch @@ -1,7 +1,7 @@ -From 77c76ced7b58fa21dfd53421a521d6e7036dfa1b Mon Sep 17 00:00:00 2001 +From a15d15b86c8e9609b57de6978c8068dadd8b6fb3 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 15 Sep 2020 22:05:06 +0300 -Subject: [PATCH 17/35] ucm:dts: Fix no-1-8-v for mmc2 +Subject: [PATCH 17/82] ucm:dts: Fix no-1-8-v for mmc2 Signed-off-by: Kirill Kapranov --- @@ -21,5 +21,5 @@ index 72b792219968..349893c4e757 100644 }; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0018-dts-Fix-ldo1-ldo2-voltage.patch b/recipes-kernel/linux/compulab/imx8mm/0018-dts-Fix-ldo1-ldo2-voltage.patch index f60274a..90e8707 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0018-dts-Fix-ldo1-ldo2-voltage.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0018-dts-Fix-ldo1-ldo2-voltage.patch @@ -1,7 +1,7 @@ -From c112711542e2b5c01c3dd6faa3158632c8228992 Mon Sep 17 00:00:00 2001 +From fb91cb083afbfe74858a992fc45d216b80421f33 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 22 Sep 2020 20:44:04 +0300 -Subject: [PATCH 18/35] dts: Fix ldo1 ldo2 voltage +Subject: [PATCH 18/82] dts: Fix ldo1 ldo2 voltage Rationale: NXP CIN @@ -38,5 +38,5 @@ index 349893c4e757..8f2e0599abf0 100644 regulator-boot-on; regulator-always-on; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0019-dts-Fix-rtc-enumeration-order.patch b/recipes-kernel/linux/compulab/imx8mm/0019-dts-Fix-rtc-enumeration-order.patch new file mode 100644 index 0000000..34acfdd --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0019-dts-Fix-rtc-enumeration-order.patch @@ -0,0 +1,38 @@ +From 26640560a8b66f000b4973e204c9c9ff60de78dc Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 27 Sep 2020 14:25:48 +0300 +Subject: [PATCH 19/82] dts:Fix rtc enumeration order + +Signed-off-by: Kirill Kapranov +--- + arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +index 8f2e0599abf0..159a7d5e7146 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +@@ -13,6 +13,11 @@ + */ + + / { ++ aliases { ++ rtc0 = &rtc0; ++ rtc1 = &snvs_rtc; ++ }; ++ + chosen { + bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; + stdout-patch = &uart3; +@@ -434,7 +439,7 @@ + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + +- rtc@69 { ++ rtc0: rtc@69 { + compatible = "ab1805"; + reg = <0x69>; + pagesize = <16>; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0020-rtc-abx80x-Improve-sqw-generation.patch b/recipes-kernel/linux/compulab/imx8mm/0020-rtc-abx80x-Improve-sqw-generation.patch index 0dd3711..ea846ec 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0020-rtc-abx80x-Improve-sqw-generation.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0020-rtc-abx80x-Improve-sqw-generation.patch @@ -1,7 +1,7 @@ -From c9ffed91dceb5f532e5954e4e4b05c5b340ce060 Mon Sep 17 00:00:00 2001 +From 19a20a4fbf843bfe4270249920d7852b102ace72 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 5 Nov 2020 18:49:05 +0200 -Subject: [PATCH 20/35] rtc:abx80x: Improve sqw generation +Subject: [PATCH 20/82] rtc:abx80x: Improve sqw generation Signed-off-by: Kirill Kapranov --- @@ -9,10 +9,10 @@ Signed-off-by: Kirill Kapranov 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c -index 0bd45a2e4a93..2ba1686fe2a4 100644 +index b2f1cc7f0c0f..a666b4044a19 100644 --- a/drivers/rtc/rtc-abx80x.c +++ b/drivers/rtc/rtc-abx80x.c -@@ -633,8 +633,17 @@ static char const *const SQFS[SQFS_COUNT] = { "1_century", "32768_Hz", "8192_Hz" +@@ -632,8 +632,17 @@ static char const *const SQFS[SQFS_COUNT] = { "1_century", "32768_Hz", "8192_Hz" "1/2_Hz", "1/4_Hz", "1/8_Hz", "1/16_Hz", "1/32_Hz", "1_min", "16384_Hz", "100_Hz", "1_hour", "1_day", "TIRQ", "nTIRQ", @@ -32,7 +32,7 @@ index 0bd45a2e4a93..2ba1686fe2a4 100644 }; static int sqw_set(struct i2c_client *client, const char *buf) -@@ -651,6 +660,9 @@ static int sqw_set(struct i2c_client *client, const char *buf) +@@ -650,6 +659,9 @@ static int sqw_set(struct i2c_client *client, const char *buf) if( 0 > idx ) return idx; @@ -42,7 +42,7 @@ index 0bd45a2e4a93..2ba1686fe2a4 100644 dev_info(&client->dev, "sqw output enabled @ %s\n",SQFS[idx]); reg &= ~((1 << ABX8XX_REG_SQW_MODE_BITS) - 1); reg |= idx | ABX8XX_REG_SQW_EN; -@@ -1040,6 +1052,8 @@ static int abx80x_probe(struct i2c_client *client, +@@ -1036,6 +1048,8 @@ static int abx80x_probe(struct i2c_client *client, if (!of_property_read_string(np, "sqw", &sqw_mode_name)) sqw_set(client, sqw_mode_name); @@ -52,5 +52,5 @@ index 0bd45a2e4a93..2ba1686fe2a4 100644 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL, BIT(2)); -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0021-rtc-abx80x-Improve-xt_calibration.patch b/recipes-kernel/linux/compulab/imx8mm/0021-rtc-abx80x-Improve-xt_calibration.patch index 96f3703..b4b503b 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0021-rtc-abx80x-Improve-xt_calibration.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0021-rtc-abx80x-Improve-xt_calibration.patch @@ -1,7 +1,7 @@ -From 91dd792b9022e06a4351765f7e20c099d1f767e0 Mon Sep 17 00:00:00 2001 +From bd2024b17a07be5d7f5cdd4e5cc130ad45c4f362 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 5 Nov 2020 18:56:16 +0200 -Subject: [PATCH 21/35] rtc:abx80x: Improve xt_calibration +Subject: [PATCH 21/82] rtc:abx80x: Improve xt_calibration Signed-off-by: Kirill Kapranov --- @@ -9,10 +9,10 @@ Signed-off-by: Kirill Kapranov 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c -index 2ba1686fe2a4..55df2264700a 100644 +index a666b4044a19..51eedd3b6dc7 100644 --- a/drivers/rtc/rtc-abx80x.c +++ b/drivers/rtc/rtc-abx80x.c -@@ -106,7 +106,6 @@ struct abx80x_cap { +@@ -107,7 +107,6 @@ struct abx80x_cap { u16 pn; bool has_tc; bool has_wdog; @@ -20,7 +20,7 @@ index 2ba1686fe2a4..55df2264700a 100644 }; static struct abx80x_cap abx80x_caps[] = { -@@ -117,7 +116,7 @@ static struct abx80x_cap abx80x_caps[] = { +@@ -118,7 +117,7 @@ static struct abx80x_cap abx80x_caps[] = { [AB1801] = {.pn = 0x1801}, [AB1803] = {.pn = 0x1803}, [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, @@ -29,7 +29,7 @@ index 2ba1686fe2a4..55df2264700a 100644 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, [ABX80X] = {.pn = 0} }; -@@ -499,9 +498,9 @@ static ssize_t oscillator_show(struct device *dev, +@@ -498,9 +497,9 @@ static ssize_t oscillator_show(struct device *dev, static DEVICE_ATTR_RW(oscillator); @@ -41,7 +41,7 @@ index 2ba1686fe2a4..55df2264700a 100644 u32 xt_freq) { int retval, flags; -@@ -510,7 +509,7 @@ static int xt_calibration_set(struct i2c_client *client, +@@ -509,7 +508,7 @@ static int xt_calibration_set(struct i2c_client *client, long Adj; u8 XTCAL, CMDX, OFFSETX; @@ -50,7 +50,7 @@ index 2ba1686fe2a4..55df2264700a 100644 if (Adj < -320 ) { dev_err(&client->dev, "The XT oscillator is too fast to be adjusted\n"); return -ERANGE; -@@ -577,7 +576,7 @@ static int xt_calibration_set(struct i2c_client *client, +@@ -576,7 +575,7 @@ static int xt_calibration_set(struct i2c_client *client, } @@ -59,7 +59,7 @@ index 2ba1686fe2a4..55df2264700a 100644 struct device_attribute *attr, const char *buf, size_t count) { -@@ -591,14 +590,16 @@ static ssize_t xt_calibration_store(struct device *dev, +@@ -590,14 +589,16 @@ static ssize_t xt_calibration_store(struct device *dev, } dev_info(dev,"xt osc drift is %li ppm\n", \ @@ -78,7 +78,7 @@ index 2ba1686fe2a4..55df2264700a 100644 static ssize_t xt_calibration_show(struct device *dev, struct device_attribute *attr, char *buf) { -@@ -622,8 +623,7 @@ static ssize_t xt_calibration_show(struct device *dev, +@@ -621,8 +622,7 @@ static ssize_t xt_calibration_show(struct device *dev, return sprintf(buf, "\n"); return flags; } @@ -88,7 +88,7 @@ index 2ba1686fe2a4..55df2264700a 100644 #define SQFS_COUNT (1 << ABX8XX_REG_SQW_MODE_BITS) static char const *const SQFS[SQFS_COUNT] = { "1_century", "32768_Hz", "8192_Hz", "4096_Hz", -@@ -726,6 +726,7 @@ static struct attribute *rtc_calib_attrs[] = { +@@ -725,6 +725,7 @@ static struct attribute *rtc_calib_attrs[] = { &dev_attr_oscillator.attr, &dev_attr_sqw.attr, &dev_attr_xt_calibration.attr, @@ -96,7 +96,7 @@ index 2ba1686fe2a4..55df2264700a 100644 NULL, }; -@@ -1042,12 +1043,12 @@ static int abx80x_probe(struct i2c_client *client, +@@ -1038,12 +1039,12 @@ static int abx80x_probe(struct i2c_client *client, abx80x_enable_trickle_charger(client, trickle_cfg); } @@ -116,5 +116,5 @@ index 2ba1686fe2a4..55df2264700a 100644 if (!of_property_read_string(np, "sqw", &sqw_mode_name)) -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0022-rtc-abx80x-Add-sqw-binding-doc.patch b/recipes-kernel/linux/compulab/imx8mm/0022-rtc-abx80x-Add-sqw-binding-doc.patch index 4033fa9..257607e 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0022-rtc-abx80x-Add-sqw-binding-doc.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0022-rtc-abx80x-Add-sqw-binding-doc.patch @@ -1,11 +1,11 @@ -From 8a671d0d5146d0677329532cf7510d6484f4804a Mon Sep 17 00:00:00 2001 +From 6330e3be9f14be9a81d367e742299b3157869b45 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 27 Sep 2020 15:32:58 +0300 -Subject: [PATCH 22/35] rtc:abx80x: Add sqw binding doc +Subject: [PATCH 22/82] rtc:abx80x: Add sqw binding doc Signed-off-by: Kirill Kapranov --- - Documentation/devicetree/bindings/rtc/abracon,abx80x.txt | 13 +++++++++++++ + .../devicetree/bindings/rtc/abracon,abx80x.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt b/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt @@ -30,5 +30,5 @@ index 2405e35a1bc0..60a7a3ab3856 100644 + +Note that some frequencies produce no output in RC oscillator mode. -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch b/recipes-kernel/linux/compulab/imx8mm/0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch index a53ed32..8e1e8c4 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0023-rtc-abx80x-Add-xt_calibration-binding-doc.patch @@ -1,11 +1,11 @@ -From 052353da8b2f0e595a1b5ae63ce57d56a3eebeda Mon Sep 17 00:00:00 2001 +From d9f1ab1e88ebd9d9944ab936ea77c558151b4f76 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 27 Sep 2020 15:33:37 +0300 -Subject: [PATCH 23/35] rtc:abx80x: Add xt_calibration binding doc +Subject: [PATCH 23/82] rtc:abx80x: Add xt_calibration binding doc Signed-off-by: Kirill Kapranov --- - Documentation/devicetree/bindings/rtc/abracon,abx80x.txt | 13 +++++++++++++ + .../devicetree/bindings/rtc/abracon,abx80x.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt b/Documentation/devicetree/bindings/rtc/abracon,abx80x.txt @@ -30,5 +30,5 @@ index 60a7a3ab3856..0c38386dcbb9 100644 + Measure the square wave frequency at the output pin in milliHz. + Assign the measured value to the property xt_frequency. -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0024-arm64-dts-imx8mm-specify-dma-ranges.patch b/recipes-kernel/linux/compulab/imx8mm/0024-arm64-dts-imx8mm-specify-dma-ranges.patch index 7761a79..c190343 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0024-arm64-dts-imx8mm-specify-dma-ranges.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0024-arm64-dts-imx8mm-specify-dma-ranges.patch @@ -1,7 +1,7 @@ -From 381bb955de4f1247342f031b07f12a0588202448 Mon Sep 17 00:00:00 2001 +From 8f9a2f8ccd18e8321d30a4b2c5e9de0e6eaad8f4 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 5 Nov 2020 17:54:36 +0200 -Subject: [PATCH 24/35] arm64: dts: imx8mm: specify dma-ranges +Subject: [PATCH 24/82] arm64: dts: imx8mm: specify dma-ranges Apply the same dma range limitations as on the i.MX8MQ. Original commit: ca04fed4706dfb13cb964be2dc294054ed0efb6b @@ -27,5 +27,5 @@ index 159a7d5e7146..d27d0833120a 100644 #address-cells = <2>; #size-cells = <2>; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0025-defconfig-Disable-fw-user-loader-helper.patch b/recipes-kernel/linux/compulab/imx8mm/0025-defconfig-Disable-fw-user-loader-helper.patch index fd10345..f576e64 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0025-defconfig-Disable-fw-user-loader-helper.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0025-defconfig-Disable-fw-user-loader-helper.patch @@ -1,7 +1,7 @@ -From 0f3729428a5a947d519706101a4930dee2297a3f Mon Sep 17 00:00:00 2001 +From 5165c21d42d463b553a4131e4aeb2fd4c0293a98 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 19 Mar 2021 22:45:21 +0200 -Subject: [PATCH 25/35] defconfig: Disable fw user loader helper +Subject: [PATCH 25/82] defconfig: Disable fw user loader helper Signed-off-by: Kirill Kapranov --- @@ -9,7 +9,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index b2cf1065805b..9780edd70663 100644 +index e753a9b2fc93..49b310a1622f 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -195,7 +195,7 @@ CONFIG_PCIE_LAYERSCAPE_GEN4=y @@ -22,5 +22,5 @@ index b2cf1065805b..9780edd70663 100644 CONFIG_SIMPLE_PM_BUS=y CONFIG_VEXPRESS_CONFIG=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch b/recipes-kernel/linux/compulab/imx8mm/0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch index 3968596..f3e7698 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0026-ucm-imx8m-mini-dts-Fix-usdhc1-node-descriptor.patch @@ -1,7 +1,7 @@ -From 37c9c5d9d953c9f72c0d45354dab84551c06fb0b Mon Sep 17 00:00:00 2001 +From 6fa9059657c3c582974181dee7d5675ed8148d83 Mon Sep 17 00:00:00 2001 From: Valentin Raevsky Date: Mon, 16 Nov 2020 16:43:07 +0200 -Subject: [PATCH 26/35] ucm-imx8m-mini: dts: Fix usdhc1 node descriptor +Subject: [PATCH 26/82] ucm-imx8m-mini: dts: Fix usdhc1 node descriptor Signed-off-by: Valentin Raevsky --- @@ -28,5 +28,5 @@ index d27d0833120a..0b8be84d8293 100644 wifi-host; pm-ignore-notify; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch b/recipes-kernel/linux/compulab/imx8mm/0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch index a4714a3..c658d98 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0027-rtc-abx80x-Disable-bus-when-powered-from-battery.patch @@ -1,7 +1,7 @@ -From 00a0c6c23a3a425ed88b489d90fdec4cfa327798 Mon Sep 17 00:00:00 2001 +From 016a868215cfe911ee4771ffec8addbcbcdb8f26 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 17 Nov 2020 20:05:43 +0200 -Subject: [PATCH 27/35] rtc:abx80x: Disable bus when powered from battery +Subject: [PATCH 27/82] rtc:abx80x: Disable bus when powered from battery Signed-off-by: Kirill Kapranov --- @@ -9,10 +9,10 @@ Signed-off-by: Kirill Kapranov 1 file changed, 36 insertions(+) diff --git a/drivers/rtc/rtc-abx80x.c b/drivers/rtc/rtc-abx80x.c -index 55df2264700a..a8e1e4f890d2 100644 +index 51eedd3b6dc7..a6c40d7b7083 100644 --- a/drivers/rtc/rtc-abx80x.c +++ b/drivers/rtc/rtc-abx80x.c -@@ -87,6 +87,9 @@ +@@ -88,6 +88,9 @@ #define ABX8XX_CFG_KEY_OSC 0xa1 #define ABX8XX_CFG_KEY_MISC 0x9d @@ -22,7 +22,7 @@ index 55df2264700a..a8e1e4f890d2 100644 #define ABX8XX_REG_ID0 0x28 #define ABX8XX_REG_OUT_CTRL 0x30 -@@ -909,6 +912,35 @@ static int abx80x_setup_watchdog(struct abx80x_priv *priv) +@@ -910,6 +913,35 @@ static int abx80x_setup_watchdog(struct abx80x_priv *priv) } #endif @@ -58,7 +58,7 @@ index 55df2264700a..a8e1e4f890d2 100644 static int abx80x_probe(struct i2c_client *client, const struct i2c_device_id *id) { -@@ -1056,6 +1088,10 @@ static int abx80x_probe(struct i2c_client *client, +@@ -1052,6 +1084,10 @@ static int abx80x_probe(struct i2c_client *client, else sqw_set(client, "none"); @@ -70,5 +70,5 @@ index 55df2264700a..a8e1e4f890d2 100644 BIT(2)); if (err) -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0028-Remove-unnecessary-stuff.patch b/recipes-kernel/linux/compulab/imx8mm/0028-Remove-unnecessary-stuff.patch index 8749bcf..7791423 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0028-Remove-unnecessary-stuff.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0028-Remove-unnecessary-stuff.patch @@ -1,13 +1,13 @@ -From b6f069b6f73bdf1478e7d314c2a496deb597a984 Mon Sep 17 00:00:00 2001 +From 69e806bf5da0e89c4b81a2fb415ce40c418c73b1 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 19 Mar 2021 23:56:18 +0200 -Subject: [PATCH 28/35] Remove unnecessary stuff +Subject: [PATCH 28/82] Remove unnecessary stuff Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 119 ------------------ - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 140 --------------------- - arch/arm64/configs/ucm-imx8m-mini_defconfig | 6 +- + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 119 --------------- + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 140 ------------------ + arch/arm64/configs/ucm-imx8m-mini_defconfig | 6 +- 3 files changed, 2 insertions(+), 263 deletions(-) diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi @@ -330,7 +330,7 @@ index 0b8be84d8293..2f87103dd9c7 100644 temperature = <105000>; }; diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index 9780edd70663..1f630afb592a 100644 +index 49b310a1622f..0c773e797ca7 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -812,10 +812,8 @@ CONFIG_CRYPTO_SM4=m @@ -347,5 +347,5 @@ index 9780edd70663..1f630afb592a 100644 CONFIG_DMA_CMA=y CONFIG_CMA_SIZE_MBYTES=320 -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch b/recipes-kernel/linux/compulab/imx8mm/0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch index 108aa31..10280e8 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0029-ucm-imx8m-mini-dts-Enable-brcm-bcm4330-bt.patch @@ -1,11 +1,11 @@ -From 9764e29af99c6a29fa1c2223a7acc00af5539b32 Mon Sep 17 00:00:00 2001 +From f701da425b0ca366ee9df4140bb370b61fd2510e Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 22 Apr 2021 00:08:07 +0300 -Subject: [PATCH 29/35] ucm-imx8m-mini: dts: Enable brcm,bcm4330-bt +Subject: [PATCH 29/82] ucm-imx8m-mini: dts: Enable brcm,bcm4330-bt Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 40 +++++++++++++++++++++--- + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 40 +++++++++++++++++-- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi @@ -88,5 +88,5 @@ index 2f87103dd9c7..70d6a90d981f 100644 pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch b/recipes-kernel/linux/compulab/imx8mm/0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch index 94807ec..bd3147d 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0030-ucm-imx8m-mini-config-Set-CONFIG_IMX_SDMA-m-for-brcm.patch @@ -1,7 +1,7 @@ -From dab441de8312de3260286fde844d928bc5cd9fc5 Mon Sep 17 00:00:00 2001 +From bc77607a136bc9c5482179aa3ab19416d8c164a8 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 17 Aug 2020 22:08:07 +0300 -Subject: [PATCH 30/35] ucm-imx8m-mini: config: Set CONFIG_IMX_SDMA=m for +Subject: [PATCH 30/82] ucm-imx8m-mini: config: Set CONFIG_IMX_SDMA=m for brcm,bcm4330-bt Signed-off-by: Kirill Kapranov @@ -10,7 +10,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index 1f630afb592a..f964caf0b56f 100644 +index 0c773e797ca7..01492f9f26a1 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -651,7 +651,7 @@ CONFIG_DMADEVICES=y @@ -23,5 +23,5 @@ index 1f630afb592a..f964caf0b56f 100644 CONFIG_MXS_DMA=y CONFIG_PL330_DMA=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch b/recipes-kernel/linux/compulab/imx8mm/0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch index 9bc708f..23f13f2 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0031-ucm-imx8m-mini-config-Add-brcm-firmware-to-kernel-bu.patch @@ -1,7 +1,7 @@ -From 9cd480bf0333b855763f754d427cd4e20d8b633b Mon Sep 17 00:00:00 2001 +From 7e9f28b1d87d2ed7e0ff5a80c5992368b8382db8 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 22 Apr 2021 00:14:19 +0300 -Subject: [PATCH 31/35] ucm-imx8m-mini: config: Add brcm firmware to kernel +Subject: [PATCH 31/82] ucm-imx8m-mini: config: Add brcm firmware to kernel build Signed-off-by: Kirill Kapranov @@ -10,7 +10,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index f964caf0b56f..e5e1ecf085b5 100644 +index 01492f9f26a1..fd567ed3d983 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -194,6 +194,8 @@ CONFIG_PCIE_KIRIN=y @@ -23,5 +23,5 @@ index f964caf0b56f..e5e1ecf085b5 100644 CONFIG_FW_LOADER_USER_HELPER_FALLBACK=n CONFIG_BRCMSTB_GISB_ARB=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch b/recipes-kernel/linux/compulab/imx8mm/0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch index e2a0487..8befefb 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0032-ucm-dts-Enable-bcm4329-fmac-WiFi.patch @@ -1,11 +1,11 @@ -From 9726241269edcdfa1bc494a33f5d28067baf7500 Mon Sep 17 00:00:00 2001 +From 2d4336205e815ce506b1b35997bc28432e0969e2 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 22 Apr 2021 19:59:12 +0300 -Subject: [PATCH 32/35] ucm:dts: Enable bcm4329-fmac WiFi +Subject: [PATCH 32/82] ucm:dts: Enable bcm4329-fmac WiFi Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 25 ++++++++++++++++++++++++ + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi @@ -45,5 +45,5 @@ index 70d6a90d981f..c4cd87804700 100644 pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0033-ucm-dts-Fix-voltage-on-USDHC1.patch b/recipes-kernel/linux/compulab/imx8mm/0033-ucm-dts-Fix-voltage-on-USDHC1.patch index 6a86329..0b53532 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0033-ucm-dts-Fix-voltage-on-USDHC1.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0033-ucm-dts-Fix-voltage-on-USDHC1.patch @@ -1,7 +1,7 @@ -From a8d1fe049cd29ae8c8efbba839ad19020c1e3563 Mon Sep 17 00:00:00 2001 +From 24adc767f43566d48078254afcfa77bf8c465570 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 24 Apr 2021 20:36:16 +0300 -Subject: [PATCH 33/35] ucm:dts: Fix voltage on USDHC1 +Subject: [PATCH 33/82] ucm:dts: Fix voltage on USDHC1 Signed-off-by: Kirill Kapranov --- @@ -21,5 +21,5 @@ index c4cd87804700..aff5d206dc70 100644 wifi-host; pm-ignore-notify; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0034-ucm-defconfig-Clean-regulators.patch b/recipes-kernel/linux/compulab/imx8mm/0034-ucm-defconfig-Clean-regulators.patch index f536ee9..c3bd8ca 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0034-ucm-defconfig-Clean-regulators.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0034-ucm-defconfig-Clean-regulators.patch @@ -1,7 +1,7 @@ -From 7631f12e444839c95374c285c19374259cd117f7 Mon Sep 17 00:00:00 2001 +From 4e0880d7bc913517f057f8d8fe917129bf6615f0 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 24 Apr 2021 20:56:02 +0300 -Subject: [PATCH 34/35] ucm:defconfig: Clean regulators +Subject: [PATCH 34/82] ucm:defconfig: Clean regulators Signed-off-by: Kirill Kapranov --- @@ -9,7 +9,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index e5e1ecf085b5..952060fa8358 100644 +index fd567ed3d983..c20e1b4129b9 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -452,22 +452,8 @@ CONFIG_MFD_SEC_CORE=y @@ -37,5 +37,5 @@ index e5e1ecf085b5..952060fa8358 100644 CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_CONTROLLER=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0035-ucm-defconfig-Enable-rfkill.patch b/recipes-kernel/linux/compulab/imx8mm/0035-ucm-defconfig-Enable-rfkill.patch index ab89059..bf616f4 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0035-ucm-defconfig-Enable-rfkill.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0035-ucm-defconfig-Enable-rfkill.patch @@ -1,7 +1,7 @@ -From f289111a2a5040c7e167170e7ea5862d13688ab5 Mon Sep 17 00:00:00 2001 +From 170fd4eeb7c142f6f21a9908e5be256fb5676e4e Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sat, 24 Apr 2021 21:09:07 +0300 -Subject: [PATCH 35/35] ucm:defconfig: Enable rfkill +Subject: [PATCH 35/82] ucm:defconfig: Enable rfkill Signed-off-by: Kirill Kapranov --- @@ -9,7 +9,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig -index 952060fa8358..5f75b54ca245 100644 +index c20e1b4129b9..1e35a6009c13 100644 --- a/arch/arm64/configs/ucm-imx8m-mini_defconfig +++ b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -173,6 +173,7 @@ CONFIG_BT_HCIUART_QCA=y @@ -21,5 +21,5 @@ index 952060fa8358..5f75b54ca245 100644 CONFIG_MAC80211=m CONFIG_NET_9P=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch b/recipes-kernel/linux/compulab/imx8mm/0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch index ef854f3..fd4a17c 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0036-ucm-Enable-display-kd050hdfia020-with-touchscreen.patch @@ -1,17 +1,16 @@ -From dd8a9786b6ac443c000c50d359660bd26a9a554b Mon Sep 17 00:00:00 2001 +From 9a2a33c48fdaa2b6974cb8da856e492bf2695d90 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov -Date: Sat, 14 Aug 2021 00:07:15 +0300 -Subject: [PATCH 36/36] ucm: Enable display kd050hdfia020 with touchscreen +Date: Sun, 15 Jan 2023 22:45:09 +0200 +Subject: [PATCH 36/82] ucm: Enable display kd050hdfia020 with touchscreen Signed-off-by: Kirill Kapranov --- .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 26 + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 37 + - arch/arm64/configs/ucm-imx8m-mini_defconfig | 1 - drivers/gpu/drm/panel/Kconfig | 9 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-startek-ili9881c.c | 648 ++++++++++++++++++ - 6 files changed, 721 insertions(+), 1 deletion(-) + 5 files changed, 721 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-startek-ili9881c.c diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi @@ -113,12 +112,12 @@ index aff5d206dc70..a596f87bbefb 100644 temperature = <105000>; }; diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig -index 436013189166..9da160ba8556 100644 +index 5663037fff13..b082603edda6 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig -@@ -114,6 +114,15 @@ config DRM_PANEL_ILITEK_ILI9881C - Say Y if you want to enable support for panels based on the - Ilitek ILI9881c controller. +@@ -157,6 +157,15 @@ config DRM_PANEL_INNOLUX_EJ030NA + 320x480 3.0" panel as found in the RS97 V2.1, RG300(non-ips) + and LDK handheld gaming consoles. +config DRM_PANEL_STARTEK_ILI9881C + tristate "Startek ILI9881C-based panels" @@ -133,17 +132,17 @@ index 436013189166..9da160ba8556 100644 tristate "Innolux P079ZCA panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile -index 3be941e15fd5..4e240cf670ff 100644 +index 5315883da4b5..575a033bc4f2 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile -@@ -47,6 +47,7 @@ obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o +@@ -57,6 +57,7 @@ obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o +obj-$(CONFIG_DRM_PANEL_STARTEK_ILI9881C) += panel-startek-ili9881c.o + obj-$(CONFIG_DRM_PANEL_TDO_TL070WSH30) += panel-tdo-tl070wsh30.o obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o - obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o diff --git a/drivers/gpu/drm/panel/panel-startek-ili9881c.c b/drivers/gpu/drm/panel/panel-startek-ili9881c.c new file mode 100644 index 000000000000..f832d055be4e diff --git a/recipes-kernel/linux/compulab/imx8mm/0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch b/recipes-kernel/linux/compulab/imx8mm/0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch index 57db038..ebc5fc2 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0037-ov5640_mipi_v2-gpio_set_value_cansleep.patch @@ -1,7 +1,7 @@ -From eaffc3ff6251515780f8b855ad7bb33ffaaddb53 Mon Sep 17 00:00:00 2001 +From 71c79ae5b8e8f1d8ab55ec8425d5f3d76c99ccb1 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 27 Apr 2021 00:24:42 +0300 -Subject: [PATCH 37/38] ov5640_mipi_v2: gpio_set_value_cansleep +Subject: [PATCH 37/82] ov5640_mipi_v2: gpio_set_value_cansleep Signed-off-by: Kirill Kapranov --- @@ -9,7 +9,7 @@ Signed-off-by: Kirill Kapranov 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mxc/capture/ov5640_mipi_v2.c b/drivers/media/platform/mxc/capture/ov5640_mipi_v2.c -index a22a242760a0..79fba29395b4 100644 +index cc3dbc560705..3ce83046019f 100644 --- a/drivers/media/platform/mxc/capture/ov5640_mipi_v2.c +++ b/drivers/media/platform/mxc/capture/ov5640_mipi_v2.c @@ -548,19 +548,19 @@ static void ov5640_reset(struct ov5640 *sensor) @@ -38,5 +38,5 @@ index a22a242760a0..79fba29395b4 100644 } -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0038-dts-Enable-ov5640-camera-and-VPU.patch b/recipes-kernel/linux/compulab/imx8mm/0038-dts-Enable-ov5640-camera-and-VPU.patch index 41c86a0..ce36b31 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0038-dts-Enable-ov5640-camera-and-VPU.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0038-dts-Enable-ov5640-camera-and-VPU.patch @@ -1,12 +1,12 @@ -From 4fed89aa2a815c2f1db821dc349ba84f592133ad Mon Sep 17 00:00:00 2001 +From f6c4bb5bee5c26ac482bc78ad90464f7ed59cd49 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Tue, 27 Apr 2021 00:25:17 +0300 -Subject: [PATCH 38/38] dts: Enable ov5640 camera and VPU +Subject: [PATCH 38/82] dts: Enable ov5640 camera and VPU Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 58 ++++++++++++++++++++++ - arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 12 +++++ + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 58 +++++++++++++++++++ + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 12 ++++ 2 files changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi @@ -109,5 +109,5 @@ index a596f87bbefb..91af4e6c5295 100644 dr_mode = "otg"; hnp-disable; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0039-ucm-dts-Enable-wm8731-audiocodec.patch b/recipes-kernel/linux/compulab/imx8mm/0039-ucm-dts-Enable-wm8731-audiocodec.patch new file mode 100644 index 0000000..fac1e34 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0039-ucm-dts-Enable-wm8731-audiocodec.patch @@ -0,0 +1,89 @@ +From f67b80f01c0f478a289661b3f357c1a72763a354 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 28 Apr 2021 00:26:12 +0300 +Subject: [PATCH 39/82] ucm:dts:Enable wm8731 audiocodec + +Signed-off-by: Kirill Kapranov +--- + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 36 +++++++++++++++++++ + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 10 ++++++ + 2 files changed, 46 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi +index b232079cd82b..f642b3f95f19 100644 +--- a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi ++++ b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi +@@ -13,6 +13,35 @@ + */ + + / { ++ simple_sound: sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "cl-imx8m-mini"; ++ simple-audio-card,widgets = ++ "Headphone", "Headphone Jack", ++ "Line", "Line Out", ++ "Microphone", "Mic Jack", ++ "Line", "Line In"; ++ simple-audio-card,routing = ++ "Headphone Jack", "RHPOUT", ++ "Headphone Jack", "LHPOUT", ++ "MICIN", "Mic Bias", ++ "Mic Bias", "Mic Jack"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,bitclock-master = <&sound_master>; ++ simple-audio-card,frame-master = <&sound_master>; ++ ++ sound_master: simple-audio-card,cpu { ++ sound-dai = <&sai2>; ++ system-clock-frequency = <0>; ++ system-clock-direction = "out"; ++ }; ++ ++ sound_codec: simple-audio-card,codec { ++ sound-dai = <&wm8731>; ++ system-clock-direction = "in"; ++ system-clock-type = "mclk"; ++ }; ++ }; + + clocks { + clk40m: clk@1 { +@@ -70,6 +99,13 @@ + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + ++ wm8731: wm8731@1a { ++ #sound-dai-cells = <0>; ++ compatible = "wlf,wm8731"; ++ reg = <0x1a>; ++ status = "okay"; ++ }; ++ + ov5640_mipi: ov5640_mipi@3c { + compatible = "ovti,ov5640_mipi"; + reg = <0x3c>; +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +index 91af4e6c5295..377574898946 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +@@ -729,6 +729,16 @@ + status = "okay"; + }; + ++&sai2 { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_sai2>; ++ assigned-clocks = <&clk IMX8MM_CLK_SAI2>; ++ assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; ++ assigned-clock-rates = <12288000>; ++ status = "okay"; ++}; ++ + &lcdif { + status = "okay"; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0040-ucm-imx8m-mini-Fix-iwlwifi.patch b/recipes-kernel/linux/compulab/imx8mm/0040-ucm-imx8m-mini-Fix-iwlwifi.patch index 7044290..41b8b37 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0040-ucm-imx8m-mini-Fix-iwlwifi.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0040-ucm-imx8m-mini-Fix-iwlwifi.patch @@ -1,13 +1,12 @@ -From 5d1cf0729aa8c397a67811a5f7fb8e3832c83c93 Mon Sep 17 00:00:00 2001 +From 93f717407944def0959bfc204dbcfc579525ad93 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Wed, 26 May 2021 23:02:51 +0300 -Subject: [PATCH 40/40] ucm-imx8m-mini: Fix iwlwifi +Subject: [PATCH 40/82] ucm-imx8m-mini: Fix iwlwifi Signed-off-by: Kirill Kapranov --- arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 2 +- - arch/arm64/configs/ucm-imx8m-mini_defconfig | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) + 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi index f642b3f95f19..2a5483bb62d3 100644 diff --git a/recipes-kernel/linux/compulab/imx8mm/0041-drm-Panel-fix.patch b/recipes-kernel/linux/compulab/imx8mm/0041-drm-Panel-fix.patch index e4c5df9..3a7f480 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0041-drm-Panel-fix.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0041-drm-Panel-fix.patch @@ -1,12 +1,12 @@ -From 98f5716c39a28561344db7c78d31bb6da70276e7 Mon Sep 17 00:00:00 2001 +From c9827933ce9b687499d29ffe2922ddab03150655 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 26 Aug 2021 00:29:48 +0300 -Subject: [PATCH 41/41] drm: Panel fix +Subject: [PATCH 41/82] drm: Panel fix Signed-off-by: Kirill Kapranov --- - arch/arm64/configs/ucm-imx8m-mini_defconfig | 2 +- - drivers/gpu/drm/panel/panel-startek-ili9881c.c | 145 ++++++++++++------------- + arch/arm64/configs/ucm-imx8m-mini_defconfig | 2 +- + .../gpu/drm/panel/panel-startek-ili9881c.c | 145 +++++++++--------- 2 files changed, 71 insertions(+), 76 deletions(-) diff --git a/arch/arm64/configs/ucm-imx8m-mini_defconfig b/arch/arm64/configs/ucm-imx8m-mini_defconfig @@ -300,5 +300,5 @@ index f832d055be4e..f66a24e8f055 100644 }; MODULE_DEVICE_TABLE(of, ili9881c_of_match); -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0042-snd-Fix-resource-management.patch b/recipes-kernel/linux/compulab/imx8mm/0042-snd-Fix-resource-management.patch index 84c632d..5608084 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0042-snd-Fix-resource-management.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0042-snd-Fix-resource-management.patch @@ -1,30 +1,29 @@ -From bce17b857063545b4393c51771398812a57b431d Mon Sep 17 00:00:00 2001 +From 5a215714bf637fa0e9d871fd1210a028bec6d7d9 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov -Date: Mon, 30 Aug 2021 22:51:15 +0300 -Subject: [PATCH 42/43] snd: Fix resource management +Date: Sun, 15 Jan 2023 22:59:11 +0200 +Subject: [PATCH 42/82] snd: Fix resource management -Allocation of the memory and creating sysfs group shall be undone in case of -error. This prevents memory leak; also this rids system log of unnecessary -pollution caused by attempts of sysfs group recreation. +Allocation of the memory and creating sysfs group shall be undone in +case of error. This prevents memory leak; also this rids system log of +unnecessary pollution caused by attempts of sysfs group recreation. Signed-off-by: Kirill Kapranov --- - sound/soc/fsl/fsl_sai.c | 55 ++++++++++++++++++++++++++++++--------------- - sound/soc/fsl/imx-pcm-dma.c | 9 +++++--- - 2 files changed, 43 insertions(+), 21 deletions(-) + sound/soc/fsl/fsl_sai.c | 54 +++++++++++++++++++++++++------------ + sound/soc/fsl/imx-pcm-dma.c | 9 ++++--- + 2 files changed, 43 insertions(+), 20 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c -index 68f69fb03eec..128283d541d8 100644 +index 5cf671139324..ab99826a7332 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c -@@ -1297,17 +1297,20 @@ static int fsl_sai_read_dlcfg(struct platform_device *pdev, char *pn, +@@ -1275,16 +1275,19 @@ static int fsl_sai_read_dlcfg(struct platform_device *pdev, char *pn, static int fsl_sai_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct fsl_sai *sai; + struct fsl_sai *sai = NULL; struct regmap *gpr; - struct resource *res; void __iomem *base; char tmp[8]; int irq, ret, i; @@ -41,10 +40,10 @@ index 68f69fb03eec..128283d541d8 100644 sai->pdev = pdev; sai->soc_data = of_device_get_match_data(&pdev->dev); -@@ -1316,8 +1319,10 @@ static int fsl_sai_probe(struct platform_device *pdev) +@@ -1292,8 +1295,10 @@ static int fsl_sai_probe(struct platform_device *pdev) + sai->is_lsb_first = of_property_read_bool(np, "lsb-first"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &sai->res); - if (IS_ERR(base)) - return PTR_ERR(base); + if (IS_ERR(base)) { @@ -54,8 +53,8 @@ index 68f69fb03eec..128283d541d8 100644 if (sai->soc_data->reg_offset == 8) { fsl_sai_regmap_config.reg_defaults = fsl_sai_reg_defaults_ofs8; -@@ -1330,7 +1335,8 @@ static int fsl_sai_probe(struct platform_device *pdev) - NULL, base, &fsl_sai_regmap_config); +@@ -1305,7 +1310,8 @@ static int fsl_sai_probe(struct platform_device *pdev) + sai->regmap = devm_regmap_init_mmio(&pdev->dev, base, &fsl_sai_regmap_config); if (IS_ERR(sai->regmap)) { dev_err(&pdev->dev, "regmap init failed\n"); - return PTR_ERR(sai->regmap); @@ -63,19 +62,18 @@ index 68f69fb03eec..128283d541d8 100644 + goto err_mem_free; } - /* No error out for old DTB cases but only mark the clock NULL */ -@@ -1338,8 +1344,8 @@ static int fsl_sai_probe(struct platform_device *pdev) - if (IS_ERR(sai->bus_clk)) { + sai->bus_clk = devm_clk_get(&pdev->dev, "bus"); +@@ -1316,7 +1322,8 @@ static int fsl_sai_probe(struct platform_device *pdev) dev_err(&pdev->dev, "failed to get bus clock: %ld\n", PTR_ERR(sai->bus_clk)); + /* -EPROBE_DEFER */ - return PTR_ERR(sai->bus_clk); -- sai->bus_clk = NULL; + ret = PTR_ERR(sai->bus_clk); + goto err_mem_free; } - for (i = 0; i < FSL_SAI_MCLK_MAX; i++) { -@@ -1367,14 +1373,14 @@ static int fsl_sai_probe(struct platform_device *pdev) + for (i = 1; i < FSL_SAI_MCLK_MAX; i++) { +@@ -1349,14 +1356,14 @@ static int fsl_sai_probe(struct platform_device *pdev) ret = fsl_sai_read_dlcfg(pdev, "fsl,dataline", &sai->pcm_dl_cfg, sai->soc_data->dataline); if (ret < 0) @@ -92,7 +90,7 @@ index 68f69fb03eec..128283d541d8 100644 sai->dsd_dl_cfg_cnt = ret; -@@ -1393,14 +1399,16 @@ static int fsl_sai_probe(struct platform_device *pdev) +@@ -1375,14 +1382,16 @@ static int fsl_sai_probe(struct platform_device *pdev) } irq = platform_get_irq(pdev, 0); @@ -112,7 +110,7 @@ index 68f69fb03eec..128283d541d8 100644 } memcpy(&sai->cpu_dai_drv, &fsl_sai_dai_template, -@@ -1417,7 +1425,8 @@ static int fsl_sai_probe(struct platform_device *pdev) +@@ -1399,7 +1408,8 @@ static int fsl_sai_probe(struct platform_device *pdev) of_find_property(np, "fsl,sai-asynchronous", NULL)) { /* error out if both synchronous and asynchronous are present */ dev_err(&pdev->dev, "invalid binding for synchronous mode\n"); @@ -122,7 +120,7 @@ index 68f69fb03eec..128283d541d8 100644 } if (of_find_property(np, "fsl,sai-synchronous-rx", NULL)) { -@@ -1438,12 +1447,15 @@ static int fsl_sai_probe(struct platform_device *pdev) +@@ -1420,12 +1430,15 @@ static int fsl_sai_probe(struct platform_device *pdev) gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); if (IS_ERR(gpr)) { dev_err(&pdev->dev, "cannot find iomuxc registers\n"); @@ -141,22 +139,25 @@ index 68f69fb03eec..128283d541d8 100644 regmap_update_bits(gpr, IOMUXC_GPR1, MCLK_DIR(index), MCLK_DIR(index)); -@@ -1489,6 +1501,8 @@ static int fsl_sai_probe(struct platform_device *pdev) - - if (sysfs_create_group(&pdev->dev.kobj, fsl_sai_get_dev_attribute_group(sai->monitor_spdif))) +@@ -1488,6 +1501,8 @@ static int fsl_sai_probe(struct platform_device *pdev) dev_err(&pdev->dev, "fail to create sys group\n"); + goto err_pm_get_sync; + } + else + sysfs_initialized = true; } - pm_runtime_put_sync(&pdev->dev); -@@ -1509,11 +1523,16 @@ static int fsl_sai_probe(struct platform_device *pdev) - goto err_pm_disable; - } + /* +@@ -1509,7 +1524,7 @@ static int fsl_sai_probe(struct platform_device *pdev) + if (ret) + goto err_component_register; - return ret; + goto general_finish; + err_component_register: + if (sai->verid.feature & FSL_SAI_VERID_TSTMP_EN) +@@ -1521,6 +1536,11 @@ static int fsl_sai_probe(struct platform_device *pdev) err_pm_disable: pm_runtime_disable(&pdev->dev); @@ -169,7 +170,7 @@ index 68f69fb03eec..128283d541d8 100644 } diff --git a/sound/soc/fsl/imx-pcm-dma.c b/sound/soc/fsl/imx-pcm-dma.c -index 04a9bc749016..25ef5e0e6681 100644 +index 7ec48dfb1ee7..c83c76ddda6b 100644 --- a/sound/soc/fsl/imx-pcm-dma.c +++ b/sound/soc/fsl/imx-pcm-dma.c @@ -37,6 +37,7 @@ static const struct snd_dmaengine_pcm_config imx_dmaengine_pcm_config = { @@ -180,9 +181,9 @@ index 04a9bc749016..25ef5e0e6681 100644 config = devm_kzalloc(&pdev->dev, sizeof(struct snd_dmaengine_pcm_config), GFP_KERNEL); -@@ -44,9 +45,11 @@ int imx_pcm_dma_init(struct platform_device *pdev, size_t size) - return -ENOMEM; - *config = imx_dmaengine_pcm_config; +@@ -47,9 +48,11 @@ int imx_pcm_dma_init(struct platform_device *pdev, size_t size) + if (size) + config->prealloc_buffer_size = size; - return devm_snd_dmaengine_pcm_register(&pdev->dev, - config, @@ -196,5 +197,5 @@ index 04a9bc749016..25ef5e0e6681 100644 EXPORT_SYMBOL_GPL(imx_pcm_dma_init); -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0043-config-Fix-build-time-warnings.patch b/recipes-kernel/linux/compulab/imx8mm/0043-config-Fix-build-time-warnings.patch index a62be86..0001c88 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0043-config-Fix-build-time-warnings.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0043-config-Fix-build-time-warnings.patch @@ -1,7 +1,7 @@ -From f882a3bcacb5237316cb6a4408237d226847db45 Mon Sep 17 00:00:00 2001 +From f1a9e5a14b40f56865da600dbddda1cb6e444ef5 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 30 Aug 2021 23:18:26 +0300 -Subject: [PATCH 43/43] config: Fix build-time warnings +Subject: [PATCH 43/82] config: Fix build-time warnings Signed-off-by: Kirill Kapranov --- @@ -43,5 +43,5 @@ index 5f75b54ca245..0182fa452715 100644 CONFIG_SND_SOC_WM8731=y CONFIG_SND_SIMPLE_CARD=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0044-defconfig-Break-down-to-common-and-specific-parts.patch b/recipes-kernel/linux/compulab/imx8mm/0044-defconfig-Break-down-to-common-and-specific-parts.patch index 6fd5318..bd05888 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0044-defconfig-Break-down-to-common-and-specific-parts.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0044-defconfig-Break-down-to-common-and-specific-parts.patch @@ -1,7 +1,7 @@ -From 4fed7067d800df889a102b1b25c858a354b802a1 Mon Sep 17 00:00:00 2001 +From 6df2a292d6946e68219fd213e498986c14c31505 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 13 Sep 2021 00:04:20 +0300 -Subject: [PATCH 44/44] defconfig: Break down to common and specific parts +Subject: [PATCH 44/82] defconfig: Break down to common and specific parts Signed-off-by: Kirill Kapranov --- @@ -19,14 +19,14 @@ rename from arch/arm64/configs/ucm-imx8m-mini_defconfig rename to arch/arm64/configs/cl-imx8m-mini_defconfig diff --git a/arch/arm64/configs/mcm-imx8m-mini.config b/arch/arm64/configs/mcm-imx8m-mini.config new file mode 100644 -index 000000000000..108f1885c60c +index 000000000000..539b7ff59f00 --- /dev/null +++ b/arch/arm64/configs/mcm-imx8m-mini.config @@ -0,0 +1 @@ +CONFIG_LOCALVERSION="-mcm-imx8m-mini-1.1" diff --git a/arch/arm64/configs/ucm-imx8m-mini.config b/arch/arm64/configs/ucm-imx8m-mini.config new file mode 100644 -index 000000000000..dfdcea6de941 +index 000000000000..228631956437 --- /dev/null +++ b/arch/arm64/configs/ucm-imx8m-mini.config @@ -0,0 +1 @@ diff --git a/recipes-kernel/linux/compulab/imx8mm/0045-dtb-Add-mcm-device-trees.patch b/recipes-kernel/linux/compulab/imx8mm/0045-dtb-Add-mcm-device-trees.patch index 97dc910..a0d916e 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0045-dtb-Add-mcm-device-trees.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0045-dtb-Add-mcm-device-trees.patch @@ -1,22 +1,22 @@ -From 32da3f9f4f07f1dd51d9d68557c7545caeecf921 Mon Sep 17 00:00:00 2001 +From 577d379a0652d40eb5b83cba79b82d02c664dc09 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 13 Sep 2021 01:03:00 +0300 -Subject: [PATCH 45/45] dtb: Add mcm device trees +Subject: [PATCH 45/82] dtb: Add mcm device trees Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/Makefile | 7 + - .../boot/dts/compulab/mcm-imx8m-mini-input.dtsi | 36 + - arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts | 29 + - .../boot/dts/compulab/mcm-imx8m-mini-rs485.dtsi | 22 + - .../boot/dts/compulab/mcm-imx8m-mini-spidev.dtsi | 48 ++ - .../boot/dts/compulab/mcm-imx8m-mini-thermal.dts | 30 + - arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dts | 766 +++++++++++++++++++++ - arch/arm64/boot/dts/compulab/sb-mcm-imx8-rev1.dtsi | 297 ++++++++ - .../boot/dts/compulab/sbc-mcm-imx8m-mini-input.dts | 10 + - .../boot/dts/compulab/sbc-mcm-imx8m-mini-rs485.dts | 15 + - .../dts/compulab/sbc-mcm-imx8m-mini-spidev.dts | 10 + - .../arm64/boot/dts/compulab/sbc-mcm-imx8m-mini.dts | 9 + + arch/arm64/boot/dts/compulab/Makefile | 7 + + .../dts/compulab/mcm-imx8m-mini-input.dtsi | 36 + + .../boot/dts/compulab/mcm-imx8m-mini-m4.dts | 29 + + .../dts/compulab/mcm-imx8m-mini-rs485.dtsi | 22 + + .../dts/compulab/mcm-imx8m-mini-spidev.dtsi | 48 ++ + .../dts/compulab/mcm-imx8m-mini-thermal.dts | 30 + + .../boot/dts/compulab/mcm-imx8m-mini.dts | 766 ++++++++++++++++++ + .../boot/dts/compulab/sb-mcm-imx8-rev1.dtsi | 297 +++++++ + .../dts/compulab/sbc-mcm-imx8m-mini-input.dts | 10 + + .../dts/compulab/sbc-mcm-imx8m-mini-rs485.dts | 15 + + .../compulab/sbc-mcm-imx8m-mini-spidev.dts | 10 + + .../boot/dts/compulab/sbc-mcm-imx8m-mini.dts | 9 + 12 files changed, 1279 insertions(+) create mode 100644 arch/arm64/boot/dts/compulab/mcm-imx8m-mini-input.dtsi create mode 100644 arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts @@ -1015,7 +1015,7 @@ index 000000000000..9b917031ef6e +}; diff --git a/arch/arm64/boot/dts/compulab/sb-mcm-imx8-rev1.dtsi b/arch/arm64/boot/dts/compulab/sb-mcm-imx8-rev1.dtsi new file mode 100644 -index 000000000000..5e148929642c +index 000000000000..fa250f89ddab --- /dev/null +++ b/arch/arm64/boot/dts/compulab/sb-mcm-imx8-rev1.dtsi @@ -0,0 +1,297 @@ @@ -1385,5 +1385,5 @@ index 000000000000..d08abebf5f2c + compatible = "cpl,sbc-mcm-imx8m-mini", "cpl,mcm-imx8m-mini", "fsl,imx8mm"; +}; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch b/recipes-kernel/linux/compulab/imx8mm/0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch index 3b1a2da..2c722a8 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0046-defconfig-Fix-PCIe-and-mPCIE_USB.patch @@ -1,7 +1,7 @@ -From 9020bc04c0a151989fa4d4e79cd4677a936a9f2e Mon Sep 17 00:00:00 2001 +From 16b2ab706c5497536cde9138554db4d2c536a06c Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 25 Oct 2021 23:39:29 +0300 -Subject: [PATCH 46/46] defconfig: Fix PCIe and mPCIE_USB +Subject: [PATCH 46/82] defconfig: Fix PCIe and mPCIE_USB Regression: these interfaces stop working because the driver reset_imx7 has been excluded after some Kconfigs cleaning. Thus a card in mPCIe slot left @@ -22,5 +22,5 @@ index 0182fa452715..a764b4022657 100644 CONFIG_CORESIGHT_SOURCE_ETM4X=y +CONFIG_RESET_IMX7=y -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0047-defconfig-Fix-mipi-csi-camera.patch b/recipes-kernel/linux/compulab/imx8mm/0047-defconfig-Fix-mipi-csi-camera.patch index a8f9586..38311d1 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0047-defconfig-Fix-mipi-csi-camera.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0047-defconfig-Fix-mipi-csi-camera.patch @@ -1,7 +1,7 @@ -From 72c5918fe97c992f963ea3ed8ada7578c74300e9 Mon Sep 17 00:00:00 2001 +From 192d1633303db72b6c5a0a308a8c0627a265fc30 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Thu, 28 Oct 2021 01:02:03 +0300 -Subject: [PATCH 47/47] defconfig: Fix mipi-csi camera +Subject: [PATCH 47/82] defconfig: Fix mipi-csi camera Regression: the driver for mipi-csi camera ov5640 has been dropped since the configuration parameter CONFIG_MEDIA_SUPPORT_FILTER has been enabled by @@ -23,5 +23,5 @@ index a764b4022657..c4f1603773e8 100644 CONFIG_RESET_IMX7=y +CONFIG_MEDIA_SUPPORT_FILTER=n -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch b/recipes-kernel/linux/compulab/imx8mm/0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch index 4511af2..e20599b 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0048-dts-ucm-imx8m-mini-Add-_thermal_-dts.patch @@ -1,7 +1,7 @@ -From 85865cbe8c8e882fe4ac61fa75a27d1a506dc4cb Mon Sep 17 00:00:00 2001 +From 848f28fa2bc96d1a7f47259e888bd0c8d1871362 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 7 Nov 2021 23:44:43 +0200 -Subject: [PATCH 48/48] dts:ucm-imx8m-mini: Add _thermal_ dts +Subject: [PATCH 48/82] dts:ucm-imx8m-mini: Add _thermal_ dts Signed-off-by: Kirill Kapranov --- diff --git a/recipes-kernel/linux/compulab/imx8mm/0049-mcm-dts-Calibrate-RTC.patch b/recipes-kernel/linux/compulab/imx8mm/0049-mcm-dts-Calibrate-RTC.patch index 0e227d3..190e59f 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0049-mcm-dts-Calibrate-RTC.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0049-mcm-dts-Calibrate-RTC.patch @@ -1,7 +1,7 @@ -From c7507949ce9ddf3aefbb6c121ecbff45d2971548 Mon Sep 17 00:00:00 2001 +From 3ca48fbfdf6d5de1d49498ee3919905c656b478a Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Fri, 24 Dec 2021 01:09:56 +0200 -Subject: [PATCH 49/49] mcm:dts: Calibrate RTC +Subject: [PATCH 49/82] mcm:dts: Calibrate RTC Signed-off-by: Kirill Kapranov --- @@ -22,5 +22,5 @@ index 9b917031ef6e..309207c1d6a0 100644 }; -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0050-mcm-dts-Reorder-DTS.patch b/recipes-kernel/linux/compulab/imx8mm/0050-mcm-dts-Reorder-DTS.patch index 75f406f..2d1bf49 100644 --- a/recipes-kernel/linux/compulab/imx8mm/0050-mcm-dts-Reorder-DTS.patch +++ b/recipes-kernel/linux/compulab/imx8mm/0050-mcm-dts-Reorder-DTS.patch @@ -1,19 +1,19 @@ -From 47d0c5f37227c04b8e5f6d7cf4ef403ddb4b3f77 Mon Sep 17 00:00:00 2001 +From 2e0e475f0086bc5b67e9eda9fe996069ae8dc246 Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Mon, 27 Dec 2021 16:22:42 +0200 -Subject: [PATCH 50/50] mcm:dts: Reorder DTS +Subject: [PATCH 50/82] mcm:dts: Reorder DTS Signed-off-by: Kirill Kapranov --- - arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts | 4 +- - .../boot/dts/compulab/mcm-imx8m-mini-thermal.dts | 2 +- - arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dts | 756 +-------------------- - arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi | 755 ++++++++++++++++++++ - arch/arm64/boot/dts/compulab/sb-mcm-imx8-rev1.dtsi | 16 + - .../boot/dts/compulab/sbc-mcm-imx8m-mini-input.dts | 2 +- - .../boot/dts/compulab/sbc-mcm-imx8m-mini-rs485.dts | 2 +- - .../dts/compulab/sbc-mcm-imx8m-mini-spidev.dts | 2 +- - .../arm64/boot/dts/compulab/sbc-mcm-imx8m-mini.dts | 2 +- + .../boot/dts/compulab/mcm-imx8m-mini-m4.dts | 4 +- + .../dts/compulab/mcm-imx8m-mini-thermal.dts | 2 +- + .../boot/dts/compulab/mcm-imx8m-mini.dts | 756 +----------------- + .../boot/dts/compulab/mcm-imx8m-mini.dtsi | 755 +++++++++++++++++ + .../boot/dts/compulab/sb-mcm-imx8-rev1.dtsi | 16 + + .../dts/compulab/sbc-mcm-imx8m-mini-input.dts | 2 +- + .../dts/compulab/sbc-mcm-imx8m-mini-rs485.dts | 2 +- + .../compulab/sbc-mcm-imx8m-mini-spidev.dts | 2 +- + .../boot/dts/compulab/sbc-mcm-imx8m-mini.dts | 2 +- 9 files changed, 782 insertions(+), 759 deletions(-) create mode 100644 arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi @@ -1651,5 +1651,5 @@ index d08abebf5f2c..5e446a55b511 100644 / { -- -2.11.0 +2.17.1 diff --git a/recipes-kernel/linux/compulab/imx8mm/0051-serial-imx-allow-passing-rs485-options.patch b/recipes-kernel/linux/compulab/imx8mm/0051-serial-imx-allow-passing-rs485-options.patch new file mode 100644 index 0000000..19bc033 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0051-serial-imx-allow-passing-rs485-options.patch @@ -0,0 +1,43 @@ +From d166dfce24f3e5038208973dd41e4878dc14f48b Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 16 Jan 2023 16:46:02 +0200 +Subject: [PATCH 51/51] serial: imx: allow passing rs485 options + +According to Documentation/devicetree/bindings/serial/rs485.txt +the "linux,rs485-enabled-at-boot-time" and "rs485-rx-during-tx" can be +passed by device tree to a serial driver. +Add support for handling these option in the driver. Additionally, add +"rs485-rts-active-high" proiperty to specify a logical level for RTS pin +when sending. + +Signed-off-by: Ilya Ledvich +Signed-off-by: Kirill Kapranov +--- + drivers/tty/serial/imx.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c +index ea9cd848ffc5..2b4dff17ab57 100644 +--- a/drivers/tty/serial/imx.c ++++ b/drivers/tty/serial/imx.c +@@ -2250,6 +2250,17 @@ static int imx_uart_probe(struct platform_device *pdev) + if (of_get_property(np, "fsl,inverted-rx", NULL)) + sport->inverted_rx = 1; + ++ if (of_property_read_bool(np, "linux,rs485-enabled-at-boot-time")) ++ sport->port.rs485.flags |= SER_RS485_ENABLED; ++ ++ if (of_property_read_bool(np, "rs485-rx-during-tx")) ++ sport->port.rs485.flags |= SER_RS485_RX_DURING_TX; ++ ++ if (of_property_read_bool(np, "rs485-rts-active-high")) ++ sport->port.rs485.flags |= SER_RS485_RTS_ON_SEND; ++ else ++ sport->port.rs485.flags |= SER_RS485_RTS_AFTER_SEND; ++ + if (!of_property_read_u32_array(np, "fsl,dma-info", dma_buf_conf, 2)) { + sport->rx_period_length = dma_buf_conf[0]; + sport->rx_periods = dma_buf_conf[1]; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0052-mcm-imx8m-mini-remove-the-local-rpmsg-support.patch b/recipes-kernel/linux/compulab/imx8mm/0052-mcm-imx8m-mini-remove-the-local-rpmsg-support.patch new file mode 100644 index 0000000..f2fb7f0 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0052-mcm-imx8m-mini-remove-the-local-rpmsg-support.patch @@ -0,0 +1,39 @@ +From 0e4164f1c484e4771c45b5faf5518e420fb1a85c Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 5 Jan 2022 19:46:31 +0200 +Subject: [PATCH 52/82] mcm-imx8m-mini: remove the local rpmsg support + +Remove the local rpmsg support, in order to comply with the following +commit: +aa414c3cbb0d5ee4610a20d3b79bed7a3f01c5ec: +LF-4134-2 arm64: dts: remove the local rpmsg support + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts | 10 ---------- + 1 file changed, 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts b/arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts +index 4b97ed29819a..2e9ce351bf95 100644 +--- a/arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts ++++ b/arch/arm64/boot/dts/compulab/mcm-imx8m-mini-m4.dts +@@ -16,16 +16,6 @@ + + #include "mcm-imx8m-mini.dtsi" + +-&rpmsg{ +- /* +- * 64K for one rpmsg instance: +- * --0xb8000000~0xb800ffff: pingpong +- */ +- vdev-nums = <1>; +- reg = <0x0 0xb8000000 0x0 0x10000>; +- status = "okay"; +-}; +- + &uart1 { + status = "disabled"; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0053-ucm-imx8m-mini-dts-rearrange-components.patch b/recipes-kernel/linux/compulab/imx8mm/0053-ucm-imx8m-mini-dts-rearrange-components.patch new file mode 100644 index 0000000..74129bb --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0053-ucm-imx8m-mini-dts-rearrange-components.patch @@ -0,0 +1,1321 @@ +From 4baadb57675bf78101d76259ab0255a646c17356 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Mon, 3 Jan 2022 09:55:05 +0200 +Subject: [PATCH 53/82] ucm-imx8m-mini: dts: rearrange components + +Change boards include relationship - the baseboard includes the module. +Move baseboard components from the modules to the baseboard dts file. +--- + .../boot/dts/compulab/sb-ucm-imx8-rev2.dts | 426 +++++++++++++ + .../boot/dts/compulab/sb-ucm-imx8-rev2.dtsi | 193 ------ + .../boot/dts/compulab/ucm-imx8m-mini.dts | 3 - + .../boot/dts/compulab/ucm-imx8m-mini.dtsi | 589 ++++++------------ + 4 files changed, 609 insertions(+), 602 deletions(-) + create mode 100644 arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dts + delete mode 100644 arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi + +diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dts b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dts +new file mode 100644 +index 000000000000..ece50257dadc +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dts +@@ -0,0 +1,426 @@ ++/* ++ * Copyright (C) 2018 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++/ { ++ simple_sound: sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "cl-imx8m-mini"; ++ simple-audio-card,widgets = ++ "Headphone", "Headphone Jack", ++ "Line", "Line Out", ++ "Microphone", "Mic Jack", ++ "Line", "Line In"; ++ simple-audio-card,routing = ++ "Headphone Jack", "RHPOUT", ++ "Headphone Jack", "LHPOUT", ++ "MICIN", "Mic Bias", ++ "Mic Bias", "Mic Jack"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,bitclock-master = <&sound_master>; ++ simple-audio-card,frame-master = <&sound_master>; ++ ++ sound_master: simple-audio-card,cpu { ++ sound-dai = <&sai2>; ++ system-clock-frequency = <0>; ++ system-clock-direction = "out"; ++ }; ++ ++ sound_codec: simple-audio-card,codec { ++ sound-dai = <&wm8731>; ++ system-clock-direction = "in"; ++ system-clock-type = "mclk"; ++ }; ++ }; ++ ++ clocks { ++ clk40m: clk@1 { ++ compatible = "fixed-clock"; ++ #reg = <1>; ++ #clock-cells = <0>; ++ clock-frequency = <40000000>; ++ clock-output-names = "clk40m"; ++ }; ++ }; ++ ++ pcie0_refclk: pcie0-refclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <100000000>; ++ }; ++ ++ reg_usdhc2_vmmc: regulator-usdhc2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VSD_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ startup-delay-us = <100>; ++ off-on-delay-us = <12000>; ++ }; ++ ++ backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm2 0 3000000 0>; ++ ++ brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ++ 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 ++ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 ++ 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 ++ 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 ++ 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 ++ 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 ++ 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 ++ 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 ++ 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 ++ 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 ++ 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 ++ 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 ++ 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 ++ 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 ++ 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; ++ default-brightness-level = <222>; ++ status = "okay"; ++ }; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++ assigned-clocks = <&clk IMX8MM_CLK_UART1>; ++ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ assigned-clocks = <&clk IMX8MM_CLK_UART2>; ++ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ pca9555:pca9555@20 { ++ compatible = "nxp,pca9555"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x20>; ++ }; ++ ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "disabled"; ++}; ++ ++&i2c4 { ++ clock-frequency = <400000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ wm8731: wm8731@1a { ++ #sound-dai-cells = <0>; ++ compatible = "wlf,wm8731"; ++ reg = <0x1a>; ++ status = "okay"; ++ }; ++ ++ ov5640_mipi: ov5640_mipi@3c { ++ compatible = "ovti,ov5640_mipi"; ++ reg = <0x3c>; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_csi1>; ++ clocks = <&clk IMX8MM_CLK_CLKO1>; ++ clock-names = "csi_mclk"; ++ assigned-clocks = <&clk IMX8MM_CLK_CLKO1>; ++ assigned-clock-parents = <&clk IMX8MM_CLK_24M>; ++ assigned-clock-rates = <0>, <24000000>; ++ csi_id = <0>; ++ /* ++ To be looked into & fixed ++ As of now the device is alwas out of reset & under the power ++ */ ++ pwn-gpios = <&pca9555 8 GPIO_ACTIVE_LOW>; ++ rst-gpios = <&pca9555 3 GPIO_ACTIVE_HIGH>; ++ ++ mclk = <24000000>; ++ mclk_source = <0>; ++ port { ++ ov5640_mipi1_ep: endpoint { ++ remote-endpoint = <&mipi1_sensor_ep>; ++ }; ++ }; ++ }; ++ ++ goodix_ts@5d { ++ compatible = "goodix,gt911"; ++ reg = <0x5d>; ++ ++ interrupt-parent = <&gpio1>; ++ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&touchscreen_pins>; ++ ++ irq-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&pca9555 4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&usbotg1 { ++ dr_mode = "otg"; ++ hnp-disable; ++ srp-disable; ++ disable-over-current; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm_backlight>; ++ status = "okay"; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; ++ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; ++ no-1-8-v; ++ bus-width = <4>; ++ vmmc-supply = <®_usdhc2_vmmc>; ++ status = "okay"; ++}; ++ ++&pcie0 { ++ compatible = "fsl,imx8mm-pcie"; ++ reset-gpio = <&pca9555 0 GPIO_ACTIVE_LOW>; ++ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, ++ <&clk IMX8MM_CLK_PCIE1_AUX>, ++ <&clk IMX8MM_CLK_PCIE1_PHY>, ++ <&pcie0_refclk>; ++ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; ++ ext_osc = <1>; ++ reserved-region = <&rpmsg_reserved>; ++ status = "okay"; ++}; ++ ++&sai2 { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_sai2>; ++ assigned-clocks = <&clk IMX8MM_CLK_SAI2>; ++ assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; ++ assigned-clock-rates = <12288000>; ++ status = "okay"; ++}; ++ ++&mipi_csi_1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ port { ++ mipi1_sensor_ep: endpoint@1 { ++ remote-endpoint = <&ov5640_mipi1_ep>; ++ data-lanes = <2>; ++ csis-hs-settle = <13>; ++ csis-clk-settle = <2>; ++ csis-wclk; ++ }; ++ ++ csi1_mipi_ep: endpoint@2 { ++ remote-endpoint = <&csi1_ep>; ++ }; ++ }; ++}; ++ ++&csi1_bridge { ++ fsl,mipi-mode; ++ status = "okay"; ++ ++ port { ++ csi1_ep: endpoint { ++ remote-endpoint = <&csi1_mipi_ep>; ++ }; ++ }; ++}; ++ ++&mipi_dsi { ++ status = "okay"; ++ panel: panel@0 { ++ compatible = "startek,kd050hdfia020"; ++ reg = <0>; ++ reset-gpio = <&pca9555 6 GPIO_ACTIVE_LOW>; ++ dsi-lanes = <4>; ++ status = "okay"; ++ ++ }; ++}; ++ ++&lcdif { ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++}; ++ ++&vpu_g1 { ++ status = "okay"; ++}; ++ ++&vpu_g2 { ++ status = "okay"; ++}; ++ ++&vpu_h1 { ++ status = "okay"; ++}; ++ ++&iomuxc { ++ sb-ucm-imx8 { ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 ++ MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 ++ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_pwm_backlight: pwm_backlightgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO13_PWM2_OUT 0x03 ++ >; ++ }; ++ ++ pinctrl_usdhc2_gpio: usdhc2grpgpio { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 ++ MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x00 ++ >; ++ }; ++ ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_100mhz: usdhc2grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_200mhz: usdhc2grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_sai2: sai2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 ++ MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 ++ MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0xd6 ++ MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 ++ MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 ++ MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 ++ >; ++ }; ++ ++ touchscreen_pins: tsgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x00 ++ >; ++ }; ++ ++ /* ++ Copy & Paste from an MXP evk ++ As of now an external OSC1 25MHz is in use ++ Left as an example for the next revision ++ */ ++ pinctrl_csi1: csi1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x59 ++ MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59 ++ >; ++ }; ++ } ++} +diff --git a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi b/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi +deleted file mode 100644 +index 2a5483bb62d3..000000000000 +--- a/arch/arm64/boot/dts/compulab/sb-ucm-imx8-rev2.dtsi ++++ /dev/null +@@ -1,193 +0,0 @@ +-/* +- * Copyright (C) 2018 CompuLab Ltd. +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * as published by the Free Software Foundation; either version 2 +- * of the License, or (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- */ +- +-/ { +- simple_sound: sound { +- compatible = "simple-audio-card"; +- simple-audio-card,name = "cl-imx8m-mini"; +- simple-audio-card,widgets = +- "Headphone", "Headphone Jack", +- "Line", "Line Out", +- "Microphone", "Mic Jack", +- "Line", "Line In"; +- simple-audio-card,routing = +- "Headphone Jack", "RHPOUT", +- "Headphone Jack", "LHPOUT", +- "MICIN", "Mic Bias", +- "Mic Bias", "Mic Jack"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,bitclock-master = <&sound_master>; +- simple-audio-card,frame-master = <&sound_master>; +- +- sound_master: simple-audio-card,cpu { +- sound-dai = <&sai2>; +- system-clock-frequency = <0>; +- system-clock-direction = "out"; +- }; +- +- sound_codec: simple-audio-card,codec { +- sound-dai = <&wm8731>; +- system-clock-direction = "in"; +- system-clock-type = "mclk"; +- }; +- }; +- +- clocks { +- clk40m: clk@1 { +- compatible = "fixed-clock"; +- #reg = <1>; +- #clock-cells = <0>; +- clock-frequency = <40000000>; +- clock-output-names = "clk40m"; +- }; +- }; +- +- pcie0_refclk: pcie0-refclk { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <100000000>; +- }; +-}; +- +-&pcie0 { +- compatible = "fsl,imx8mm-pcie"; +- reset-gpio = <&pca9555 0 GPIO_ACTIVE_LOW>; +- clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, +- <&clk IMX8MM_CLK_PCIE1_AUX>, +- <&clk IMX8MM_CLK_PCIE1_PHY>, +- <&pcie0_refclk>; +- clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; +- ext_osc = <1>; +- reserved-region = <&rpmsg_reserved>; +- status = "okay"; +-}; +- +-&i2c1 { +- clock-frequency = <100000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c1>; +- status = "okay"; +- +- pca9555:pca9555@20 { +- compatible = "nxp,pca9555"; +- gpio-controller; +- #gpio-cells = <2>; +- reg = <0x20>; +- }; +- +- eeprom@54 { +- compatible = "atmel,24c08"; +- reg = <0x54>; +- pagesize = <16>; +- }; +-}; +- +-&i2c4 { +- clock-frequency = <400000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c4>; +- status = "okay"; +- +- wm8731: wm8731@1a { +- #sound-dai-cells = <0>; +- compatible = "wlf,wm8731"; +- reg = <0x1a>; +- status = "okay"; +- }; +- +- ov5640_mipi: ov5640_mipi@3c { +- compatible = "ovti,ov5640_mipi"; +- reg = <0x3c>; +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_csi1>; +- clocks = <&clk IMX8MM_CLK_CLKO1>; +- clock-names = "csi_mclk"; +- assigned-clocks = <&clk IMX8MM_CLK_CLKO1>; +- assigned-clock-parents = <&clk IMX8MM_CLK_24M>; +- assigned-clock-rates = <0>, <24000000>; +- csi_id = <0>; +- /* +- To be looked into & fixed +- As of now the device is alwas out of reset & under the power +- */ +- pwn-gpios = <&pca9555 8 GPIO_ACTIVE_LOW>; +- rst-gpios = <&pca9555 3 GPIO_ACTIVE_HIGH>; +- +- mclk = <24000000>; +- mclk_source = <0>; +- port { +- ov5640_mipi1_ep: endpoint { +- remote-endpoint = <&mipi1_sensor_ep>; +- }; +- }; +- }; +- +- goodix_ts@5d { +- compatible = "goodix,gt911"; +- reg = <0x5d>; +- +- interrupt-parent = <&gpio1>; +- interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&touchscreen_pins>; +- +- irq-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; +- reset-gpios = <&pca9555 4 GPIO_ACTIVE_HIGH>; +- status = "okay"; +- }; +-}; +- +-&mipi_csi_1 { +- #address-cells = <1>; +- #size-cells = <0>; +- status = "okay"; +- port { +- mipi1_sensor_ep: endpoint@1 { +- remote-endpoint = <&ov5640_mipi1_ep>; +- data-lanes = <2>; +- csis-hs-settle = <13>; +- csis-clk-settle = <2>; +- csis-wclk; +- }; +- +- csi1_mipi_ep: endpoint@2 { +- remote-endpoint = <&csi1_ep>; +- }; +- }; +-}; +- +-&csi1_bridge { +- fsl,mipi-mode; +- status = "okay"; +- +- port { +- csi1_ep: endpoint { +- remote-endpoint = <&csi1_mipi_ep>; +- }; +- }; +-}; +- +-&mipi_dsi { +- status = "okay"; +- panel: panel@0 { +- compatible = "startek,kd050hdfia020"; +- reg = <0>; +- reset-gpio = <&pca9555 6 GPIO_ACTIVE_LOW>; +- dsi-lanes = <4>; +- status = "okay"; +- +- }; +-}; +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts +index f36bb106b230..e1b8aed3087a 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dts +@@ -14,9 +14,6 @@ + + /dts-v1/; + +-#include "../freescale/imx8mm.dtsi" +-#include "sb-ucm-imx8-rev2.dtsi" +-#include "../freescale/imx8mm-pinfunc.h" + #include "ucm-imx8m-mini.dtsi" + + / { +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +index 377574898946..d90e0b7763b3 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +@@ -12,6 +12,8 @@ + * GNU General Public License for more details. + */ + ++#include "../freescale/imx8mm.dtsi" ++ + / { + aliases { + rtc0 = &rtc0; +@@ -49,17 +51,6 @@ + }; + }; + +- reg_usdhc2_vmmc: regulator-usdhc2 { +- compatible = "regulator-fixed"; +- regulator-name = "VSD_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- startup-delay-us = <100>; +- off-on-delay-us = <12000>; +- }; +- + regulator-usdhc3rst { + compatible = "regulator-fixed"; + regulator-name = "usdhc3_rst"; +@@ -93,317 +84,8 @@ + reset-post-delay-ms = <40>; + #reset-cells = <0>; + }; +- +- backlight { +- compatible = "pwm-backlight"; +- pwms = <&pwm2 0 3000000 0>; +- +- brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 +- 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 +- 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 +- 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 +- 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 +- 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 +- 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 +- 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 +- 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 +- 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 +- 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 +- 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 +- 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 +- 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 +- 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 +- 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; +- default-brightness-level = <222>; +- status = "okay"; +- }; + }; + +-&iomuxc { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_hog_1>; +- +- ucm-imx8m-mini { +- pinctrl_hog_1: hoggrp-1 { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 +- MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x190 +- >; +- }; +- +- pinctrl_fec1: fec1grp { +- fsl,pins = < +- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 +- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 +- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f +- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f +- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f +- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f +- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 +- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 +- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 +- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 +- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f +- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 +- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 +- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f +- >; +- }; +- +- pinctrl_gpio_led: gpioledgrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 +- >; +- }; +- +- pinctrl_i2c1: i2c1grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c2: i2c2grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c3: i2c3grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_i2c4: i2c4grp { +- fsl,pins = < +- MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 +- MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 +- >; +- }; +- +- pinctrl_pmic: pmicirq { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 +- >; +- }; +- +- pinctrl_uart1: uart1grp { +- fsl,pins = < +- MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 +- MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 +- >; +- }; +- +- pinctrl_uart2: uart2grp { +- fsl,pins = < +- MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 +- MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 +- >; +- }; +- +- pinctrl_uart3: uart3grp { +- fsl,pins = < +- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 +- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 +- >; +- }; +- +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x140 +- MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x140 +- MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x140 +- MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140 +- >; +- }; +- +- pinctrl_usdhc1_gpio: usdhc1grpgpio { +- fsl,pins = < +- MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 +- >; +- }; +- +- pinctrl_usdhc1: usdhc1grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 +- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 +- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 +- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 +- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 +- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 +- MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc1_100mhz: usdhc1grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 +- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 +- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 +- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 +- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 +- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 +- MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc1_200mhz: usdhc1grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 +- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 +- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 +- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 +- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 +- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 +- MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 +- >; +- }; +- +- +- pinctrl_usdhc2_gpio: usdhc2grpgpio { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 +- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 +- MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x00 +- >; +- }; +- +- pinctrl_usdhc2: usdhc2grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_100mhz: usdhc2grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc2_200mhz: usdhc2grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 +- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 +- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 +- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 +- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 +- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 +- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 +- >; +- }; +- +- pinctrl_usdhc3: usdhc3grp { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 +- >; +- }; +- +- pinctrl_usdhc3_100mhz: usdhc3grp100mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 +- >; +- }; +- +- pinctrl_usdhc3_200mhz: usdhc3grp200mhz { +- fsl,pins = < +- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 +- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 +- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 +- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 +- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 +- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 +- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 +- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 +- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 +- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 +- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 +- >; +- }; +- +- pinctrl_wdog: wdoggrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 +- >; +- }; +- +- touchscreen_pins: tsgrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x00 +- >; +- }; +- /* +- Copy & Paste from an MXP evk +- As of now an external OSC1 25MHz is in use +- Left as an example for the next revision +- */ +- pinctrl_csi1: csi1grp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x59 +- MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59 +- >; +- }; +- +- pinctrl_sai2: sai2grp { +- fsl,pins = < +- MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 +- MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 +- MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0xd6 +- MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 +- MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 +- MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 +- >; +- }; +- +- pinctrl_pwm_backlight: pwm_backlightgrp { +- fsl,pins = < +- MX8MM_IOMUXC_GPIO1_IO13_PWM2_OUT 0x03 +- >; +- }; +- +- pinctrl_bt: bt0grp { +- fsl,pins = < +- MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19 /* BT_REG_ON */ +- MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19 /* BT_DEV_WU */ +- MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19 /* BT_HST_WU */ +- >; +- }; +- }; +-}; + + &i2c2 { + clock-frequency = <400000>; +@@ -559,11 +241,15 @@ + }; + }; + +-&i2c3 { +- clock-frequency = <100000>; ++&A53_0 { ++ arm-supply = <&buck2_reg>; ++}; ++ ++&wdog1 { + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_i2c3>; +- status = "disabled"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++ status = "okay"; + }; + + &snvs { +@@ -597,22 +283,6 @@ + }; + }; + +-&uart1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart1>; +- assigned-clocks = <&clk IMX8MM_CLK_UART1>; +- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; +- status = "okay"; +-}; +- +-&uart2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart2>; +- assigned-clocks = <&clk IMX8MM_CLK_UART2>; +- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; +- status = "okay"; +-}; +- + &uart3 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; +@@ -662,18 +332,6 @@ + }; + }; + +-&usdhc2 { +- pinctrl-names = "default", "state_100mhz", "state_200mhz"; +- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; +- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; +- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; +- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; +- wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; +- no-1-8-v; +- bus-width = <4>; +- vmmc-supply = <®_usdhc2_vmmc>; +- status = "okay"; +-}; + + &usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; +@@ -686,72 +344,191 @@ + status = "okay"; + }; + +-&wdog1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_wdog>; +- fsl,ext-reset-output; ++&usbotg2 { ++ dr_mode = "host"; ++ hnp-disable; ++ srp-disable; ++ disable-over-current; + status = "okay"; + }; + +-&A53_0 { +- arm-supply = <&buck2_reg>; ++&cpu_alert0 { ++ temperature = <105000>; + }; +- +-&gpu { +- status = "okay"; ++&cpu_crit0 { ++ temperature = <115000>; + }; + +-&vpu_g1 { +- status = "okay"; +-}; ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog_1>; + +-&vpu_g2 { +- status = "okay"; +-}; ++ ucm-imx8m-mini { ++ pinctrl_hog_1: hoggrp-1 { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 ++ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x190 ++ >; ++ }; + +-&vpu_h1 { +- status = "okay"; +-}; ++ pinctrl_fec1: fec1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 ++ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 ++ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f ++ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f ++ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f ++ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f ++ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 ++ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 ++ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 ++ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 ++ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f ++ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 ++ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 ++ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f ++ >; ++ }; + +-&usbotg1 { +- dr_mode = "otg"; +- hnp-disable; +- srp-disable; +- disable-over-current; +- status = "okay"; +-}; ++ pinctrl_gpio_led: gpioledgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 ++ >; ++ }; + +-&usbotg2 { +- dr_mode = "host"; +- hnp-disable; +- srp-disable; +- disable-over-current; +- status = "okay"; +-}; ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 ++ >; ++ }; + +-&sai2 { +- #sound-dai-cells = <0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_sai2>; +- assigned-clocks = <&clk IMX8MM_CLK_SAI2>; +- assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; +- assigned-clock-rates = <12288000>; +- status = "okay"; +-}; ++ pinctrl_pmic: pmicirq { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 ++ >; ++ }; + +-&lcdif { +- status = "okay"; +-}; ++ pinctrl_uart3: uart3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 ++ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 ++ >; ++ }; + +-&pwm2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_pwm_backlight>; +- status = "okay"; +-}; ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x140 ++ MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x140 ++ MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x140 ++ MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140 ++ >; ++ }; + +-&cpu_alert0 { +- temperature = <105000>; +-}; +-&cpu_crit0 { +- temperature = <115000>; ++ pinctrl_usdhc1_gpio: usdhc1grpgpio { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 ++ >; ++ }; ++ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 ++ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 ++ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 ++ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 ++ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 ++ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 ++ MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc1_100mhz: usdhc1grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 ++ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 ++ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 ++ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 ++ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 ++ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 ++ MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc1_200mhz: usdhc1grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 ++ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 ++ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 ++ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 ++ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 ++ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 ++ MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x1d0 ++ >; ++ }; ++ ++ ++ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196 ++ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 ++ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 ++ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 ++ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 ++ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 ++ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 ++ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 ++ >; ++ }; ++ ++ pinctrl_bt: bt0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19 /* BT_REG_ON */ ++ MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19 /* BT_DEV_WU */ ++ MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19 /* BT_HST_WU */ ++ >; ++ }; ++ }; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0054-iot-gate-imx8-dts-add-support-for-the-IOT-GATE-iMX8.patch b/recipes-kernel/linux/compulab/imx8mm/0054-iot-gate-imx8-dts-add-support-for-the-IOT-GATE-iMX8.patch new file mode 100644 index 0000000..50ebf60 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0054-iot-gate-imx8-dts-add-support-for-the-IOT-GATE-iMX8.patch @@ -0,0 +1,1389 @@ +From 7e658e65b27159659d602d3e3d52e28dbfcad964 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 22 Jul 2020 18:33:31 +0300 +Subject: [PATCH 54/82] iot-gate-imx8: dts: add support for the IOT-GATE-iMX8 + +The following device tree source files are added: +sb-iotgimx8.dts - SB-IOTGIMX8 without expansion board. +sb-iotgimx8-display.dts - SB-IOTGIMX8 with the expansion board display. +sb-iotgimx8-gpio.dts - SB-IOTGIMX8 with the expansion board GPIO. +sb-iotgimx8-peripheral.dts - SB-IOTGIMX8 with the expansion board +peripheral. +sb-iotgimx8-can.dts - SB-IOTGIMX8 with the expansion board CAN bus. +sb-iotgimx8-ied.dts - SB-IOTGIMX8 with the expansion board IED-BASE. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/Makefile | 4 + + .../boot/dts/compulab/sb-iotgimx8-can.dts | 161 +++++ + .../boot/dts/compulab/sb-iotgimx8-ied.dts | 215 ++++++ + arch/arm64/boot/dts/compulab/sb-iotgimx8.dts | 300 ++++++++ + arch/arm64/configs/iot-gate-imx8_defconfig | 644 ++++++++++++++++++ + 5 files changed, 1324 insertions(+) + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8.dts + create mode 100644 arch/arm64/configs/iot-gate-imx8_defconfig + +diff --git a/arch/arm64/boot/dts/compulab/Makefile b/arch/arm64/boot/dts/compulab/Makefile +index 0db254eb070b..fa5662fdb782 100644 +--- a/arch/arm64/boot/dts/compulab/Makefile ++++ b/arch/arm64/boot/dts/compulab/Makefile +@@ -7,6 +7,10 @@ dtb-$(CONFIG_ARCH_MXC) += sbc-mcm-imx8m-mini.dtb + dtb-$(CONFIG_ARCH_MXC) += sbc-mcm-imx8m-mini-rs485.dtb + dtb-$(CONFIG_ARCH_MXC) += sbc-mcm-imx8m-mini-spidev.dtb + dtb-$(CONFIG_ARCH_MXC) += sbc-mcm-imx8m-mini-input.dtb ++dtb-$(CONFIG_ARCH_MXC) += ucm-imx8m-mini.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-can.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied.dtb + + always-y := $(dtb-y) + subdir-y := $(dts-dirs) +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts +new file mode 100644 +index 000000000000..85a4bf2f97f1 +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts +@@ -0,0 +1,161 @@ ++/* ++ * Copyright (C) 2020 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "sb-iotgimx8.dts" ++ ++/ { ++ model = "CompuLab SB-IOTGIMX8 board + CAN bus extension"; ++ compatible = "sb-iotgimx8-can", "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; ++ ++ clocks { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clk40m: clk@1 { ++ compatible = "fixed-clock"; ++ reg = <1>; ++ #clock-cells = <0>; ++ clock-frequency = <40000000>; ++ clock-output-names = "clk40m"; ++ }; ++ }; ++ ++ regulator-can0term { ++ compatible = "regulator-fixed"; ++ regulator-name = "can0_term"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 8 GPIO_ACTIVE_LOW>; ++ regulator-always-on; ++ enable-active-low; ++ }; ++ ++ regulator-can1term { ++ compatible = "regulator-fixed"; ++ regulator-name = "can1_term"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 9 GPIO_ACTIVE_LOW>; ++ regulator-always-on; ++ enable-active-low; ++ }; ++}; ++ ++&i2c4 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&ecspi2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++ ++ can0: can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_can0>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ spi-max-frequency = <10000000>; ++ clocks = <&clk40m>; ++ }; ++}; ++ ++&ecspi3 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; ++ cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++ ++ can1: can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_can1>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <28 IRQ_TYPE_LEVEL_LOW>; ++ spi-max-frequency = <10000000>; ++ clocks = <&clk40m>; ++ }; ++}; ++ ++&iomuxc { ++ sb-ucm-imx8-can { ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_ecspi2: ecspi2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x02 ++ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x02 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x102 ++ >; ++ }; ++ ++ pinctrl_ecspi2_cs: ecspi2_csgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000 ++ >; ++ }; ++ ++ pinctrl_ecspi3: ecspi3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x02 ++ MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x02 ++ MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x102 ++ >; ++ }; ++ ++ pinctrl_ecspi3_cs: ecspi3_csgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x40000 ++ >; ++ }; ++ ++ ++ pinctrl_can0: can0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x00 ++ MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x00 ++ >; ++ }; ++ ++ pinctrl_can1: can1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x00 ++ MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 0x00 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +new file mode 100644 +index 000000000000..0e775f82c40e +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +@@ -0,0 +1,215 @@ ++/* ++ * Copyright (C) 2020 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "sb-iotgimx8.dts" ++ ++/delete-node/ &pinctrl_uart4; ++ ++/ { ++ model = "CompuLab SB-IOTGIMX8 board + IED-BASE extension"; ++ compatible = "sb-iotgimx8-ied", "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; ++ ++ clocks { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clk40m: clk@1 { ++ compatible = "fixed-clock"; ++ reg = <1>; ++ #clock-cells = <0>; ++ clock-frequency = <40000000>; ++ clock-output-names = "clk40m"; ++ }; ++ }; ++ ++ regulator-uart2-trm { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart2-trm"; ++ gpio = <&gpio5 12 GPIO_ACTIVE_LOW>; ++ regulator-always-on; ++ enable-active-low; ++ }; ++ ++ regulator-uart4-trm { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart4-trm"; ++ gpio = <&gpio5 24 GPIO_ACTIVE_LOW>; ++ regulator-always-on; ++ enable-active-low; ++ }; ++}; ++ ++&i2c4 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ pca9555:pca9555@22 { ++ compatible = "nxp,pca9555"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x22>; ++ }; ++ ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2 &pinctrl_uart2_gpio>; ++}; ++ ++&uart4 { ++ pinctrl-0 = <&pinctrl_uart4 &pinctrl_uart4_gpio>; ++ /delete-property/ uart-has-rtscts; ++ status = "disabled"; ++ /delete-node/ bluetooth; ++}; ++ ++&ecspi2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; ++ ++ can0: can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_can0>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ spi-max-frequency = <10000000>; ++ clocks = <&clk40m>; ++ }; ++}; ++ ++&ecspi3 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; ++ cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; ++ ++ can1: can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_can1>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; ++ spi-max-frequency = <10000000>; ++ clocks = <&clk40m>; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog_sb_iotgimx8_ied>; ++ ++ sb-iotgimx8-ied { ++ pinctrl_hog_sb_iotgimx8_ied: hoggrp-sb-iotgimx8-ied { ++ fsl,pins = < ++ /* IED-DI4O4 */ ++ MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x100 /* IN 0 */ ++ MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x100 /* IN 1 */ ++ MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 0x100 /* IN 2 */ ++ MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x100 /* IN 3 */ ++ MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x100 /* OUT 0 */ ++ MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 0x100 /* OUT 1 */ ++ >; ++ }; ++ ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 ++ MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 ++ >; ++ }; ++ ++ pinctrl_uart2_gpio: uart2_cs_grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x00 ++ >; ++ }; ++ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 ++ MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 ++ >; ++ }; ++ ++ pinctrl_uart4_gpio: uart4_cs_grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART2_RXD_GPIO5_IO24 0x00 ++ >; ++ }; ++ ++ pinctrl_ecspi2: ecspi2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x02 ++ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x02 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x102 ++ >; ++ }; ++ ++ pinctrl_ecspi2_cs: ecspi2_csgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000 ++ >; ++ }; ++ ++ pinctrl_ecspi3: ecspi3grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x02 ++ MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x02 ++ MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x102 ++ >; ++ }; ++ ++ pinctrl_ecspi3_cs: ecspi3_csgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x40000 ++ >; ++ }; ++ ++ ++ pinctrl_can0: can0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x00 ++ >; ++ }; ++ ++ pinctrl_can1: can1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x00 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +new file mode 100644 +index 000000000000..92f95a36f5a1 +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +@@ -0,0 +1,300 @@ ++/* ++ * Copyright (C) 2020 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "ucm-imx8m-mini.dts" ++ ++/ { ++ model = "CompuLab SB-IOTGIMX8 board"; ++ compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; ++ ++ regulator-usbhub-ena { ++ compatible = "regulator-fixed"; ++ regulator-name = "usbhub_ena"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-usbhub-rst { ++ compatible = "regulator-fixed"; ++ regulator-name = "usbhub_rst"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-uart1-mode { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart1_mode"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ regulator-uart1-duplex { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart1_duplex"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-uart1-shdn { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart1_shdn"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-uart1-trmen { ++ compatible = "regulator-fixed"; ++ regulator-name = "uart1_trmen"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 25 GPIO_ACTIVE_LOW>; ++ regulator-always-on; ++ enable-active-low; ++ }; ++ ++ regulator-usdhc2_v { ++ compatible = "regulator-fixed"; ++ regulator-name = "usdhc2_v"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-usdhc2_rst { ++ compatible = "regulator-fixed"; ++ regulator-name = "usdhc2_rst"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-mpcie2_rst { ++ compatible = "regulator-fixed"; ++ regulator-name = "mpcie2_rst"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-mpcie2lora_dis { ++ compatible = "regulator-fixed"; ++ regulator-name = "mpcie2lora_dis"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ pcie0_refclk: pcie0-refclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <100000000>; ++ }; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_gpio>; ++ assigned-clocks = <&clk IMX8MM_CLK_UART1>; ++ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; ++ linux,rs485-enabled-at-boot-time; ++ rs485-rts-active-high; ++ rts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&ecspi1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; ++ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&usbotg1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbotg2 { ++ dr_mode = "host"; ++ status = "okay"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ usb9514@1 { ++ compatible = "usb424,9514"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usb9514>; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethernet: usbether@1 { ++ compatible = "usb424,ec00"; ++ reg = <1>; ++ }; ++ }; ++}; ++ ++&usdhc1 { ++ status = "disabled"; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc2>; ++ bus-width = <4>; ++ mmc-ddr-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&pcie0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie0>; ++ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; ++ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, ++ <&clk IMX8MM_CLK_PCIE1_AUX>, ++ <&clk IMX8MM_CLK_PCIE1_PHY>, ++ <&pcie0_refclk>; ++ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; ++ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, ++ <&clk IMX8MM_CLK_PCIE1_PHY>, ++ <&clk IMX8MM_CLK_PCIE1_CTRL>; ++ assigned-clock-rates = <10000000>, <100000000>, <250000000>; ++ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, ++ <&clk IMX8MM_SYS_PLL2_100M>, ++ <&clk IMX8MM_SYS_PLL2_250M>; ++ ext_osc = <1>; ++ status = "okay"; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog_sb_iotgimx8>; ++ ++ sb-iotgimx8 { ++ pinctrl_hog_sb_iotgimx8: hoggrp_sb-iotgimx8 { ++ fsl,pins = < ++ /* mPCIe2 */ ++ MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x140 /* mPCIe2_LORA_DISABLE */ ++ MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x140 /* mPCIe2_PERSTn */ ++ >; ++ }; ++ ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 ++ MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 ++ MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 /* RTS */ ++ MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 /* CTS */ ++ >; ++ }; ++ ++ pinctrl_uart1_gpio: uart1gpiogrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x000 /* RS_485_232_SEL */ ++ MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x140 /* RS_485_H/F_SEL */ ++ MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x140 /* SHDN */ ++ MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x140 /* RS_485_TRMEN */ ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 ++ MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 ++ MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 ++ >; ++ }; ++ ++ pinctrl_ecspi1_cs: ecspi1cs { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000 ++ >; ++ }; ++ ++ pinctrl_usb9514: usb9514grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x140 /* USB_PS_EN */ ++ MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x140 /* HUB_RSTn */ ++ >; ++ }; ++ ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 ++ MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x1d0 /* SD2_VSEL */ ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* EMMC_RST */ ++ >; ++ }; ++ ++ pinctrl_pcie0: pcie0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x140 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +new file mode 100644 +index 000000000000..cd856e9c45d2 +--- /dev/null ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -0,0 +1,644 @@ ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_AUDIT=y ++CONFIG_NO_HZ_IDLE=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT=y ++CONFIG_IRQ_TIME_ACCOUNTING=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_NUMA_BALANCING=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y ++CONFIG_CGROUP_PIDS=y ++CONFIG_CGROUP_HUGETLB=y ++CONFIG_CPUSETS=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_CGROUP_PERF=y ++CONFIG_USER_NS=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_PROFILING=y ++CONFIG_ARCH_MXC=y ++CONFIG_ARM64_VA_BITS_48=y ++CONFIG_SCHED_MC=y ++CONFIG_NUMA=y ++CONFIG_KEXEC=y ++CONFIG_CRASH_DUMP=y ++CONFIG_XEN=y ++CONFIG_COMPAT=y ++CONFIG_RANDOMIZE_BASE=y ++CONFIG_PM_DEBUG=y ++CONFIG_PM_TEST_SUSPEND=y ++CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=m ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_CPUFREQ_DT=y ++CONFIG_ARM_SCPI_CPUFREQ=y ++CONFIG_ARM_IMX_CPUFREQ_DT=y ++CONFIG_ARM_SCPI_PROTOCOL=y ++CONFIG_EFI_CAPSULE_LOADER=y ++CONFIG_IMX_DSP=y ++CONFIG_IMX_SCU=y ++CONFIG_IMX_SCU_PD=y ++CONFIG_ACPI=y ++CONFIG_ACPI_APEI=y ++CONFIG_ACPI_APEI_GHES=y ++CONFIG_ACPI_APEI_PCIEAER=y ++CONFIG_ACPI_APEI_MEMORY_FAILURE=y ++CONFIG_ACPI_APEI_EINJ=y ++CONFIG_VIRTUALIZATION=y ++CONFIG_KVM=y ++CONFIG_ARM64_CRYPTO=y ++CONFIG_CRYPTO_SHA1_ARM64_CE=y ++CONFIG_CRYPTO_SHA2_ARM64_CE=y ++CONFIG_CRYPTO_SHA512_ARM64_CE=m ++CONFIG_CRYPTO_SHA3_ARM64=m ++CONFIG_CRYPTO_SM3_ARM64_CE=m ++CONFIG_CRYPTO_GHASH_ARM64_CE=y ++CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m ++CONFIG_CRYPTO_AES_ARM64_CE_CCM=y ++CONFIG_CRYPTO_AES_ARM64_CE_BLK=y ++CONFIG_CRYPTO_CHACHA20_NEON=m ++CONFIG_CRYPTO_AES_ARM64_BS=m ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_KSM=y ++CONFIG_MEMORY_FAILURE=y ++CONFIG_TRANSPARENT_HUGEPAGE=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_BOOTP=y ++CONFIG_IPV6_SIT=m ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_NAT=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_NAT=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_BRIDGE=m ++CONFIG_BRIDGE_VLAN_FILTERING=y ++CONFIG_VLAN_8021Q=y ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_VLAN_8021Q_MVRP=y ++CONFIG_LLC2=y ++CONFIG_TSN=y ++CONFIG_NET_SWITCHDEV=y ++CONFIG_BPF_JIT=y ++CONFIG_CAN=y ++# CONFIG_CAN_BCM is not set ++# CONFIG_CAN_GW is not set ++CONFIG_CAN_MCP251XFD=m ++CONFIG_BT=y ++CONFIG_BT_RFCOMM=y ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=y ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=y ++# CONFIG_BT_LE is not set ++CONFIG_BT_LEDS=y ++# CONFIG_BT_DEBUGFS is not set ++CONFIG_BT_HCIBTUSB=m ++# CONFIG_BT_HCIBTUSB_BCM is not set ++# CONFIG_BT_HCIBTUSB_RTL is not set ++CONFIG_BT_HCIVHCI=y ++CONFIG_CFG80211=m ++CONFIG_CFG80211_WEXT=y ++CONFIG_MAC80211=m ++CONFIG_NET_9P=y ++CONFIG_NET_9P_VIRTIO=y ++CONFIG_PCI=y ++CONFIG_PCIEPORTBUS=y ++CONFIG_PCIEAER=y ++CONFIG_PCI_IOV=y ++CONFIG_HOTPLUG_PCI=y ++CONFIG_PCI_HOST_GENERIC=y ++CONFIG_PCI_XGENE=y ++CONFIG_PCIE_ALTERA=y ++CONFIG_PCIE_ALTERA_MSI=y ++CONFIG_PCI_HOST_THUNDER_PEM=y ++CONFIG_PCI_HOST_THUNDER_ECAM=y ++CONFIG_PCI_IMX6=y ++CONFIG_PCI_HISI=y ++CONFIG_PCIE_KIRIN=y ++CONFIG_PCIE_LAYERSCAPE_GEN4=y ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_FW_LOADER_USER_HELPER=y ++CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y ++CONFIG_BRCMSTB_GISB_ARB=y ++CONFIG_SIMPLE_PM_BUS=y ++CONFIG_VEXPRESS_CONFIG=y ++CONFIG_MTD=y ++CONFIG_MTD_CMDLINE_PARTS=y ++CONFIG_MTD_BLOCK=y ++CONFIG_MTD_CFI=y ++CONFIG_MTD_CFI_ADV_OPTIONS=y ++CONFIG_MTD_CFI_INTELEXT=y ++CONFIG_MTD_CFI_AMDSTD=y ++CONFIG_MTD_CFI_STAA=y ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_OF=y ++CONFIG_MTD_DATAFLASH=y ++CONFIG_MTD_SST25L=y ++CONFIG_MTD_RAW_NAND=y ++CONFIG_MTD_NAND_DENALI_DT=y ++CONFIG_MTD_NAND_GPMI_NAND=y ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++CONFIG_MTD_UBI=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_NBD=m ++CONFIG_VIRTIO_BLK=y ++CONFIG_BLK_DEV_NVME=y ++CONFIG_SENSORS_FXOS8700=y ++CONFIG_SENSORS_FXAS2100X=y ++CONFIG_SRAM=y ++CONFIG_EEPROM_AT24=y ++CONFIG_EEPROM_AT25=m ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_SCSI_SAS_ATA=y ++CONFIG_SCSI_HISI_SAS=y ++CONFIG_SCSI_HISI_SAS_PCI=y ++CONFIG_SCSI_MPT3SAS=m ++CONFIG_SCSI_UFSHCD=y ++CONFIG_SCSI_UFSHCD_PLATFORM=y ++CONFIG_ATA=y ++CONFIG_SATA_AHCI=y ++CONFIG_SATA_AHCI_PLATFORM=y ++CONFIG_AHCI_IMX=y ++CONFIG_AHCI_CEVA=y ++CONFIG_AHCI_XGENE=y ++CONFIG_AHCI_QORIQ=y ++CONFIG_SATA_SIL24=y ++CONFIG_PATA_PLATFORM=y ++CONFIG_PATA_OF_PLATFORM=y ++CONFIG_MD=y ++CONFIG_BLK_DEV_MD=m ++CONFIG_BLK_DEV_DM=m ++CONFIG_DM_MIRROR=m ++CONFIG_DM_ZERO=m ++CONFIG_NETDEVICES=y ++CONFIG_MACVLAN=m ++CONFIG_MACVTAP=m ++CONFIG_TUN=y ++CONFIG_VETH=m ++CONFIG_VIRTIO_NET=y ++CONFIG_AMD_XGBE=y ++CONFIG_ATL1C=m ++CONFIG_BNX2X=m ++CONFIG_MACB=y ++CONFIG_THUNDER_NIC_PF=y ++CONFIG_FEC=y ++CONFIG_FSL_XGMAC_MDIO=y ++CONFIG_FSL_SDK_DPAA_ETH=y ++CONFIG_HIX5HD2_GMAC=y ++CONFIG_HNS_DSAF=y ++CONFIG_HNS_ENET=y ++CONFIG_HNS3=y ++CONFIG_HNS3_HCLGE=y ++CONFIG_HNS3_ENET=y ++CONFIG_E1000=y ++CONFIG_E1000E=y ++CONFIG_IGB=y ++CONFIG_IGBVF=y ++CONFIG_MVMDIO=y ++CONFIG_SKY2=y ++CONFIG_MLX4_EN=m ++CONFIG_MLX5_CORE=m ++CONFIG_MLX5_CORE_EN=y ++CONFIG_MSCC_OCELOT_SWITCH=y ++CONFIG_QCOM_EMAC=m ++CONFIG_SMC91X=y ++CONFIG_SMSC911X=y ++CONFIG_STMMAC_ETH=m ++CONFIG_AQUANTIA_PHY=y ++CONFIG_INPHI_PHY=y ++CONFIG_MARVELL_PHY=m ++CONFIG_MARVELL_10G_PHY=m ++CONFIG_MICREL_PHY=y ++CONFIG_MICROSEMI_PHY=y ++CONFIG_NXP_TJA11XX_PHY=y ++CONFIG_AT803X_PHY=y ++CONFIG_REALTEK_PHY=y ++CONFIG_ROCKCHIP_PHY=y ++CONFIG_VITESSE_PHY=y ++CONFIG_MDIO_BITBANG=y ++CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y ++CONFIG_MDIO_BUS_MUX_MMIOREG=y ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_ASYNC=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=m ++CONFIG_USB_LAN78XX=m ++CONFIG_USB_USBNET=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SR9800=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_IWLWIFI=m ++CONFIG_IWLDVM=m ++CONFIG_IWLMVM=m ++CONFIG_HOSTAP=y ++# CONFIG_RTL_CARDS is not set ++CONFIG_WL18XX=m ++CONFIG_WLCORE_SDIO=m ++CONFIG_INPUT_EVDEV=y ++CONFIG_KEYBOARD_ADC=m ++CONFIG_KEYBOARD_GPIO=y ++CONFIG_KEYBOARD_SNVS_PWRKEY=y ++CONFIG_KEYBOARD_IMX_SC_PWRKEY=y ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_ATMEL_MXT=m ++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C=m ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_MPL3115=y ++CONFIG_INPUT_ISL29023=y ++# CONFIG_SERIO_SERPORT is not set ++CONFIG_SERIO_AMBAKMI=y ++CONFIG_LEGACY_PTY_COUNT=16 ++CONFIG_SERIAL_8250=y ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_DW=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_SERIAL_IMX=y ++CONFIG_SERIAL_IMX_CONSOLE=y ++CONFIG_SERIAL_XILINX_PS_UART=y ++CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y ++CONFIG_SERIAL_FSL_LPUART=y ++CONFIG_SERIAL_FSL_LPUART_CONSOLE=y ++CONFIG_SERIAL_FSL_LINFLEXUART=y ++CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y ++CONFIG_SERIAL_DEV_BUS=y ++CONFIG_VIRTIO_CONSOLE=y ++CONFIG_IPMI_HANDLER=m ++CONFIG_IPMI_DEVICE_INTERFACE=m ++CONFIG_IPMI_SI=m ++CONFIG_TCG_TPM=y ++CONFIG_TCG_TIS_I2C_INFINEON=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++CONFIG_I2C_MUX_PCA954x=y ++CONFIG_I2C_DESIGNWARE_PLATFORM=y ++CONFIG_I2C_GPIO=m ++CONFIG_I2C_IMX=y ++CONFIG_I2C_IMX_LPI2C=y ++CONFIG_I2C_RK3X=y ++CONFIG_I2C_RPBUS=y ++CONFIG_I2C_SLAVE=y ++CONFIG_SPI=y ++CONFIG_SPI_BITBANG=y ++CONFIG_SPI_IMX=m ++CONFIG_SPI_SPIDEV=y ++CONFIG_SPI_SLAVE=y ++CONFIG_SPI_SLAVE_TIME=y ++CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y ++CONFIG_SPMI=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_PINCTRL_MAX77620=y ++CONFIG_PINCTRL_IMX8MM=y ++CONFIG_PINCTRL_IMX8MN=y ++CONFIG_PINCTRL_IMX8MQ=y ++CONFIG_PINCTRL_IMX8QM=y ++CONFIG_PINCTRL_IMX8QXP=y ++CONFIG_PINCTRL_IMX8DXL=y ++CONFIG_PINCTRL_S32V_CORE=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_DWAPB=y ++CONFIG_GPIO_MB86S7X=y ++CONFIG_GPIO_PL061=y ++CONFIG_GPIO_XGENE=y ++CONFIG_GPIO_MAX732X=y ++CONFIG_GPIO_PCA953X=y ++CONFIG_GPIO_PCA953X_IRQ=y ++CONFIG_GPIO_MAX77620=y ++CONFIG_POWER_RESET_BRCMSTB=y ++CONFIG_POWER_RESET_VEXPRESS=y ++CONFIG_POWER_RESET_XGENE=y ++CONFIG_POWER_RESET_SYSCON=y ++CONFIG_SYSCON_REBOOT_MODE=y ++CONFIG_BATTERY_SBS=m ++CONFIG_BATTERY_BQ27XXX=y ++CONFIG_SENSORS_ARM_SCPI=y ++CONFIG_SENSORS_LM90=m ++CONFIG_SENSORS_PWM_FAN=m ++CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_INA3221=m ++CONFIG_CPU_THERMAL=y ++CONFIG_THERMAL_EMULATION=y ++CONFIG_IMX_SC_THERMAL=y ++CONFIG_IMX8MM_THERMAL=y ++CONFIG_DEVICE_THERMAL=y ++CONFIG_QORIQ_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_ARM_SP805_WATCHDOG=y ++CONFIG_ARM_SBSA_WATCHDOG=y ++CONFIG_DW_WATCHDOG=y ++CONFIG_IMX2_WDT=y ++CONFIG_IMX_SC_WDT=y ++CONFIG_MFD_BD9571MWV=y ++CONFIG_MFD_AXP20X_I2C=y ++CONFIG_MFD_HI6421_PMIC=y ++CONFIG_MFD_MAX77620=y ++CONFIG_MFD_RK808=y ++CONFIG_MFD_SEC_CORE=y ++CONFIG_MFD_ROHM_BD718XX=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_DEBUG=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_RC_CORE=m ++CONFIG_RC_DECODERS=y ++CONFIG_RC_DEVICES=y ++CONFIG_MEDIA_SUPPORT=y ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++# CONFIG_DVB_NET is not set ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_VIDEO_OV5640=y ++CONFIG_IMX_DPU_CORE=y ++CONFIG_IMX_LCDIF_CORE=y ++CONFIG_DRM=y ++CONFIG_DRM_I2C_NXP_TDA998X=m ++CONFIG_DRM_MALI_DISPLAY=m ++CONFIG_DRM_PANEL_SIMPLE=y ++CONFIG_DRM_SII902X=m ++CONFIG_DRM_ITE_IT6263=y ++CONFIG_DRM_IMX=y ++CONFIG_BACKLIGHT_PWM=y ++CONFIG_BACKLIGHT_LP855X=m ++CONFIG_I2C_HID=m ++CONFIG_USB=y ++CONFIG_USB_OTG=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_HCD_PLATFORM=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_HCD_PLATFORM=y ++CONFIG_USB_ACM=m ++CONFIG_USB_STORAGE=y ++CONFIG_USB_CDNS3=y ++CONFIG_USB_CDNS3_GADGET=y ++CONFIG_USB_CDNS3_HOST=y ++CONFIG_USB_MUSB_HDRC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_CHIPIDEA=y ++CONFIG_USB_CHIPIDEA_UDC=y ++CONFIG_USB_CHIPIDEA_HOST=y ++CONFIG_USB_ISP1760=y ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_TEST=m ++CONFIG_USB_EHSET_TEST_FIXTURE=m ++CONFIG_USB_HSIC_USB3503=y ++CONFIG_NOP_USB_XCEIV=y ++CONFIG_USB_MXS_PHY=y ++CONFIG_USB_ULPI=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_SNP_UDC_PLAT=y ++CONFIG_USB_BDC_UDC=y ++CONFIG_USB_CONFIGFS=y ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++CONFIG_USB_CONFIGFS_OBEX=y ++CONFIG_USB_CONFIGFS_NCM=y ++CONFIG_USB_CONFIGFS_ECM=y ++CONFIG_USB_CONFIGFS_ECM_SUBSET=y ++CONFIG_USB_CONFIGFS_RNDIS=y ++CONFIG_USB_CONFIGFS_EEM=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_USB_CONFIGFS_F_HID=y ++CONFIG_USB_CONFIGFS_F_UVC=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_TYPEC=y ++CONFIG_TYPEC_TCPM=y ++CONFIG_TYPEC_TCPCI=y ++CONFIG_TYPEC_SWITCH_GPIO=y ++CONFIG_MMC=y ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_ARMMMCI=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_OF_ARASAN=y ++CONFIG_MMC_SDHCI_OF_ESDHC=y ++CONFIG_MMC_SDHCI_CADENCE=y ++CONFIG_MMC_SDHCI_ESDHC_IMX=y ++CONFIG_MMC_SDHCI_F_SDH30=y ++CONFIG_MMC_SPI=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_EXYNOS=y ++CONFIG_MMC_DW_HI3798CV200=y ++CONFIG_MMC_DW_K3=y ++CONFIG_MMC_SDHCI_XENON=y ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_PWM=y ++CONFIG_LEDS_SYSCON=y ++CONFIG_LEDS_TRIGGER_DISK=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_EDAC=y ++CONFIG_RTC_CLASS=y ++# CONFIG_RTC_HCTOSYS is not set ++# CONFIG_RTC_SYSTOHC is not set ++CONFIG_RTC_DRV_ABX80X=y ++CONFIG_RTC_DRV_MAX77686=y ++CONFIG_RTC_DRV_PCF85363=y ++CONFIG_RTC_DRV_EFI=y ++CONFIG_DMADEVICES=y ++CONFIG_BCM_SBA_RAID=m ++CONFIG_FSL_EDMA=y ++CONFIG_FSL_EDMA_V3=y ++CONFIG_IMX_SDMA=y ++CONFIG_MV_XOR_V2=y ++CONFIG_MXS_DMA=y ++CONFIG_PL330_DMA=y ++CONFIG_QCOM_HIDMA_MGMT=y ++CONFIG_QCOM_HIDMA=y ++CONFIG_DMATEST=y ++CONFIG_UIO=y ++CONFIG_UIO_PCI_GENERIC=y ++CONFIG_VFIO=y ++CONFIG_VFIO_PCI=y ++CONFIG_VIRTIO_PCI=y ++CONFIG_VIRTIO_BALLOON=y ++CONFIG_VIRTIO_MMIO=y ++CONFIG_XEN_GNTDEV=y ++CONFIG_XEN_GRANT_DEV_ALLOC=y ++CONFIG_STAGING=y ++CONFIG_STAGING_MEDIA=y ++CONFIG_VIDEO_IMX_CAPTURE=y ++CONFIG_ION=y ++CONFIG_ION_SYSTEM_HEAP=y ++CONFIG_FSL_SDK_DPA=y ++CONFIG_FSL_PPFE=y ++CONFIG_FSL_PPFE_UTIL_DISABLED=y ++CONFIG_COMMON_CLK_RK808=y ++CONFIG_COMMON_CLK_SCPI=y ++CONFIG_COMMON_CLK_CS2000_CP=y ++CONFIG_COMMON_CLK_S2MPS11=y ++CONFIG_COMMON_CLK_XGENE=y ++CONFIG_COMMON_CLK_PWM=y ++CONFIG_CLK_IMX8MM=y ++CONFIG_CLK_IMX8MN=y ++CONFIG_CLK_IMX8MQ=y ++CONFIG_CLK_IMX8QXP=y ++CONFIG_ARCH_S32_CLK=y ++CONFIG_HWSPINLOCK=y ++CONFIG_MAILBOX=y ++CONFIG_ARM_MHU=y ++CONFIG_IMX_MBOX=y ++CONFIG_PLATFORM_MHU=y ++CONFIG_ARM_SMMU=y ++CONFIG_ARM_SMMU_V3=y ++CONFIG_REMOTEPROC=y ++CONFIG_RPMSG_QCOM_GLINK_RPM=y ++CONFIG_SOC_BRCMSTB=y ++CONFIG_FSL_RCPM=y ++CONFIG_FSL_QIXIS=y ++CONFIG_SOC_TI=y ++CONFIG_EXTCON_USB_GPIO=y ++CONFIG_MEMORY=y ++CONFIG_IIO=y ++CONFIG_IMX8QXP_ADC=y ++CONFIG_PWM=y ++CONFIG_PWM_IMX27=y ++CONFIG_RESET_IMX7=y ++CONFIG_PHY_XGENE=y ++CONFIG_PHY_MIXEL_MIPI_DPHY=y ++CONFIG_PHY_QCOM_USB_HS=y ++CONFIG_PHY_SAMSUNG_USB2=y ++CONFIG_FSL_IMX8_DDR_PMU=y ++CONFIG_NVMEM_IMX_OCOTP=y ++CONFIG_NVMEM_IMX_OCOTP_SCU=y ++CONFIG_FPGA=y ++CONFIG_FPGA_BRIDGE=m ++CONFIG_ALTERA_FREEZE_BRIDGE=m ++CONFIG_FPGA_REGION=m ++CONFIG_OF_FPGA_REGION=m ++CONFIG_TEE=y ++CONFIG_OPTEE=y ++CONFIG_MUX_MMIO=y ++CONFIG_MXC_SIM=y ++CONFIG_MXC_EMVSIM=y ++CONFIG_MXC_MLB150=y ++CONFIG_EXT2_FS=y ++CONFIG_EXT3_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_FANOTIFY=y ++CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y ++CONFIG_QUOTA=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_OVERLAY_FS=m ++CONFIG_VFAT_FS=y ++CONFIG_TMPFS=y ++CONFIG_HUGETLBFS=y ++CONFIG_EFIVAR_FS=y ++CONFIG_JFFS2_FS=y ++CONFIG_UBIFS_FS=y ++CONFIG_SQUASHFS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_V4_1=y ++CONFIG_NFS_V4_2=y ++CONFIG_ROOT_NFS=y ++CONFIG_9P_FS=y ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_SECURITY=y ++CONFIG_CRYPTO_USER=y ++CONFIG_CRYPTO_TEST=m ++CONFIG_CRYPTO_GCM=y ++CONFIG_CRYPTO_CHACHA20POLY1305=m ++CONFIG_CRYPTO_ECHAINIV=y ++CONFIG_CRYPTO_TLS=m ++CONFIG_CRYPTO_CBC=m ++CONFIG_CRYPTO_CTS=m ++CONFIG_CRYPTO_LRW=m ++CONFIG_CRYPTO_MD4=m ++CONFIG_CRYPTO_MD5=m ++CONFIG_CRYPTO_RMD128=m ++CONFIG_CRYPTO_RMD160=m ++CONFIG_CRYPTO_RMD256=m ++CONFIG_CRYPTO_RMD320=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_BLOWFISH=m ++CONFIG_CRYPTO_CAMELLIA=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_CAST6=m ++CONFIG_CRYPTO_SERPENT=m ++CONFIG_CRYPTO_TWOFISH=m ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y ++CONFIG_CRYPTO_DEV_FSL_CAAM=y ++CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m ++CONFIG_INDIRECT_PIO=y ++CONFIG_PRINTK_TIME=y ++CONFIG_MAGIC_SYSRQ=y ++CONFIG_DEBUG_FS=y ++CONFIG_MEMTEST=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0055-iot-gate-imx8-config-Update-device-config.patch b/recipes-kernel/linux/compulab/imx8mm/0055-iot-gate-imx8-config-Update-device-config.patch new file mode 100644 index 0000000..96c914b --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0055-iot-gate-imx8-config-Update-device-config.patch @@ -0,0 +1,79 @@ +From 3c5044623c529dc991d1cf0e09fc9a1ad18696ad Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Tue, 10 Nov 2020 14:43:36 +0200 +Subject: [PATCH 55/82] iot-gate-imx8: config: Update device config + +1) CONFIG_FW_LOADER_USER_HELPER -- disable +2) CONFIG_PPP_FILTER -- enable +3) Remove redundant features. + +Signed-off-by: Valentin Raevsky +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 18 ++++++++---------- + 1 file changed, 8 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index cd856e9c45d2..c6c91a436a76 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -157,8 +157,6 @@ CONFIG_PCIE_KIRIN=y + CONFIG_PCIE_LAYERSCAPE_GEN4=y + CONFIG_DEVTMPFS=y + CONFIG_DEVTMPFS_MOUNT=y +-CONFIG_FW_LOADER_USER_HELPER=y +-CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y + CONFIG_BRCMSTB_GISB_ARB=y + CONFIG_SIMPLE_PM_BUS=y + CONFIG_VEXPRESS_CONFIG=y +@@ -263,7 +261,12 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y + CONFIG_PPP=m + CONFIG_PPP_BSDCOMP=m + CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOE=m + CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m + CONFIG_USB_PEGASUS=m + CONFIG_USB_RTL8150=m + CONFIG_USB_RTL8152=m +@@ -393,16 +396,12 @@ CONFIG_REGULATOR=y + CONFIG_REGULATOR_DEBUG=y + CONFIG_REGULATOR_FIXED_VOLTAGE=y + CONFIG_RC_CORE=m +-CONFIG_RC_DECODERS=y +-CONFIG_RC_DEVICES=y ++# CONFIG_RC_MAP is not set + CONFIG_MEDIA_SUPPORT=y + CONFIG_MEDIA_CAMERA_SUPPORT=y +-CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +-CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +-# CONFIG_DVB_NET is not set + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_USB_VIDEO_CLASS=m +-CONFIG_VIDEO_OV5640=y ++# CONFIG_VIDEO_IR_I2C is not set + CONFIG_IMX_DPU_CORE=y + CONFIG_IMX_LCDIF_CORE=y + CONFIG_DRM=y +@@ -507,7 +506,7 @@ CONFIG_DMADEVICES=y + CONFIG_BCM_SBA_RAID=m + CONFIG_FSL_EDMA=y + CONFIG_FSL_EDMA_V3=y +-CONFIG_IMX_SDMA=y ++CONFIG_IMX_SDMA=m + CONFIG_MV_XOR_V2=y + CONFIG_MXS_DMA=y + CONFIG_PL330_DMA=y +@@ -525,7 +524,6 @@ CONFIG_XEN_GNTDEV=y + CONFIG_XEN_GRANT_DEV_ALLOC=y + CONFIG_STAGING=y + CONFIG_STAGING_MEDIA=y +-CONFIG_VIDEO_IMX_CAPTURE=y + CONFIG_ION=y + CONFIG_ION_SYSTEM_HEAP=y + CONFIG_FSL_SDK_DPA=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0056-iot-gate-imx8-can-dts-increase-frequency-of-SPI-inte.patch b/recipes-kernel/linux/compulab/imx8mm/0056-iot-gate-imx8-can-dts-increase-frequency-of-SPI-inte.patch new file mode 100644 index 0000000..a8e2486 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0056-iot-gate-imx8-can-dts-increase-frequency-of-SPI-inte.patch @@ -0,0 +1,62 @@ +From 6d01c206b2647301fb19be36e2f71d53b3132388 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 3 Dec 2020 17:12:08 +0200 +Subject: [PATCH 56/82] iot-gate-imx8: can: dts: increase frequency of SPI + interface + +The updated CAN bus driver mcp25xxfd, requires an SPI frequency of 2MHz. +Update SPI interface frequency of the MCP2518FD unit. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts | 4 ++-- + arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts +index 85a4bf2f97f1..43a363f73eaa 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-can.dts +@@ -80,7 +80,7 @@ + pinctrl-0 = <&pinctrl_can0>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; +- spi-max-frequency = <10000000>; ++ spi-max-frequency = <20000000>; + clocks = <&clk40m>; + }; + }; +@@ -101,7 +101,7 @@ + pinctrl-0 = <&pinctrl_can1>; + interrupt-parent = <&gpio5>; + interrupts = <28 IRQ_TYPE_LEVEL_LOW>; +- spi-max-frequency = <10000000>; ++ spi-max-frequency = <20000000>; + clocks = <&clk40m>; + }; + }; +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +index 0e775f82c40e..23c267e5f4a9 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +@@ -96,7 +96,7 @@ + pinctrl-0 = <&pinctrl_can0>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; +- spi-max-frequency = <10000000>; ++ spi-max-frequency = <20000000>; + clocks = <&clk40m>; + }; + }; +@@ -116,7 +116,7 @@ + pinctrl-0 = <&pinctrl_can1>; + interrupt-parent = <&gpio5>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; +- spi-max-frequency = <10000000>; ++ spi-max-frequency = <20000000>; + clocks = <&clk40m>; + }; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0057-encx24j600-add-device-tree-support.patch b/recipes-kernel/linux/compulab/imx8mm/0057-encx24j600-add-device-tree-support.patch new file mode 100644 index 0000000..e7b3261 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0057-encx24j600-add-device-tree-support.patch @@ -0,0 +1,79 @@ +From 050ffd09f51fe3f6a664194d585d13a78c999248 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 15 Jan 2023 23:36:34 +0200 +Subject: [PATCH 57/82] encx24j600: add device tree support + +Signed-off-by: Uri Mashiach +Signed-off-by: Kirill Kapranov +--- + drivers/net/ethernet/microchip/encx24j600.c | 26 ++++++++++----------- + 1 file changed, 12 insertions(+), 14 deletions(-) + +diff --git a/drivers/net/ethernet/microchip/encx24j600.c b/drivers/net/ethernet/microchip/encx24j600.c +index 0bc6b3176fbf..d6d2a9b2306e 100644 +--- a/drivers/net/ethernet/microchip/encx24j600.c ++++ b/drivers/net/ethernet/microchip/encx24j600.c +@@ -345,7 +345,7 @@ static int encx24j600_receive_packet(struct encx24j600_priv *priv, + + skb->dev = dev; + skb->protocol = eth_type_trans(skb, dev); +- skb->ip_summed = CHECKSUM_COMPLETE; ++ skb->ip_summed = CHECKSUM_NONE; + + /* Maintain stats */ + dev->stats.rx_packets++; +@@ -994,7 +994,7 @@ static const struct net_device_ops encx24j600_netdev_ops = { + .ndo_validate_addr = eth_validate_addr, + }; + +-static int encx24j600_spi_probe(struct spi_device *spi) ++static int encx24j600_probe(struct spi_device *spi) + { + int ret; + +@@ -1091,7 +1091,7 @@ static int encx24j600_spi_probe(struct spi_device *spi) + return ret; + } + +-static int encx24j600_spi_remove(struct spi_device *spi) ++static int encx24j600_remove(struct spi_device *spi) + { + struct encx24j600_priv *priv = dev_get_drvdata(&spi->dev); + +@@ -1103,24 +1103,22 @@ static int encx24j600_spi_remove(struct spi_device *spi) + return 0; + } + +-static const struct spi_device_id encx24j600_spi_id_table[] = { +- { .name = "encx24j600" }, ++static const struct of_device_id encx24j600_dt_ids[] = { ++ { .compatible = "microchip,encx24j600" }, + { /* sentinel */ } + }; +-MODULE_DEVICE_TABLE(spi, encx24j600_spi_id_table); ++MODULE_DEVICE_TABLE(of, encx24j600_dt_ids); + +-static struct spi_driver encx24j600_spi_net_driver = { ++static struct spi_driver encx24j600_driver = { + .driver = { + .name = DRV_NAME, +- .owner = THIS_MODULE, +- .bus = &spi_bus_type, +- }, +- .probe = encx24j600_spi_probe, +- .remove = encx24j600_spi_remove, +- .id_table = encx24j600_spi_id_table, ++ .of_match_table = encx24j600_dt_ids, ++ }, ++ .probe = encx24j600_probe, ++ .remove = encx24j600_remove, + }; + +-module_spi_driver(encx24j600_spi_net_driver); ++module_spi_driver(encx24j600_driver); + + MODULE_DESCRIPTION(DRV_NAME " ethernet driver"); + MODULE_AUTHOR("Jon Ringle "); +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0058-iot-gate-imx8-add-support-for-the-IE-POE-board.patch b/recipes-kernel/linux/compulab/imx8mm/0058-iot-gate-imx8-add-support-for-the-IE-POE-board.patch new file mode 100644 index 0000000..b2ae504 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0058-iot-gate-imx8-add-support-for-the-IE-POE-board.patch @@ -0,0 +1,130 @@ +From ed6a37b4b6681348b8cc0d5b37492b2f8e0acffb Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 3 Dec 2020 17:44:00 +0200 +Subject: [PATCH 58/82] iot-gate-imx8: add support for the IE-POE board + +Power Over Ethernet board features: +* 10/100Base-T port. +* Provide up to 12W + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/Makefile | 1 + + .../boot/dts/compulab/sb-iotgimx8-poed.dts | 80 +++++++++++++++++++ + arch/arm64/configs/iot-gate-imx8_defconfig | 1 + + 3 files changed, 82 insertions(+) + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-poed.dts + +diff --git a/arch/arm64/boot/dts/compulab/Makefile b/arch/arm64/boot/dts/compulab/Makefile +index fa5662fdb782..89d834f6c7c3 100644 +--- a/arch/arm64/boot/dts/compulab/Makefile ++++ b/arch/arm64/boot/dts/compulab/Makefile +@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_MXC) += ucm-imx8m-mini.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-can.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poed.dtb + + always-y := $(dtb-y) + subdir-y := $(dts-dirs) +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-poed.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-poed.dts +new file mode 100644 +index 000000000000..6159170522da +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-poed.dts +@@ -0,0 +1,80 @@ ++/* ++ * Copyright (C) 2020 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "sb-iotgimx8.dts" ++ ++/ { ++ model = "CompuLab SB-IOTGIMX8 board + IE-POED extension"; ++ compatible = "sb-iotgimx8-poed", "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; ++ ++}; ++ ++&i2c4 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&ecspi2 { ++ /delete-property/ dmas; ++ /delete-property/ dma-names; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ fsl,spi-num-chipselects = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; ++ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++ ++ encx24j600@0 { ++ compatible = "microchip,encx24j600"; ++ spi-max-frequency = <40000000>; ++ reg = <0>; ++ interrupt-parent = <&gpio3>; ++ interrupts = <1 IRQ_TYPE_EDGE_FALLING>; ++ }; ++}; ++ ++&iomuxc { ++ sb-iotgimx8-poed { ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ ++ pinctrl_ecspi2: ecspi2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x02 ++ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x02 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x102 ++ >; ++ }; ++ ++ pinctrl_ecspi2_cs: ecspi2_csgrp { ++ fsl,pins = < ++ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x4000 ++ MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x04146 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index c6c91a436a76..912ac31d0093 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -239,6 +239,7 @@ CONFIG_SKY2=y + CONFIG_MLX4_EN=m + CONFIG_MLX5_CORE=m + CONFIG_MLX5_CORE_EN=y ++CONFIG_ENCX24J600=m + CONFIG_MSCC_OCELOT_SWITCH=y + CONFIG_QCOM_EMAC=m + CONFIG_SMC91X=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0059-iot-gate-imx8-dts-add-CAN-bus-RX-interrupt.patch b/recipes-kernel/linux/compulab/imx8mm/0059-iot-gate-imx8-dts-add-CAN-bus-RX-interrupt.patch new file mode 100644 index 0000000..7338470 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0059-iot-gate-imx8-dts-add-CAN-bus-RX-interrupt.patch @@ -0,0 +1,51 @@ +From 2704bf254af2d3cd5ef292e1dc86db09eb5e1ea1 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 2 Feb 2021 14:10:02 +0200 +Subject: [PATCH 59/82] iot-gate-imx8: dts: add CAN bus RX interrupt + +The updated CAN bus driver supports the RX interrupt. +Add the definition for the RX interrupt GPIOs. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +index 23c267e5f4a9..430561babc15 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +@@ -92,6 +92,7 @@ + can0: can@0 { + compatible = "microchip,mcp2518fd"; + reg = <0>; ++ microchip,rx-int = <&gpio4 31 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0>; + interrupt-parent = <&gpio5>; +@@ -112,6 +113,7 @@ + can1: can@0 { + compatible = "microchip,mcp2518fd"; + reg = <0>; ++ microchip,rx-int = <&gpio5 28 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + interrupt-parent = <&gpio5>; +@@ -203,12 +205,14 @@ + pinctrl_can0: can0grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x00 ++ MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x00 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x00 ++ MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x00 + >; + }; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0060-iio-adc-Add-Maxim-MAX11108-driver.patch b/recipes-kernel/linux/compulab/imx8mm/0060-iio-adc-Add-Maxim-MAX11108-driver.patch new file mode 100644 index 0000000..3f1534e --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0060-iio-adc-Add-Maxim-MAX11108-driver.patch @@ -0,0 +1,314 @@ +From 922a6a7a7ede732d9989f4d12cf7b34683f08aaa Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 21 Jan 2021 17:17:34 +0200 +Subject: [PATCH 60/82] iio: adc: Add Maxim MAX11108 driver + +Add iio driver for Maxim MAX11108 single-channel ADC. + +Signed-off-by: Uri Mashiach +--- + drivers/iio/adc/Kconfig | 9 ++ + drivers/iio/adc/Makefile | 1 + + drivers/iio/adc/max11108.c | 258 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 268 insertions(+) + create mode 100644 drivers/iio/adc/max11108.c + +diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig +index b40764e397cd..8dc9cdf8e3d2 100644 +--- a/drivers/iio/adc/Kconfig ++++ b/drivers/iio/adc/Kconfig +@@ -631,6 +631,15 @@ config MAX11100 + To compile this driver as a module, choose M here: the module will be + called max11100. + ++config MAX11108 ++ tristate "Maxim max11108 ADC driver" ++ depends on SPI_MASTER ++ help ++ Say yes here to build support for Maxim max11108 SPI ADC ++ ++ To compile this driver as a module, choose M here: the module will be ++ called max11108. ++ + config MAX1118 + tristate "Maxim max1117/max1118/max1119 ADCs driver" + depends on SPI +diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile +index b4592fe896c6..b24beae6a511 100644 +--- a/drivers/iio/adc/Makefile ++++ b/drivers/iio/adc/Makefile +@@ -59,6 +59,7 @@ obj-$(CONFIG_LTC2496) += ltc2496.o ltc2497-core.o + obj-$(CONFIG_LTC2497) += ltc2497.o ltc2497-core.o + obj-$(CONFIG_MAX1027) += max1027.o + obj-$(CONFIG_MAX11100) += max11100.o ++obj-$(CONFIG_MAX11108) += max11108.o + obj-$(CONFIG_MAX1118) += max1118.o + obj-$(CONFIG_MAX1241) += max1241.o + obj-$(CONFIG_MAX1363) += max1363.o +diff --git a/drivers/iio/adc/max11108.c b/drivers/iio/adc/max11108.c +new file mode 100644 +index 000000000000..60b740c76343 +--- /dev/null ++++ b/drivers/iio/adc/max11108.c +@@ -0,0 +1,258 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Maxim max11108 ADC Driver with IIO interface ++ * ++ * Copyright (C) 2021 CompuLab Ltd. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* ++ * LSB is the ADC single digital step ++ * 1 LSB = (vref_mv / 2 ^ 12) ++ * ++ * LSB is used to calculate analog voltage value ++ * from the number of ADC steps count ++ * ++ * Ain = (count * LSB) ++ */ ++#define MAX11108_LSB_DIV (1 << 12) ++ ++struct max11108_state { ++ struct regulator *vref_reg; ++ struct spi_device *spi; ++ struct iio_trigger *trig; ++ struct mutex lock; ++}; ++ ++static struct iio_chan_spec max11108_channels[] = { ++ { /* [0] */ ++ .type = IIO_CURRENT, ++ .channel = 0, ++ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | ++ BIT(IIO_CHAN_INFO_SCALE), ++ .scan_index = 0, ++ .scan_type = { ++ .sign = 'u', ++ .realbits = 12, ++ .storagebits = 16, ++ .endianness = IIO_LE, ++ }, ++ }, ++}; ++ ++static int max11108_read_single(struct iio_dev *indio_dev, int *val) ++{ ++ int ret; ++ u32 uval; ++ u8 buffer[3]; ++ struct max11108_state *state = iio_priv(indio_dev); ++ ++ ret = spi_read(state->spi, buffer, sizeof(buffer)); ++ if (ret) { ++ dev_err(&indio_dev->dev, "SPI transfer failed\n"); ++ return ret; ++ } ++ ++ /* The last 8 bits sent out from ADC must be 0s */ ++ if (buffer[2]) { ++ dev_err(&indio_dev->dev, "Invalid value: buffer[0] != 0\n"); ++ return -EINVAL; ++ } ++ ++ /* Raw date composition */ ++ uval = (buffer[0] << 8) | buffer[1]; ++ uval >>= 1; ++ uval &= 0xfff; ++ /* Store result */ ++ *((u32*) val) = uval; ++ ++ return 0; ++} ++ ++static int max11108_read_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *chan, ++ int *val, int *val2, long info) ++{ ++ int ret, vref_uv; ++ struct max11108_state *state = iio_priv(indio_dev); ++ ++ mutex_lock(&state->lock); ++ ++ switch (info) { ++ case IIO_CHAN_INFO_RAW: ++ ret = max11108_read_single(indio_dev, val); ++ if (ret == 0) ++ ret = IIO_VAL_INT; ++ break; ++ ++ case IIO_CHAN_INFO_SCALE: ++ vref_uv = regulator_get_voltage(state->vref_reg); ++ if (vref_uv < 0) { ++ dev_err(&indio_dev->dev, ++ "dummy regulator \"get_voltage\" returns %d\n", ++ vref_uv); ++ ret = -EINVAL; ++ } ++ else { ++ *val = vref_uv / 1000; ++ *val2 = MAX11108_LSB_DIV; ++ ret = IIO_VAL_FRACTIONAL; ++ } ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ mutex_unlock(&state->lock); ++ ++ return ret; ++} ++ ++static irqreturn_t max11108_trigger_handler(int irq, void *private) ++{ ++ struct iio_poll_func *pf = private; ++ struct iio_dev *indio_dev = pf->indio_dev; ++ struct max11108_state *state = iio_priv(indio_dev); ++ u8 data[16] = { }; /* 12-bit ADC data + padding + 8 bytes timestamp */ ++ int ret; ++ ++ mutex_lock(&state->lock); ++ ++ /* Fill buffer with all channel */ ++ ret = max11108_read_single(indio_dev, (int*) data); ++ if (ret < 0){ ++ dev_err(&indio_dev->dev, "channel read failure\n"); ++ goto trigger_handler_out; ++ } ++ iio_push_to_buffers_with_timestamp(indio_dev, data, ++ iio_get_time_ns(indio_dev)); ++ ++trigger_handler_out: ++ mutex_unlock(&state->lock); ++ iio_trigger_notify_done(indio_dev->trig); ++ return IRQ_HANDLED; ++} ++ ++static const struct iio_trigger_ops max11108_trigger_ops = { ++ .validate_device = &iio_trigger_validate_own_device, ++}; ++ ++static const struct iio_info max11108_info = { ++ .read_raw = max11108_read_raw, ++}; ++ ++static int max11108_probe(struct spi_device *spi) ++{ ++ int ret; ++ struct iio_dev *indio_dev; ++ struct max11108_state *state; ++ ++ indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state)); ++ if (!indio_dev) { ++ dev_err(&indio_dev->dev, "iio_dev allocation failure\n"); ++ return -ENOMEM; ++ } ++ ++ spi_set_drvdata(spi, indio_dev); ++ ++ state = iio_priv(indio_dev); ++ state->spi = spi; ++ ++ mutex_init(&state->lock); ++ ++ indio_dev->dev.parent = &spi->dev; ++ indio_dev->dev.of_node = spi->dev.of_node; ++ indio_dev->name = "max11108"; ++ indio_dev->info = &max11108_info; ++ indio_dev->modes = INDIO_DIRECT_MODE; ++ indio_dev->channels = max11108_channels; ++ indio_dev->num_channels = ARRAY_SIZE(max11108_channels); ++ ++ ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, ++ &iio_pollfunc_store_time, ++ &max11108_trigger_handler, ++ NULL); ++ if (ret < 0) { ++ dev_err(&indio_dev->dev, "Failed to setup buffer\n"); ++ return ret; ++ } ++ /* Create default trigger */ ++ state->trig = devm_iio_trigger_alloc(&spi->dev, "max11108-trigger"); ++ if (state->trig == NULL) { ++ ret = -ENOMEM; ++ dev_err(&indio_dev->dev, "Failed to allocate iio trigger\n"); ++ return ret; ++ } ++ state->trig->dev.parent = &spi->dev; ++ state->trig->ops = &max11108_trigger_ops; ++ iio_trigger_set_drvdata(state->trig, indio_dev); ++ ret = iio_trigger_register(state->trig); ++ if (ret < 0) { ++ dev_err(&indio_dev->dev, "Triger registration failure.\n"); ++ return ret; ++ } ++ indio_dev->trig = iio_trigger_get(state->trig); ++ ++ state->vref_reg = devm_regulator_get(&spi->dev, "vref"); ++ if (IS_ERR(state->vref_reg)) { ++ dev_err(&indio_dev->dev, "Failed to locate vref regulator\n"); ++ return PTR_ERR(state->vref_reg); ++ } ++ ++ ret = regulator_enable(state->vref_reg); ++ if (ret) { ++ dev_err(&indio_dev->dev, "Regulator enable failure\n"); ++ return ret; ++ } ++ ++ ret = iio_device_register(indio_dev); ++ if (ret) { ++ dev_err(&indio_dev->dev, "iio_dev registration failure\n"); ++ goto disable_regulator; ++ } ++ ++ return 0; ++ ++disable_regulator: ++ regulator_disable(state->vref_reg); ++ ++ return ret; ++} ++ ++static int max11108_remove(struct spi_device *spi) ++{ ++ struct iio_dev *indio_dev = spi_get_drvdata(spi); ++ struct max11108_state *state = iio_priv(indio_dev); ++ ++ iio_device_unregister(indio_dev); ++ regulator_disable(state->vref_reg); ++ ++ return 0; ++} ++ ++static const struct of_device_id max11108_ids[] = { ++ {.compatible = "maxim,max11108"}, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, max11108_ids); ++ ++static struct spi_driver max11108_driver = { ++ .driver = { ++ .name = "max11108", ++ .of_match_table = of_match_ptr(max11108_ids), ++ }, ++ .probe = max11108_probe, ++ .remove = max11108_remove, ++}; ++ ++module_spi_driver(max11108_driver); ++ ++MODULE_AUTHOR("Uri Mashiach "); ++MODULE_DESCRIPTION("Maxim max11108 ADC Driver"); ++MODULE_LICENSE("GPL v2"); +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0061-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch b/recipes-kernel/linux/compulab/imx8mm/0061-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch new file mode 100644 index 0000000..63041cb --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0061-iot-gate-imx8-add-support-for-the-IE-TPM-module.patch @@ -0,0 +1,115 @@ +From b97169dba1ba126f045543a16bad80927917e86f Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 24 Jan 2021 15:19:47 +0200 +Subject: [PATCH 61/82] iot-gate-imx8: add support for the IE-TPM module + +The CAN and the TPM modules are 2 alternatives in the baseboard +IED-BASE, slots A and B for the SPI bus. + +Add 2 disabled nodes for the TPM modules. +Disable the CAN bus nodes. +The appropriate nodes will be enabled by the U-Boot, according to the +detected modules. + +Signed-off-by: Uri Mashiach +--- + .../boot/dts/compulab/sb-iotgimx8-ied.dts | 50 +++++++++++++++++++ + arch/arm64/configs/iot-gate-imx8_defconfig | 1 + + 2 files changed, 51 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +index 430561babc15..5e92ac790159 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +@@ -47,6 +47,26 @@ + regulator-always-on; + enable-active-low; + }; ++ ++ regulatot-tpm0-rst { ++ compatible = "regulator-fixed"; ++ regulator-name = "tpm0-rst"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++ ++ regulator-tpm1-rst { ++ compatible = "regulator-fixed"; ++ regulator-name = "tpm1-rst"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; + }; + + &i2c4 { +@@ -99,6 +119,15 @@ + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <20000000>; + clocks = <&clk40m>; ++ status = "disabled"; ++ }; ++ tpm0: tpm@0 { ++ compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_tpm0>; ++ spi-max-frequency = <5000000>; ++ status = "disabled"; + }; + }; + +@@ -120,6 +149,15 @@ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <20000000>; + clocks = <&clk40m>; ++ status = "disabled"; ++ }; ++ tpm1: tpm@0 { ++ compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_tpm1>; ++ spi-max-frequency = <5000000>; ++ status = "disabled"; + }; + }; + +@@ -215,5 +253,17 @@ + MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x00 + >; + }; ++ ++ pinctrl_tpm0: tpm0grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x0 ++ >; ++ }; ++ ++ pinctrl_tpm1: tpm1grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x0 ++ >; ++ }; + }; + }; +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 912ac31d0093..f80375e87389 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -323,6 +323,7 @@ CONFIG_IPMI_HANDLER=m + CONFIG_IPMI_DEVICE_INTERFACE=m + CONFIG_IPMI_SI=m + CONFIG_TCG_TPM=y ++CONFIG_TCG_TIS_SPI=m + CONFIG_TCG_TIS_I2C_INFINEON=y + CONFIG_I2C_CHARDEV=y + CONFIG_I2C_MUX=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0062-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch b/recipes-kernel/linux/compulab/imx8mm/0062-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch new file mode 100644 index 0000000..47f24e3 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0062-iot-gate-imx8-add-support-for-the-IE-CL420-module.patch @@ -0,0 +1,82 @@ +From 2087769e3474ba169a8fdbc92328e920266a51d6 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 24 Jan 2021 15:58:13 +0200 +Subject: [PATCH 62/82] iot-gate-imx8: add support for the IE-CL420 module + +The IE-CL420 implements one channel ADC. + +The CAN, TPM and the CL420 modules are 3 alternatives in the baseboard +IED-BASE, slots A and B for the SPI bus. + +Add 2 disabled ADC nodes for the IE-CL420 modules. +The appropriate nodes will be enabled by the U-Boot, according to the +detected modules. + +Signed-off-by: Uri Mashiach +--- + .../boot/dts/compulab/sb-iotgimx8-ied.dts | 22 +++++++++++++++++++ + arch/arm64/configs/iot-gate-imx8_defconfig | 1 + + 2 files changed, 23 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +index 5e92ac790159..22f93994ac05 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied.dts +@@ -67,6 +67,14 @@ + regulator-always-on; + enable-active-high; + }; ++ ++ vref_adc: regulator-vref-adc { ++ compatible = "regulator-fixed"; ++ regulator-name = "vref_adc"; ++ regulator-min-microvolt = <2400000>; ++ regulator-max-microvolt = <2400000>; ++ regulator-always-on; ++ }; + }; + + &i2c4 { +@@ -129,6 +137,13 @@ + spi-max-frequency = <5000000>; + status = "disabled"; + }; ++ adc0: adc@0 { ++ compatible = "maxim,max11108"; ++ reg = <0>; ++ vref-supply = <&vref_adc>; ++ spi-max-frequency = <20000000>; ++ status = "disabled"; ++ }; + }; + + &ecspi3 { +@@ -159,6 +174,13 @@ + spi-max-frequency = <5000000>; + status = "disabled"; + }; ++ adc1: adc@0 { ++ compatible = "maxim,max11108"; ++ reg = <0>; ++ vref-supply = <&vref_adc>; ++ spi-max-frequency = <20000000>; ++ status = "disabled"; ++ }; + }; + + &iomuxc { +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index f80375e87389..dda66fc3f5d9 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -559,6 +559,7 @@ CONFIG_EXTCON_USB_GPIO=y + CONFIG_MEMORY=y + CONFIG_IIO=y + CONFIG_IMX8QXP_ADC=y ++CONFIG_MAX11108=m + CONFIG_PWM=y + CONFIG_PWM_IMX27=y + CONFIG_RESET_IMX7=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0063-iot-gate-imx8-set-system-time-from-RTC-on-startup.patch b/recipes-kernel/linux/compulab/imx8mm/0063-iot-gate-imx8-set-system-time-from-RTC-on-startup.patch new file mode 100644 index 0000000..938c0a1 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0063-iot-gate-imx8-set-system-time-from-RTC-on-startup.patch @@ -0,0 +1,27 @@ +From b49d942f7f3a5a2f3b9235773a2c860e4da75533 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 2 Mar 2021 10:49:03 +0200 +Subject: [PATCH 63/82] iot-gate-imx8: set system time from RTC on startup + +Enable setting the system time from the RTC dring the proot process. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index dda66fc3f5d9..9a1e8cce708a 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -498,7 +498,6 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + CONFIG_LEDS_TRIGGER_PANIC=y + CONFIG_EDAC=y + CONFIG_RTC_CLASS=y +-# CONFIG_RTC_HCTOSYS is not set + # CONFIG_RTC_SYSTOHC is not set + CONFIG_RTC_DRV_ABX80X=y + CONFIG_RTC_DRV_MAX77686=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0064-iot-gate-imx8-dts-add-M4-support.patch b/recipes-kernel/linux/compulab/imx8mm/0064-iot-gate-imx8-dts-add-M4-support.patch new file mode 100644 index 0000000..80263c8 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0064-iot-gate-imx8-dts-add-M4-support.patch @@ -0,0 +1,83 @@ +From d8cb580108e3fd78b93f6a10b12bc185f8caa065 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 2 Mar 2021 11:06:37 +0200 +Subject: [PATCH 64/82] iot-gate-imx8: dts: add M4 support + +The RPMsg is used for communication between the Cortex-A53 and the +Cortex-M4 cores. +Enable the RPMsg. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/Makefile | 1 + + .../boot/dts/compulab/sb-iotgimx8-ied-m4.dts | 46 +++++++++++++++++++ + 2 files changed, 47 insertions(+) + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts + +diff --git a/arch/arm64/boot/dts/compulab/Makefile b/arch/arm64/boot/dts/compulab/Makefile +index 89d834f6c7c3..63a6404747a4 100644 +--- a/arch/arm64/boot/dts/compulab/Makefile ++++ b/arch/arm64/boot/dts/compulab/Makefile +@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_MXC) += ucm-imx8m-mini.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-can.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied-m4.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poed.dtb + + always-y := $(dtb-y) +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts +new file mode 100644 +index 000000000000..eca040200864 +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (C) 2021 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "sb-iotgimx8-ied.dts" ++ ++/ { ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ m4_reserved: m4@0x80000000 { ++ no-map; ++ reg = <0 0x80000000 0 0x1000000>; ++ }; ++ ++ vdev0vring0: vdev0vring0@b8000000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xb8000000 0 0x8000>; ++ no-map; ++ }; ++ ++ vdev0vring1: vdev0vring1@b8008000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xb8008000 0 0x8000>; ++ no-map; ++ }; ++ ++ vdevbuffer: vdevbuffer@b8400000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xb8400000 0 0x100000>; ++ no-map; ++ }; ++ }; ++}; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0065-iot-gate-imx8-dts-add-support-for-the-POEv2-module.patch b/recipes-kernel/linux/compulab/imx8mm/0065-iot-gate-imx8-dts-add-support-for-the-POEv2-module.patch new file mode 100644 index 0000000..069d89e --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0065-iot-gate-imx8-dts-add-support-for-the-POEv2-module.patch @@ -0,0 +1,101 @@ +From f15f73e03a8a271e05530dbc18f104fc4a057786 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 11 May 2021 10:05:49 +0300 +Subject: [PATCH 65/82] iot-gate-imx8: dts: add support for the POEv2 module + +The POE module implements a USB to Ethernet. +A USB MUX on the baseboard is set to route one of the USB interfaces to +the module, disabling one of the external USB interfaces. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/Makefile | 1 + + .../boot/dts/compulab/sb-iotgimx8-poedv2.dts | 64 +++++++++++++++++++ + 2 files changed, 65 insertions(+) + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-poedv2.dts + +diff --git a/arch/arm64/boot/dts/compulab/Makefile b/arch/arm64/boot/dts/compulab/Makefile +index 63a6404747a4..49b7cda91995 100644 +--- a/arch/arm64/boot/dts/compulab/Makefile ++++ b/arch/arm64/boot/dts/compulab/Makefile +@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-can.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied-m4.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poed.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poedv2.dtb + + always-y := $(dtb-y) + subdir-y := $(dts-dirs) +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-poedv2.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-poedv2.dts +new file mode 100644 +index 000000000000..db46ab7d1985 +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-poedv2.dts +@@ -0,0 +1,64 @@ ++/* ++ * Copyright (C) 2021 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include "sb-iotgimx8.dts" ++ ++/ { ++ model = "CompuLab SB-IOTGIMX8 board + IE-POED-v2 extension"; ++ compatible = "sb-iotgimx8-poedv2", "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; ++ ++ regulator-usbmux-mod { ++ compatible = "regulator-fixed"; ++ regulator-name = "usbmux_mod"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 1 GPIO_ACTIVE_HIGH>; ++ regulator-always-on; ++ enable-active-high; ++ }; ++}; ++ ++&i2c4 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c4>; ++ status = "okay"; ++ ++ eeprom@51 { ++ compatible = "atmel,24c02"; ++ reg = <0x51>; ++ pagesize = <16>; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog_sb_iotgimx8_poedv2>; ++ ++ sb-iotgimx8-poedv2 { ++ pinctrl_hog_sb_iotgimx8_poedv2: hoggrp_sb-iotgimx8-poedv2 { ++ fsl,pins = < ++ /* USB_MUX */ ++ MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x00000140 ++ >; ++ }; ++ ++ pinctrl_i2c4: i2c4grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 ++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 ++ >; ++ }; ++ }; ++}; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0066-iot-gate-imx8-integrate-the-USB-to-Ethernet-drivers-.patch b/recipes-kernel/linux/compulab/imx8mm/0066-iot-gate-imx8-integrate-the-USB-to-Ethernet-drivers-.patch new file mode 100644 index 0000000..481fdb2 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0066-iot-gate-imx8-integrate-the-USB-to-Ethernet-drivers-.patch @@ -0,0 +1,35 @@ +From a34afbc2b6d8fc51fb9b9474972caad3255ad41f Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 12 May 2021 12:15:14 +0300 +Subject: [PATCH 66/82] iot-gate-imx8: integrate the USB to Ethernet drivers in + the kernel image + +Integrate the drivers in the kernel image to enable NFS with the USB to +Ethernet converters. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 9a1e8cce708a..6efd30ed6b6a 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -272,11 +272,11 @@ CONFIG_USB_PEGASUS=m + CONFIG_USB_RTL8150=m + CONFIG_USB_RTL8152=m + CONFIG_USB_LAN78XX=m +-CONFIG_USB_USBNET=m ++CONFIG_USB_USBNET=y + CONFIG_USB_NET_DM9601=m + CONFIG_USB_NET_SR9800=m + CONFIG_USB_NET_SMSC75XX=m +-CONFIG_USB_NET_SMSC95XX=m ++CONFIG_USB_NET_SMSC95XX=y + CONFIG_USB_NET_PLUSB=m + CONFIG_USB_NET_MCS7830=m + CONFIG_USB_NET_QMI_WWAN=m +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0067-iot-gate-imx8-enable-the-nftables-feature.patch b/recipes-kernel/linux/compulab/imx8mm/0067-iot-gate-imx8-enable-the-nftables-feature.patch new file mode 100644 index 0000000..1a4452a --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0067-iot-gate-imx8-enable-the-nftables-feature.patch @@ -0,0 +1,133 @@ +From 09534d7fb8d56b7d1b428d5acdb9d84ff0f0c036 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 12 May 2021 17:33:37 +0300 +Subject: [PATCH 67/82] iot-gate-imx8: enable the nftables feature + +The nftables feature is required for firewalls. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 89 ++++++++++++++++++++++ + 1 file changed, 89 insertions(+) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 6efd30ed6b6a..8811a44e7670 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -90,24 +90,113 @@ CONFIG_IP_PNP_DHCP=y + CONFIG_IP_PNP_BOOTP=y + CONFIG_IPV6_SIT=m + CONFIG_NETFILTER=y ++CONFIG_BRIDGE_NETFILTER=m + CONFIG_NF_CONNTRACK=m ++CONFIG_NF_LOG_NETDEV=m + CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NF_TABLES=m + CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m + CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m + CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CGROUP=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m + CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPCOMP=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_L2TP=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_NF_SOCKET_IPV4=m + CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m + CONFIG_IP_NF_FILTER=m + CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_TARGET_SYNPROXY=m + CONFIG_IP_NF_NAT=m + CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m + CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m + CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RPFILTER=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_HL=m + CONFIG_IP6_NF_FILTER=m + CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_TARGET_SYNPROXY=m + CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m + CONFIG_IP6_NF_NAT=m + CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m + CONFIG_BRIDGE=m + CONFIG_BRIDGE_VLAN_FILTERING=y + CONFIG_VLAN_8021Q=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0068-iot-gate-imx8-enable-Bluetooth-features.patch b/recipes-kernel/linux/compulab/imx8mm/0068-iot-gate-imx8-enable-Bluetooth-features.patch new file mode 100644 index 0000000..0bc5eab --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0068-iot-gate-imx8-enable-Bluetooth-features.patch @@ -0,0 +1,31 @@ +From 5cba98f2af9e7db2867cd718f7eaccd413025dfc Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 23 May 2021 17:38:32 +0300 +Subject: [PATCH 68/82] iot-gate-imx8: enable Bluetooth features + +Enable the following features: +* BLE physical layer, available with Bluetooth version 4.0 or later. +* Export Bluetooth internals in debugfs. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 8811a44e7670..83417f293c2e 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -217,9 +217,7 @@ CONFIG_BT_BNEP=y + CONFIG_BT_BNEP_MC_FILTER=y + CONFIG_BT_BNEP_PROTO_FILTER=y + CONFIG_BT_HIDP=y +-# CONFIG_BT_LE is not set + CONFIG_BT_LEDS=y +-# CONFIG_BT_DEBUGFS is not set + CONFIG_BT_HCIBTUSB=m + # CONFIG_BT_HCIBTUSB_BCM is not set + # CONFIG_BT_HCIBTUSB_RTL is not set +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0069-iot-gate-imx8-dts-add-wakeup-sources.patch b/recipes-kernel/linux/compulab/imx8mm/0069-iot-gate-imx8-dts-add-wakeup-sources.patch new file mode 100644 index 0000000..d80324c --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0069-iot-gate-imx8-dts-add-wakeup-sources.patch @@ -0,0 +1,96 @@ +From f7eef43ace5f51c753c86ce67a114a855c48d4a2 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 27 May 2021 18:49:40 +0300 +Subject: [PATCH 69/82] iot-gate-imx8: dts: add wakeup sources + +Add device tree for wakeup sources. +The current wakeup sources are the input GPIOs of the digital I/O add-on +module. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/Makefile | 1 + + .../dts/compulab/sb-iotgimx8-ied-wakeup.dts | 59 +++++++++++++++++++ + 2 files changed, 60 insertions(+) + create mode 100644 arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-wakeup.dts + +diff --git a/arch/arm64/boot/dts/compulab/Makefile b/arch/arm64/boot/dts/compulab/Makefile +index 49b7cda91995..051abbb16b47 100644 +--- a/arch/arm64/boot/dts/compulab/Makefile ++++ b/arch/arm64/boot/dts/compulab/Makefile +@@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied-m4.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poed.dtb + dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-poedv2.dtb ++dtb-$(CONFIG_ARCH_MXC) += sb-iotgimx8-ied-wakeup.dtb + + always-y := $(dtb-y) + subdir-y := $(dts-dirs) +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-wakeup.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-wakeup.dts +new file mode 100644 +index 000000000000..db1bf5775a4a +--- /dev/null ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-wakeup.dts +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (C) 2021 CompuLab Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include "sb-iotgimx8-ied.dts" ++ ++/ { ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ in0 { ++ label = "in0"; ++ gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; ++ linux,input-type = ; ++ linux,code = ; ++ wakeup-source; ++ debounce-interval = <1000>; ++ wakeup-event-action = ; ++ }; ++ in1 { ++ label = "in1"; ++ gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; ++ linux,input-type = ; ++ linux,code = ; ++ wakeup-source; ++ debounce-interval = <1000>; ++ wakeup-event-action = ; ++ }; ++ in2 { ++ label = "in2"; ++ gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; ++ linux,input-type = ; ++ linux,code = ; ++ wakeup-source; ++ debounce-interval = <1000>; ++ wakeup-event-action = ; ++ }; ++ in3 { ++ label = "in3"; ++ gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; ++ linux,input-type = ; ++ linux,code = ; ++ wakeup-source; ++ debounce-interval = <1000>; ++ wakeup-event-action = ; ++ }; ++ }; ++}; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0070-iot-gate-imx8-enable-setting-the-RTC-time-based-on-N.patch b/recipes-kernel/linux/compulab/imx8mm/0070-iot-gate-imx8-enable-setting-the-RTC-time-based-on-N.patch new file mode 100644 index 0000000..9ab6e98 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0070-iot-gate-imx8-enable-setting-the-RTC-time-based-on-N.patch @@ -0,0 +1,26 @@ +From 2268439f279f264f1eac9cf04fbec253347e2f37 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Sun, 30 May 2021 16:32:38 +0300 +Subject: [PATCH 70/82] iot-gate-imx8: enable setting the RTC time based on NTP + +Update the RTC time after NTP synchronization. +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 83417f293c2e..6f9c42238ac7 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -585,7 +585,6 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + CONFIG_LEDS_TRIGGER_PANIC=y + CONFIG_EDAC=y + CONFIG_RTC_CLASS=y +-# CONFIG_RTC_SYSTOHC is not set + CONFIG_RTC_DRV_ABX80X=y + CONFIG_RTC_DRV_MAX77686=y + CONFIG_RTC_DRV_PCF85363=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0071-iot-gate-imx8-can-enable-Broadcast-Manager-CAN-Proto.patch b/recipes-kernel/linux/compulab/imx8mm/0071-iot-gate-imx8-can-enable-Broadcast-Manager-CAN-Proto.patch new file mode 100644 index 0000000..c6ae25a --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0071-iot-gate-imx8-can-enable-Broadcast-Manager-CAN-Proto.patch @@ -0,0 +1,27 @@ +From 243127656dab1102cc91f4069fc07f30bbaba8b0 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 8 Jun 2021 10:48:13 +0300 +Subject: [PATCH 71/82] iot-gate-imx8: can: enable Broadcast Manager CAN + Protocol + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 6f9c42238ac7..dff8d5df2317 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -207,7 +207,7 @@ CONFIG_TSN=y + CONFIG_NET_SWITCHDEV=y + CONFIG_BPF_JIT=y + CONFIG_CAN=y +-# CONFIG_CAN_BCM is not set ++CONFIG_CAN_BCM=m + # CONFIG_CAN_GW is not set + CONFIG_CAN_MCP251XFD=m + CONFIG_BT=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0072-iot-gate-imx8-dts-disable-USB-over-current-messages.patch b/recipes-kernel/linux/compulab/imx8mm/0072-iot-gate-imx8-dts-disable-USB-over-current-messages.patch new file mode 100644 index 0000000..22af532 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0072-iot-gate-imx8-dts-disable-USB-over-current-messages.patch @@ -0,0 +1,35 @@ +From eb87774ee55490a9ba522c09a3b2645a9a9515ef Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 2 Nov 2021 12:18:00 +0200 +Subject: [PATCH 72/82] iot-gate-imx8: dts: disable USB over-current messages + +Example of the over-current messages: +usb usb1-port1: over-current condition +usb usb2-port1: over-current condition + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/sb-iotgimx8.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +index 92f95a36f5a1..489fb11038dd 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +@@ -161,11 +161,13 @@ + + &usbotg1 { + dr_mode = "host"; ++ disable-over-current; + status = "okay"; + }; + + &usbotg2 { + dr_mode = "host"; ++ disable-over-current; + status = "okay"; + + #address-cells = <1>; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0073-iot-gate-imx8-disable-regulator-debug.patch b/recipes-kernel/linux/compulab/imx8mm/0073-iot-gate-imx8-disable-regulator-debug.patch new file mode 100644 index 0000000..8e13b89 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0073-iot-gate-imx8-disable-regulator-debug.patch @@ -0,0 +1,27 @@ +From f572227e85b30f09d45b5fab59ab755ede41b930 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 2 Nov 2021 15:34:40 +0200 +Subject: [PATCH 73/82] iot-gate-imx8: disable regulator debug + +The regulator debug messages are disabled. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index dff8d5df2317..2b062d7963de 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -482,7 +482,6 @@ CONFIG_MFD_RK808=y + CONFIG_MFD_SEC_CORE=y + CONFIG_MFD_ROHM_BD718XX=y + CONFIG_REGULATOR=y +-CONFIG_REGULATOR_DEBUG=y + CONFIG_REGULATOR_FIXED_VOLTAGE=y + CONFIG_RC_CORE=m + # CONFIG_RC_MAP is not set +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0074-iot-gate-imx8-iio-enable-standalone-triggers.patch b/recipes-kernel/linux/compulab/imx8mm/0074-iot-gate-imx8-iio-enable-standalone-triggers.patch new file mode 100644 index 0000000..2260375 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0074-iot-gate-imx8-iio-enable-standalone-triggers.patch @@ -0,0 +1,33 @@ +From 38cfd2262c26f6cc54466441e83b394fa8b40168 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 3 Nov 2021 10:43:10 +0200 +Subject: [PATCH 74/82] iot-gate-imx8: iio: enable standalone triggers + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 2b062d7963de..946d802d559c 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -642,8 +642,15 @@ CONFIG_SOC_TI=y + CONFIG_EXTCON_USB_GPIO=y + CONFIG_MEMORY=y + CONFIG_IIO=y ++CONFIG_IIO_BUFFER=y ++CONFIG_IIO_TRIGGERED_BUFFER=m ++CONFIG_IIO_SW_TRIGGER=m + CONFIG_IMX8QXP_ADC=y + CONFIG_MAX11108=m ++CONFIG_IIO_HRTIMER_TRIGGER=m ++CONFIG_IIO_INTERRUPT_TRIGGER=m ++CONFIG_IIO_TIGHTLOOP_TRIGGER=m ++CONFIG_IIO_SYSFS_TRIGGER=m + CONFIG_PWM=y + CONFIG_PWM_IMX27=y + CONFIG_RESET_IMX7=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0075-iot-gate-imx8-add-Moby-compatibility.patch b/recipes-kernel/linux/compulab/imx8mm/0075-iot-gate-imx8-add-Moby-compatibility.patch new file mode 100644 index 0000000..9a44b8d --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0075-iot-gate-imx8-add-Moby-compatibility.patch @@ -0,0 +1,150 @@ +From 05759ce85d56c7aaf36ed200ae018ae093a278ea Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 5 Jan 2022 13:26:44 +0200 +Subject: [PATCH 75/82] iot-gate-imx8: add Moby compatibility + +The Moby container engine is required for Microsoft Azure. +Update the kernel configurations to support the Moby container engine. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 32 +++++++++++++++++++--- + 1 file changed, 28 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 946d802d559c..7ff871b66969 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -1,6 +1,5 @@ + CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y +-CONFIG_AUDIT=y + CONFIG_NO_HZ_IDLE=y + CONFIG_HIGH_RES_TIMERS=y + CONFIG_PREEMPT=y +@@ -14,16 +13,21 @@ CONFIG_IKCONFIG_PROC=y + CONFIG_NUMA_BALANCING=y + CONFIG_MEMCG=y + CONFIG_BLK_CGROUP=y ++CONFIG_CFS_BANDWIDTH=y ++CONFIG_RT_GROUP_SCHED=y + CONFIG_CGROUP_PIDS=y ++CONFIG_CGROUP_FREEZER=y + CONFIG_CGROUP_HUGETLB=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y + CONFIG_CGROUP_PERF=y ++CONFIG_CGROUP_BPF=y + CONFIG_USER_NS=y + CONFIG_SCHED_AUTOGROUP=y + CONFIG_RELAY=y + CONFIG_BLK_DEV_INITRD=y ++CONFIG_BPF_SYSCALL=y + # CONFIG_COMPAT_BRK is not set + CONFIG_PROFILING=y + CONFIG_ARCH_MXC=y +@@ -76,18 +80,23 @@ CONFIG_CRYPTO_AES_ARM64_BS=m + CONFIG_JUMP_LABEL=y + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y ++CONFIG_BLK_DEV_THROTTLING=y + # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set + CONFIG_KSM=y + CONFIG_MEMORY_FAILURE=y + CONFIG_TRANSPARENT_HUGEPAGE=y ++CONFIG_ZPOOL=m + CONFIG_NET=y + CONFIG_PACKET=y + CONFIG_UNIX=y ++CONFIG_XFRM_USER=m + CONFIG_INET=y + CONFIG_IP_MULTICAST=y + CONFIG_IP_PNP=y + CONFIG_IP_PNP_DHCP=y + CONFIG_IP_PNP_BOOTP=y ++CONFIG_NET_IPVTI=m ++CONFIG_INET_ESP=m + CONFIG_IPV6_SIT=m + CONFIG_NETFILTER=y + CONFIG_BRIDGE_NETFILTER=m +@@ -136,6 +145,7 @@ CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + CONFIG_NETFILTER_XT_MATCH_HELPER=m + CONFIG_NETFILTER_XT_MATCH_IPCOMP=m + CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m + CONFIG_NETFILTER_XT_MATCH_L2TP=m + CONFIG_NETFILTER_XT_MATCH_LENGTH=m + CONFIG_NETFILTER_XT_MATCH_LIMIT=m +@@ -157,6 +167,11 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m + CONFIG_NETFILTER_XT_MATCH_TCPMSS=m + CONFIG_NETFILTER_XT_MATCH_TIME=m + CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_NFCT=y + CONFIG_NF_SOCKET_IPV4=m + CONFIG_IP_NF_IPTABLES=m + CONFIG_IP_NF_MATCH_AH=m +@@ -203,8 +218,11 @@ CONFIG_VLAN_8021Q=y + CONFIG_VLAN_8021Q_GVRP=y + CONFIG_VLAN_8021Q_MVRP=y + CONFIG_LLC2=y ++CONFIG_NET_SCHED=y ++CONFIG_NET_CLS_CGROUP=m + CONFIG_TSN=y + CONFIG_NET_SWITCHDEV=y ++CONFIG_CGROUP_NET_PRIO=y + CONFIG_BPF_JIT=y + CONFIG_CAN=y + CONFIG_CAN_BCM=m +@@ -295,11 +313,14 @@ CONFIG_PATA_OF_PLATFORM=y + CONFIG_MD=y + CONFIG_BLK_DEV_MD=m + CONFIG_BLK_DEV_DM=m ++CONFIG_DM_THIN_PROVISIONING=m + CONFIG_DM_MIRROR=m + CONFIG_DM_ZERO=m + CONFIG_NETDEVICES=y ++CONFIG_DUMMY=m + CONFIG_MACVLAN=m + CONFIG_MACVTAP=m ++CONFIG_IPVLAN=m + CONFIG_TUN=y + CONFIG_VETH=m + CONFIG_VIRTIO_NET=y +@@ -673,9 +694,10 @@ CONFIG_MXC_SIM=y + CONFIG_MXC_EMVSIM=y + CONFIG_MXC_MLB150=y + CONFIG_EXT2_FS=y ++CONFIG_EXT2_FS_XATTR=y + CONFIG_EXT3_FS=y +-CONFIG_EXT4_FS_POSIX_ACL=y +-CONFIG_EXT4_FS_SECURITY=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y + CONFIG_BTRFS_FS=m + CONFIG_BTRFS_FS_POSIX_ACL=y + CONFIG_FANOTIFY=y +@@ -701,13 +723,15 @@ CONFIG_9P_FS=y + CONFIG_NLS_CODEPAGE_437=y + CONFIG_NLS_ISO8859_1=y + CONFIG_SECURITY=y ++CONFIG_SECURITY_SELINUX=y ++CONFIG_SECURITY_APPARMOR=y ++CONFIG_DEFAULT_SECURITY_DAC=y + CONFIG_CRYPTO_USER=y + CONFIG_CRYPTO_TEST=m + CONFIG_CRYPTO_GCM=y + CONFIG_CRYPTO_CHACHA20POLY1305=m + CONFIG_CRYPTO_ECHAINIV=y + CONFIG_CRYPTO_TLS=m +-CONFIG_CRYPTO_CBC=m + CONFIG_CRYPTO_CTS=m + CONFIG_CRYPTO_LRW=m + CONFIG_CRYPTO_MD4=m +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0076-mmc-dts-fix-mmc1-initialization.patch b/recipes-kernel/linux/compulab/imx8mm/0076-mmc-dts-fix-mmc1-initialization.patch new file mode 100644 index 0000000..296c3e5 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0076-mmc-dts-fix-mmc1-initialization.patch @@ -0,0 +1,65 @@ +From 696209fa1dcb04991913e65ea1ea8958cc0b881e Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 8 Dec 2021 10:25:12 +0200 +Subject: [PATCH 76/82] mmc: dts: fix mmc1 initialization + +Occasionally eMMC1 storage is not initialized correctly during the boot +process. + +The reset signal, of the MMC1 bus, is set to enable during the boot +process. + +Update the MMC1 bus initialization to set the state of the reset signals +to disable and then to enable. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/boot/dts/compulab/sb-iotgimx8.dts | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +index 489fb11038dd..c514602cc02a 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +@@ -88,13 +88,16 @@ + enable-active-high; + }; + +- regulator-usdhc2_rst { ++ reg_usdhc2_rst: regulator-usdhc2_rst { + compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_reg_usdhc2_rst>; + regulator-name = "usdhc2_rst"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; +- regulator-always-on; ++ startup-delay-us = <100>; ++ off-on-delay-us = <12000>; + enable-active-high; + }; + +@@ -198,6 +201,7 @@ + bus-width = <4>; + mmc-ddr-1_8v; + non-removable; ++ vmmc-supply = <®_usdhc2_rst>; + status = "okay"; + }; + +@@ -289,6 +293,11 @@ + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x1d0 /* SD2_VSEL */ ++ >; ++ }; ++ ++ pinctrl_reg_usdhc2_rst: usdhc2rst { ++ fsl,pins = < + MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* EMMC_RST */ + >; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0077-ucm-imx8m-mini-dts-phy-eliminate-excessive-reset.patch b/recipes-kernel/linux/compulab/imx8mm/0077-ucm-imx8m-mini-dts-phy-eliminate-excessive-reset.patch new file mode 100644 index 0000000..b7c5e72 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0077-ucm-imx8m-mini-dts-phy-eliminate-excessive-reset.patch @@ -0,0 +1,29 @@ +From 1b8f7846c022c88de85d8ae27033f79590d8e2db Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Sun, 15 Jan 2023 23:42:26 +0200 +Subject: [PATCH 77/82] ucm-imx8m-mini: dts:phy: eliminate excessive reset + +The eth phy is tuned on u-boot, however the reset at Linux boot cleans +all the tuning and makes the phy inoperable. Eliminate the reset at +Linux boot so as to preserve the phy tuned. + +Signed-off-by: Kirill Kapranov +--- + arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +index d90e0b7763b3..e67a55e44325 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +@@ -70,6 +70,7 @@ + regulator-always-on; + enable-active-high; + startup-delay-us = <500>; ++ regulator-boot-on; + }; + + usdhc1_pwrseq: usdhc1_pwrseq { +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0078-iot-gate-imx8-release-3.0.patch b/recipes-kernel/linux/compulab/imx8mm/0078-iot-gate-imx8-release-3.0.patch new file mode 100644 index 0000000..71c6755 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0078-iot-gate-imx8-release-3.0.patch @@ -0,0 +1,22 @@ +From 75e9fc88a98aff14c8a8b823ffbdacd6fc75cfe1 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Wed, 5 Jan 2022 14:12:00 +0200 +Subject: [PATCH 78/82] iot-gate-imx8: release 3.0 + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 7ff871b66969..d08da2dd2c6a 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -1,3 +1,4 @@ ++CONFIG_LOCALVERSION="-iot-gate-imx8-3.0" + CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y + CONFIG_NO_HZ_IDLE=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0079-iot-gate-imx8-dts-M4-support-update.patch b/recipes-kernel/linux/compulab/imx8mm/0079-iot-gate-imx8-dts-M4-support-update.patch new file mode 100644 index 0000000..188c4a0 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0079-iot-gate-imx8-dts-M4-support-update.patch @@ -0,0 +1,47 @@ +From be3587e0f9dd28b49fac59b38562fc47d0899037 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 10 May 2022 12:19:59 +0300 +Subject: [PATCH 79/82] iot-gate-imx8: dts: M4 support update + +Adjust the M4 device tree to NXP SDK lf-5.10.72-2.2.0. + +Signed-off-by: Uri Mashiach +--- + .../boot/dts/compulab/sb-iotgimx8-ied-m4.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts +index eca040200864..c56e116acaaa 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8-ied-m4.dts +@@ -37,10 +37,27 @@ + no-map; + }; + ++ rsc_table: rsc_table@b80ff000 { ++ reg = <0 0xb80ff000 0 0x1000>; ++ no-map; ++ }; ++ + vdevbuffer: vdevbuffer@b8400000 { + compatible = "shared-dma-pool"; + reg = <0 0xb8400000 0 0x100000>; + no-map; + }; + }; ++ ++ imx8mm-cm4 { ++ compatible = "fsl,imx8mm-cm4"; ++ rsc-da = <0xb8000000>; ++ clocks = <&clk IMX8MM_CLK_M4_DIV>; ++ mbox-names = "tx", "rx", "rxdb"; ++ mboxes = <&mu 0 1 ++ &mu 1 1 ++ &mu 3 1>; ++ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>; ++ syscon = <&src>; ++ }; + }; +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0080-iot-gate-imx8-M4-support-update.patch b/recipes-kernel/linux/compulab/imx8mm/0080-iot-gate-imx8-M4-support-update.patch new file mode 100644 index 0000000..ca071fd --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0080-iot-gate-imx8-M4-support-update.patch @@ -0,0 +1,28 @@ +From 1a99603999a9e9d0f24ece73f1c260080d89c05a Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Tue, 10 May 2022 12:57:31 +0300 +Subject: [PATCH 80/82] iot-gate-imx8: M4 support update + +Update the kernel configuration, in order to support M4 in NXP SDK +lf-5.10.72-2.2.0. + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index d08da2dd2c6a..55630f0bcf3d 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -656,6 +656,7 @@ CONFIG_PLATFORM_MHU=y + CONFIG_ARM_SMMU=y + CONFIG_ARM_SMMU_V3=y + CONFIG_REMOTEPROC=y ++CONFIG_IMX_REMOTEPROC=y + CONFIG_RPMSG_QCOM_GLINK_RPM=y + CONFIG_SOC_BRCMSTB=y + CONFIG_FSL_RCPM=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0081-iot-gate-imx8-release-3.1.patch b/recipes-kernel/linux/compulab/imx8mm/0081-iot-gate-imx8-release-3.1.patch new file mode 100644 index 0000000..e4f5800 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0081-iot-gate-imx8-release-3.1.patch @@ -0,0 +1,23 @@ +From db10f37e8c75615621dfb2f6c33e64edb24726d5 Mon Sep 17 00:00:00 2001 +From: Uri Mashiach +Date: Thu, 19 May 2022 18:38:58 +0300 +Subject: [PATCH 81/82] iot-gate-imx8: release 3.1 + +Signed-off-by: Uri Mashiach +--- + arch/arm64/configs/iot-gate-imx8_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8_defconfig +index 55630f0bcf3d..060cec89025a 100644 +--- a/arch/arm64/configs/iot-gate-imx8_defconfig ++++ b/arch/arm64/configs/iot-gate-imx8_defconfig +@@ -1,4 +1,4 @@ +-CONFIG_LOCALVERSION="-iot-gate-imx8-3.0" ++CONFIG_LOCALVERSION="-iot-gate-imx8-3.1" + CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y + CONFIG_NO_HZ_IDLE=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0082-dts-Fix-usb-power-supply-reset.patch b/recipes-kernel/linux/compulab/imx8mm/0082-dts-Fix-usb-power-supply-reset.patch new file mode 100644 index 0000000..9d3a006 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0082-dts-Fix-usb-power-supply-reset.patch @@ -0,0 +1,40 @@ +From 727aa5e6cae90fac07cb04b3ed348606dd7db6a6 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 21 Nov 2022 16:33:49 +0200 +Subject: [PATCH 82/82] dts: Fix usb power supply reset + +USB power supply reset, performed by GPIO4 IO28 causes a noticeable +glitch on USB power lead. The property regulator-boot-on allows to avoid +the execcive reset. +Also, the GPIO is renamed along with the fake regulator. + +Signed-off-by: Kirill Kapranov +--- + arch/arm64/boot/dts/compulab/sb-iotgimx8.dts | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +index c514602cc02a..3e428fab3aa3 100644 +--- a/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts ++++ b/arch/arm64/boot/dts/compulab/sb-iotgimx8.dts +@@ -18,14 +18,15 @@ + model = "CompuLab SB-IOTGIMX8 board"; + compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm"; + +- regulator-usbhub-ena { ++ regulator-usb-ports-pwron { + compatible = "regulator-fixed"; +- regulator-name = "usbhub_ena"; ++ regulator-name = "usb_ports_pwron"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; + regulator-always-on; + enable-active-high; ++ regulator-boot-on; + }; + + regulator-usbhub-rst { +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0083-defconfig-Disable-Cadence-DRM.patch b/recipes-kernel/linux/compulab/imx8mm/0083-defconfig-Disable-Cadence-DRM.patch new file mode 100644 index 0000000..45392da --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0083-defconfig-Disable-Cadence-DRM.patch @@ -0,0 +1,33 @@ +From a7cdce04420198602d298068682cb9803ba1b3e5 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Mon, 16 Jan 2023 20:21:23 +0200 +Subject: [PATCH 83/83] defconfig: Disable Cadence DRM + +Signed-off-by: Kirill Kapranov +--- + arch/arm64/configs/cl-imx8m-mini_defconfig | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/configs/cl-imx8m-mini_defconfig b/arch/arm64/configs/cl-imx8m-mini_defconfig +index c4f1603773e8..8ef349c52aac 100644 +--- a/arch/arm64/configs/cl-imx8m-mini_defconfig ++++ b/arch/arm64/configs/cl-imx8m-mini_defconfig +@@ -482,7 +482,6 @@ CONFIG_DRM_PANEL_STARTEK_ILI9881C=y + CONFIG_DRM_PANEL_SEIKO_43WVF1G=y + CONFIG_DRM_FSL_IMX_LVDS_BRIDGE=y + CONFIG_DRM_NWL_MIPI_DSI=y +-CONFIG_DRM_CDNS_HDMI_CEC=y + CONFIG_DRM_DW_HDMI_I2S_AUDIO=m + CONFIG_DRM_DW_HDMI_GP_AUDIO=y + CONFIG_DRM_DW_HDMI_CEC=y +@@ -493,7 +492,6 @@ CONFIG_DRM_IMX_PARALLEL_DISPLAY=y + CONFIG_DRM_IMX8QM_LDB=y + CONFIG_DRM_IMX_HDMI=y + CONFIG_DRM_IMX_SEC_DSIM=y +-CONFIG_DRM_IMX_CDNS_MHDP=y + CONFIG_DRM_IMX_DCSS=y + CONFIG_DRM_LEGACY=y + CONFIG_FB_ARMCLCD=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0084-dts-defconfig-Fix-cpufreq-sysfs-attr-disappearance.patch b/recipes-kernel/linux/compulab/imx8mm/0084-dts-defconfig-Fix-cpufreq-sysfs-attr-disappearance.patch new file mode 100644 index 0000000..7409cb3 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0084-dts-defconfig-Fix-cpufreq-sysfs-attr-disappearance.patch @@ -0,0 +1,77 @@ +From 63f49548a40464a59e7a846f721a91c325cb6842 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 8 Feb 2023 21:31:33 +0200 +Subject: [PATCH 84/84] dts-defconfig: Fix cpufreq sysfs attr disappearance + +Signed-off-by: Kirill Kapranov +--- + arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi | 14 +++++++++++++- + arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi | 14 +++++++++++++- + arch/arm64/configs/cl-imx8m-mini_defconfig | 1 + + 3 files changed, 27 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi +index 5fb3d405e724..66b6007cdc3e 100644 +--- a/arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/mcm-imx8m-mini.dtsi +@@ -692,7 +692,19 @@ + }; + + &A53_0 { +- arm-supply = <&buck2_reg>; ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_1 { ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_2 { ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_3 { ++ cpu-supply = <&buck2_reg>; + }; + + &gpu { +diff --git a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +index e67a55e44325..60479e5e2b04 100644 +--- a/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi ++++ b/arch/arm64/boot/dts/compulab/ucm-imx8m-mini.dtsi +@@ -243,7 +243,19 @@ + }; + + &A53_0 { +- arm-supply = <&buck2_reg>; ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_1 { ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_2 { ++ cpu-supply = <&buck2_reg>; ++}; ++ ++&A53_3 { ++ cpu-supply = <&buck2_reg>; + }; + + &wdog1 { +diff --git a/arch/arm64/configs/cl-imx8m-mini_defconfig b/arch/arm64/configs/cl-imx8m-mini_defconfig +index 8ef349c52aac..3e293e13b189 100644 +--- a/arch/arm64/configs/cl-imx8m-mini_defconfig ++++ b/arch/arm64/configs/cl-imx8m-mini_defconfig +@@ -455,6 +455,7 @@ CONFIG_MFD_PCA9450=y + CONFIG_REGULATOR=y + CONFIG_REGULATOR_DEBUG=y + CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_REGULATOR_BD718XX=y + CONFIG_MEDIA_SUPPORT=y + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/0085-defconfig-add-iot-gate-imx8.patch b/recipes-kernel/linux/compulab/imx8mm/0085-defconfig-add-iot-gate-imx8.patch new file mode 100644 index 0000000..df34b53 --- /dev/null +++ b/recipes-kernel/linux/compulab/imx8mm/0085-defconfig-add-iot-gate-imx8.patch @@ -0,0 +1,18 @@ +From 0f3eab84c754f1e70085ec3c771406b29b7d83c7 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Wed, 8 Feb 2023 21:57:48 +0200 +Subject: [PATCH 85/85] defconfig: add iot-gate-imx8 + +Signed-off-by: Kirill Kapranov +--- + .../configs/{iot-gate-imx8_defconfig => iot-gate-imx8.config} | 0 + 1 file changed, 0 insertions(+), 0 deletions(-) + rename arch/arm64/configs/{iot-gate-imx8_defconfig => iot-gate-imx8.config} (100%) + +diff --git a/arch/arm64/configs/iot-gate-imx8_defconfig b/arch/arm64/configs/iot-gate-imx8.config +similarity index 100% +rename from arch/arm64/configs/iot-gate-imx8_defconfig +rename to arch/arm64/configs/iot-gate-imx8.config +-- +2.17.1 + diff --git a/recipes-kernel/linux/compulab/imx8mm/defconfig b/recipes-kernel/linux/compulab/imx8mm/defconfig index 1f630af..9d41f10 100644 --- a/recipes-kernel/linux/compulab/imx8mm/defconfig +++ b/recipes-kernel/linux/compulab/imx8mm/defconfig @@ -1,157 +1,1457 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.10.72 Kernel Configuration +# +CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 10.2.1 20201103" +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=100201 +CONFIG_LD_VERSION=235010000 +CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="-iot-gate-imx8-3.1" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_SCHED_THERMAL_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RCU=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +# CONFIG_BOOT_CONFIG is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_BPF_SYSCALL=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y +# CONFIG_BPF_JIT_ALWAYS_ON is not set +CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_BPF_PRELOAD is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y # CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set CONFIG_ARCH_MXC=y +CONFIG_HAVE_IMX_BUSFREQ=y +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S32 is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23144=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y CONFIG_NUMA=y -CONFIG_SECCOMP=y +CONFIG_NODES_SHIFT=4 +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_KEXEC=y +# CONFIG_KEXEC_FILE is not set CONFIG_CRASH_DUMP=y +CONFIG_XEN_DOM0=y CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=14 +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y CONFIG_COMPAT=y +CONFIG_KUSER_HELPERS=y +# CONFIG_ARMV8_DEPRECATED is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_USE_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_ARM64_BTI=y +CONFIG_ARM64_BTI_KERNEL=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_SYSVIPC_COMPAT=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y CONFIG_PM_DEBUG=y +# CONFIG_PM_ADVANCED_DEBUG is not set CONFIG_PM_TEST_SUSPEND=y +CONFIG_PM_SLEEP_DEBUG=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARM_PSCI_CPUIDLE is not set +# end of ARM CPU Idle Drivers +# end of CPU Idle + +# +# CPU Frequency scaling +# CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# CONFIG_CPUFREQ_DT=y -CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_CPUFREQ_DT_PLATDEV=y +# CONFIG_ACPI_CPPC_CPUFREQ is not set CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_IMX_CPUFREQ_DT=y -CONFIG_QORIQ_CPUFREQ=y +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_ARM=y +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y CONFIG_IMX_DSP=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_IMX_SECO_MU=y +CONFIG_IMX_SENTNL_MU=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_IPMI is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y CONFIG_ACPI_APEI=y CONFIG_ACPI_APEI_GHES=y CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_SEA=y CONFIG_ACPI_APEI_MEMORY_FAILURE=y CONFIG_ACPI_APEI_EINJ=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_IRQ_BYPASS_MANAGER=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y +CONFIG_KVM_ARM_PMU=y CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y CONFIG_CRYPTO_SHA512_ARM64_CE=m CONFIG_CRYPTO_SHA3_ARM64=m CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set CONFIG_CRYPTO_GHASH_ARM64_CE=y CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y CONFIG_CRYPTO_AES_ARM64_CE_CCM=y CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_POLY1305_NEON is not set +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +CONFIG_SET_FS=y +# CONFIG_KPROBES is not set CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +# CONFIG_BLK_DEV_ZONED is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_CMA=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +CONFIG_ZPOOL=m +# CONFIG_ZBUD is not set +# CONFIG_Z3FOLD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# end of Memory Management options + CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m CONFIG_XFRM_USER=m +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=m +# CONFIG_NET_KEY is not set +# CONFIG_XDP_SOCKETS is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +CONFIG_SYN_COOKIES=y +CONFIG_NET_IPVTI=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set CONFIG_INET_ESP=m +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_ESPINTCP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_NETLINK_ACCT=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_OSF=m CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +CONFIG_NF_LOG_NETDEV=m +CONFIG_NETFILTER_CONNCOUNT=m +CONFIG_NF_CONNTRACK_MARK=y +# CONFIG_NF_CONNTRACK_SECMARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_BROADCAST=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NETFILTER_SYNPROXY=m +CONFIG_NF_TABLES=m +# CONFIG_NF_TABLES_INET is not set +# CONFIG_NF_TABLES_NETDEV is not set +# CONFIG_NFT_NUMGEN is not set +# CONFIG_NFT_CT is not set +# CONFIG_NFT_COUNTER is not set +# CONFIG_NFT_CONNLIMIT is not set +# CONFIG_NFT_LOG is not set +# CONFIG_NFT_LIMIT is not set +# CONFIG_NFT_MASQ is not set +# CONFIG_NFT_REDIR is not set +# CONFIG_NFT_TUNNEL is not set +# CONFIG_NFT_OBJREF is not set +# CONFIG_NFT_QUEUE is not set +# CONFIG_NFT_QUOTA is not set +# CONFIG_NFT_REJECT is not set +# CONFIG_NFT_COMPAT is not set +# CONFIG_NFT_HASH is not set +# CONFIG_NFT_XFRM is not set +# CONFIG_NFT_SOCKET is not set +# CONFIG_NFT_OSF is not set +# CONFIG_NFT_TPROXY is not set +# CONFIG_NFT_SYNPROXY is not set +# CONFIG_NF_FLOW_TABLE is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +# CONFIG_NETFILTER_XT_TARGET_CT is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_NETMAP=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ECN=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_L2TP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# CONFIG_IP_VS_PROTO_TCP=y CONFIG_IP_VS_PROTO_UDP=y +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# CONFIG_IP_VS_RR=m +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_FTP is not set CONFIG_IP_VS_NFCT=y +# CONFIG_IP_VS_PE_SIP is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_SOCKET_IPV4=m +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_TABLES_IPV4 is not set +# CONFIG_NF_TABLES_ARP is not set +CONFIG_NF_DUP_IPV4=m +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m CONFIG_IP_NF_NAT=m CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +# CONFIG_IP_NF_SECURITY is not set +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_TABLES_IPV6 is not set +CONFIG_NF_DUP_IPV6=m +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +# CONFIG_IP6_NF_MATCH_SRH is not set +CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +# CONFIG_IP6_NF_SECURITY is not set CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_TABLES_BRIDGE is not set +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_GARP=y +CONFIG_MRP=y CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=y CONFIG_LLC2=y +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y -CONFIG_NET_SCH_MULTIQ=y -CONFIG_NET_SCH_CBS=y -CONFIG_NET_SCH_TAPRIO=y -CONFIG_NET_SCH_MQPRIO=y -CONFIG_NET_CLS_BASIC=y -CONFIG_NET_CLS_TCINDEX=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +# CONFIG_NET_SCH_TAPRIO is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +# CONFIG_NET_SCH_FQ_CODEL is not set +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_ETS is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set CONFIG_NET_CLS_CGROUP=m +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set CONFIG_TSN=y +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set CONFIG_NET_SWITCHDEV=y +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y CONFIG_BPF_JIT=y -CONFIG_NET_PKTGEN=y -CONFIG_CAN=m -CONFIG_CAN_FLEXCAN=m +# CONFIG_BPF_STREAM_PARSER is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=m +# CONFIG_CAN_GW is not set +# CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +CONFIG_CAN_MCP251XFD=m +# CONFIG_CAN_MCP251XFD_SANITY is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set +# end of CAN Device Drivers + CONFIG_BT=y +CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=y @@ -159,431 +1459,3475 @@ CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=y # CONFIG_BT_HS is not set -# CONFIG_BT_LE is not set +CONFIG_BT_LE=y CONFIG_BT_LEDS=y -# CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_MSFTEXT is not set +CONFIG_BT_DEBUGFS=y +# CONFIG_BT_FEATURE_DEBUG is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y -CONFIG_BT_HCIUART_BCM=y -CONFIG_BT_HCIUART_QCA=y +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +# CONFIG_BT_HCIBTUSB_BCM is not set +# CONFIG_BT_HCIBTUSB_MTK is not set +# CONFIG_BT_HCIBTUSB_RTL is not set +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set CONFIG_BT_HCIVHCI=y +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=y +CONFIG_LIB80211_CRYPT_WEP=y +CONFIG_LIB80211_CRYPT_CCMP=y +CONFIG_LIB80211_CRYPT_TKIP=y +# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_ETHTOOL_NETLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y CONFIG_PCIEPORTBUS=y +# CONFIG_HOTPLUG_PCI_PCIE is not set +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y CONFIG_PCIE_ALTERA=y CONFIG_PCIE_ALTERA_MSI=y CONFIG_PCI_HOST_THUNDER_PEM=y CONFIG_PCI_HOST_THUNDER_ECAM=y +# CONFIG_PCIE_HISI_ERR is not set + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT_HOST is not set CONFIG_PCI_IMX6=y +# CONFIG_PCI_IMX6_HOST is not set CONFIG_PCI_HISI=y CONFIG_PCIE_KIRIN=y +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support + +# +# Mobiveil PCIe Core Support +# +CONFIG_PCIE_MOBIVEIL=y +CONFIG_PCIE_MOBIVEIL_HOST=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +# end of Mobiveil PCIe Core Support + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCI_J721E_HOST is not set +# end of Cadence PCIe controllers support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y -CONFIG_FW_LOADER_USER_HELPER=y -CONFIG_FW_LOADER_USER_HELPER_FALLBACK=n +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +# CONFIG_IMX_WEIM is not set CONFIG_SIMPLE_PM_BUS=y CONFIG_VEXPRESS_CONFIG=y +# CONFIG_FSL_MC_BUS is not set +# CONFIG_MHI_BUS is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_OTP is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PHYSMAP_VERSATILE is not set +# CONFIG_MTD_PHYSMAP_GEMINI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_MCHP23K256 is not set CONFIG_MTD_SST25L=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set CONFIG_MTD_NAND_GPMI_NAND=y +# CONFIG_MTD_NAND_MXC is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_CADENCE is not set +# CONFIG_MTD_NAND_ARASAN is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + CONFIG_MTD_SPI_NOR=y # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set CONFIG_MTD_UBI=y -CONFIG_OF_OVERLAY=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m -CONFIG_XEN_BLKDEV_BACKEND=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set CONFIG_VIRTIO_BLK=y +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=y CONFIG_BLK_DEV_NVME=y +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set CONFIG_SENSORS_FXOS8700=y CONFIG_SENSORS_FXAS2100X=y +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# CONFIG_UACCE is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y # CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set CONFIG_SCSI_HISI_SAS=y CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y CONFIG_ATA=y +CONFIG_SATA_HOST=y +CONFIG_PATA_TIMINGS=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_FORCE=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_IMX=y CONFIG_AHCI_CEVA=y CONFIG_AHCI_XGENE=y CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IMX is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set CONFIG_PATA_PLATFORM=y CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=m +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_WIREGUARD is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set CONFIG_MACVLAN=m CONFIG_MACVTAP=m +CONFIG_IPVLAN_L3S=y CONFIG_IPVLAN=m +# CONFIG_IPVTAP is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +CONFIG_NET_VENDOR_CAVIUM=y CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_FREESCALE=y CONFIG_FEC=y +# CONFIG_FEC_UIO is not set +# CONFIG_FSL_PQ_MDIO is not set CONFIG_FSL_XGMAC_MDIO=y +# CONFIG_GIANFAR is not set + +# +# Frame Manager support +# +CONFIG_FSL_SDK_FMAN=y +# CONFIG_FSL_SDK_FMAN_TEST is not set + +# +# FMAN Processor support +# +CONFIG_FMAN_ARM=y +# CONFIG_FMAN_P3040_P4080_P5020 is not set +# CONFIG_FMAN_P1023 is not set +# CONFIG_FMAN_V3H is not set +# CONFIG_FMAN_V3L is not set +# end of FMAN Processor support + +# CONFIG_FSL_SDK_FMAN_RTC_API is not set +# CONFIG_FMAN_MIB_CNT_OVF_IRQ_EN is not set +CONFIG_FSL_FM_MAX_FRAME_SIZE=1522 +CONFIG_FSL_FM_RX_EXTRA_HEADROOM=64 +# CONFIG_FMAN_PFC is not set +# end of Frame Manager support + CONFIG_FSL_SDK_DPAA_ETH=y +# CONFIG_FSL_DPAA_HOOKS is not set +# CONFIG_FSL_DPAA_CEETM is not set +CONFIG_FSL_DPAA_OFFLINE_PORTS=y +CONFIG_FSL_DPAA_ADVANCED_DRIVERS=y +# CONFIG_FSL_DPAA_ETH_JUMBO_FRAME is not set +# CONFIG_FSL_DPAA_TS is not set +# CONFIG_FSL_DPAA_1588 is not set +CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT=128 +CONFIG_FSL_DPAA_ETH_REFILL_THRESHOLD=80 +CONFIG_FSL_DPAA_CS_THRESHOLD_1G=0x06000000 +CONFIG_FSL_DPAA_CS_THRESHOLD_10G=0x10000000 +CONFIG_FSL_DPAA_INGRESS_CS_THRESHOLD=0x10000000 +CONFIG_FSL_DPAA_ETH_DEBUGFS=y +# CONFIG_FSL_DPAA_ETH_DEBUG is not set +# CONFIG_FSL_DPAA_DBG_LOOP is not set +# CONFIG_FSL_ENETC is not set +# CONFIG_FSL_ENETC_VF is not set +# CONFIG_FSL_ENETC_IERB is not set +# CONFIG_FSL_ENETC_MDIO is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +CONFIG_NET_VENDOR_HISILICON=y CONFIG_HIX5HD2_GMAC=y +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y CONFIG_HNS_DSAF=y CONFIG_HNS_ENET=y CONFIG_HNS3=y CONFIG_HNS3_HCLGE=y +# CONFIG_HNS3_HCLGEVF is not set CONFIG_HNS3_ENET=y +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set CONFIG_E1000=y CONFIG_E1000E=y CONFIG_IGB=y +CONFIG_IGB_HWMON=y CONFIG_IGBVF=y +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y CONFIG_MVMDIO=y +# CONFIG_SKGE is not set CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_OCTEONTX2_AF is not set +# CONFIG_OCTEONTX2_PF is not set +# CONFIG_PRESTERA is not set +CONFIG_NET_VENDOR_MELLANOX=y CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +CONFIG_MLX5_ESWITCH=y +# CONFIG_MLX5_CORE_IPOIB is not set +CONFIG_MLX5_SW_STEERING=y +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +CONFIG_ENCX24J600=m +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +CONFIG_MSCC_OCELOT_SWITCH_LIB=y CONFIG_MSCC_OCELOT_SWITCH=y +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set CONFIG_QCOM_EMAC=m +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_ROCKER is not set +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set CONFIG_SMSC911X=y -CONFIG_STMMAC_ETH=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS_MUX_MMIOREG=y -CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=m +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=m +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=m +CONFIG_DWMAC_IMX8=m +# CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set +# CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set CONFIG_AQUANTIA_PHY=y -CONFIG_AT803X_PHY=y +# CONFIG_AX88796B_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set CONFIG_INPHI_PHY=y +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_MARVELL_10G_PHY=m CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set CONFIG_MICROSEMI_PHY=y +# CONFIG_NATIONAL_PHY is not set CONFIG_NXP_TJA11XX_PHY=y +CONFIG_AT803X_PHY=y +# CONFIG_AT803X_PHY_SMART_EEE is not set +# CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y +CONFIG_SMSC_PHY=y +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set CONFIG_VITESSE_PHY=y +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_OF_MDIO=y +CONFIG_ACPI_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_BITBANG=y +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set +CONFIG_MDIO_THUNDER=y + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=m +# end of PCS device drivers + CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m +# CONFIG_SLIP is not set +CONFIG_SLHC=m +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set CONFIG_USB_PEGASUS=m CONFIG_USB_RTL8150=m CONFIG_USB_RTL8152=m CONFIG_USB_LAN78XX=m -CONFIG_USB_USBNET=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set CONFIG_USB_NET_SR9800=m CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y CONFIG_USB_NET_PLUSB=m CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=y +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set CONFIG_USB_NET_QMI_WWAN=m -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PCIE=y -CONFIG_BRCM_TRACING=y -CONFIG_BRCMDBG=y +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +# CONFIG_ATH11K is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y +# CONFIG_IWLWIFI_BCAST_FILTERING is not set + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +# end of Debugging Options + +CONFIG_WLAN_VENDOR_INTERSIL=y CONFIG_HOSTAP=y -CONFIG_MXMWIFIEX=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +# CONFIG_MT7663U is not set +# CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set CONFIG_WLCORE_SDIO=m -CONFIG_IVSHMEM_NET=y +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_IVSHMEM_NET is not set +# CONFIG_IMX_SHMEM_NET is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_RPMSG is not set CONFIG_KEYBOARD_SNVS_PWRKEY=y CONFIG_KEYBOARD_IMX_SC_PWRKEY=y -CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_IMX is not set +# CONFIG_KEYBOARD_IMX_SC_KEY is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +CONFIG_TOUCHSCREEN_CT36X_WLD=y +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set CONFIG_TOUCHSCREEN_ATMEL_MXT=m -CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_ELAN_TS is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_TOUCHSCREEN_SYNAPTICS_DSX=y CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C=m +# CONFIG_TOUCHSCREEN_FTS is not set CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set CONFIG_INPUT_MPL3115=y +# CONFIG_SENSOR_FXLS8471 is not set CONFIG_INPUT_ISL29023=y +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y # CONFIG_SERIO_SERPORT is not set CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_16550A_VARIANTS=y +# CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_IMX_EARLYCON=y +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y CONFIG_SERIAL_FSL_LINFLEXUART=y CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set CONFIG_IPMI_DEVICE_INTERFACE=m CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_HISI_V2=y +CONFIG_HW_RANDOM_CAVIUM=y +CONFIG_HW_RANDOM_OPTEE=y +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set +# CONFIG_APPLICOM is not set +CONFIG_DEVMEM=y +# CONFIG_RAW_DRIVER is not set +CONFIG_DEVPORT=y CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +CONFIG_TCG_TIS_CORE=m +# CONFIG_TCG_TIS is not set +CONFIG_TCG_TIS_SPI=m +# CONFIG_TCG_TIS_SPI_CR50 is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_INFINEON is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_FTPM_TEE is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_CPU is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set CONFIG_I2C_IMX=y CONFIG_I2C_IMX_LPI2C=y +CONFIG_I2C_IMX_FLEXIO=y +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set CONFIG_I2C_RK3X=y CONFIG_I2C_RPBUS=y -CONFIG_I2C_CROS_EC_TUNNEL=y -CONFIG_XEN_I2C_BACKEND=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_XEN_I2C_FRONTEND=y +# CONFIG_XEN_I2C_BACKEND is not set +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_SLAVE_TESTUNIT is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set CONFIG_SPI=y -CONFIG_SPI_FSL_LPSPI=y -CONFIG_SPI_FSL_QUADSPI=y -CONFIG_SPI_NXP_FLEXSPI=y -CONFIG_SPI_IMX=y -CONFIG_SPI_PL022=y -CONFIG_SPI_ROCKCHIP=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_FSL_LPSPI is not set +# CONFIG_SPI_FSL_QUADSPI is not set +# CONFIG_SPI_HISI_SFC_V3XX is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_IMX=m +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set + +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + +# +# SPI Protocol Masters +# CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set CONFIG_SPI_SLAVE=y CONFIG_SPI_SLAVE_TIME=y CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y +CONFIG_SPI_DYNAMIC=y CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_QORIQ=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set +# CONFIG_PTP_1588_CLOCK_IDTCM is not set +# end of PTP clock support + CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_IMX=y +CONFIG_PINCTRL_IMX_SCU=y CONFIG_PINCTRL_IMX8MM=y CONFIG_PINCTRL_IMX8MN=y -CONFIG_PINCTRL_IMX8MP=y +# CONFIG_PINCTRL_IMX8MP is not set CONFIG_PINCTRL_IMX8MQ=y CONFIG_PINCTRL_IMX8QM=y CONFIG_PINCTRL_IMX8QXP=y CONFIG_PINCTRL_IMX8DXL=y +# CONFIG_PINCTRL_IMX8ULP is not set CONFIG_PINCTRL_S32V_CORE=y + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_LOGICVC is not set CONFIG_GPIO_MB86S7X=y +CONFIG_GPIO_MXC=y +CONFIG_GPIO_SCU=y +CONFIG_GPIO_MXC_PAD_WAKEUP=y CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SIFIVE is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_VF610=y +# CONFIG_GPIO_IMX_RPMSG is not set CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCA9570 is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_BD9571MWV is not set CONFIG_GPIO_MAX77620=y -CONFIG_POWER_AVS=y +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_RESET=y CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set CONFIG_POWER_RESET_VEXPRESS=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_RT5033 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM1177 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CORSAIR_CPRO is not set +# CONFIG_SENSORS_DRIVETEMP is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX17135 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set CONFIG_SENSORS_INA2XX=m CONFIG_SENSORS_INA3221=m -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +# CONFIG_SENSORS_MAG3110 is not set +CONFIG_MXC_MMA8451=y +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +# CONFIG_DEVFREQ_THERMAL is not set CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set +# CONFIG_IMX_THERMAL is not set CONFIG_IMX_SC_THERMAL=y -CONFIG_DEVICE_THERMAL=y CONFIG_IMX8MM_THERMAL=y +CONFIG_DEVICE_THERMAL=y +# CONFIG_MAX77620_THERMAL is not set CONFIG_QORIQ_THERMAL=y +# CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set CONFIG_ARM_SP805_WATCHDOG=y CONFIG_ARM_SBSA_WATCHDOG=y +# CONFIG_CADENCE_WATCHDOG is not set CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set CONFIG_IMX2_WDT=y CONFIG_IMX_SC_WDT=y -CONFIG_XEN_WDT=y +# CONFIG_IMX7ULP_WDT is not set +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y CONFIG_MFD_AXP20X_I2C=y -CONFIG_MFD_IMX_AUDIOMIX=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_IMX_MIX is not set +# CONFIG_MFD_MXC_HDMI is not set CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX17135 is not set +# CONFIG_MFD_FP9931 is not set CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set CONFIG_MFD_ROHM_BD718XX=y -CONFIG_MFD_PCA9450=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_ROHM_BD71828 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set +# end of Multifunction device drivers + CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_AXP20X=y -CONFIG_REGULATOR_BD718XX=y -CONFIG_REGULATOR_BD9571MWV=y -CONFIG_REGULATOR_FAN53555=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_HI6421V530=y -CONFIG_REGULATOR_MAX77620=y -CONFIG_REGULATOR_MAX8973=y -CONFIG_REGULATOR_PCA9450=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_QCOM_SPMI=y -CONFIG_REGULATOR_RK808=y -CONFIG_REGULATOR_S2MPS11=y -CONFIG_REGULATOR_VCTRL=m +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_AXP20X is not set +# CONFIG_REGULATOR_BD718XX is not set +# CONFIG_REGULATOR_BD9571MWV is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_FAN53880 is not set +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_HI6421 is not set +# CONFIG_REGULATOR_HI6421V530 is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77620 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set +# CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set +# CONFIG_REGULATOR_MPQ7920 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF1550_RPMSG is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_PWM is not set +# CONFIG_REGULATOR_QCOM_SPMI is not set +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +# CONFIG_REGULATOR_RK808 is not set +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +# CONFIG_REGULATOR_S2MPA01 is not set +# CONFIG_REGULATOR_S2MPS11 is not set +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_REGULATOR_VEXPRESS is not set +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_RC_CORE=m +# CONFIG_RC_MAP is not set +# CONFIG_LIRC is not set +# CONFIG_RC_DECODERS is not set +# CONFIG_RC_DEVICES is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_SUPPORT_FILTER=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media device types +# CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_PLATFORM_SUPPORT is not set +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + +CONFIG_VIDEO_DEV=y CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y +# CONFIG_VIDEO_V4L2_SUBDEV_API is not set +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# end of Video4Linux options + +# +# Media controller options +# +# end of Media controller options + +# +# Media drivers +# + +# +# Drivers filtered as selected at 'Filter media drivers' +# CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# CONFIG_USB_VIDEO_CLASS=m -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MX8_CAPTURE=y -CONFIG_VIDEO_MXC_CAPTURE=y -CONFIG_VIDEO_MXC_CSI_CAMERA=y -CONFIG_MXC_MIPI_CSI=y -CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_OV5640=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_VIDEOBUF2_VMALLOC=y +# end of Media drivers + +# +# Media ancillary drivers +# +# CONFIG_VIDEO_IR_I2C is not set + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_MAX9286 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RDACM20 is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set +# end of SPI helper chips + +# +# Media SPI Adapters +# +# end of Media SPI Adapters +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_IMX_DPU_CORE=y +CONFIG_IMX_DPU_BLIT=y CONFIG_IMX_LCDIF_CORE=y -CONFIG_IMX_LCDIFV3_CORE=y +# CONFIG_IMX_LCDIFV3_CORE is not set +CONFIG_IMX8_PC=y +CONFIG_IMX8_PRG=y +CONFIG_IMX8_DPRC=y CONFIG_DRM=y -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set CONFIG_DRM_MALI_DISPLAY=m +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +# CONFIG_DRM_PANEL_LVDS is not set CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_STARTEK_ILI9881C=y -CONFIG_DRM_PANEL_SEIKO_43WVF1G=y -CONFIG_DRM_FSL_IMX_LVDS_BRIDGE=y -CONFIG_DRM_NWL_MIPI_DSI=y -CONFIG_DRM_CDNS_HDMI_CEC=y -CONFIG_DRM_DW_HDMI_I2S_AUDIO=m -CONFIG_DRM_DW_HDMI_GP_AUDIO=y -CONFIG_DRM_DW_HDMI_CEC=y +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_STARTEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set +# CONFIG_DRM_PANEL_WKS_101WX001 is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_FSL_IMX_LVDS_BRIDGE is not set +# CONFIG_DRM_LVDS_CODEC is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_SEC_MIPI_DSIM is not set +# CONFIG_DRM_NXP_SEIKO_43WVFIG is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +# CONFIG_DRM_CDNS_MHDP is not set +# CONFIG_DRM_CDNS_HDMI_CEC is not set CONFIG_DRM_ITE_IT6263=y +# CONFIG_DRM_ITE_IT6161 is not set +# end of Display Interface Bridges + CONFIG_DRM_IMX=y -CONFIG_DRM_IMX_LCDIF_MUX_DISPLAY=y -CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -CONFIG_DRM_IMX8QM_LDB=y -CONFIG_DRM_IMX_HDMI=y -CONFIG_DRM_IMX_SEC_DSIM=y -CONFIG_DRM_IMX_CDNS_MHDP=y -CONFIG_DRM_IMX_DCSS=y -CONFIG_DRM_LEGACY=y -CONFIG_FB_ARMCLCD=y -CONFIG_FB_EFI=y -CONFIG_BACKLIGHT_GENERIC=m +# CONFIG_DRM_IMX_LCDIF_MUX_DISPLAY is not set +# CONFIG_DRM_IMX_PARALLEL_DISPLAY is not set +# CONFIG_DRM_IMX_TVE is not set +# CONFIG_IMX8MP_HDMI_PAVI is not set +# CONFIG_DRM_IMX_HDMI is not set +# CONFIG_DRM_IMX_SEC_DSIM is not set +# CONFIG_DRM_IMX_DCNANO is not set +CONFIG_DRM_IMX_DPU=y +# CONFIG_DRM_IMX_DCSS is not set +# CONFIG_DRM_IMX_CDNS_MHDP is not set +CONFIG_DRM_IMX_LCDIF=y +# CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_XEN is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_IMX is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +CONFIG_FB_MX3=y +# CONFIG_FB_MXS is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_FB_MXC=y +# CONFIG_FB_MXC_DISP_FRAMEWORK is not set +# CONFIG_FB_MXC_OVERLAY is not set +CONFIG_FB_MXC_EDID=y +# CONFIG_FB_MXC_EINK_PANEL is not set +# CONFIG_FB_MXC_EINK_V2_PANEL is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_QCOM_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_FSL_DAI=m -CONFIG_SND_SOC_FSL_EASRC=y -CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_AK4458=y -CONFIG_SND_SOC_IMX_AK5558=y -CONFIG_SND_SOC_IMX_AK4497=y -CONFIG_SND_SOC_IMX_WM8960=y -CONFIG_SND_SOC_IMX_WM8524=y -CONFIG_SND_SOC_IMX_CS42888=y -CONFIG_SND_SOC_IMX_MICFIL=y -CONFIG_SND_SOC_IMX_RPMSG=y -CONFIG_SND_SOC_IMX_MQS=y -CONFIG_SND_SOC_IMX_SPDIF=y -CONFIG_SND_SOC_IMX_AUDMIX=y -CONFIG_SND_SOC_IMX_PDM_MIC=y -CONFIG_SND_SOC_IMX_DSP=y -CONFIG_SND_SOC_IMX_CDNHDMI=y -CONFIG_SND_SOC_IMX_XCVR=y -CONFIG_SND_SOC_SOF_TOPLEVEL=y -CONFIG_SND_SOC_SOF_OF=m -CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y -CONFIG_SND_SOC_SOF_IMX8_SUPPORT=m -CONFIG_SND_SOC_SOF_IMX8M_SUPPORT=m -CONFIG_SND_SOC_SPDIF=m -CONFIG_SND_SOC_WM8731=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_AUDIO_GRAPH_CARD=y +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_BACKLIGHT_LED is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +# CONFIG_SOUND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set CONFIG_USB_OTG=y -CONFIG_USB_OTG_WHITELIST=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +# CONFIG_USB_EHCI_MXC is not set CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_HCD_TEST_MODE=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# CONFIG_USB_ACM=m +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=m +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set CONFIG_USB_CDNS3=y CONFIG_USB_CDNS3_GADGET=y CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_CDNS3_PCI_WRAP=y +CONFIG_USB_CDNS3_IMX=y CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC3_IMX8MP=y CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_SIMPLE=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set CONFIG_USB_SERIAL_CP210X=m +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=m CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set CONFIG_USB_TEST=m CONFIG_USB_EHSET_TEST_FIXTURE=m +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set CONFIG_USB_MXS_PHY=y CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FSL_USB2 is not set +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_F_SS_LB=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_U_ETHER=y +CONFIG_USB_F_SERIAL=y +CONFIG_USB_F_OBEX=y +CONFIG_USB_F_NCM=y +CONFIG_USB_F_ECM=y +CONFIG_USB_F_EEM=y +CONFIG_USB_F_SUBSET=y +CONFIG_USB_F_RNDIS=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_F_UVC=y +CONFIG_USB_F_HID=y CONFIG_USB_CONFIGFS=y CONFIG_USB_CONFIGFS_SERIAL=y CONFIG_USB_CONFIGFS_ACM=y @@ -596,231 +4940,2341 @@ CONFIG_USB_CONFIGFS_EEM=y CONFIG_USB_CONFIGFS_MASS_STORAGE=y CONFIG_USB_CONFIGFS_F_LB_SS=y CONFIG_USB_CONFIGFS_F_FS=y -CONFIG_USB_CONFIGFS_F_UAC1=y -CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y -CONFIG_USB_CONFIGFS_F_UAC2=y -CONFIG_USB_CONFIGFS_F_MIDI=y CONFIG_USB_CONFIGFS_F_HID=y CONFIG_USB_CONFIGFS_F_UVC=y +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# +# USB Gadget precomposed configurations +# CONFIG_USB_ZERO=m -CONFIG_USB_AUDIO=m +# CONFIG_USB_ZERO_HNPTEST is not set CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set CONFIG_USB_MASS_STORAGE=m CONFIG_USB_G_SERIAL=m +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + CONFIG_TYPEC=y CONFIG_TYPEC_TCPM=y CONFIG_TYPEC_TCPCI=y +# CONFIG_TYPEC_RT1711H is not set +# CONFIG_TYPEC_TCPCI_MAXIM is not set +# CONFIG_TYPEC_FUSB302 is not set +# CONFIG_TYPEC_UCSI is not set +# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set CONFIG_TYPEC_SWITCH_GPIO=y +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +# CONFIG_MMC_SDHCI_ACPI is not set CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set CONFIG_MMC_SDHCI_OF_ESDHC=y +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SDHCI_ESDHC_IMX=y CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_SDHCI_MILBEAUT is not set +# CONFIG_MMC_MXC is not set +# CONFIG_MMC_TIFM_SD is not set CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_HI3798CV200=y CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_EL15203000 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y -CONFIG_EDAC_GHES=y -CONFIG_EDAC_SYNOPSYS=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_GHES is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_SYNOPSYS is not set +# CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set +CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set CONFIG_RTC_DRV_ABX80X=y +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +# CONFIG_RTC_DRV_RK808 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set CONFIG_RTC_DRV_PCF85363=y -CONFIG_RTC_DRV_SNVS=y -CONFIG_RTC_DRV_IMX_SC=y -CONFIG_RTC_DRV_IMX_RPMSG=y +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set +# CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_S5M is not set +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_IMXDI is not set +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_IMX_SC is not set +# CONFIG_RTC_DRV_IMX_RPMSG is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set CONFIG_BCM_SBA_RAID=m +# CONFIG_CRYPTO_DEV_FSL_CAAM_DMA is not set +# CONFIG_DW_AXI_DMAC is not set CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set CONFIG_FSL_EDMA_V3=y -CONFIG_IMX_SDMA=y +# CONFIG_HISI_DMA is not set +# CONFIG_IMX_DMA is not set +CONFIG_IMX_SDMA=m +# CONFIG_INTEL_IDMA64 is not set CONFIG_MV_XOR_V2=y CONFIG_MXS_DMA=y +# CONFIG_MXC_PXP_V3 is not set +CONFIG_MX3_IPU=y +CONFIG_MX3_IPU_IRQS=4 CONFIG_PL330_DMA=y +# CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set +# CONFIG_SF_PDMA is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set CONFIG_DMATEST=y +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_SELFTESTS is not set +# CONFIG_DMABUF_HEAPS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set CONFIG_UIO=y +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set CONFIG_UIO_PCI_GENERIC=y -CONFIG_UIO_IVSHMEM=y +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_UIO_IVSHMEM is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_IVSHMEM is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y CONFIG_XEN_GNTDEV=y CONFIG_XEN_GRANT_DEV_ALLOC=y +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support + +# CONFIG_GREYBUS is not set CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# CONFIG_AD7280 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_IMX_CAPTURE=y +# CONFIG_VIDEO_HANTRO is not set +# CONFIG_VIDEO_IMX_CAPTURE is not set +# CONFIG_VIDEO_ZORAN is not set + +# +# Android +# CONFIG_ION=y CONFIG_ION_SYSTEM_HEAP=y -CONFIG_ION_CMA_HEAP=y +# end of Android + +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_KS7010 is not set CONFIG_FSL_SDK_DPA=y + +# +# Freescale Datapath QMan/BMan options +# +# CONFIG_FSL_DPA_CHECKING is not set +CONFIG_FSL_DPA_CAN_WAIT=y +CONFIG_FSL_DPA_CAN_WAIT_SYNC=y +CONFIG_FSL_DPA_PIRQ_FAST=y +CONFIG_FSL_DPA_PIRQ_SLOW=y +CONFIG_FSL_DPA_PORTAL_SHARE=y +CONFIG_FSL_SDK_BMAN=y +CONFIG_FSL_BMAN_CONFIG=y +# CONFIG_FSL_BMAN_TEST is not set +CONFIG_FSL_BMAN_DEBUGFS=y +CONFIG_FSL_SDK_QMAN=y +CONFIG_FSL_QMAN_POLL_LIMIT=32 +CONFIG_FSL_QMAN_CONFIG=y +# CONFIG_FSL_QMAN_TEST is not set +CONFIG_FSL_QMAN_DEBUGFS=y +CONFIG_FSL_QMAN_FQD_SZ=10 +CONFIG_FSL_QMAN_PFDR_SZ=13 +CONFIG_FSL_QMAN_CI_SCHED_CFG_SRCCIV=4 +CONFIG_FSL_QMAN_CI_SCHED_CFG_SRQ_W=3 +CONFIG_FSL_QMAN_CI_SCHED_CFG_RW_W=2 +CONFIG_FSL_QMAN_CI_SCHED_CFG_BMAN_W=2 +CONFIG_FSL_QMAN_PIRQ_DQRR_ITHRESH=12 +CONFIG_FSL_QMAN_PIRQ_MR_ITHRESH=4 +CONFIG_FSL_QMAN_PIRQ_IPERIOD=100 +CONFIG_FSL_QMAN_FQ_LOOKUP=y +CONFIG_QMAN_CEETM_UPDATE_PERIOD=1000 +CONFIG_FSL_QMAN_INIT_TIMEOUT=10 +CONFIG_FSL_USDPAA=y +# end of Freescale Datapath QMan/BMan options + +# CONFIG_PI433 is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# end of Gasket devices + +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_KPC2000 is not set +# CONFIG_QLGE is not set +# CONFIG_WFX is not set +# CONFIG_SPMI_HISI3670 is not set +# CONFIG_MFD_HI6421_SPMI is not set CONFIG_FSL_PPFE=y CONFIG_FSL_PPFE_UTIL_DISABLED=y -CONFIG_MFD_CROS_EC=y -CONFIG_CROS_EC_I2C=y -CONFIG_CROS_EC_SPI=y -CONFIG_COMMON_CLK_VERSATILE=y -CONFIG_CLK_SP810=y -CONFIG_CLK_VEXPRESS_OSC=y +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set CONFIG_COMMON_CLK_CS2000_CP=y CONFIG_COMMON_CLK_S2MPS11=y +# CONFIG_CLK_QORIQ is not set CONFIG_COMMON_CLK_XGENE=y CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_BD718XX is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_MXC_CLK=y +CONFIG_MXC_CLK_SCU=y CONFIG_CLK_IMX8MM=y CONFIG_CLK_IMX8MN=y -CONFIG_CLK_IMX8MP=y +# CONFIG_CLK_IMX8MP is not set CONFIG_CLK_IMX8MQ=y CONFIG_CLK_IMX8QXP=y +# CONFIG_CLK_IMX8ULP is not set CONFIG_ARCH_S32_CLK=y CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_CLKSRC_IMX_TPM=y +CONFIG_TIMER_IMX_SYS_CTR=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_IMX_MBOX=y CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +# CONFIG_PCC is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_V3=y +# CONFIG_ARM_SMMU_V3_SVA is not set +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# CONFIG_REMOTEPROC=y +# CONFIG_REMOTEPROC_CDEV is not set CONFIG_IMX_REMOTEPROC=y +# CONFIG_IMX_DSP_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +# CONFIG_RPMSG_CTRL is not set +CONFIG_RPMSG_NS=y +CONFIG_RPMSG_QCOM_GLINK=y CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_VIRTIO=y +CONFIG_HAVE_IMX_RPMSG=y +CONFIG_IMX_RPMSG_PINGPONG=m +CONFIG_IMX_RPMSG_TTY=m +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# CONFIG_SOC_BRCMSTB=y -CONFIG_FSL_QIXIS=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +CONFIG_FSL_GUTS=y CONFIG_FSL_RCPM=y -CONFIG_IMX_SCU_SOC=y +CONFIG_FSL_QIXIS=y +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +CONFIG_IMX_GPCV2_PM_DOMAINS=y +CONFIG_SOC_IMX8M=y +CONFIG_IMX8M_BUSFREQ=y CONFIG_SECVIO_SC=y +CONFIG_IMX8M_PM_DOMAINS=y +CONFIG_RPMSG_LIFE_CYCLE=y +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + CONFIG_SOC_TI=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_ARM_IMX_BUS_DEVFREQ is not set +# CONFIG_ARM_IMX8M_DDRC_DEVFREQ is not set +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set CONFIG_EXTCON_USB_GPIO=y -CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +CONFIG_IIO_CONFIGFS=m +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +CONFIG_IIO_SW_TRIGGER=m +# CONFIG_IIO_TRIGGERED_EVENT is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMA400 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7091R5 is not set +# CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7292 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_ADI_AXI_ADC is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_IMX7D_ADC is not set CONFIG_IMX8QXP_ADC=y -CONFIG_IIO_CROS_EC_SENSORS_CORE=m -CONFIG_IIO_CROS_EC_SENSORS=m -CONFIG_IIO_CROS_EC_LIGHT_PROX=m -CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2496 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +CONFIG_MAX11108=m +# CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +# CONFIG_NAU7802 is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_QCOM_SPMI_ADC5 is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SCD30_CORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# IIO SCMI Sensors +# +# end of IIO SCMI Sensors + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_FXOS8700_I2C is not set +# CONFIG_FXOS8700_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6030 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +CONFIG_IIO_HRTIMER_TRIGGER=m +CONFIG_IIO_INTERRUPT_TRIGGER=m +CONFIG_IIO_TIGHTLOOP_TRIGGER=m +CONFIG_IIO_SYSFS_TRIGGER=m +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_DLHL60D is not set +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_PING is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_LTC2983 is not set +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set CONFIG_PWM=y -CONFIG_PWM_CROS_EC=m +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_IMX1 is not set CONFIG_PWM_IMX27=y +# CONFIG_PWM_IMX_TPM is not set +# CONFIG_PWM_PCA9685 is not set +# CONFIG_PWM_RPCHIP is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_IMX_GPCV2=y +CONFIG_PARTITION_PERCPU=y +# CONFIG_GIC_GENTLE_CONFIG is not set +CONFIG_IMX_IRQSTEER=y +CONFIG_IMX_INTMUX=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_DISPMIX=y +CONFIG_RESET_IMX7=y +# CONFIG_RESET_IMX8ULP_SIM is not set +CONFIG_RESET_GPIO=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y CONFIG_PHY_XGENE=y -CONFIG_PHY_MIXEL_LVDS=y -CONFIG_PHY_MIXEL_LVDS_COMBO=y -CONFIG_PHY_FSL_IMX8MP_LVDS=y +# CONFIG_PHY_MIXEL_LVDS is not set +# CONFIG_PHY_MIXEL_LVDS_COMBO is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_TORRENT is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_FSL_IMX8MP_LVDS is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y CONFIG_PHY_MIXEL_MIPI_DPHY=y -CONFIG_PHY_SAMSUNG_HDMI_PHY=y +# CONFIG_PHY_SAMSUNG_HDMI_PHY is not set +CONFIG_PHY_FSL_IMX_PCIE=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +# CONFIG_ARM_SMMU_V3_PMU is not set +# CONFIG_ARM_DSU_PMU is not set CONFIG_FSL_IMX8_DDR_PMU=y -CONFIG_HISI_PMU=y -CONFIG_DAX=m +# CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y +# CONFIG_USB4 is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_IMX_IIM is not set CONFIG_NVMEM_IMX_OCOTP=y CONFIG_NVMEM_IMX_OCOTP_SCU=y +# CONFIG_NVMEM_SPMI_SDAM is not set +# CONFIG_NVMEM_SNVS_LPGPR is not set +CONFIG_NVMEM_IMX_OCOTP_FSB_S400=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set CONFIG_FPGA_BRIDGE=m CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set CONFIG_FPGA_REGION=m CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set CONFIG_TEE=y + +# +# TEE drivers +# CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers + +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set CONFIG_MUX_MMIO=y +# end of Multiplexer drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# CONFIG_MOST is not set + +# +# MXC support drivers +# CONFIG_MXC_SIM=y -# CONFIG_MXC_IMX_DMX_HW is not set +# CONFIG_MXC_IPU is not set + +# +# MXC Vivante GPU support +# +CONFIG_MXC_GPU_VIV=y +# end of MXC Vivante GPU support + +# +# MXC SIM Support +# +# CONFIG_MXC_SIMv2 is not set CONFIG_MXC_EMVSIM=y +# end of MXC SIM Support + +# +# MXC Media Local Bus Driver +# +CONFIG_MXC_MLB=y CONFIG_MXC_MLB150=y +# end of MXC Media Local Bus Driver + +# +# MXC HDMI CEC (Consumer Electronics Control) support +# +# end of MXC HDMI CEC (Consumer Electronics Control) support + +# +# MXC MIPI Support +# +# end of MXC MIPI Support + +# +# MXC HANTRO(Video Processing Unit) support +# +CONFIG_MXC_HANTRO=y +# end of MXC HANTRO(Video Processing Unit) support + +# +# MXC HANTRO(Video Processing Unit) 845 support +# +CONFIG_MXC_HANTRO_845=y +# end of MXC HANTRO(Video Processing Unit) 845 support + +# +# MXC HANTRO(Video Processing Unit) encoder support +# +CONFIG_MXC_HANTRO_845_H1=y +# end of MXC HANTRO(Video Processing Unit) encoder support + +# +# MXC HANTRO(Video Processing Unit) VC8000E encoder support +# +CONFIG_MXC_HANTRO_VC8000E=y +# end of MXC HANTRO(Video Processing Unit) VC8000E encoder support + +# +# MXC HANTRO(Video Processing Unit) V4L2 support +# +CONFIG_MXC_HANTRO_V4L2=y +# end of MXC HANTRO(Video Processing Unit) V4L2 support + +# +# MXC VPU(Video Processing Unit) MALONE DECODER support +# +CONFIG_MXC_VPU_MALONE=y +# CONFIG_MXC_VPU_MALONE_DEBUG is not set +# end of MXC VPU(Video Processing Unit) MALONE DECODER support + +# +# MXC VPU(Video Processing Unit) WINDSOR ENCODER support +# +CONFIG_MXC_VPU_WINDSOR=y +# CONFIG_MXC_VPU_WINDSOR_DEBUG is not set +# end of MXC VPU(Video Processing Unit) WINDSOR ENCODER support + +# +# MXC VPU(Video Processing Unit) support +# +# end of MXC VPU(Video Processing Unit) support +# end of MXC support drivers +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +# CONFIG_EXT2_FS_SECURITY is not set CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set +# CONFIG_NTFS_FS is not set +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_TMPFS_INODE64 is not set CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UBIFS_FS_ZSTD=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_UBIFS_FS_AUTHENTICATION is not set +# CONFIG_CRAMFS is not set CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_SECURE_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_PATH=y +CONFIG_LSM_MMAP_MIN_ADDR=32768 +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set +# CONFIG_SECURITY_SELINUX_DISABLE is not set +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0 +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_APPARMOR is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=y + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set +# CONFIG_CRYPTO_CURVE25519 is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_CHACHA20POLY1305=m +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=m CONFIG_CRYPTO_ECHAINIV=y CONFIG_CRYPTO_TLS=m -CONFIG_CRYPTO_CFB=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_OFB=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=y +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_XXHASH=m +CONFIG_CRYPTO_BLAKE2B=m +# CONFIG_CRYPTO_BLAKE2S is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_POLY1305=m CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_STREEBOG=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +# CONFIG_CRYPTO_STREEBOG is not set CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST_COMMON=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_CHACHA20=m CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_SM4=m -CONFIG_CRYPTO_TEA=m +# CONFIG_CRYPTO_SM4 is not set CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +CONFIG_CRYPTO_ZSTD=y + +# +# Random Number Generation +# CONFIG_CRYPTO_ANSI_CPRNG=y -# CONFIG_CRYPTO_HW is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +# CONFIG_CRYPTO_STATS is not set +CONFIG_CRYPTO_HASH_INFO=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=y +# CONFIG_CRYPTO_LIB_BLAKE2S is not set +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +# CONFIG_CRYPTO_LIB_CHACHA is not set +# CONFIG_CRYPTO_LIB_CURVE25519 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +# CONFIG_CRYPTO_LIB_POLY1305 is not set +# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_KEYBLOB_API_DESC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y +CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 +# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_TK_API=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_TK_API_TEST is not set +# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_SLOTSIZE=7 +CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m +CONFIG_CRYPTO_DEV_FSL_CAAM_JR_UIO=m +# CONFIG_CRYPTO_DEV_SAHARA is not set +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_MXS_DCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +# CONFIG_CRYPTO_DEV_VIRTIO is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_HISI_SEC2 is not set +# CONFIG_CRYPTO_DEV_HISI_ZIP is not set +# CONFIG_CRYPTO_DEV_HISI_HPRE is not set +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_STMP_DEVICE=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y CONFIG_INDIRECT_PIO=y -CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=320 +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_FS=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +# end of Generic Kernel Debugging Instruments + +# CONFIG_DEBUG_KERNEL is not set + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +# end of Memory Debugging + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_TEST_LOCKUP is not set +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_INFO=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y + +# +# Debug kernel data structures +# +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# +# RCU Debugging +# +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# end of RCU Debugging + +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set +# CONFIG_TEST_SORT is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set CONFIG_MEMTEST=y -CONFIG_CORESIGHT=y -CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y -CONFIG_CORESIGHT_SOURCE_ETM4X=y +# end of Kernel Testing and Coverage +# end of Kernel hacking diff --git a/recipes-kernel/linux/linux-compulab.inc b/recipes-kernel/linux/linux-compulab.inc index 82a0b6a..5520a99 100644 --- a/recipes-kernel/linux/linux-compulab.inc +++ b/recipes-kernel/linux/linux-compulab.inc @@ -1,17 +1,15 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/compulab/imx8mm:" +FILESEXTRAPATHS:prepend := "${THISDIR}/compulab/imx8mm:" -include compulab/imx8mm.inc +#include compulab/imx8mm.inc -do_configure_append () { +do_configure:append () { mkdir ${S}/firmware/brcm -p cp ${WORKDIR}/recipe-sysroot/${base_libdir}/firmware/brcm/bcm4339/4339.hcd ${S}/firmware/brcm/BCM4335C0.hcd oe_runmake ${MACHINE}_defconfig } -do_compile_prepend() { - if [ ${BUILD_REPRODUCIBLE_BINARIES} -eq 1 ];then - export SOURCE_DATE_EPOCH=$(date +%s) - fi +do_compile:prepend() { + export SOURCE_DATE_EPOCH=$(date +%s) } KERNEL_MODULE_AUTOLOAD += "goodix" diff --git a/recipes-kernel/linux/linux-compulab_5.%.bbappend b/recipes-kernel/linux/linux-compulab_5.%.bbappend new file mode 100644 index 0000000..dc415d9 --- /dev/null +++ b/recipes-kernel/linux/linux-compulab_5.%.bbappend @@ -0,0 +1,11 @@ +require linux-compulab.inc + +do_configure:prepend () { + # Merge common defconfig with specific fraggment to get specific defconfig + local CONFDIR=arch/arm64/configs + cd ${S} + scripts/kconfig/merge_config.sh -O ${CONFDIR}/ -m ${CONFDIR}/cl-imx8m-mini_defconfig ${CONFDIR}/${MACHINE}.config + mv ${CONFDIR}/.config ${CONFDIR}/${MACHINE}_defconfig + cd - +} + diff --git a/recipes-kernel/linux/linux-compulab_5.15.32.bb b/recipes-kernel/linux/linux-compulab_5.15.32.bb new file mode 100644 index 0000000..7049f9b --- /dev/null +++ b/recipes-kernel/linux/linux-compulab_5.15.32.bb @@ -0,0 +1,81 @@ +SUMMARY = "CompuLab Linux Kernel for compulab-imx8mm" + +inherit kernel-yocto kernel fsl-kernel-localversion fsl-vivante-kernel-driver-handler + +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" + +S = "${WORKDIR}/git" + +# Tell to kernel class that we would like to use our defconfig to configure the kernel. +# Otherwise, the --allnoconfig would be used per default which leads to mis-configured +# kernel. +# +# This behavior happens when a defconfig is provided, the kernel-yocto configuration +# uses the filename as a trigger to use a 'allnoconfig' baseline before merging +# the defconfig into the build. +# +# If the defconfig file was created with make_savedefconfig, not all options are +# specified, and should be restored with their defaults, not set to 'n'. +# To properly expand a defconfig like this, we need to specify: KCONFIG_MODE="--alldefconfig" +# in the kernel recipe include. +KCONFIG_MODE="--alldefconfig" + +# We need to pass it as param since kernel might support more then one +# machine, with different entry points +KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}" + +DEPENDS += "lzop-native bc-native" + +require linux-compulab_${PV}.inc + +DEFAULT_PREFERENCE = "1" + +KERNEL_VERSION_SANITY_SKIP="1" + +# Merged from the bbappend +FILESEXTRAPATHS:prepend := "${THISDIR}/compulab/${PV}/imx8mm:" + +require compulab/imx8mm.inc + +do_configure:append() { + if [ -z ${SKIP_MACHINE_DEFCONFIG} ];then + if [ -z ${KERNEL_CONFIG} ];then + oe_runmake ${MACHINE}_defconfig + else + oe_runmake ${KERNEL_CONFIG} + fi + fi +} + +do_merge_config () { + configs=arch/arm64/configs + cp ${S}/${configs}/${MACHINE}_defconfig ${S}/${configs}/compulab_defconfig + echo "# CONFIG_MACHINE_STUB is not set " > ${WORKDIR}/CONFIG_MACHINE_STUB.cfg + ${S}/scripts/kconfig/merge_config.sh -O ${S}/${configs}/ -m ${S}/${configs}/${MACHINE}_defconfig ${WORKDIR}/*.cfg + mv ${S}/${configs}/.config ${S}/${configs}/${MACHINE}_defconfig + oe_runmake ${MACHINE}_defconfig + mv ${S}/${configs}/compulab_defconfig ${S}/${configs}/${MACHINE}_defconfig +} + +do_compile:prepend() { + export SOURCE_DATE_EPOCH=$(date +%s) + do_merge_config +} + +do_install:append() { + oe_runmake headers_install INSTALL_HDR_PATH=${D}${exec_prefix}/src/linux-${KERNEL_VERSION} ARCH=$ARCH +} + +do_kernel_localversion:prepend() { + touch ${WORKDIR}/defconfig +} + +PACKAGES =+ "linux-compulab-headers" +FILES:linux-compulab-headers = "${exec_prefix}/src/linux*" + +PACKAGESPLITFUNCS:remove = "split_kernel_module_packages" + +FILES:${KERNEL_PACKAGE_NAME}-modules = "/lib/modules/ /etc/" + +COMPATIBLE_MACHINE = "(ucm-imx8mm|iot-gate-imx8)" diff --git a/recipes-kernel/linux/linux-compulab_5.15.32.inc b/recipes-kernel/linux/linux-compulab_5.15.32.inc new file mode 100644 index 0000000..79cdf0a --- /dev/null +++ b/recipes-kernel/linux/linux-compulab_5.15.32.inc @@ -0,0 +1,13 @@ +SRCBRANCH = "lf-5.15.y" +LOCALVERSION = "-1.2.0-lts" +KERNEL_SRC ?= "git://source.codeaurora.org/external/imx/linux-imx.git;protocol=https" +SRC_URI = "${KERNEL_SRC};branch=${SRCBRANCH}" + +SRCREV = "fa6c3168595c02bd9d5366fcc28c9e7304947a3d" + +# PV is defined in the base in linux-imx.inc file and uses the LINUX_VERSION definition +# required by kernel-yocto.bbclass. +# +# LINUX_VERSION define should match to the kernel version referenced by SRC_URI and +# should be updated once patchlevel is merged. +LINUX_VERSION = "5.15.32" diff --git a/recipes-kernel/linux/linux-imx_5.%.bbappend b/recipes-kernel/linux/linux-imx_5.%.bbappend index ab5889a..dc415d9 100644 --- a/recipes-kernel/linux/linux-imx_5.%.bbappend +++ b/recipes-kernel/linux/linux-imx_5.%.bbappend @@ -1,6 +1,6 @@ require linux-compulab.inc -do_configure_prepend () { +do_configure:prepend () { # Merge common defconfig with specific fraggment to get specific defconfig local CONFDIR=arch/arm64/configs cd ${S} diff --git a/recipes-net/sftp/openssh_%.bbappend b/recipes-net/sftp/openssh_%.bbappend index aff4506..a3a9a71 100644 --- a/recipes-net/sftp/openssh_%.bbappend +++ b/recipes-net/sftp/openssh_%.bbappend @@ -1,4 +1,4 @@ -do_install_append() { +do_install:append() { local SSHDCONF=${D}${sysconfdir}/ssh/sshd_config if [ -f ${SSHDCONF} ]; then diff --git a/recipes-security/optee-imx/compulab/imx8mm.inc b/recipes-security/optee-imx/compulab/imx8mm.inc index dd6e5ab..44a12e3 100644 --- a/recipes-security/optee-imx/compulab/imx8mm.inc +++ b/recipes-security/optee-imx/compulab/imx8mm.inc @@ -1,4 +1,4 @@ -SRC_URI_append = " \ - file://0001-optee-Set-the-machine-correct-UART.patch \ - file://0002-optee-Apply-a-new-CFG_TZDRAM_START-calcutation-logic.patch \ +SRC_URI:append = " \ + file://0001-plat-imx-Update-mx8mm_cl_iot_gate-flavor.patch \ + file://0002-core-drivers-Increase-nb_banks-up-to-48.patch \ " diff --git a/recipes-security/optee-imx/compulab/imx8mm/0001-plat-imx-Update-mx8mm_cl_iot_gate-flavor.patch b/recipes-security/optee-imx/compulab/imx8mm/0001-plat-imx-Update-mx8mm_cl_iot_gate-flavor.patch new file mode 100644 index 0000000..7da6555 --- /dev/null +++ b/recipes-security/optee-imx/compulab/imx8mm/0001-plat-imx-Update-mx8mm_cl_iot_gate-flavor.patch @@ -0,0 +1,32 @@ +From 20c3cdabe86e4270eceb0832189db19fd37509e9 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Dec 2021 12:58:50 +0200 +Subject: [PATCH 1/2] plat-imx: Update mx8mm_cl_iot_gate flavor + +Signed-off-by: Valentin Raevsky +--- + core/arch/arm/plat-imx/conf.mk | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk +index 7ae0d64c..6391d5bb 100644 +--- a/core/arch/arm/plat-imx/conf.mk ++++ b/core/arch/arm/plat-imx/conf.mk +@@ -368,10 +368,11 @@ CFG_UART_BASE ?= UART2_BASE + endif + + ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mm_cl_iot_gate)) +-CFG_DDR_SIZE ?= 0x40000000 ++CFG_DDR_SIZE ?= UL(0x100000000) + CFG_UART_BASE ?= UART3_BASE +-CFG_NSEC_DDR_1_BASE ?= 0x80000000UL +-CFG_NSEC_DDR_1_SIZE ?= 0x40000000UL ++CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) + 0x16000000) ++$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) ++$(call force,CFG_CORE_ARM64_PA_BITS,36) + endif + + ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk)) +-- +2.17.1 + diff --git a/recipes-security/optee-imx/compulab/imx8mm/0002-core-drivers-Increase-nb_banks-up-to-48.patch b/recipes-security/optee-imx/compulab/imx8mm/0002-core-drivers-Increase-nb_banks-up-to-48.patch new file mode 100644 index 0000000..9f1a579 --- /dev/null +++ b/recipes-security/optee-imx/compulab/imx8mm/0002-core-drivers-Increase-nb_banks-up-to-48.patch @@ -0,0 +1,26 @@ +From 556d259c9337e081193171a8822accd8d92f6dc9 Mon Sep 17 00:00:00 2001 +From: Valentin Raevsky +Date: Mon, 20 Dec 2021 13:00:25 +0200 +Subject: [PATCH 2/2] core: drivers: Increase nb_banks up to 48 + +Signed-off-by: Valentin Raevsky +--- + core/drivers/imx_ocotp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/core/drivers/imx_ocotp.c b/core/drivers/imx_ocotp.c +index 9758a972..616e8729 100644 +--- a/core/drivers/imx_ocotp.c ++++ b/core/drivers/imx_ocotp.c +@@ -216,7 +216,7 @@ static const struct ocotp_instance ocotp_imx7ulp = { + }; + + static const struct ocotp_instance ocotp_imx8m = { +- .nb_banks = 32, ++ .nb_banks = 48, + .nb_words = 8, + .get_die_id = ocotp_get_die_id_mx, + }; +-- +2.17.1 + diff --git a/recipes-security/optee-imx/optee-os_%.bbappend b/recipes-security/optee-imx/optee-os_%.bbappend index 87d649f..312ed7c 100644 --- a/recipes-security/optee-imx/optee-os_%.bbappend +++ b/recipes-security/optee-imx/optee-os_%.bbappend @@ -1,4 +1,4 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/compulab/imx8mm:" +FILESEXTRAPATHS:prepend := "${THISDIR}/compulab/imx8mm:" require compulab/imx8mm.inc COMPATIBLE_MACHINE = "mx8" diff --git a/scripts/imx-5.10.35_2.0.0_compulab.xml b/scripts/imx_5.15.32-2.0.0-compulab.xml similarity index 55% rename from scripts/imx-5.10.35_2.0.0_compulab.xml rename to scripts/imx_5.15.32-2.0.0-compulab.xml index 50602fb..bba291e 100644 --- a/scripts/imx-5.10.35_2.0.0_compulab.xml +++ b/scripts/imx_5.15.32-2.0.0-compulab.xml @@ -1,13 +1,11 @@ - - - - - + + + diff --git a/templates/bblayers.conf/bblayers.extra.conf.append b/templates/bblayers.conf/bblayers.extra.conf.append index 246a81f..a8bfd84 100644 --- a/templates/bblayers.conf/bblayers.extra.conf.append +++ b/templates/bblayers.conf/bblayers.extra.conf.append @@ -6,4 +6,5 @@ BBLAYERS += " \ ${BSPDIR}/sources/meta-compulab-bsp/meta-bsp \ ${BSPDIR}/sources/meta-compulab-bsp/meta-devtool \ ${BSPDIR}/sources/meta-compulab-bsp/meta-net \ + ${BSPDIR}/sources/meta-compulab-bsp/meta-utils \ " diff --git a/templates/local.conf/chromium.append b/templates/local.conf/chromium.append index 021b556..5e1a95a 100644 --- a/templates/local.conf/chromium.append +++ b/templates/local.conf/chromium.append @@ -1,7 +1,8 @@ +#;DISABLE Chromium #;prompt Add Chromium browser [yes] # Add Chromium -IMAGE_INSTALL_append = \ +IMAGE_INSTALL:append = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', ' chromium-ozone-wayland', \ bb.utils.contains('DISTRO_FEATURES', 'x11', ' chromium-x11', \ '', d), d)}" diff --git a/templates/local.conf/local.conf.append b/templates/local.conf/local.conf.append index de67f81..07116fa 100644 --- a/templates/local.conf/local.conf.append +++ b/templates/local.conf/local.conf.append @@ -1,11 +1,18 @@ -LICENSE_FLAGS_WHITELIST = "commercial" +LICENSE_FLAGS_ACCEPTED = "commercial" CORE_IMAGE_EXTRA_INSTALL += " cl-uboot cl-deploy cl-stest cl-camera cl-audio " -CORE_IMAGE_EXTRA_INSTALL += " u-boot-fw-utils " CORE_IMAGE_EXTRA_INSTALL += " memtester htop iotop tmux iperf3 " CORE_IMAGE_EXTRA_INSTALL += " wvdial " - +CORE_IMAGE_EXTRA_INSTALL += " libubootenv-bin u-boot-compulab-env " CORE_IMAGE_EXTRA_INSTALL += " u-boot-update-script " -IMAGE_BOOT_FILES_append = " boot.update.scr " +CORE_IMAGE_EXTRA_INSTALL += " linux-firmware-ax210 firmware-imx-sdma-imx7d " + +CORE_IMAGE_EXTRA_INSTALL:append:iot-gate-imx8 = " u-boot-script linux-firmware-ax200" +CORE_IMAGE_EXTRA_INSTALL:append:iot-gate-imx8 = " networkmanager networkmanager-nmcli wireless-tools " +CORE_IMAGE_EXTRA_INSTALL:append:iot-gate-imx8 = " libgpiod-tools eeprom-util bluez5 gpsd modemmanager " +CORE_IMAGE_EXTRA_INSTALL:append:iot-gate-imx8 = " gps-utils can-utils minicom ntp ntpdate " +EXTRA_IMAGE_FEATURES:append:iot-gate-imx8 = " ssh-server-openssh " +IMAGE_BOOT_FILES:append = " boot.update.scr " HOSTTOOLS += " git-lfs" -PREFERRED_RPROVIDER_u-boot-fw-utils = "u-boot-fw-utils" +PREFERRED_RPROVIDER:u-boot-fw-utils = "u-boot-fw-utils" +CL_DEPLOY_MOD = "1" diff --git a/templates/local.conf/optee.append b/templates/local.conf/optee.append index 579b6f3..0bf10f2 100644 --- a/templates/local.conf/optee.append +++ b/templates/local.conf/optee.append @@ -1,2 +1,2 @@ -#;prompt Enable Trusted Execution Environment optee OS [no] -MACHINE_FEATURES_append += " optee " +#; Enable Trusted Execution Environment optee OS [no] +MACHINE_FEATURES:append = " optee " diff --git a/templates/local.conf/ro_rootfs.append b/templates/local.conf/ro_rootfs.append index ffd12c6..0b50372 100644 --- a/templates/local.conf/ro_rootfs.append +++ b/templates/local.conf/ro_rootfs.append @@ -1,3 +1,3 @@ -#;prompt Read only root FS [no] +#;DISABLE prompt Read only root FS [no] -IMAGE_FEATURES += " read-only-rootfs " \ No newline at end of file +IMAGE_FEATURES += " read-only-rootfs " diff --git a/templates/local.conf/rt_kernel.append b/templates/local.conf/rt_kernel.append index 668a83b..dc2fdec 100644 --- a/templates/local.conf/rt_kernel.append +++ b/templates/local.conf/rt_kernel.append @@ -1,3 +1,3 @@ -#;prompt Realtime kernel support [no] +#;DISABLE prompt Realtime kernel support [no] IMAGE_FEATURES += " realtime-kernel "