From 004969e89666c8686548ac5107bbf238ec92df0c Mon Sep 17 00:00:00 2001 From: Kirill Kapranov Date: Sun, 28 May 2023 22:14:02 +0300 Subject: [PATCH] u-boot:ucm:mcm:dts: enable mmc1 SD card Signed-off-by: Kirill Kapranov --- recipes-bsp/u-boot/compulab/imx8mm.inc | 1 + ...0133-ucm-mcm-dts-enable-mmc2-SD-card.patch | 83 +++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 recipes-bsp/u-boot/compulab/imx8mm/0133-ucm-mcm-dts-enable-mmc2-SD-card.patch diff --git a/recipes-bsp/u-boot/compulab/imx8mm.inc b/recipes-bsp/u-boot/compulab/imx8mm.inc index 4ed8828..8ef1c1e 100644 --- a/recipes-bsp/u-boot/compulab/imx8mm.inc +++ b/recipes-bsp/u-boot/compulab/imx8mm.inc @@ -130,6 +130,7 @@ SRC_URI:append = " \ file://0130-board-Fix-FDT-processing-to-comply-with-topology.patch \ file://0131-u-boot-localversion-3.2.patch \ file://0132-iot-gate-imx8-board-diagnostics-fix.patch \ + file://0133-ucm-mcm-dts-enable-mmc2-SD-card.patch \ file://cl_setenv \ " diff --git a/recipes-bsp/u-boot/compulab/imx8mm/0133-ucm-mcm-dts-enable-mmc2-SD-card.patch b/recipes-bsp/u-boot/compulab/imx8mm/0133-ucm-mcm-dts-enable-mmc2-SD-card.patch new file mode 100644 index 0000000..44cabef --- /dev/null +++ b/recipes-bsp/u-boot/compulab/imx8mm/0133-ucm-mcm-dts-enable-mmc2-SD-card.patch @@ -0,0 +1,83 @@ +From 7a577eeea92598bac8ca5ba2c9d23254e9333929 Mon Sep 17 00:00:00 2001 +From: Kirill Kapranov +Date: Thu, 25 May 2023 23:39:57 +0300 +Subject: [PATCH 133/133] ucm:mcm:dts: enable mmc1 SD card + +Signed-off-by: Kirill Kapranov +--- + arch/arm/dts/ucm-imx8m-mini.dts | 61 +++++++++++++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + +diff --git a/arch/arm/dts/ucm-imx8m-mini.dts b/arch/arm/dts/ucm-imx8m-mini.dts +index 7b81e8a75b..2853e1d425 100644 +--- a/arch/arm/dts/ucm-imx8m-mini.dts ++++ b/arch/arm/dts/ucm-imx8m-mini.dts +@@ -19,4 +19,65 @@ + / { + model = "CompuLab UCM-iMX8M-Mini board"; + compatible = "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm"; ++ + }; ++ ++&iomuxc { ++ ucm-imx8m-mini { ++ pinctrl_usdhc2_gpio: usdhc2grpgpio { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ++ MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0 ++ >; ++ }; ++ ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_100mhz: usdhc2grp100mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ ++ pinctrl_usdhc2_200mhz: usdhc2grp200mhz { ++ fsl,pins = < ++ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 ++ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 ++ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 ++ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 ++ >; ++ }; ++ }; ++}; ++ ++&usdhc2 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; ++ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; ++ bus-width = <4>; ++ fsl,wp-controller; ++ non-removable; ++ vmmc-supply = <®_usdhc2_vmmc>; ++ status = "okay"; ++}; ++ +-- +2.17.1 +